EP2940682B1

EP2940682B1 - Pixel circuit, display device, and drive method therefor

Info

Publication number: EP2940682B1
Application number: EP13869147.2A
Authority: EP
Inventors: Hui Zhu; Yong Qiu; Xiuqi HUANG; Xiaoyu Gao; Siming HU; Zhenzhen HAN
Original assignee: Kunshan New Flat Panel Display Technology Center Co Ltd; Kunshan Govisionox Optoelectronics Co Ltd
Current assignee: Kunshan New Flat Panel Display Technology Center Co Ltd; Kunshan Govisionox Optoelectronics Co Ltd
Priority date: 2012-12-31
Filing date: 2013-12-20
Publication date: 2017-04-19
Anticipated expiration: 2033-12-20
Also published as: TWI493531B; EP2940682A4; JP2016504629A; US10339863B2; CN103021339A; KR101678333B1; JP6035434B2; US20150356922A1; KR20150103186A; EP2940682A1; TW201430817A; CN103021339B; WO2014101719A1

Description

TECHNICAL FIELD

The present invention relates to a pixel circuit, a display device and a method for driving the pixel circuit, and more particularly relates to a pixel circuit of an organic light-emitting diode capable of compensating a threshold voltage of a driving transistor, a display device and a method for driving the pixel circuit.

BACKGROUND

In recent years, various types of flat panel display devices, which have light weight and small size compared with cathode ray tube (CRT) displays, have been developed. Among the various types of flat panel display devices, by using a self-light-emitting organic light-emitting diode (OELD) to display images, an active matrix organic light-emitting display device with a thin-film transistor (TFT) backplane usually has the characteristics of short response time, low power consumption for driving, and better brightness and color purity. Therefore, the organic light-emitting display device has become a focus of the next-generation display devices.
FIG. 1 schematically shows a circuit diagram of a traditional active matrix organic light-emitting display device 100, wherein the active matrix organic light-emitting display device 100 comprises a data driver and a scanning driver (not shown in FIG. 1). The data driver is configured to control a plurality of data lines DA1...DAm in transversal arrangement, and the scanning driver is configured to control a plurality of scanning lines SC1...SCn in longitudinal arrangement. A plurality of pixel circuits 110 are formed in intersection areas between the plurality of data lines DA1...DAm and the plurality of scanning lines SC1...SCn.
With reference to FIG.1, the pixel circuit 110 comprises an organic light-emitting diode (OLED)1, a storage capacitor C11, a switching transistor T11, a driving transistor T12, a first power source ELVDD1, and a second power source ELVSS1, wherein both the transistors T11 and T12 are P-channel metal-oxide semiconductor transistors (PMOS). A grid of the switching transistor of the switching transistor T11 is coupled to one scanning line SC1, a source of the switching transistor T11 is coupled to one data line DA1, and a drain of the switching transistor T11 is coupled to a grid of the second transistor T12. A source of the driving transistor T12 is coupled to the high-voltage power source ELVDD1, and a drain of the driving transistor T12 is coupled to an anode of the OLED1. A cathode of the OLED1 is coupled to the low-voltage power source ELVSS1. A first terminal of the storage capacitor C11 is coupled to the first power source ELVDD1, and a second terminal of the storage capacitor C11 is coupled to the grid of the second transistor.
The scanning driver applies scanning signals to the scanning lines SC1 to SCn in sequence, and the data driver applies corresponding data signals via the data lines DA1 to DAm according to image data to be displayed. Thus, the pixel circuits 110 located in the intersection areas supply a driving current flowing through the organic light-emitting diode according to the signals of the scanning lines and data lines coupled to the pixel circuits.
Using the pixel circuit 110 shown in FIG. 1 as an example, when the scanning drive applies the scanning signals to the scanning line SC1, the switching transistor T11 is conducted, and at this point, a voltage of the data signals on the data line DA1 is stored in the storage capacitor C11 through the switching transistor T11. The driving transistor T12 supplies a driving current I_OLED1 according to the voltage stored in the storage capacitor C11 to drive the organic light-emitting diode OLED1 to emit the light of the corresponding brightness. A formula for the driving current is shown as below: $I_{OLED 1} = 1 / 2 µ_{12} \times C_{ox 12} \times W_{12} / L_{12} \times {(V_{GS 12} - V_{TH 12})}^{2}$
wherein µ₁₂ is a carrier mobility of the driving transistor T12, C_ox12 is a capacitance of a control end oxidation layer per unit area of the driving transistor T12, W₁₂ is a channel width of the driving transistor T12, L₁₂ is a channel length of the driving transistor T12, V_GS12 is a voltage difference between the grid and the source of the driving transistor T12, and V_TH12 is a threshold voltage of the driving transistor T12. That is, the driving current flowing through the organic light-emitting diode OLED1 can be controlled according to the magnitude of a data voltage from the data line DA1 to display a predefined grayscale.
A large active matrix organic light-emitting display device comprises a number of pixel circuits, and each of which need to comprise a driving transistor. The electric difference among different driving transistors results in different threshold voltages on the driving transistors. Therefore, according to the formula 1, it can be known that when the data voltages supplied to the pixel circuits 110 are the same, the driving currents supplied to the organic light-emitting diodes may vary with different threshold voltages of the driving transistors. This will result in the problems of poor quality uniformity and poor consistency of an image displayed by a plurality of pixel circuits.
US 2003/0132931 discloses a pixel circuit configured to apply a desired electric potential to a gate electrode of a driving TFT of an EL device through a second TFT having its gate and drain connected to each other and configured such that a voltage equal to the threshold voltage of driving TFT is produced between the source and the drain of the second TFT. The TFTs are disposed in close proximity to each other within the pixel.
EP 2 146 337 discloses a pixel circuit capable of improving response characteristics and displaying an image having a uniform image quality.
US 2006/0082524 discloses a pixel circuit comprising an organic EL element, a first switch for switching data voltage supplied to a data line in response to a select signal, a first TFT for supplying the current to the organic EL element in response to the data voltage, a second TFT having a gate coupled to the gate of the first TFT for compensating deviations of the threshold voltage of the first TFT, and a capacitor for maintaining the data voltage supplied to the gate of the first TFT.
CN101847365 discloses a pixel circuit comprising a light-emitting component and a drive unit electrically connected with the light-emitting component. The drive unit comprising a first transistor configured to compensate the threshold voltage of a driving transistor and configured to control the light-emitting component to stop emitting light in response to a time-varying signal.

SUMMARY

In view of this, a main objective of the present invention is to provide a novel pixel circuit structure capable of compensating a difference in a threshold voltage of the driving transistor. The present invention provides a pixel circuit capable of producing a desired brightness and an active matrix organic light-emitting display device employing the pixel circuit, wherein the pixel circuit is capable of improving the response characteristic of the active matrix organic light-emitting diode to display the image with uniform image quality.
To achieve the above objective, the present teaching provides a pixel circuit as detailed in claim 1. Also provided is a method according to claim 9 and a display device according to claim 13.
Advantageous features are provided in dependent claims.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram of a pixel circuit of a traditional active matrix organic light-emitting display device;
FIG. 2 is a schematic diagram of a pixel circuit according to a first embodiment of the present invention;
FIG. 3 is a signal timing diagram of a method for driving the pixel circuit as shown in FIG. 2.
FIG. 4 is a schematic diagram of a pixel circuit according to a second embodiment of the present invention;
FIG. 5 is a signal timing diagram of a method for driving the pixel circuit as shown in FIG. 4.
FIG. 6 is a schematic diagram of a pixel circuit according to a third embodiment of the present invention;
FIG. 7 is a signal timing diagram of a method for driving the pixel circuit as shown in FIG. 6.
FIG. 8 is a schematic diagram of a pixel circuit according to a fourth embodiment of the present invention;
FIG. 9 is a schematic diagram of a pixel circuit according to a fifth embodiment of the present invention; and
FIG. 10 is a schematic diagram of an active matrix organic light-emitting display device of the present invention.

DETAILED DESCRIPTION

In the following, the pixel circuit and the method for driving the pixel circuit according to the present invention will be further described in detail with reference to the appended drawings and the embodiments of the present invention.
It is necessary to note that the term "coupled/couple/coupling" as referred to in the present invention includes either direct connection between elements or connection between elements via other components.
For ease of description, a pixel circuit and a method for driving the pixel circuit according to an embodiment of the present invention will be described with reference to FIG. 2 and FIG. 3.
FIG. 2 shows a schematic diagram of a pixel circuit 200 according to a first embodiment of the present invention.
With reference to FIG. 2, the pixel circuit 200 comprises: a first transistor T1, a second transistor T2, a third transistor T3, a capacitor C1, and an organic light-emitting diode (OLED). Each of the transistors T1 to T3 comprises a control end, a first electrode 1, and a second electrode 2. The first electrode of the first transistor T1 is coupled to a data line Dm, the control end of the first transistor T1 is coupled to a node N1, and the second electrode of the first transistor T1 is coupled to the first electrode of the second transistor T2. The control end of the second transistor T2 is coupled to a first scanning line Sn1 configured to receive a first scanning signal from the first scanning line Sn1, the first electrode of the second transistor T2 is coupled to the second electrode of the second transistor, and the second electrode of the second transistor T2 is coupled to the node N1. A first terminal of the capacitor C1 is coupled to the node N1, and a second terminal of the capacitor C1 is coupled to a second power source ELVSS. The control end of the third transistor T3 is coupled to the node N1, the first electrode of the third transistor T3 is coupled to the first power source ELVDD, and the second electrode of the third transistor T3 is coupled to an anode of the OLED. A cathode of the OLED is coupled to the second power source ELVSSO. Preferably, the control end may be a grid of each of the transistors T1 to T3, the first electrode may be a source of each of the transistors T1 to T3, and the second electrode may be a drain of each of the transistors T1 to T3. Similarly, the control end of each of the transistors T4, T5 and T6 may be a grid of each of the transistors T4 to T6, the first electrode may be a drain of each of the transistors T1 to T3, and the second electrode may be a drain of each of the transistors T1 to T3.
FIG. 3 shows a signal timing diagram for a method for driving the pixel circuit 200 as shown in FIG. 2. The signal timing as shown in FIG. 3 includes a first phase and a second phase, wherein the first phase t1 is a data writing phase, and the second phase t2 is a normal light-emitting phase. As all the transistors T1 to T3 in the pixel circuit 200 as shown in FIG. 2 are described using PMOS transistors as an example, the transistors are conducted when low-level signals are applied to the control ends of the transistors.
As shown in FIG. 3, in the first phase, i.e., a time period t1 in which the scanning signals are applied to the scanning line Sn1, the first transistor T1 and the second transistor T2 respond to the low-level scanning signals Sn1 to be conducted. Therefore, the data signals Vdata from the data line Dm are provided to the node N1 via the first transistor T1 and the second transistor T2. It can be understood that, at this point, the voltage value at the node N1 is a voltage value corresponding to a differential value between the data signals Vdata and the threshold voltage of the first transistor T1, i.e., Vdata-|V_TH1|, which is equivalent to Vdata+V_TH1. Further, the voltage at the node N1 is also stored in the capacitor C1. That is, the data signals Vdata on the data line Dmare are read into the pixel circuit 200.
In the second phase t2, that is, after the voltage of the first scanning line Sn1 jumps to a high level, the OLED enters the normal light-emitting phase. At this point, a current of the first power source ELVDD flows through the third transistor T3 into the anode of the OLED.
The driving current flowing into the OLED is shown as a formula below: $I_{OLED} = 1 / 2 µ_{3} \times C_{ox 3} \times W_{3} / L_{3} \times {(V_{GS 3} - V_{TH 3})}^{2}$
wherein µ₃ is a carrier mobility of the third transistor T3; C_ox3 is a capacitance of a control end oxidation layer per unit area of the third transistor T3, W₃ is a channel width of the third transistor, and L₃ is a channel length of the third transistor T3. V_GS3 is a voltage difference between the grid and the source of the third transistor T3, and V_TH3 is the threshold voltage of the third transistor T3.
At this point, as the third transistor is conducted, the voltage V_GS3 for the grid and the source is the voltage (Vdata+V_TH1) at the node N1, and the voltage difference between the voltage V_GS3 and the voltage Vdd of the first power source is Vdata+V_TH1-Vdd. Therefore, through calculation in the above formula, the following formula may be obtained: $I_{OLED} = 1 / 2 µ_{3} \times C_{ox 3} \times W_{3} / L_{3} \times {(V_{data} + V_{TH 1} - V_{dd} - V_{TH 3})}^{2}$
It follows that the impact of the threshold voltage of the third transistor T3 to the driving current of OLED may be reduced by arranging the first transistor T1 with appropriate electric characteristics.
Preferably, if the transistors T1 and T3 with similar electrical characteristics as much as possible are arranged, the threshold voltage of the third transistor T3 can be offset to almost zero, thereby allowing the driving current flowing into the OLED to be free from the impact of the threshold voltage of the third transistor T3. That is, the current value of the OLED is as follows: $I_{OLED} = 1 / 2 µ_{3} \times C_{ox 3} \times W_{3} / L_{3} \times {(V_{data} - V_{dd})}^{2}$
Wherein for the arrangement of the first transistor T1 and the third transistor T3 with similar electrical characteristics as much as possible, two transistors approximate in channel width and channel length as much as possible may be arranged, and are arranged in the pixel circuit 200 in a close range.
Preferably, the pixel circuit 200 may also be arranged on a TFT backplane, with the first and third transistors T1 and T3 symmetrically arranged, so that the threshold voltages of the first and third transistors T1 and T3 are as close as possible.
FIG. 4 shows a schematic diagram of a pixel circuit 300 according to a second embodiment of the present invention. Compared with the pixel circuit as shown in FIG. 2, the pixel circuit 300 further comprises a fourth transistor T4; wherein a control end of the fourth transistor T4 is coupled to a second scanning line Sn2 configured to receive a second scanning signal from the second scanning line Sn2, a first electrode of the fourth transistor T4 is coupled to the second electrode of the third transistor T3, and a second electrode of the fourth transistor T4 is coupled to the anode of the OLED
FIG. 5 shows a signal timing diagram of a drive method according to the pixel circuit 300 as shown in FIG. 4. Compared with the signal timing diagram as shown in FIG. 3, the signal timing diagram as shown in FIG.4 is different in that the scanning signal is provided to the second scanning line Sn2 in the second phase t2. At this point, the third transistor T3 and the fourth transistor T4 are conducted simultaneously, thereby providing the data signals to the OLED through the third transistor T3 and the fourth transistor T4. Furthermore, the OLED enters the normal light-emitting phase.
It can be understood that as the fourth transistor T4 is arranged in the pixel circuit 300, the conduction time and the shutdown time of the fourth transistor T4 may be controlled through the second scanning line Sn2, thereby controlling the light-emitting time of the OLED through the fourth transistor T4. That is, when the transistor T4 is shut down, the OLED does not emit light; and when the transistor T4 is conducted, the OLED emits light. The OLED in the pixel circuit 200 as shown in FIG. 2 is always in a light-emitting state since the third transistor T3 is conducted continuously. Therefore, the light-emitting effect of the pixel circuit 3 becomes more stable.
FIG. 6 shows a schematic diagram of a pixel circuit 400 according to a third embodiment of the present invention. Compared with the pixel circuit 300 as shown in FIG. 4, the pixel circuit 400 further comprises a fifth transistor T5; wherein a control end of the fifth transistor T5 is coupled to a third scanning line Sn3 configured to receive a third scanning signal from the third scanning line Sn3, a first electrode of the fifth transistor T5 is coupled to the node N1, and a second electrode of the fifth transistor T5 is coupled to the third power source. The voltage Vinit of the third power source is not higher than V_ELVSS.
For those skilled in the art, it can be understood that when the value of Vinit is equal to that of V_ElVSS, the source electrode of the fifth transistor can be coupled to the second power source ELVSS.
FIG. 7 shows a signal timing diagram of a pixel circuit 400 as shown in FIG. 6. The signal timing further comprises an initialization phase before the first phase.
In the initialization phase, i.e., the time period t0 in which the scanning signals are provided to the scanning line Sn3, the fifth transistor T5 is conducted, thereby supplying the voltage of the third power source Vinit to the node N1 and the anode of the OLED.
That is, the fifth transistor T5 supplies a constant voltage to the node N1 and the anode of the OLED in the initialization time period. Thus, the voltage at the node N1 and the voltage of the capacitor C1 are initialized to be Vinit.
Preferably, the initialized voltage Vinit may be set to be the same as the voltage of the second power source ELVSS.
FIG. 8 shows a schematic diagram of a pixel circuit 500 according to the fourth embodiment of the present invention. Compared with the circuit as shown in FIG. 6, the pixel circuit 500 further comprises a sixth transistor T6.
The sixth transistor T6 is coupled between the anode of the OLED and the second power source ELVSS. A control end of the sixth transistor T6 and the control end of the fifth transistor T5 are jointly coupled to the scanning line Sn3 configured to receive a third scanning signal; and a first electrode and a second electrode of the sixth transistor T6 are respectively coupled to the anode and the cathode of the OLED. In the time period in which the low-level scanning signal is provided to the scanning line Sn3, the sixth transistor T6 is conducted. Since the first and second electrodes of the sixth transistor T6 are respectively coupled to the anode and the cathode of the OLED, the driving current may be prevented from being supplied to the OLED.
FIG. 9 shows a schematic diagram of a pixel circuit 600 according to a fifth embodiment of the present invention. Compared with the circuit as shown in FIG. 7, the pixel circuit 600 further comprises a second capacitor C2. The second capacitor C2 is coupled between the control end of the second transistor T2 and the node N1.
It can be understood that in the time period in which the scanning signal of the scanning line Sn1 jumps from low level to high level, since Vdata is stored in the node N1, the voltage increases the potential of the node N1 through the coupling effect of the second capacitor C2 when the voltage of the scanning line Sn1 turns into high level, thereby correspondingly improving the voltage Vdata+V_TH1 of the control end of the third transistor T3 and storing the corresponding voltage into the second capacitor C2.Due to Vdata < Vdd, from the formula 4, it can be known that the increase in the voltage value of the control end of the third transistor T3 results in the decrease of the differential value between the voltage of the control end of the third transistor T3 and Vdd. Therefore, when the voltage of the data signals, read into the pixel circuit 600, is very small, i.e. when the grayscale for light emitting is very low, the driving current flowing through the OLED is made to decrease further, thereby improving the contrast among different grayscales of the pixel circuit.
It is necessary to note that the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 in the pixel circuits of the embodiments above are described by using the P-channel metal-oxide semiconductor transistor as an example. Those skilled in the art may understand that the transistors T1 to T6 in the pixel circuit of the present invention may also be implemented by using N-channel metal-oxide semiconductor transistors.
FIG. 10 shows an active matrix organic light-emitting display device 600 comprising the pixel circuit according to the embodiments of the present invention.
With reference to FIG. 10, a display device 700 comprises: a first power source ELVDD, a second power source ELVSS, a scanning driver 702, a data driver 703, and a plurality of pixel circuits 701 arranged in intersection areas between the scanning lines Sn1, Sn2 and Sn3 and the data lines D1 to Dm in a matrix manner. The first power source ELVDD and the second power source ELVSS supply corresponding power voltages to the plurality of pixel circuits 701 through corresponding row lines (with the number of n) and column lines (with the number of m).
Each pixel circuit 701 is coupled to the corresponding scanning line (for example, Sn2, Sn2 and Sn3) and data line respectively. For example, the pixel circuit 701 located in the row i and the column j is coupled to the scanning lines Si1, Si2 and Si3 of the row i and the data line Dj of the column j.
The scanning driver 702 generates the scanning signals corresponding to the scanning signals provided externally (for example, by a certain control unit). The scanning signals generated by the scanning driver 702 are respectively provided to the pixel circuits 701 in sequence through the scanning lines Si1 to Sin.
The data driver 703 generates the data signals corresponding to the data and data control signals provided externally (for example, by a certain control unit). The data signals generated by the data driver 703 are provided to the pixel circuit 701 through the data lines D1 to Dm in synchronization with the scanning signals, wherein the pixel circuit 701 may be any one pixel circuit as shown in the embodiments above. It can be understood that the number of the scanning lines in each row may be differently arranged accordingly according to different embodiments of the pixel circuit.
Although the present invention is described with reference to specific exemplary embodiments, it should be understood that the present invention is not limited to such embodiments.

Claims

A pixel circuit, comprising: a first power source (ELVDD), a second power source (ELVSS), an organic light-emitting diode (OLED), a first capacitor (C1), a first transistor (T1), a second transistor (T2), and a third transistor (T3); wherein
a cathode of the organic light-emitting diode is coupled to the second power source;
each of the first transistor, the second transistor, and the third transistor is provided with a control end, a first electrode (1), and a second electrode (2); wherein
the control end of the first transistor is coupled to a node (N1), and the first electrode of the first transistor is configured to receive a data signal (Vdata);
the control end of the second transistor (T2) is configured to receive a first scanning signal, the first electrode of the second transistor is coupled to the second electrode of the first transistor, and the second electrode of the second transistor is coupled to the node and a terminal of the first capacitor (C1);
the control end of the third transistor is coupled to the node, the first electrode of the third transistor is coupled to the first power source, and the second electrode of the third transistor is coupled to an anode of the light-emitting diode and wherein there is a direct connection of the control end of the first transistor and the control end of the third transistor at the node;
characterized in that the first capacitor is coupled between the node (N1) and the second power source, and in that the first transistor and the third transistor are configured to be approximate in channel width and channel length, and are arranged in the pixel circuit in a close range to compensate a threshold voltage of the third transistor (T3).
The pixel circuit according to claim 1, wherein:
the pixel circuit is arranged on a TFT backplane; and

the first transistor and the third transistor are symmetrically arranged on the TFT backplane.
The pixel circuit according to claim 1, further comprising a fourth transistor; wherein,
a control end of the fourth transistor is configured to receive a second scanning signal, a first electrode of the fourth transistor is coupled to the second electrode of the third transistor, and a second electrode of the fourth transistor is coupled to an anode of the light-emitting diode.
The pixel circuit according to claim 1, further comprising a fifth transistor and a third power source;
wherein the fifth transistor comprises: a control end configured to receive a third scanning signal, a first electrode coupled to the node, and a second electrode coupled to the third power source.
The pixel circuit according to claim 4, wherein a voltage of the third power source is lower than or equal to a voltage of the second power source.
The pixel circuit according to claim 4, further comprising a sixth transistor;
wherein the sixth transistor comprises: a control end configured to receive the third scanning signal, a first electrode coupled to the anode of the light-emitting diode, and a second electrode coupled to the second power source.
The pixel circuit according to claim 1, further comprising a second capacitor coupled between the control end of the second transistor and the node.
The pixel circuit according to any one of claims 1 to 7, wherein:
the transistors are P-channel metal-oxide semiconductor transistors.
A method for driving the pixel circuit according to claim 1, the drive method comprises applying a first scanning signal to a first scanning line for conducting the second transistor such that data signals from a data line are provided to the node (N1) via the first transistor and the second transistor, and storing a voltage at the node in the first capacitor; providing the data signals to the light-emitting diode via the third transistor; and emitting, by the light-emitting diode, light with a brightness matching the data signals.
The drive method according to claim 9, wherein:
the pixel circuit further comprises a fourth transistor according to claim 3, and

the method further comprises:
applying a second scanning signal to a second scanning line for conducting the fourth transistor such that the data signals are provided to the light-emitting diode via the third transistor.
The drive method according to claim 10, wherein:
the pixel circuit further comprises a fifth transistor according to claim 4, and the method comprises applying a third scanning signal for conducting the fifth transistor, before applying the first scanning signal, to initialize the node.
The drive method according to claim 9, wherein:
the pixel circuits are arranged on a TFT backplane; and

the first transistor and the third transistor are symmetrically arranged on the TFT backplane.
A display device (700), comprising:
a scanning driver (702), configured to apply a scanning signal to a scanning line (Sn1, Sn2, Sn3);

a data driver (703), configured to apply a data signal to a data line (D1-Dm); and

a pixel circuit (701) coupled between the data lines and scanning lines, in accordance with any one of claims 1 to 8.