WO2014101338A1 - 一种低寄生电感的igbt功率模块 - Google Patents

一种低寄生电感的igbt功率模块 Download PDF

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Publication number
WO2014101338A1
WO2014101338A1 PCT/CN2013/071344 CN2013071344W WO2014101338A1 WO 2014101338 A1 WO2014101338 A1 WO 2014101338A1 CN 2013071344 W CN2013071344 W CN 2013071344W WO 2014101338 A1 WO2014101338 A1 WO 2014101338A1
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chip
igbt
bridge arm
substrate
diode chip
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French (fr)
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蔡超峰
盛况
汪涛
郭清
谢刚
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Zhejiang University ZJU
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Zhejiang University ZJU
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16Modifications for eliminating interference voltages or currents
    • H03K17/168Modifications for eliminating interference voltages or currents in composite switches
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/20Conductive package substrates serving as an interconnection, e.g. metal plates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/481Leadframes for devices being provided for in groups H10D8/00 - H10D48/00
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/5363Shapes of wire connectors the connected ends being wedge-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5445Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/547Dispositions of multiple bond wires
    • H10W72/5473Dispositions of multiple bond wires multiple bond wires connected to a common bond pad
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/547Dispositions of multiple bond wires
    • H10W72/5475Dispositions of multiple bond wires multiple bond wires connected to common bond pads at both ends of the wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/551Materials of bond wires
    • H10W72/552Materials of bond wires comprising metals or metalloids, e.g. silver
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/811Multiple chips on leadframes

Definitions

  • the invention relates to an IGBT power module. Background technique
  • an IGBT module device usually includes one or more pairs of IGBT chips to form a single or multiple bridge arms for use in inverter circuits and the like.
  • switching speeds and switching frequencies are continuously improved to minimize losses and improve performance.
  • the loop inductance is usually reduced by compressing the loop area as much as possible.
  • the switching process is still affected by the loop inductance inside the IGBT module, making the consideration of loop inductance more important in module design.
  • the IGBT module and its own inverted diode are generally placed directly on the same copper substrate, instead of considering the parasitic inductance from the perspective of the dynamic loop.
  • the IGBT and the diode in the loop are placed close to each other, and the parasitic inductance is reduced by direct crimping or direct adjacent placement. Summary of the invention
  • the technical problem to be solved by the present invention is to provide an IGBT power with low parasitic inductance.
  • the module which is suitable for all IGBT power modules with reversed diodes, significantly reduces the parasitic inductance of the loop.
  • a low parasitic inductance IGBT power module comprising a first switching loop and a second switching loop that are mutually commutated, wherein: the first switching loop includes an upper bridge arm IGBT The chip and the lower arm are combined with the diode chip, and the second switching circuit comprises a lower arm IGBT chip and an upper arm anti-diode chip; the lower arm anti-parallel diode chip is crimped on the surface of the upper arm IGBT chip, and the lower arm is reversed The cathode of the diode chip is directly connected to the emitter of the upper arm IGBT chip, eliminating the loop area and parasitic inductance introduced by the wire bonding.
  • the surface of the upper arm IGBT chip leads the first switching circuit through the first bonding wire.
  • the center of the bridge arm, the anode of the lower arm and the diode chip is led out to the ground through the second wire, the upper arm IGBT chip is crimped on the first substrate, and the first substrate is directly used as the high voltage end of the lead-out module;
  • the arm IGBT chip and the upper arm anti-parallel diode chip are respectively placed on the adjacent second substrate and the third substrate, and the second substrate is used as the second switching circuit.
  • the third substrate is connected to the cathode of the upper arm and the diode chip, the emitter of the lower arm IGBT chip is led out to the ground through the third bonding wire, and the upper arm is connected to the diode chip through the fourth bonding wire.
  • the low parasitic inductance IGBT power module comprises one or more sets of the first switching circuit and the second switching circuit.
  • the first bonding wire, the second bonding wire, the third bonding wire, and the fourth bonding wire are all solder wires; the first bonding wire, the second bonding wire, the third bonding wire, and the fourth bonding wire may also adopt other Material, and any diameter wire can be used.
  • the first substrate, the second substrate, and the third substrate are all copper substrates;
  • a substrate of a metal material can also be applied to the IGBT power module of the present invention, and there is no limitation on the thickness of the substrate.
  • the beneficial effects of the present invention are:
  • the IGBT power module of the present invention is suitable for an IGBT power module of an anti-diode, and any combination of an IGBT chip and any type of anti-parallel diode can be used.
  • the invention adopts a reverse crimping method to minimize the inductance in the loop to the maximum, so that the switching loop in the application avoids excessive oscillations and spikes.
  • the invention reduces the module. The occupied area of the chip, so as to reduce the size of the module, to bring convenience to practical applications.
  • FIG. 1 is a schematic structural view of a first switching circuit of the present invention.
  • FIG. 2 is a schematic structural view of a second switching circuit of the present invention.
  • FIG 3 is a circuit diagram of a complete bridge arm in the IGBT module of the present invention.
  • the label 1 a first substrate, 2 - upper arm IGBT chip, 3 - lower arm reverse diode chip, 4 - first bonding wire, 5 - second bonding wire, 6 - second substrate, 7 - Lower arm IGBT chip, 8 - upper arm reverse diode chip, 9 - third substrate, 10 - third bonding wire, 11 - first switching circuit, 12 - second switching circuit, 13 - fourth bonding wire.
  • the upper arm IGBT chip 2 and the lower arm decoupling diode chip 3 constitute a first switching circuit 11, wherein the lower surface of the upper arm IGBT chip 2 is a collector, and the upper surface is an emitter, wherein Also includes a separate gate surface; lower arm anti-diode core
  • the upper surface of the sheet 3 is an anode, and the lower surface is a cathode.
  • the area of the lower bridge arm and the diode chip 3 is smaller than the area of the upper arm IGBT chip 2.
  • the lower arm anti-parallel diode chip 3 is directly crimped to the surface of the upper arm IGBT chip 2 by soldering, so that the anode of the lower arm reverses the diode chip 3 is directly connected to the emitter of the upper arm IGBT chip 2, thereby eliminating the need for The loop area and parasitic inductance introduced by the wire bonding, the first bonding wire 4 is taken out from the excess surface of the upper arm IGBT chip 2 to obtain the center of the bridge arm, and the second bonding wire 5 is connected to the lower arm and the diode chip 3
  • the anode leads to the ground end of the module, and the upper arm IGBT chip 2 is crimped onto the first substrate 1.
  • the first substrate 1 is directly used as the high voltage end of the lead-out module.
  • the lower arm IGBT chip 7 and the upper arm decoupling diode chip 8 constitute a second switching circuit 12, and the emitter and collector of the lower arm IGBT chip 7 are located on the upper surface, and the upper arm is reversed.
  • the upper surface of the diode chip 8 is a cathode, and the lower surface is an anode.
  • the lower arm IGBT chip 7 is directly soldered on the second substrate 6, and the upper arm reverse diode chip 8 is soldered to the third.
  • the second substrate 6 and the third substrate 9 are placed adjacent to each other, and the path of the adjacent circuit is reduced as much as possible, and the third bonding wire 10 is connected to the emitter of the lower arm IGBT chip 7 to be taken as the ground terminal of the module.
  • the fourth bonding wire 13 is connected to the anode of the second substrate 6 and the upper bridge and the diode chip 8.
  • the anode of the upper arm is reversed and the anode of the diode chip 8 is connected to the collector of the lower arm IGBT chip 7, and the second substrate 6 is connected.
  • the third substrate 9 is connected to the cathode of the upper arm and the diode chip 8, and serves as the high voltage end of the lead-out module.
  • the IGBT module of the present invention can adopt any packaging process and packaging material, and all the above-mentioned bonding wires can be made of welding wires of different materials and different diameters, such as soldering wires,
  • the substrate may also be a substrate of different thickness or different materials, such as a copper substrate.
  • the first switching circuit 11 and the second switching circuit 12 are combined into a switching commutating circuit of a complete IGBT power module, and the area and parasitic inductance of the two circuits are minimized by the structural design of the two circuits. .

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  • Inverter Devices (AREA)
  • Power Conversion In General (AREA)

Abstract

提供了一种低寄生电感的IGBT功率模块,包括上桥臂IGBT芯片(2)、下桥臂IGBT芯片(7)、上桥臂反并二极管芯片(8)、下桥臂反并二极管芯片(3),下桥臂反并二极管芯片(3)压接在上桥臂IGBT芯片(2)表面,下桥臂反并二极管芯片(3)的阴极与上桥臂IGBT芯片(2)的发射极直接相连,下桥臂IGBT芯片(7)与上桥臂反并二极管芯片(8)分别置于相邻放置的基板上。可采用任意类型的IGBT芯片与任意类型的反并二极管的组合。一方面,采用反向压接的办法,最大限度的将回路中的电感降到最低,使得应用中的开关回路避免出现过大的振荡和尖峰,另一方面,减小了模块中芯片的占用面积,从而达到降低模块尺寸的目的,为实际应用带来便利。

Description

一种低寄生电感的 IGBT功率模块 技术领域
本发明涉及 IGBT功率模块。 背景技术
作为重要的功率半导体器件, IGBT模块器件通常包括一对或者 多对 IGBT芯片, 从而形成单独或者多个桥臂, 用于逆变电路等多种 场合。 随着功率电路的逐步发展, 开关速度和开关频率被不断的提高 以最大程度的降低损耗, 提升工作性能。 在开关过程中, 为了有效地 提高开关速度, 同时不引起回路振荡, 通常会通过尽可能压缩回路面 积来减小回路电感。 然而即使最大程度的压缩电路回路, 开关过程依 然会受到 IGBT模块内部的回路电感的影响, 使得对回路电感的考虑 在模块设计显得愈发的重要。
在目前大量的 IGBT模块中, 普遍将 IGBT模块与自身反并的二 极管直接放在同一块铜基板上,而不是从动态回路的角度考虑寄生电 感的因素。 而在本发明中, 从一个模块中的每个动态回路出发, 将回 路中的 IGBT和二极管靠近放置, 采用直接压接或直接相邻放置的办 法缩小寄生电感。 发明内容
本发明所要解决的技术问题是提供一种低寄生电感的 IGBT功率 模块, 其适用于所有反并二极管的 IGBT功率模块, 能明显降低回路 的寄生电感。
本发明解决技术问题所采用的技术方案是: 一种低寄生电感的 IGBT功率模块, 包括相互换流的第一开关回路和第二开关回路, 其 特征是: 第一开关回路包括上桥臂 IGBT芯片、 下桥臂反并二极管芯 片, 第二开关回路包括下桥臂 IGBT芯片、 上桥臂反并二极管芯片; 下桥臂反并二极管芯片压接在上桥臂 IGBT芯片表面, 下桥臂反并二 极管芯片的阴极与上桥臂 IGBT芯片的发射极直接相连, 省去了通过 焊线连接所引入的回路面积和寄生电感, 上桥臂 IGBT芯片的表面通 过第一焊线引出第一开关回路的桥臂中心,下桥臂反并二极管芯片的 阳极通过第二焊线引出接地端,上桥臂 IGBT芯片压接在第一基板上, 第一基板直接用作引出模块的高压端; 下桥臂 IGBT芯片与上桥臂反 并二极管芯片分别置于相邻放置的第二基板和第三基板上,第二基板 作为第二开关回路的桥臂中心,第三基板连接上桥臂反并二极管芯片 的阴极, 下桥臂 IGBT芯片的发射极通过第三焊线引出接地端, 上桥 臂反并二极管芯片通过第四焊线连接第二基板。
进一步地, 所述的低寄生电感的 IGBT功率模块包括上述的一组 或多组第一开关回路和第二开关回路。
作为优选, 第一焊线、 第二焊线、 第三焊线、 第四焊线均为锡焊 丝; 第一焊线、第二焊线、第三焊线、第四焊线也可以采用其他材料, 且可以选用任意直径大小的焊线。
作为优选, 第一基板、 第二基板、 第三基板均为铜制基板; 其他 金属材料的基板也可以适用于本发明的 IGBT功率模块, 且对基板的 厚度没有限制。
本发明的有益效果是: 本发明的 IGBT功率模块适用于反并二极 管的 IGBT功率模块, 可以采用任意类型的 IGBT芯片与任意类型的 反并二极管的组合。 一方面, 本发明采用反向压接的办法, 最大限度 的将回路中的电感降到最低,使得应用中的开关回路避免出现过大的 振荡和尖峰, 另一方面, 本发明减小了模块中芯片的占用面积, 从而 达到降低模块尺寸的目的, 为实际应用带来便利。 附图说明
图 1为本发明的第一开关回路的结构示意图。
图 2为本发明的第二开关回路的结构示意图。
图 3为本发明的 IGBT模块中一个完整的桥臂电路图。
图中标号: 1一第一基板, 2—上桥臂 IGBT芯片, 3—下桥臂反 并二极管芯片, 4一第一焊线, 5—第二焊线, 6—第二基板, 7—下桥 臂 IGBT芯片, 8—上桥臂反并二极管芯片, 9一第三基板, 10—第三 焊线, 11一第一开关回路, 12—第二开关回路, 13—第四焊线。 具体实施方式
如图 1所示, 上桥臂 IGBT芯片 2和下桥臂反并二极管芯片 3构 成第一开关回路 11 , 其中, 上桥臂 IGBT芯片 2的下表面为集电极, 上表面为发射极, 其中还包括独立的门极表面; 下桥臂反并二极管芯 片 3的上表面为阳极, 下表面为阴极, 下桥臂反并二极管芯片 3的面 积小于上桥臂 IGBT芯片 2的面积。
下桥臂反并二极管芯片 3通过焊锡直接压接在上桥臂 IGBT芯片 2的表面, 使得下桥臂反并二极管芯片 3的阳极直接与上桥臂 IGBT 芯片 2的发射极相连,从而省去了焊线连接所引入的回路面积和寄生 电感, 第一焊线 4从上桥臂 IGBT芯片 2多余的表面引出, 获得桥臂 中心, 第二焊线 5连接下桥臂反并二极管芯片 3的阳极, 向外引出模 块的接地端, 上桥臂 IGBT芯片 2压接在第一基板 1上, 第一基板 1 直接用作引出模块的高压端。
如图 2所示, 下桥臂 IGBT芯片 7和上桥臂反并二极管芯片 8构 成第二开关回路 12, 下桥臂 IGBT芯片 7的发射极和集电极都位于上 表面, 上桥臂反并二极管芯片 8的上表面为阴极, 下表面为阳极, 在 第二开关回路中, 直接将下桥臂 IGBT芯片 7焊接在第二基板 6上, 将上桥臂反并二极管芯片 8焊接在第三基板 9上,第二基板 6和第三 基板 9相邻放置, 并尽可能减小相邻回路的路径, 第三焊线 10连接 下桥臂 IGBT芯片 7的发射极,作为模块的接地端引出, 第四焊线 13 连接第二基板 6与上桥臂反并二极管芯片 8的阳极,实现上桥臂反并 二极管芯片 8的阳极与下桥臂 IGBT芯片 7的集电极相连, 第二基板 6直接作为桥臂中心, 第三基板 9连接上桥臂反并二极管芯片 8的阴 极, 用作引出模块的高压端。
本发明的 IGBT模块可以采用任意的封装工艺和封装材料, 上述 的所有焊线均可采用不同材料、 不同直径的焊线, 例如锡焊线, 上述 的基板也均可采用不同厚度、 不同材料的基板, 例如铜制基板。 如图 3所示,第一开关回路 11和第二开关回路 12组合成完整的 IGBT功率模块的开关换流回路, 通过两个回路的结构设计, 将两个 回路的面积和寄生电感减低到最小。
上述具体实施例用于结合附图对本发明的技术方案作进一步具 体说明,但并不能将本发明的范围局限于具体实施方式的内容。 本领 域技术人员应该认识到,本发明涵盖了权利要求书范围内所有可能包 括的所有备选方案、 改进方案和等效方案。

Claims

权 利 要 求 书
、 一种低寄生电感的 IGBT功率模块, 包括相互换流的第一开关回 路 (11)和第二开关回路 (12), 其特征是: 第一开关回路 (11)包括上 桥臂 IGBT芯片(2)、下桥臂反并二极管芯片(3),第二开关回路 (12) 包括下桥臂 IGBT 芯片(7)、 上桥臂反并二极管芯片(8); 下桥臂 反并二极管芯片(3)压接在上桥臂 IGBT 芯片(2)表面, 下桥臂反 并二极管芯片(3)的阴极与上桥臂 IGBT 芯片(2)的发射极直接相 连, 上桥臂 IGBT 芯片(2)的表面通过第一焊线 (4)引出第一开关 回路的桥臂中心, 下桥臂反并二极管芯片(3)的阳极通过第二焊 线 (5)引出接地端, 上桥臂 IGBT芯片(2)压接在第一基板 (1)上; 下桥臂 IGBT 芯片(7)与上桥臂反并二极管芯片(8)分别置于相邻 放置的第二基板 (6)和第三基板 (9)上, 第二基板 (6)作为第二开关 回路的桥臂中心, 第三基板 (9)连接上桥臂反并二极管芯片(8)的 阴极, 下桥臂 IGBT芯片(7)的发射极通过第三焊线 (10)引出接地 端, 上桥臂反并二极管芯片(8)通过第四焊线 (13)连接第二基板 (6)。
、 根据权利要求 1所述的一种低寄生电感的 IGBT功率模块, 其特 征是: 所述 IGBT功率模块包括一组或多组第一开关回路和第二 开关回路。
、 根据权利要求 1所述的一种低寄生电感的 IGBT功率模块, 其特 征是: 第一焊线 (4)、 第二焊线 (5)、 第三焊线 (10)、 第四焊线 (13) 均为锡焊丝。
、 根据权利要求 1所述的一种低寄生电感的 IGBT功率模块, 其特 征是: 第一基板 (1)、 第二基板 (6)、 第三基板 (9)均为铜制基板。
PCT/CN2013/071344 2012-12-25 2013-02-04 一种低寄生电感的igbt功率模块 Ceased WO2014101338A1 (zh)

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