WO2014063335A1 - 一种液晶面板的扫描驱动电路、液晶显示装置和驱动方法 - Google Patents

一种液晶面板的扫描驱动电路、液晶显示装置和驱动方法 Download PDF

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Publication number
WO2014063335A1
WO2014063335A1 PCT/CN2012/083537 CN2012083537W WO2014063335A1 WO 2014063335 A1 WO2014063335 A1 WO 2014063335A1 CN 2012083537 W CN2012083537 W CN 2012083537W WO 2014063335 A1 WO2014063335 A1 WO 2014063335A1
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Prior art keywords
liquid crystal
crystal panel
scan
control signal
delay component
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PCT/CN2012/083537
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English (en)
French (fr)
Inventor
郭东胜
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深圳市华星光电技术有限公司
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Application filed by 深圳市华星光电技术有限公司 filed Critical 深圳市华星光电技术有限公司
Priority to US13/703,347 priority Critical patent/US20140111502A1/en
Publication of WO2014063335A1 publication Critical patent/WO2014063335A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only

Definitions

  • the present invention relates to the field of liquid crystal display, and more particularly to a scan driving circuit, a liquid crystal display device and a driving method of a liquid crystal panel.
  • the liquid crystal display panel includes vertical and horizontal scanning lines and control lines, and the scanning lines are controlled by scanning driving chips disposed on both sides of the liquid crystal panel.
  • there are three control signals for controlling the scanning drive chip for turning on and off each line of the liquid crystal display which are start pulse signal (STV), which controls the start of the first line; clock pulse signal CKV (clock voltage pulse), Provided to the scan driver chip shift register, control the switching frequency of each row, start to operate when the rising edge detects that STV is high; output enable control signal OE (output enable), because there is parasitic capacitance inside the liquid crystal panel There is a delay in the scan output voltage (out) sent to the LCD panel.
  • STV start pulse signal
  • CKV clock voltage pulse
  • OE output enable
  • control signals of these scan driver chips are transmitted from the printed circuit board PCBA to the glass of the liquid crystal panel via the flexible circuit board of the data chip, and transmitted to the scan driver chip through the glass trace, as shown in FIG.
  • the technical problem to be solved by the present invention is to provide a liquid crystal panel for reducing wiring of a liquid crystal panel. Scan drive circuit, liquid crystal display device and driving method.
  • a scan driving circuit of a liquid crystal panel wherein a driving circuit of the liquid crystal panel includes a delay component, an input end of the delay component is coupled to an enable control signal, and an output end is coupled to a clock pulse signal, and the delay component is The delay time is less than the action time of a single enable control signal.
  • the delay component includes at least one inverter arranged in series. This is the circuit structure of a specific delay component.
  • the delay time of the inverter is adjustable.
  • the time of a single inverter can be adjusted, so that the delay time can be adjusted within a certain range.
  • multiple inverters can be cascaded, so that any delay time can be set by using the same inverter. Expanded the scope of application of the inverter.
  • the scan driving circuit of the liquid crystal panel includes a scan driving chip, and the delay component is integrated in the scan driving chip, and the scan driving chip can generate an enable control by receiving control information of the same signal line. Signal and clock pulse signals. This can improve the integration of the circuit, which is beneficial to reduce the development cycle and facilitate production.
  • a liquid crystal display device includes a scan driving circuit of a liquid crystal panel, wherein a driving circuit of the liquid crystal panel includes a delay component, an input end of the delay component is coupled to an enable control signal, and an output terminal is coupled to the clock pulse signal
  • the delay time of the delay component is less than the action time of the single enable control signal.
  • the delay component includes at least one inverter arranged in series, and the delay time of the inverter is adjustable.
  • the time of a single inverter can be adjusted, so that the delay time can be adjusted within a certain range, and more than one inverter can be cascaded, so that the same inverse is used.
  • the phaser can realize the setting of any delay time and expand the application range of the inverter.
  • the liquid crystal display device includes a liquid crystal panel and a driving circuit board, the panel includes vertical and horizontal scanning lines and data lines, and the side of the panel is provided with a scanning driving chip for driving the scanning lines, and the delay component is integrated in the In the scan driving chip, a data driving chip for driving a data line is disposed on an adjacent side of the scanning chip, the driving circuit board is coupled with the data chip, and the liquid crystal panel is provided with a control a start pulse signal line of the scan driving chip and an enable control signal line, the scan drive chip generates an enable control signal and a clock pulse signal by enabling the control signal line; the enable control signal line is coupled to the delay At the input of the component, the start pulse signal line and the enable control signal line are coupled to the drive circuit board through a data drive chip.
  • This is a circuit structure of a specific liquid crystal display device.
  • a driving method for a scanning line of a liquid crystal panel comprising the steps of:
  • the delay component includes at least one inverter arranged in series. This is the circuit structure of a specific delay component.
  • the delay component is integrated in a scan driving chip of the liquid crystal panel.
  • the invention adopts a delay component, and the delay component can output the delay after the same input signal, and the pulse width of each scan line drive is related to the signal width of one cycle of the clock pulse signal, and one cycle of the clock pulse signal.
  • the pulse width of the high level signal is not directly related. Therefore, the pulse width of the clock signal is kept consistent with the pulse width of the enable control signal, so that the signal multiplexing can be realized by the delay component, and the input end of the delay component
  • the enable control signal is used as a clock pulse signal after extending the delay component, thereby reducing the number of control signal lines of the scan chip, and obtaining space for the narrow bezel design; in addition, the control line is required to pass the COF, and the number of control lines is reduced. The spacing between the control lines becomes larger, which reduces the difficulty of binding the COF; in addition, the number of pins of the corresponding chip can be reduced, and the packaging cost of the chip can be reduced.
  • 1 is a schematic diagram of a scan line driving waveform without an enable control signal
  • 2 is a schematic diagram of a scan line driving waveform with an enable control signal
  • 3 is a schematic diagram of a conventional scan driving circuit of a liquid crystal panel
  • FIG. 4 is a schematic diagram of a principle of implementing signal delay by using a plurality of inverters in series according to an embodiment of the present invention
  • FIG. 5 is a schematic diagram of a time difference limitation between an enable control signal and a clock control signal in an embodiment of the present invention. Schematic diagram of the drive waveform.
  • a scan driving circuit of a liquid crystal panel wherein a driving circuit of the liquid crystal panel includes a delay component, an input end of the delay component is coupled to an enable control signal, and an output end is coupled to a clock pulse signal, and the delay component is The delay time is less than the action time of a single enable control signal.
  • the invention adopts a delay component, and the delay component can output the delay after the same input signal, and the pulse width of each scan line drive is related to the signal width of one cycle of the clock pulse signal, and one cycle of the clock pulse signal.
  • the pulse width of the high level signal is not directly related. Therefore, the pulse width of the clock signal is kept consistent with the pulse width of the enable control signal, so that the signal multiplexing can be realized by the delay component, and the input end of the delay component
  • the enable control signal is used as a clock pulse signal after extending the delay component, thereby reducing the number of control signal lines of the scan chip, and obtaining space for the narrow bezel design; in addition, the control line is required to pass the COF, and the number of control lines is reduced. The spacing between the control lines becomes larger, which reduces the difficulty of binding the COF; in addition, the number of pins of the corresponding chip can be reduced, and the packaging cost of the chip can be reduced.
  • the liquid crystal display device of the embodiment includes a liquid crystal panel and a driving circuit board.
  • the panel includes vertical and horizontal scanning lines and data lines.
  • the side of the panel is provided with a scanning driving chip for driving the scanning lines, and the adjacent side of the scanning chip is provided with driving data lines.
  • the driving circuit board is coupled with the data chip
  • the liquid crystal panel is provided with a starting pulse signal line for controlling the scanning driving chip and an enabling control signal line
  • the delay driving component is integrated in the scanning driving chip, and the scanning driving chip passes
  • the enable control line generates an enable control signal and a clock pulse signal
  • the input of the delay component is coupled to the enable control signal line
  • the output generates a clock pulse
  • the rush signal, the delay time of the delay component is less than the action time of the single enable control signal
  • the start pulse signal line and the enable control signal line are coupled to the drive circuit board through the data drive chip.
  • the extension assembly of the present invention can also be disposed external to the scan driver chip and then coupled to the scan driver chip via other signal lines.
  • the delay component of the embodiment adopts an inverter.
  • the delay time of the inverter is adjustable, and may be connected in series, but the total extension time 2n*A t cannot exceed a single enable control signal.
  • the action time ton (see Figure 5).
  • a single inverter can adjust the delay time within a certain range.
  • multiple inverters can be connected in series, so that the same inverter can be used to achieve any delay time setting, which expands the application of the inverter. range.
  • the embodiment further discloses a driving method for a scanning line of a liquid crystal panel, comprising the steps of:
  • the drive circuit generates an enable control signal after the start pulse signal is issued.
  • the enable control signal is coupled to the delay component, and the clock pulse signal is output through the delay component;
  • the delay component can be integrated In the scan driving chip of the liquid crystal panel;
  • the delay component is composed of a plurality of inverters connected in series;
  • the scan chip drives the scan line according to the enable control signal and the clock pulse signal generated by the same signal line (see Figure 6 for the drive waveform).

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

公开了一种液晶面板的扫描驱动电路、液晶显示装置和驱动方法。所述液晶面板的驱动电路包括延时组件，所述延时组件的输入端耦合到时能控制信号（OE），输出端耦合到时钟脉冲信号（CLK），所述延时组件的延迟时间小于单个使能控制信号（OE）的作用时间。

Description

一种液晶面板的扫描驱动电路、 液晶显示装置和驱动方法
【技术领域】
本发明涉及液晶显示领域， 更具体的说， 涉及一种液晶面板的扫描驱动电 路、 液晶显示装置和驱动方法。
【背景技术】
液晶显示面板包括纵横交错的扫描线和控制线， 扫描线通过设置在液晶面 板两侧的扫描驱动芯片进行控制。 目前控制液晶显示每一行开启和关闭的扫描 驱动芯片需求的控制信号有 3个，分别是开始脉沖信号 STV( start voltage pulse ), 控制第一行的开始； 时钟脉沖信号 CKV ( clock voltage pulse ), 提供到扫描驱动 芯片移位寄存器， 控制每一行的开关频率， 在上升沿侦测到 STV为高电平的时 候开始动作； 输出使能控制信号 OE ( output enable ), 因为液晶面板内部有寄生 电容， 扫描输出电压 （out )送到液晶面板内会有延时， 行与行之间的关闭和开 启会有交叠的问题， 这样数据会有错充的问题， 如图 1所示。 加入 OE之后， 因 为 OE在高电平的时候所以输出电压会被强制拉低，将 OE至于行与行开启和关 闭的切换之间， 可以错了两行有交叠开启的问题， 避免了数据错充的问题， 如 图 2所示。
这些扫描驱动芯片的控制信号会由印刷电路板 PCBA, 经由数据芯片的软 性电路板传到液晶面板的玻璃， 通过玻璃走线传送到扫描驱动芯片， 如图 3 所 示。
目前液晶面板的主流设计都往窄边框方面发展， 都在尽可能从各种途径来 缩小玻璃边沿的设计， 每一个微小空间的节省都可能是至关重要的， 因此过多 的走线会占据玻璃边沿的空间， 有必要减少走线的数量。
【发明内容】
本发明所要解决的技术问题是提供一种减少液晶面板走线的一种液晶面板 的扫描驱动电路、 液晶显示装置和驱动方法。
本发明的目的是通过以下技术方案来实现的：
一种液晶面板的扫描驱动电路， 所述液晶面板的驱动电路包括延时组件， 所述延时组件的输入端耦合到使能控制信号， 输出端耦合到时钟脉沖信号， 所 述延时组件的延迟时间小于单个使能控制信号的作用时间。
进一步的， 所述延时组件包括至少一个串联设置的反相器。 此为一种具体 的延时组件的电路结构。
进一步的， 所述反相器的延时时间可调。 单个反相器的时间可调， 这样可 以在一定范围内调整延时时间， 再加上可以采用多个反相器级联， 这样采用同 一种反相器就能实现任意延时时间的设置， 拓展了反相器的适用范围。
进一步的， 所述液晶面板的扫描驱动电路包括扫描驱动芯片， 所述延时组 件集成在所述扫描驱动芯片中， 所述扫描驱动芯片通过接受同一信号线的控制 信息， 就能产生使能控制信号和时钟脉沖信号。 这样可以提升电路的集成度， 有利于减少开发周期， 方便生产。
一种液晶显示装置， 包括一种液晶面板的扫描驱动电路， 所述液晶面板的 驱动电路包括延时组件， 所述延时组件的输入端耦合到使能控制信号， 输出端 耦合到时钟脉沖信号， 所述延时组件的延迟时间小于单个使能控制信号的作用 时间。
进一步的， 所述延时组件包括至少一个串联设置的反相器， 所述反相器的 延时时间可调。 为一种具体的延时组件的电路结构， 单个反相器的时间可调， 这样可以在一定范围内调整延时时间， 再加上可以采用多个反相器级联， 这样 采用同一种反相器就能实现任意延时时间的设置， 拓展了反相器的适用范围。
进一步的， 所述液晶显示装置包括液晶面板和驱动电路板， 面板包括纵横 交错的扫描线和数据线， 所述面板侧部设有驱动扫描线的扫描驱动芯片， 所述 延时组件集成在所述扫描驱动芯片中； 扫描芯片相邻的一边设有驱动数据线的 数据驱动芯片， 所述驱动电路板跟所述数据芯片耦合， 所述液晶面板上设有控 制扫描驱动芯片的开始脉沖信号线和使能控制信线， 所述扫描驱动芯片通过使 能控制信线产生使能控制信号和时钟脉沖信号； 所述使能控制信线耦合到所述 延时组件的输入端， 所述开始脉沖信号线和使能控制信号线通过数据驱动芯片 跟所述驱动电路板耦合。 此为一种具体的液晶显示装置的电路结构。
一种液晶面板扫描线的驱动方法， 包括步骤：
A: 驱动电路发出开始脉沖信号后产生使能控制信号， 在使能控制信号导通 周期内， 将使能控制信号耦合到延时组件， 通过延时组件输出时钟脉沖信号； B：扫描芯片根据同一信号线产生的使能控制信号和时钟脉沖信号驱动扫描 线。
进一步的， 所述步骤 A中， 所述延时组件包括至少一个串联设置的反相器。 此为一种具体的延时组件的电路结构。
进一步的， 所述步骤 A中， 所述延时组件集成在所述液晶面板的扫描驱动 芯片中。
本发明由于采用了延时组件， 延时组件可以对同一输入信号延时后进行输 出， 而每个扫描线驱动的脉沖宽度跟时钟脉沖信号一个周期的信号宽度有关， 跟时钟脉沖信号一个周期内高电平信号的脉沖宽度并没有直接关系， 因此， 将 时钟脉沖信号的脉沖宽度跟使能控制信号的脉沖宽度保持一致， 这样通过延时 组件就能实现信号复用， 延时组件的输入端是使能控制信号， 该信号经过延时 组件的延伸后作为时钟脉沖信号， 从而减少扫描芯片的控制信号线的数量， 为 窄边框设计争取空间； 另外控制线要通过 COF, 控制线数量减少， 控制线之间 的间距变大， 降低 COF的绑定难度； 另外也可以降低相应芯片的引脚数量， 降 低芯片的封装成本。
【附图说明】
图 1是没有使能控制信号的扫描线驱动波形示意图；
图 2是有使能控制信号的扫描线驱动波形示意图； 图 3是现有的一种液晶面板的扫描驱动电路示意图；
图 4是本发明实施例采用多个反相器串联实现信号延时的原理示意图； 图 5是本发明实施例中使能控制信号和时钟控制信号之间时差限制的示意 图 6是本发明实施例的驱动波形示意图。
【具体实施方式】
一种液晶面板的扫描驱动电路， 所述液晶面板的驱动电路包括延时组件， 所述延时组件的输入端耦合到使能控制信号， 输出端耦合到时钟脉沖信号， 所 述延时组件的延迟时间小于单个使能控制信号的作用时间。
本发明由于采用了延时组件， 延时组件可以对同一输入信号延时后进行输 出， 而每个扫描线驱动的脉沖宽度跟时钟脉沖信号一个周期的信号宽度有关， 跟时钟脉沖信号一个周期内高电平信号的脉沖宽度并没有直接关系， 因此， 将 时钟脉沖信号的脉沖宽度跟使能控制信号的脉沖宽度保持一致， 这样通过延时 组件就能实现信号复用， 延时组件的输入端是使能控制信号， 该信号经过延时 组件的延伸后作为时钟脉沖信号， 从而减少扫描芯片的控制信号线的数量， 为 窄边框设计争取空间； 另外控制线要通过 COF, 控制线数量减少， 控制线之间 的间距变大， 降低 COF的绑定难度； 另外也可以降低相应芯片的引脚数量， 降 低芯片的封装成本。
下面结合附图和较佳的实施例对本发明作进一步说明。
本实施例的液晶显示装置包括液晶面板和驱动电路板， 面板包括纵横交错 的扫描线和数据线， 面板侧部设有驱动扫描线的扫描驱动芯片， 扫描芯片相邻 的一边设有驱动数据线的数据驱动芯片， 驱动电路板跟所述数据芯片耦合， 液 晶面板上设有控制扫描驱动芯片的开始脉沖信号线和使能控制信线， 扫描驱动 芯片内集成有延时组件， 扫描驱动芯片通过使能控制信线产生使能控制信号和 时钟脉沖信号； 延时组件的输入端耦合到使能控制信号线， 输出端产生时钟脉 沖信号， 延时组件的延迟时间小于单个使能控制信号的作用时间； 开始脉沖信 号线和使能控制信号线通过数据驱动芯片跟所述驱动电路板耦合。 当然， 本发 明的延伸组件也可以设置在扫描驱动芯片的外部， 然后通过其他信号线跟扫描 驱动芯片耦合。
本实施方式的延时组件采用反相器， 如图 4所示， 反相器的延时时间可调， 并可以多个串联， 但总的延伸时间 2n* A t不能超过单个使能控制信号的作用时 间 ton (参见图 5 )。 单个反相器可以在一定范围内调整延时时间， 再加上可以采 用多个反相器串联， 这样采用同一种反相器就能实现任意延时时间的设置， 拓 展了反相器的适用范围。
本实施方式还公开一种液晶面板扫描线的驱动方法， 包括步骤：
A: 驱动电路发出开始脉沖信号后产生使能控制信号， 在使能控制信号导通 周期内， 将使能控制信号耦合到延时组件， 通过延时组件输出时钟脉沖信号； 延时组件可以集成在所述液晶面板的扫描驱动芯片中； 延时组件由多个反相器 串联组成；
B:扫描芯片根据同一信号线产生的使能控制信号和时钟脉沖信号驱动扫描 线 （驱动波形参见图 6 )。
以上内容是结合具体的优选实施方式对本发明所作的进一步详细说明， 不 能认定本发明的具体实施只局限于这些说明。 对于本发明所属技术领域的普通 技术人员来说， 在不脱离本发明构思的前提下， 还可以做出若干筒单推演或替 换， 都应当视为属于本发明的保护范围。

Claims

权利要求
1、一种液晶面板的扫描驱动电路，所述液晶面板的驱动电路包括延时组件， 所述延时组件的输入端耦合到使能控制信号， 输出端耦合到时钟脉沖信号， 所 述延时组件的延迟时间小于单个使能控制信号的作用时间。
2、 如权利要求 1所述的一种液晶面板的扫描驱动电路， 其中， 所述延时组 件包括至少一个串联设置的反相器。
3、 如权利要求 2所述的一种液晶面板的扫描驱动电路， 其中， 所述反相器 的延时时间可调。
4、 如权利要求 1所述的一种液晶面板的扫描驱动电路， 其中， 所述液晶面 板的扫描驱动电路包括扫描驱动芯片， 所述延时组件集成在所述扫描驱动芯片 中， 所述扫描驱动芯片通过接受同一信号线的控制信息， 就能产生使能控制信 号和时钟脉沖信号。
5、 一种液晶显示装置， 包括一种液晶面板的扫描驱动电路， 所述液晶面板 的驱动电路包括延时组件， 所述延时组件的输入端耦合到使能控制信号， 输出 端耦合到时钟脉沖信号， 所述延时组件的延迟时间小于单个使能控制信号的作 用时间。
6、 如权利要求 5所述的一种液晶显示装置， 其中， 所述延时组件包括至少 一个串联设置的反相器， 所述反 4目器的延时时间可调。
7、 如权利要求 6所述的一种液晶显示装置， 其中， 所述液晶显示装置包括 液晶面板和驱动电路板， 面板包括纵横交错的扫描线和数据线， 所述面板侧部 设有驱动扫描线的扫描驱动芯片， 所述延时组件集成在所述扫描驱动芯片中； 扫描芯片相邻的一边设有驱动数据线的数据驱动芯片， 所述驱动电路板跟所述 数据芯片耦合， 所述液晶面板上设有控制扫描驱动芯片的开始脉沖信号线和使 能控制信线， 所述扫描驱动芯片通过使能控制信线产生使能控制信号和时钟脉 沖信号； 所述使能控制信线耦合到所述延时组件的输入端， 所述开始脉沖信号 线和使能控制信号线通过数据驱动芯片跟所述驱动电路板耦合。
8、 一种液晶面板扫描线的驱动方法， 包括步骤：
A: 驱动电路发出开始脉沖信号后产生使能控制信号， 在使能控制信号导通 周期内， 将使能控制信号耦合到延时组件， 通过延时组件输出时钟脉沖信号； B：扫描芯片根据同一信号线产生的使能控制信号和时钟脉沖信号驱动扫描 线。
9、 如权利要求 8所述的一种液晶面板扫描线的驱动方法， 其中， 所述步骤 A中， 所述延时组件包括至少一个串联设置的反相器。
10、 如权利要求 8所述的一种液晶面板扫描线的驱动方法， 其中， 所述步 骤 A中， 所述延时组件集成在所述液晶面板的扫描驱动芯片中。
PCT/CN2012/083537 2012-10-23 2012-10-26 一种液晶面板的扫描驱动电路、液晶显示装置和驱动方法 WO2014063335A1 (zh)

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