WO2014015598A1 - 传感器及其制造方法 - Google Patents

传感器及其制造方法 Download PDF

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Publication number
WO2014015598A1
WO2014015598A1 PCT/CN2012/085290 CN2012085290W WO2014015598A1 WO 2014015598 A1 WO2014015598 A1 WO 2014015598A1 CN 2012085290 W CN2012085290 W CN 2012085290W WO 2014015598 A1 WO2014015598 A1 WO 2014015598A1
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Prior art keywords
photodiode
electrode
area
pattern
drain
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PCT/CN2012/085290
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English (en)
French (fr)
Inventor
李田生
徐少颖
谢振宇
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北京京东方光电科技有限公司
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Priority to EP12878647.2A priority Critical patent/EP2879178B1/en
Priority to US14/125,830 priority patent/US9190438B2/en
Publication of WO2014015598A1 publication Critical patent/WO2014015598A1/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14609Pixel-elements with integrated switching, control, storage or amplification elements
    • H01L27/14612Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14603Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14632Wafer-level processed structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/1464Back illuminated imager structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14643Photodiode arrays; MOS imagers
    • H01L27/14658X-ray, gamma-ray or corpuscular radiation imagers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14687Wafer level processing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14689MOS based technologies
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14692Thin film technologies, e.g. amorphous, poly, micro- or nanocrystalline silicon

Definitions

  • Embodiments of the present invention relate to a sensor and a method of fabricating the same. Background technique
  • CT computed tomography
  • the sensor 12 includes a plurality of scan lines 15, a plurality of data lines 16, and a plurality of sensing units, each of which includes a photodiode 13 and a field effect transistor ( Field Effect Transistor (FET) 14, the gate of the field effect transistor 14 is connected to a corresponding scan line 15 in the sensor 12, the source of the field effect transistor 14 and the corresponding data line in the sensor 12 (Data Line) 16 Connected, the photodiode 13 is connected to the drain of the field effect transistor 14. One end of these data lines 16 is connected to the data readout circuit 18 via a connection pin 17.
  • FET Field Effect Transistor
  • the above sensor operates on the principle that the sensor 12 applies a drive scan signal through the scan line 15 to control the switching state of the field effect transistor 14 of each sense unit.
  • the photocurrent signal generated by the photodiode 13 is sequentially output through the data line 16 connected to the field effect transistor 14 and the data readout circuit 18, by controlling the timing of the signal on the scan line 15 and the data line 16.
  • the collecting function of the photocurrent signal is realized, that is, the control effect of the photocurrent signal generation generated by the photodiode 13 is realized by controlling the switching state of the FET 14.
  • each sensing unit includes: a substrate, a gate layer, a gate insulating layer, an active layer, a source and a drain layer, a passivation layer, a PIN junction of a PIN photosensor, and a transparent electrode window layer, and a bias voltage Line layer and light barrier layer.
  • TFT Thin Film Transistor
  • the light needs to pass through two passivation layers to reach the PIN photodiode. Since the passivation layer is thick, the light loss is serious, the light absorption and utilization rate is low, and the energy consumption is high, imaging Quality cannot be further improved. Summary of the invention
  • the object of the present invention is to provide a sensor and a manufacturing method thereof, which are capable of solving the technical problem that the optical loss of the prior sensor is relatively serious, the light absorption and utilization rate is low, the energy consumption is high, and the imaging quality cannot be further improved.
  • a sensor comprising: a substrate substrate, a set of gate lines and a set of data lines arranged in a cross, an array of rows defined by the set of gate lines and a set of data lines a plurality of sensing units of the cloth, each of the sensing units including a photodiode sensor device and a thin film transistor device, wherein
  • the photodiode sensor device includes: a bias line located above the substrate substrate; a transparent electrode located above the bias line in conductive contact with the bias line; and located above the transparent electrode a photodiode; and a receiving electrode located above the photodiode;
  • the thin film transistor device includes: a source over the photodiode and connected to the receiving electrode, a drain over the photodiode and connected to the adjacent data line, a source and a drain opposite to form a channel; an ohmic layer over the source and the drain; an active layer over the ohmic layer and the channel; a first passivation layer over the active layer and covering the base substrate; and a gate above the first passivation layer, above the channel, the gate and the adjacent The grid lines are connected.
  • a method of fabricating a sensor includes: forming a pattern of a bias line on a substrate by a first patterning process;
  • the bias line of the sensor is prepared on the first layer on the substrate such that when the sensor is in operation, light is incident from the side of the substrate such that the light is transmitted directly through the substrate to the photodiode sensor on.
  • the above structure greatly reduces the light loss, improves the light absorption and utilization ratio, improves the image quality, and reduces the energy consumption.
  • FIG. 1 is a schematic perspective view of a conventional sensor
  • FIG 2a is a schematic top plan view of one of the sensing units of the sensor according to an embodiment of the present invention (six-time patterning process);
  • 2b is a schematic cross-sectional structural view of one of the sensing units of the sensor according to an embodiment of the present invention (six-time patterning process);
  • FIG. 3a is a plan view of the manufacturing method of the embodiment of the present invention after the first patterning process
  • FIG. 3b is a cross-sectional view of the manufacturing method of the embodiment of the present invention after the first patterning process
  • FIG. 4a is a manufacturing process of the embodiment of the present invention
  • FIG. 4b is a cross-sectional view of the manufacturing method of the embodiment of the present invention after the second patterning process
  • FIG. 5a is a cross-sectional view of the manufacturing method of the embodiment of the present invention after the third patterning process
  • Figure 5b is a cross-sectional view of the manufacturing method of the embodiment of the present invention after the third patterning process
  • Figure 6a is a plan view of the manufacturing method of the embodiment of the present invention after the fourth patterning process
  • Figure 6b is an embodiment of the present invention A cross-sectional view of the manufacturing method of the example after the fourth patterning process.
  • the senor may comprise a plurality of types, such as an X-ray sensor or the like.
  • other sensing units may be formed identically.
  • a sensor is provided.
  • a sensor includes: a substrate substrate 32, a set of gate lines 30 and a set of data lines 31 arranged in a cross, and a set of gate lines 30 and one
  • the group data lines 31 define a plurality of sensing units arranged in an array, each of which includes a thin film transistor device and a photodiode sensor device.
  • the photodiode sensor device includes: a bias line 42 on the substrate substrate 32; a transparent electrode 41 on the bias line 42 and in conductive contact with the bias line 42; and a transparent electrode 41 a photodiode 40; and a receiving electrode 39 located above the photodiode 40.
  • the thin film transistor device includes: is disposed on the photodiode 40 and connected to the receiving electrode 39 a source 33, a drain 34 located above the photodiode 40 and connected to the adjacent data line 31, the source 33 and the drain 34 are opposite to each other to form a channel; at the source 33 and the drain 34 An ohmic layer 35 on top; an active layer 36 over the ohmic layer 35 and the channel; a first passivation layer 43 over the active layer 36 and covering the substrate; and, located in the first passivation layer 43 Above, a gate 38 above the channel, the gate 38 being connected to an adjacent gate line 30.
  • the first passivation layer 43 in FIG. 2b is located on all the patterns previously formed on the substrate, and covers the exposed substrate, so that the first passivation layer 43 substantially covers the substrate. The entire area.
  • the base substrate 32 may be a substrate of a glass substrate, a plastic substrate or other materials; the gate line 30, the gate 38, the data line 31, the source 33, the drain 34, and the receiving electrode. 39 and the bias line 42 may be a single layer film of aluminum bismuth alloy (AlNd), aluminum (A1), copper (Cu), molybdenum (Mo), molybdenum tungsten alloy (MoW) or chromium (Cr), or these a composite film composed of any combination of metal elemental or alloy materials, the thickness of these single or composite films is, for example, between 150 nm and 450 nm; the material of the ohmic layer 35 may be a doped semiconductor (n+a-Si); The material of the active layer 36 may be a semiconductor material, such as amorphous silicon (a-Si), and the thickness is, for example, between 30 nm and 250 nm; the first passivation layer 43 and the second passivation layer 57 may be used
  • An inorganic insulating film for example, silicon nitride or the like
  • an organic insulating film for example, a photosensitive resin material or a non-photosensitive resin material, etc.
  • a material of the transparent electrode 41 may be, for example, indium tin oxide ( ITO) or indium oxide (IZO), etc.
  • ITO indium tin oxide
  • IZO indium oxide
  • the photodiode 40 is preferably a PIN type photodiode because the PIN type photodiode has the advantages of small junction capacitance, short transit time, high sensitivity, and the like.
  • the photodiode 40 may also employ other types of photodiodes such as MIS type photodiodes.
  • the bias line 42 acts as the first layer on the substrate substrate 32 (i.e., the lowest layer on the substrate).
  • the light is incident from the side of the substrate, so that the light is directly transmitted through the substrate to the photodiode sensor.
  • the bias line 42 is disposed parallel to the data line 31.
  • the bias line 42 may also take other arrangements, such as parallel to the grid 30 or the like.
  • the sensor of the above embodiment further includes a gate layer 38 overlying the first passivation layer.
  • a second passivation layer 57 having a signal guiding region via Fig. 2b shows only a cross-sectional structure of one of the sensing units of the sensor according to an embodiment of the present invention, and thus the signal guiding region vias located at the periphery of the substrate are not shown in this figure.
  • the second passivation layer 57 covers the gate electrode 38 and the first passivation layer 43, and thus substantially covers the entire area of the substrate substrate.
  • the photodiode 40 includes an uncorrupted region and a damaged region, and the thickness of the uncorrupted region is greater than the thickness of the damaged region, so as to form a portion of the drain formed on the uncorrupted region and formed in The sources on the uncorrupted regions are the same in height.
  • the drain 34 includes a first portion 34a and a second portion 34b, wherein the uncorrupted region corresponds to a position of the first portion 34a, the source 33, and the receiving electrode 39, the damaged region and the second portion The 34b position corresponds.
  • the uncorrupted region is a portion of the photodiode 40 under the first portion 34a of the drain 34, the source 33, and the receiving electrode 39, and the damaged region is the photoelectric The portion of diode 40 that is below the second portion 34b of drain 34.
  • These structures not only reduce the terminal difference (ie, the difference in height or thickness of the source and drain at the respective ends) of the source and drain due to the thickness difference during the manufacturing process, but also reduce the ratio of the related defects.
  • the signal conduction between the source and the drain is less disturbed, which can effectively reduce the crosstalk experienced by the thin film transistor device.
  • the materials of the source 33, the drain 34, the data line 31 and the receiving electrode 39 may be the same or different. However, it is preferable to use the same material because the source 33, the drain 34, the data line 31, and the receiving electrode 39 can be formed in the same patterning process, which improves production efficiency and reduces manufacturing cost.
  • a method of fabricating the above sensor comprising: Step 101, forming a pattern of the bias line 42 by a patterning process on the base substrate 32. Refer to Figure 3a and Figure 3b for the substrate structure after the first patterning process.
  • the one-time patterning process generally includes steps of substrate cleaning, film formation, photoresist coating, exposure, development, etching, photoresist removal, and the like.
  • Substrate cleaning includes cleaning with deionized water, organic cleaning solution, and the like.
  • the film forming process is used to form a structural layer to be patterned. For example, for a metal layer, a film is formed by physical vapor deposition (for example, magnetron sputtering), and a pattern is formed by wet etching.
  • a non-metal layer a film is formed by chemical vapor deposition, and dried. Etching forms a pattern.
  • the composition process in the following steps is the same as that, and will not be described again.
  • Step 102 Form a pattern of the transparent electrode 41 above the bias line 42 and in conductive contact with the bias line 42 by a patterning process, and a pattern of the photodiode 40 over the transparent electrode 41.
  • the structure of the substrate after the second patterning process is shown in Figures 4a and 4b.
  • the step 102 may specifically include:
  • a positive photoresist is taken as an example.
  • the completely transparent region, the semi-transmissive region and the opaque region of the mask are used for performing full exposure, partial exposure and non-exposure operations on the photoresist, after development.
  • a photoresist complete removal region, a photoresist partial removal region, and a photoresist complete retention region are obtained.
  • the photoresist is substantially completely retained in the photoresist complete retention area.
  • the opaque region is used to form a region of the first portion 34a of the receiving electrode 39, the source electrode 33 and the drain electrode 34
  • the semi-transmissive region is used to form a region of the second portion 34b of the drain electrode 34.
  • the mask used may be specifically a two-tone mask (e.g., a gray tone mask or a halftone mask, etc.).
  • the pattern of the formed photodiode 40 includes an uncorrupted region and a damaged region, wherein the thickness of the unbroken region is greater than the thickness of the damaged region, so as to form a portion of the drain and the unbroken region.
  • the sources are the same in height.
  • the drain 34 includes a first portion 34a and a second portion 34b, wherein the uncorrupted region corresponds to the first portion 34a, the source 33, and the receiving electrode 39, the damaged region and the second portion 34b. correspond.
  • the uncorrupted region is a portion of the photodiode 40 under the first portion 34a of the drain 34, the source 33, and the receiving electrode 39, the damaged region being the photovoltaic The portion of diode 40 that is below the second portion 34b of drain 34.
  • Step 103 forming a pattern of the receiving electrode 39 on the photodiode 40, a pattern of the source 33 connected to the receiving electrode 39, and a pattern of the drain electrode 34 forming the channel opposite to the source 33 by one patterning process;
  • the source 33, the drain 34, the data line 31, and the receiving electrode 39 can be made of the same material, which can be formed by one deposition and etching, and the production process is simple and the production efficiency is high. .
  • Step 104 forming a pattern of the active layer 36 over the ohmic layer 35 and the channel by one patterning process.
  • FIGs 6a and 6b for the substrate structure after the fourth patterning process.
  • Step 105 forming a first passivation layer 43 covering the substrate, and forming a pattern of the gate line 30 and a pattern of the gate electrode 38 connected to the gate line 30 by one patterning process.
  • the first passivation layer 43 is formed over all of the patterns on the substrate and covers the exposed substrate, so that the first passivation layer 43 substantially covers the entire area of the substrate.
  • the method further includes:
  • Step 106 Form a pattern of the second passivation layer 57 covering the substrate by a patterning process, the second passivation layer 57 having a signal guiding region via (located at the periphery of the substrate, not shown in the drawing).
  • a second passivation layer 57 is formed on the gate electrode 38 and the first passivation layer 43, so that the second passivation layer substantially covers the entire area of the base substrate.
  • the method for manufacturing the sensor of the above embodiment of the present invention uses a total of six patterning processes. Compared with the existing sensor manufacturing method, the method not only reduces the number of masks used, but also reduces the manufacturing cost, simplifies the production process, and greatly improves the equipment productivity and product yield. In addition, since the manufactured sensor is directly transmitted through the substrate substrate on the photodiode sensor device during operation, compared with the prior art, the light loss is greatly reduced, the light absorption and utilization ratio is improved, and the image quality is obtained. Ascension, energy consumption has also decreased.

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Abstract

一种传感器及其制造方法,该传感器包括:衬底基板(32)、呈交叉排列的一组栅线(30)和一组数据线(31)、由一组栅线(30)和一组数据线(31)限定的呈阵列状排布的多个感测单元。每个感测单元包括光电二极管传感器件和薄膜晶体管器件。其中,光电二极管传感器件包括:位于衬底基板(32)之上的偏压线(42);位于偏压线(42)之上、与偏压线(42)导电接触的透明电极(41);位于透明电极(41)之上的光电二极管(40);以及,位于光电二极管(40)之上的接收电极(39),薄膜晶体管器件位于光电二极管(40)之上。传感器在工作时,光线经过衬底基板(32)直接透射在光电二极管传感器件上,对比于现有技术,大大减少了光损失,提高了光的吸收利用率。

Description

传感器及其制造方法 技术领域
本发明的实施例涉及一种传感器及其制造方法。 背景技术
由于保健的需要, 各种无损伤医疗检测方法逐渐受到人们的青睐。 在诸 多的无损伤检测方法中, 计算机断层扫描 (CT )技术已经得到广泛的应用。 在计算机断层扫描设备中必不可缺的一个部分就是传感器。
一种传感器的基本结构如图 1所示, 该传感器 12包括多条扫描线 15、 多条数据线 16以及多个感测单元, 每个感测单元包括一个光电二极管 13和 一个场效应晶体管 (Field Effect Transistor, FET) 14, 场效应晶体管 14的栅极 与传感器 12中相应的扫描线 (Scan Line) 15连接, 场效应晶体管 14的源极与 传感器 12中相应的数据线 (Data Line) 16连接, 光电二极管 13与场效应晶体 管 14的漏极连接。这些数据线 16的一端通过连接引脚 17连接数据读出电路 18。
上述传感器的工作原理为: 传感器 12通过扫描线 15施加驱动扫描信号 来控制每个感测单元的场效应晶体管 14的开关状态。 当场效应晶体管 14被 打开时, 光电二极管 13产生的光电流信号依次通过与场效应晶体管 14连接 的数据线 16、 数据读出电路 18而输出, 通过控制扫描线 15与数据线 16上 的信号时序来实现光电流信号的釆集功能,即通过控制场效应管 14的开关状 态来实现对光电二极管 13产生的光电流信号釆集的控制作用。
目前, 传感器通常釆用薄膜晶体管( Thin Film Transistor, TFT )平板结 构, 这种传感器在断面上可具有多层。 例如, 每个感测单元包括: 基板、 栅 极层、栅极绝缘层、有源层、 源极与漏极层、钝化层、 PIN光电传感器的 PIN 结和透明电极窗口层, 以及偏压线层和挡光条层等。 当然, 不同传感器由于 具体结构的差异, 在断面上的具体图层也不完全相同。
现有传感器的结构中, 光线需要经过两层钝化层达到 PIN光电二极管, 由于钝化层较厚, 光损失较为严重, 光的吸收利用率较低, 能耗较高, 成像 品质无法进一步提升。 发明内容
本发明的目的是提供一种传感器及其制造方法, 用以解决现有传感器的 光损失较为严重, 光的吸收利用率较低, 能耗较高, 成像品质无法进一步提 升的技术问题。
根据本发明的一个方面, 提供一种传感器, 包括: 衬底基板、 呈交叉排 列的一组栅线和一组数据线、 由所述一组栅线和一组数据线限定的呈阵列状 排布的多个感测单元, 每个感测单元包括光电二极管传感器件和薄膜晶体管 器件, 其中,
所述光电二极管传感器件包括: 位于所述衬底基板之上的偏压线; 位于 所述偏压线之上、 与所述偏压线导电接触的透明电极; 位于所述透明电极之 上的光电二极管; 以及, 位于所述光电二极管之上的接收电极;
所述薄膜晶体管器件包括: 位于所述光电二极管之上并与所述接收电极 连接的源极、 位于所述光电二极管之上并与相邻的所述数据线连接的漏极, 所述所述源极和所述漏极相对而置形成沟道; 位于所述源极和所述漏极之上 的欧姆层; 位于所述欧姆层和所述沟道之上的有源层; 位于所述有源层之上 并覆盖所述衬底基板的第一钝化层; 以及, 位于所述第一钝化层之上、 所述 沟道上方的栅极, 所述栅极与相邻的所述栅线连接。
根据本发明的另一个方面, 提供一种传感器的制造方法, 包括: 在衬底基板上通过第一次构图工艺形成偏压线的图形;
通过第二次构图工艺形成位于所述偏压线之上、 与所述偏压线导电接触 的透明电极的图形, 以及位于所述透明电极之上的光电二极管的图形;
通过第三次构图工艺在所述光电二极管之上形成接收电极的图形、 与所 述接收电极连接的源极的图形、与所述源极相对而置形成沟道的漏极的图形; 以及, 与所述漏极连接的数据线的图形和位于所述源极和所述漏极之上的欧 姆层的图形;
通过第四次构图工艺形成位于所述欧姆层和所述沟道之上的有源层的图 形; 以及
形成覆盖整个所述衬底基板的第一钝化层, 并通过第五次构图工艺形成 栅线的图形和与栅线连接的栅极的图形。
在一个实施例中, 传感器的偏压线制备于衬底基板上的第一层, 使得传 感器在工作时, 光线从衬底基板一侧入射, 这样光线经过衬底基板直接透射 在光电二极管传感器件上。 对比于现有技术, 上述结构大大减少了光损失, 提高了光的吸收利用率, 成像品质得到提升, 能耗也有所降低。 附图说明
为了更清楚地说明本发明实施例的技术方案, 下面将对实施例的附图作 简单地介绍,显而易见地,下面描述中的附图仅仅涉及本发明的一些实施例, 而非对本发明的限制。
图 1为现有传感器的立体结构示意图;
图 2a为本发明实施例的传感器的其中一个感测单元的俯视结构示意图 (经六次构图工艺) ;
图 2b 为本发明实施例的传感器的其中一个感测单元的截面结构示意图 (经六次构图工艺) ;
图 3a为本发明实施例的制造方法在第一次构图工艺后的俯视图; 图 3b为本发明实施例的制造方法在第一次构图工艺后的截面视图; 图 4a为本发明实施例的制造方法在第二次构图工艺后的俯视图; 图 4b为本发明实施例的制造方法在第二次构图工艺后的截面视图; 图 5a为本发明实施例的制造方法在第三次构图工艺后的俯视图; 图 5b为本发明实施例的制造方法在第三次构图工艺后的截面视图; 图 6a为本发明实施例的制造方法在第四次构图工艺后的俯视图; 和 图 6b为本发明实施例的制造方法在第四次构图工艺后的截面视图。 附图标记:
12-传感器 13-光电二极管 14-场效应晶体管
15-扫描线 16-数据线 17-连接引脚
18-数据读出电路 30-栅线 31-数据线
32-衬底基板 33-源极 34-漏极
35-欧姆层 36-有源层 42-偏压线
38-栅极 39-接收电极 40-光电二极管 41-透明电极 57-第二钝化层 43-第一钝化层
34a-第一部分 34b-第二部分 具体实施方式
为使本发明实施例的目的、 技术方案和优点更加清楚, 下面将结合本发 明实施例的附图,对本发明实施例的技术方案进行清楚、 完整地描述。显然, 所描述的实施例是本发明的一部分实施例, 而不是全部的实施例。 基于所描 述的本发明的实施例, 本领域普通技术人员在无需创造性劳动的前提下所获 得的所有其他实施例, 都属于本发明保护的范围。
除非另作定义, 此处使用的技术术语或者科学术语应当为本发明所属领 域内具有一般技能的人士所理解的通常意义。 本发明专利申请说明书以及权 利要求书中使用的 "第一部分" 、 "第二部分" 并不表示任何顺序、 数量或 者重要性, 而只是用来区分不同的组成部分或区域。 "连接" 并非限定于物 理的或者机械的连接, 而是可以包括电性的连接,不管是直接的还是间接的。
"上" 、 "下" 、 "左" 、 "右" 等仅用于表示相对位置关系, 当被描述对 象的绝对位置改变后, 则该相对位置关系也相应地改变。
在本发明以下实施例中, 所述传感器可以包含多种类型, 例如 X射线传 感器等。 在下面的描述和图示中针对单个感测单元进行, 其他感测单元可以 同样地形成。
为了解决现有传感器的光线损失较为严重, 光的吸收利用率较低, 能耗 较高, 成像品质无法进一步提升的技术问题, 根据本发明的实施例, 提供了 一种传感器。
如图 2a和图 2b所示,根据本发明实施例的传感器, 包括:衬底基板 32、 呈交叉排列的一组栅线 30和一组数据线 31、由所述一组栅线 30和一组数据 线 31限定的呈阵列状排布的多个感测单元,每个感测单元包括薄膜晶体管器 件和光电二极管传感器件。
其中, 所述光电二极管传感器件包括: 位于衬底基板 32之上的偏压线 42; 位于偏压线 42之上、 与偏压线 42导电接触的透明电极 41 ; 位于透明电 极 41之上的光电二极管 40; 以及, 位于光电二极管 40之上的接收电极 39。
所述薄膜晶体管器件包括: 位于光电二极管 40之上并与接收电极 39连 接的源极 33、 位于光电二极管 40之上并与相邻的数据线 31连接的漏极 34, 所述源极 33和漏极 34相对而置形成沟道; 位于源极 33和漏极 34之上的欧 姆层 35;位于欧姆层 35和沟道之上的有源层 36;位于有源层 36之上并覆盖 基板的第一钝化层 43; 以及,位于第一钝化层 43之上, 沟道上方的栅极 38, 所述栅极 38与相邻的栅线 30连接。 其中, 图 2b中的第一钝化层 43位于之 前形成在衬底基板上的所有图形之上, 并覆盖了暴露的衬底基板, 因此第一 钝化层 43基本上覆盖了衬底基板的整个面积。
本发明的实施例中,所述衬底基板 32可以为玻璃基板、塑料基板或其他 材料的基板; 所述栅线 30、 栅极 38、 数据线 31、 源极 33、 漏极 34、 接收电 极 39和偏压线 42可以为铝钕合金 ( AlNd )、铝( A1 )、铜( Cu )、钼( Mo ) 、 钼钨合金 ( MoW )或铬(Cr )的单层膜, 也可以为这些金属单质或合金材料 任意组合所构成的复合膜, 这些单层或复合膜的厚度例如在 150纳米至 450 纳米之间; 欧姆层 35的材质可以为掺杂质半导体(n+a-Si ) ; 有源层 36的 材质可以为半导体材料, 例如非晶硅(a-Si ) , 厚度例如在 30纳米至 250纳 米之间; 第一钝化层 43以及下文的第二钝化层 57可以釆用无机绝缘膜 (例 如氮化硅等)或有机绝缘膜(例如感光树脂材料或者非感光树脂材料等) , 厚度例如在 1000纳米至 2000纳米之间;透明电极 41的材质可以为诸如氧化 铟锡(ITO )或氧化铟辞(IZO )等的透明导电材料。
在本发明的实施例中, 所述光电二极管 40优选为 PIN型光电二极管, 因为 PIN型光电二极管具有结电容小、渡越时间短、灵敏度高等优点。然而, 在本发明的其它实施例中, 光电二极管 40也可以釆用诸如 MIS型光电二极 管等的其他类型光电二极管。
在本发明的实施例中, 偏压线 42作为衬底基板 32上的第一层(即基板 上的最底层) 。 当传感器在工作时, 光线从衬底基板一侧入射, 这样光线经 过衬底基板直接透射在光电二极管传感器件上, 对比于现有技术, 大大减少 了光损失, 提高了光的吸收利用率, 成像品质得到提升, 能耗也有所降低。 另外, 在本发明的实施例中, 偏压线 42平行于数据线 31设置。 然而, 在本 发明的其他实施例中,偏压线 42也可以釆取其它的设置方式,例如平行于栅 线 30等。
可选地,上述实施例的传感器还包括位于栅极 38之上并覆盖第一钝化层 的第二钝化层 57 , 所述第二钝化层 57具有信号引导区过孔。 图 2b仅示出了 根据本发明实施例的传感器的其中一个感测单元的截面结构, 因此位于基板 周边的信号引导区过孔未在此图中示出。 从图 2b 中可以看出, 第二钝化层 57覆盖了栅极 38及第一钝化层 43 , 因此, 其基本覆盖了衬底基板的整个面 积。
如图 2b所示, 所述光电二极管 40包括未破坏区域和破坏区域, 所述未 破坏区域的厚度大于破坏区域的厚度, 以便于形成在所述未破坏区域上的那 一部分漏极和形成在所述未破坏区域上的源极在高度上相同。 在一个实施例 中, 所述漏极 34包括第一部分 34a和第二部分 34b, 其中所述未破坏区域与 第一部分 34a、 源极 33和接收电极 39位置对应, 所述破坏区域与第二部分 34b位置对应。 更具体地, 在一个实施例中, 所述未破坏区域为所述光电二 极管 40的位于漏极 34的第一部分 34a、 源极 33和接收电极 39下方的部分, 所述破坏区域为所述光电二极管 40的位于漏极 34的第二部分 34b下方的部 分。 上述这些结构不但减少了源极和漏极在制造工艺过程中由于厚度差距而 产生的端差(即源、 漏极在各自端部上的高度或厚度差异) , 降低了产生相 关缺陷的比率, 而且, 由于光电二极管破坏区域的存在, 源极和漏极的信号 导通受干扰较小, 可有效减少薄膜晶体管器件受到的串扰。
在本发明的实施例中, 所述源极 33、 漏极 34、 数据线 31和接收电极 39 的材质可以相同, 也可以不同。 然而, 优选釆用相同材质, 因为这样可以使 源极 33、 漏极 34、数据线 31和接收电极 39在同一次构图工艺中形成,提高 了生产效率并减少了制造成本。
根据本发明的另一个实施例, 还提供了制造上述传感器的方法, 包括: 步骤 101、 在衬底基板 32上通过一次构图工艺形成偏压线 42的图形。 第一次构图工艺后的基板结构请参照图 3a和图 3b所示。
一次构图工艺通常依次包括基板清洗、 成膜、 光刻胶涂覆、 曝光、 显影、 刻蚀、 光刻胶去除等步骤。 基板清洗包括使用去离子水、 有机清洗液进行清 洗等。 成膜工艺用于形成将被构图的结构层。 例如, 对于金属层通常釆用物 理气相沉积方式(例如磁控溅射法)成膜, 并通过湿法刻蚀形成图形; 而对 于非金属层通常釆用化学气相沉积方式成膜, 并通过干法刻蚀形成图形。 以 下步骤中的构图工艺与此相同, 不再赘述。 步骤 102、 通过一次构图工艺形成位于偏压线 42之上、 与偏压线 42导 电接触的透明电极 41 的图形, 以及位于透明电极 41之上的光电二极管 40 的图形。 第二次构图工艺后的基板结构请参照图 4a和图 4b所示。
在一个具体实施例中, 该步骤 102可具体包括:
102a.依次沉积透明导电材料层和光电二极管层, 并在光电二极管层之 上涂覆光刻胶;
102b. 釆用具有全透光区、 半透光区和不透光区的掩模板对基板上的光 刻胶进行曝光、 显影, 得到具有光刻胶完全去除区、 光刻胶部分去除区和光 刻胶完全保留区的光刻胶图形;
102c. 对基板上的光刻胶完全去除区进行刻蚀; 以及
102d. 对基板的光刻胶部分去除区进行灰化, 去除光刻胶部分去除区中 的光刻胶并且保留光刻胶完全保留区的光刻胶, 刻蚀并随后将光刻胶去除, 形成透明电极 41的图形和光电二极管 40的图形。
上述描述中以正性光刻胶为例进行说明, 掩模板的完全透光区、 半透光 区和不透光区用于对光刻胶进行完全曝光、 部分曝光和非曝光操作, 显影后 得到光刻胶完全去除区、 光刻胶部分去除区和光刻胶完全保留区。 光刻胶完 全保留区中光刻胶基本全部保留。在上述步骤 102b中,不透光区用于形成接 收电极 39、 源极 33和漏极 34的第一部分 34a的区域, 半透光区用于形成漏 极 34的第二部分 34b的区域。所釆用的掩模板可以具体为双色调掩膜板 (例 如灰色调掩模板或者半色调掩模板等) 。
在上述步骤 102d中, 所形成的光电二极管 40的图形包括未破坏区域和 破坏区域, 其中, 未破坏区域的厚度大于破坏区域的厚度, 以便于形成在所 述未破坏区域上的一部分漏极和源极在高度上相同。 在一个实施例中, 漏极 34包括第一部分 34a和第二部分 34b, 其中所述未破坏区域与第一部分 34a、 源极 33和接收电极 39位置对应, 所述破坏区域与第二部分 34b位置对应。 更具体地,在一个实施例中,所述未破坏区域为所述光电二极管 40的位于漏 极 34的第一部分 34a、 源极 33和接收电极 39下方的部分, 所述破坏区域为 所述光电二极管 40的位于漏极 34的第二部分 34b下方的部分。 通过上述这 些结构, 能减少以下步骤 103中源极和漏极由于厚度差距而产生的段差, 由 此降低了相关缺陷的产生比率。 步骤 103、 通过一次构图工艺在光电二极管 40之上形成接收电极 39的 图形、与接收电极 39连接的源极 33的图形、与源极 33相对而置形成沟道的 漏极 34的图形; 以及, 与漏极 34连接的数据线 31的图形和位于源极 33和 漏极 34之上的欧姆层 35的图形。 第三次构图工艺后的基板结构请参照图 5a 和图 5b所示。
其中, 在一个实施例中, 所述源极 33、 漏极 34、 数据线 31和接收电极 39可以釆用相同的材质, 这样可经一次沉积、 刻蚀形成, 生产工艺简单、 生 产效率较高。
步骤 104、通过一次构图工艺形成位于欧姆层 35和沟道之上的有源层 36 的图形。 第四次构图工艺后的基板结构请参照图 6a和图 6b所示。
步骤 105、 形成覆盖基板的第一钝化层 43 , 并通过一次构图工艺形成栅 线 30的图形和与栅线 30连接的栅极 38的图形。 将第一钝化层 43形成在在 衬底基板上的所有图形之上并覆盖了暴露的衬底基板, 因此第一钝化层 43 基本上覆盖了衬底基板的整个面积。
可选地, 在步骤 105之后, 还进一步包括:
步骤 106、 通过一次构图工艺形成覆盖基板的第二钝化层 57的图形, 所 述第二钝化层 57具有信号引导区过孔(位于基板周边, 图中未示出)。 将第 二钝化层 57形成在栅极 38及第一钝化层 43上,从而使第二钝化层基本上覆 盖了衬底基板的整个面积。 经以上六次构图工艺后最终形成具有图 2a和图 2b所示的感测单元的传感器。
由此可见,上述本发明实施例的制造传感器的方法共釆用六次构图工艺。 对比于现有的传感器制造方法, 该方法不但减少了掩模板的使用数量, 降低 了制造成本, 简化了生产工艺, 大大提升了设备产能及产品的良品率。 另夕卜, 由于所制造的传感器在工作时, 光线经过衬底基板直接透射在光电二极管传 感器件上, 对比于现有技术, 大大减少了光损失, 提高了光的吸收利用率, 成像品质得到提升, 能耗也有所降低。
以上所述仅是本发明的示范性实施方式, 而非用于限制本发明的保护范 围, 本发明的保护范围由所附的权利要求确定。

Claims

权利要求书
1、一种传感器, 包括:衬底基板、呈交叉排列的一组栅线和一组数据线、 由所述一组栅线和一组数据线限定的呈阵列状排布的多个感测单元, 每个感 测单元包括光电二极管传感器件和薄膜晶体管器件, 其中,
所述光电二极管传感器件包括: 位于所述衬底基板之上的偏压线; 位于 所述偏压线之上、 与所述偏压线导电接触的透明电极; 位于所述透明电极之 上的光电二极管; 以及, 位于所述光电二极管之上的接收电极;
所述薄膜晶体管器件包括: 位于所述光电二极管之上并与所述接收电极 连接的源极、 位于所述光电二极管之上并与相邻的所述数据线连接的漏极, 所述所述源极和所述漏极相对而置形成沟道; 位于所述源极和所述漏极之上 的欧姆层; 位于所述欧姆层和所述沟道之上的有源层; 位于所述有源层之上 并覆盖所述衬底基板的第一钝化层; 以及, 位于所述第一钝化层之上、 所述 沟道上方的栅极, 所述栅极与相邻的所述栅线连接。
2、如权利要求 1所述的传感器,还包括: 位于栅极之上并覆盖所述衬底 基板的第二钝化层, 所述第二钝化层具有信号引导区过孔。
3、如权利要求 1或 2所述的传感器, 其中, 所述光电二极管包括未破坏 区域和破坏区域, 所述未破坏区域的厚度大于破坏区域的厚度, 以便形成在 所述未破坏区域上的漏极和源极在厚度上相同。
4、如权利要求 3所述的传感器, 其中, 所述漏极包括第一部分和第二部 分, 所述光电二极管的未破坏区域与所述漏极的第一部分、 所述源极和所述 接收电极位置对应, 所述光电二极管的破坏区域与所述漏极的第二部分位置 对应。
5、如权利要求 3或 4所述的传感器, 其中, 所述未破坏区域为所述光电 二极管的位于所述漏极的第一部分、 所述源极和所述接收电极下方的部分, 所述破坏区域为所述光电二极管的位于所述漏极的第二部分下方的部分。
6、 如权利要求 1-5中任一项所述的传感器, 其中, 所述偏压线设置为平 行于所述数据线。
7、 如权利要求 1-6 中任一项所述的传感器, 其中, 所述光电二极管为 PIN型光电二极管。
8、 如权利要求 1-7中任一项所述的传感器, 其中, 所述源极、 漏极、 数 据线和接收电极的材质相同。
9、 一种传感器的制造方法, 包括:
在衬底基板上通过第一次构图工艺形成偏压线的图形;
通过第二次构图工艺形成位于所述偏压线之上、 与所述偏压线导电接触 的透明电极的图形, 以及位于所述透明电极之上的光电二极管的图形;
通过第三次构图工艺在所述光电二极管之上形成接收电极的图形、 与所 述接收电极连接的源极的图形、与所述源极相对而置形成沟道的漏极的图形; 以及, 与所述漏极连接的数据线的图形和位于所述源极和所述漏极之上的欧 姆层的图形;
通过第四次构图工艺形成位于所述欧姆层和所述沟道之上的有源层的图 形; 以及
形成覆盖整个所述衬底基板的第一钝化层, 并通过第五次构图工艺形成 栅线的图形和与栅线连接的栅极的图形。
10、 如权利要求 9所述的制造方法, 还包括在通过第五次构图工艺形成 栅线的图形和与栅线连接的栅极的图形之后的步骤:
通过第六次构图工艺形成覆盖整个所述衬底基板的第二钝化层的图形, 所述第二钝化层具有信号引导区过孔。
11、如权利要求 9或 10所述的制造方法, 其中, 所述通过第二次构图工 艺形成透明电极的图形和光电二极管的图形的步骤包括:
依次沉积透明导电材料层和光电二极管层, 并在所述光电二极管层之上 涂覆光刻胶;
釆用具有全透光区、 半透光区和不透光区的掩模板对所述衬底基板上的 光刻胶进行曝光、 显影, 得到具有光刻胶完全去除区、 光刻胶部分去除区和 光刻胶完全保留区的光刻胶图形, 其中, 不透光区用于形成接收电极、 源极 和漏极的第一部分的区域, 半透光区用于形成漏极的第二部分的区域;
对所述衬底基板上的光刻胶完全去除区进行刻蚀; 以及
对所述衬底基板上的光刻胶部分去除区进行灰化, 去除光刻胶部分去除 区中的光刻胶并且保留光刻胶完全保留区的光刻胶, 刻蚀并随后将光刻胶去 除, 形成所述透明电极的图形和所述光电二极管的图形。
12、如权利要求 11所述的制造方法, 其中, 所述光电二极管的图形包括 未破坏区域和破坏区域, 并且所述未破坏区域的厚度大于所述破坏区域的厚 度, 以便接下来形成在所述未破坏区域上的漏极和源极在厚度上相同。
13、如权利要求 12所述的制造方法, 其中, 所述未破坏区域与所述漏极 的第一部分、 所述源极和所述接收电极位置对应, 所述破坏区域与所述漏极 的第二部分位置对应。
14、 如权利要求 12或 13所述的制造方法, 其中, 所述未破坏区域为所 述光电二极管的位于漏极的第一部分、所述源极和所述接收电极下方的部分, 所述破坏区域为所述光电二极管的位于所述漏极的第二部分下方的部分。
15、 如权利要求 10-14中任一项所述的制造方法, 其中, 所述源极、 漏 极、 数据线和接收电极的材质相同。
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