WO2013180221A1 - Tranche de silicium pour cellule solaire et procédé de fabrication de celle-ci - Google Patents

Tranche de silicium pour cellule solaire et procédé de fabrication de celle-ci Download PDF

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Publication number
WO2013180221A1
WO2013180221A1 PCT/JP2013/065050 JP2013065050W WO2013180221A1 WO 2013180221 A1 WO2013180221 A1 WO 2013180221A1 JP 2013065050 W JP2013065050 W JP 2013065050W WO 2013180221 A1 WO2013180221 A1 WO 2013180221A1
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WO
WIPO (PCT)
Prior art keywords
silicon wafer
polycrystalline silicon
weight
solar cell
etching
Prior art date
Application number
PCT/JP2013/065050
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English (en)
Japanese (ja)
Inventor
阿部　秀司
竜暢 鈴木
光男 大沼
Original Assignee
日本化成株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本化成株式会社 filed Critical 日本化成株式会社
Priority to CN201380027688.6A priority Critical patent/CN104364913B/zh
Priority to JP2014518725A priority patent/JP5717309B2/ja
Publication of WO2013180221A1 publication Critical patent/WO2013180221A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0236—Special surface textures
    • H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/546—Polycrystalline silicon PV cells

Definitions

  • the present invention relates to a silicon wafer for solar cells and a method for producing the same.
  • the present invention has been made in view of the above circumstances, and an object of the present invention is to provide a solar cell substrate using a polycrystalline silicon wafer and further reducing reflection with respect to incident light. is there.
  • the present inventors have found that in the etching of a polycrystalline silicon wafer using a mixture of sulfuric acid, nitric acid and hydrofluoric acid as an etchant, the reflectance of the texture-formed surface formed by the moisture content of the etchant is high. Found significantly different. As a result of further investigation, the textured surface with reduced reflectance has a three-dimensional surface roughness (three-dimensional surface roughness) measured using a laser microscope in a specific range, The knowledge that it is optimal as a battery substrate was obtained.
  • the present invention has been completed on the basis of the above findings, and the first gist of the present invention is a polycrystalline silicon wafer having an uneven surface formed by wet etching, and the three-dimensional surface of the uneven surface defined below.
  • the present invention resides in a solar cell substrate having a roughness of 2.0 to 4.0.
  • the above three-dimensional surface roughness is a polycrystalline silicon wafer using a laser microscope: “VK-9700” manufactured by KEYENCH, under the conditions of a measurement magnification of 3,000 times and an observation field of view of 6,512 ⁇ m 2. It means a value obtained by measuring the surface area of the uneven surface of the surface and dividing the value by the observation field.
  • the second gist of the present invention is that the sulfuric acid concentration is 55 to 85% by weight, the nitric acid concentration is 4 to 35% by weight, the hydrofluoric acid concentration is 2 to 10% by weight, and the water concentration is 2 to 18% by weight (provided that The total amount of these is 100% by weight), and the surface of the polycrystalline silicon wafer is wet-etched using an etchant having a water / sulfuric acid weight ratio of 0.26 or less. Lies in the manufacturing method.
  • a silicon wafer for a solar cell with reduced surface reflection and high efficiency is provided.
  • a mixture of sulfuric acid, nitric acid and hydrofluoric acid is used as an etchant.
  • the raw material acid used for the preparation of the etchant those having various concentrations can be used.
  • the sulfuric acid raw material include dilute sulfuric acid, concentrated sulfuric acid, fuming sulfuric acid and the like. Concentrated sulfuric acid is 96 to 98% by weight of flowing acid, and fuming sulfuric acid is concentrated sulfuric acid obtained by absorbing excess sulfur trioxide.
  • nitric acid include dilute nitric acid, concentrated nitric acid, and fuming nitric acid.
  • Concentrated nitric acid is 70 to 98% by weight nitric acid, and fuming nitric acid is obtained by blowing gaseous nitrogen dioxide into concentrated nitric acid.
  • hydrofluoric acid hydrogen fluoride gas (anhydrous hydrofluoric acid) can be used in addition to hydrofluoric acid.
  • the composition of the etchant is important, the sulfuric acid concentration is 55 to 85% by weight, preferably 60 to 80% by weight, the nitric acid concentration is 4 to 35% by weight, preferably 10 to 32% by weight, hydrofluoric acid
  • the concentration is 2 to 10% by weight, preferably 2 to 5% by weight, and the water concentration is 2 to 18% by weight, preferably 7 to 18% by weight (however, the total amount thereof is 100% by weight). It is also important that the water / sulfuric acid weight ratio is 0.26 or less.
  • the etching rate tends to be too slow, and when it exceeds 85% by weight, mixing of appropriate amounts of nitric acid, hydrofluoric acid and water is hindered.
  • the nitric acid concentration is less than 4% by weight, the etching rate is too slow, and when it exceeds 35% by weight, the etching rate tends to be too fast and difficult to control.
  • the moisture concentration is particularly important.
  • the etching rate is too slow. That is, in wet etching, the surface of the silicon wafer is oxidized by nitric acid, and etching proceeds due to the reaction between the generated SiO 2 and HF.
  • the polycrystalline silicon substrate may be a p-type polycrystalline silicon substrate or an n-type polycrystalline silicon substrate.
  • the impurity contained in the silicon substrate is, for example, boron or aluminum in the case of p-type, and phosphorus, arsenic, antimony or the like in the case of n-type.
  • the concentration of impurities is not particularly limited, but is, for example, 10 13 / cm 3 to 10 21 / cm 3 .
  • the thickness of the polycrystalline silicon substrate is not particularly limited, but is usually 100 to 300 ⁇ m. By setting it as 100 micrometers or more, a silicon substrate can have sufficient intensity
  • the size of the polycrystalline silicon substrate is not particularly limited, but is, for example, 126 mm ⁇ 126 mm or 156 mm ⁇ 156 mm.
  • the three-dimensional surface roughness of the polycrystalline silicon substrate used in the present invention is usually 1.5 to 1.9, preferably 1.7 to 1.9.
  • Such a polycrystalline silicon substrate can be obtained, for example, by cutting a polycrystalline silicon substrate from a polycrystalline silicon ingot by a normal loose abrasive wire saw method.
  • the time required for etching is determined by the etchant composition and temperature, the thickness of the polycrystalline silicon substrate, and the desired post-etching thickness. For example, when the dip method is used, the time is usually about 0.1 to 10 minutes.
  • the etching amount is optimally an etching amount with an average of about 1 to 20 ⁇ m in the wafer surface on one side.
  • the etching temperature is usually 0 to 30 ° C.
  • the solar cell substrate of the present invention can be obtained, for example, by the production method of the present invention described above.
  • the feature is that it comprises a polycrystalline silicon wafer having an uneven surface formed by wet etching, and the three-dimensional surface roughness of the uneven surface as defined below is 2.0 to 4.0. .
  • the above three-dimensional surface roughness is a polycrystalline silicon wafer using a laser microscope: “VK-9700” manufactured by KEYENCH, under the conditions of a measurement magnification of 3,000 times and an observation field of view of 6,512 ⁇ m 2. It means a value obtained by measuring the surface area of the uneven surface of the surface and dividing the value by the observation field.
  • Laser microscope “VK-9700” manufactured by KEYENCH uses a two-way light source system that uses a short-wavelength laser light source and a white light source. It is a device that can obtain the information of color, light quantity, and height necessary for constructing.
  • the laser light source is a point light source
  • the observation visual field is divided into 1024 ⁇ 768 pixels and scanned via an XY scanning optical system, and the reflected light for each pixel is detected by a light receiving element. Then, the objective lens is driven in the Z-axis direction, and scanning is repeated to obtain the reflected light amount for each Z-axis position of each pixel.
  • the unevenness can be measured in three dimensions, and the three-dimensional surface roughness of the uneven surface can be grasped.
  • height information and the amount of reflected light can be detected with the Z-axis position having the highest amount of reflected light as a focal point. Thereby, an ultra-deep light amount image and a high / low image (information) focused on the whole are obtained.
  • the surface area of an object is measured in an arbitrarily designated area (observation field of view: 6,512 ⁇ m 2 ) on an image having a measurement magnification of 3,000 times.
  • the value obtained by dividing the value by the observation field is defined as the three-dimensional surface roughness.
  • the reflectivity is not sufficiently reduced, and when it exceeds 4.0, the surface is excessively roughened. Efficiency may not increase.
  • the diffusion layer may not reflect the surface shape, and the specific surface area is large and the unevenness is sharp.
  • the impurity concentration at the time of thermal diffusion increases, and even if the reflectance is reduced, the solar cell power generation efficiency may not increase.
  • the electrodes are formed on the surface irregularities, they may be lost.
  • the size of the unevenness formed on the surface of the polycrystalline silicon substrate is usually depth: 0.5 to 4.0 ⁇ m, width: 0 .5 to 5.0 ⁇ m, length: 0.5 to 20 ⁇ m.
  • the concavo-convex structure is the concavo-convex structure having the “protrusions of the non-sharp curved top” shown in FIG. 6 (photograph substitute for drawing) of the above-mentioned prior document: JP-A-8-124894. It is a concavo-convex structure in which a concave structure having a different width and length and an aspect ratio of 2 to 20 is mixed.
  • Examples 1 to 19 and Comparative Examples 1 to 4 A P-type polycrystalline silicon wafer having a size of 156 mm ⁇ 156 mm ⁇ 0.5 mm and a thickness of 200 ⁇ m ⁇ 20 ⁇ m was etched under the etching conditions shown in Table 1. And the following evaluation was performed. Etching conditions and evaluation results are shown in Tables 1 and 2. In addition, said silicon wafer was obtained by slicing a polycrystalline silicon ingot by the free abrasive wire saw method, and the above-mentioned three-dimensional surface roughness is 1.9.
  • a silicon wafer is cut into an appropriate size (about 30 mm ⁇ 30 mm) and then washed.
  • the solar cell was produced as follows. That is, first, the recon wafer substrate for solar cells obtained in each example was cut to 22 mm ⁇ 30 mm, and then washed by the operations (i) to (v) described above to thermally diffuse impurities (phosphorus) and pn A joint was created. The diffusion conditions were 940 ° C. and 40 min. Next, the surface natural oxide film was removed with buffered hydrofluoric acid to prepare a surface electrode. That is, Al was vapor-deposited on the surface and patterned by photolithography to form a comb-like electrode.

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)
  • Weting (AREA)

Abstract

L'invention concerne un substrat de cellule solaire utilisant une tranche de silicium polycristallin, ledit substrat permettant en outre de réduire la réflexion de lumière incidente. Ce substrat de cellule solaire est fait de la tranche de silicium polycristallin, qui présente une surface irrégulière formée par gravure humide, la rugosité de surface tridimensionnelle de la surface irrégulière étant comprise entre 2,0 et 4,0, tel que défini ci-après. La rugosité de surface tridimensionnelle représente la valeur qu'on obtient en mesurant la superficie de la surface irrégulière de la tranche de silicium polycristallin, selon un grossissement de 3000x et un champ d'observation de 6512 µm2, au moyen d'un microscope confocal à balayage laser ("VK-9700" fabriqué par KEYENCE), et en divisant la valeur obtenue par le champ d'observation.
PCT/JP2013/065050 2012-05-31 2013-05-30 Tranche de silicium pour cellule solaire et procédé de fabrication de celle-ci WO2013180221A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201380027688.6A CN104364913B (zh) 2012-05-31 2013-05-30 太阳能电池用硅晶片及其制造方法
JP2014518725A JP5717309B2 (ja) 2012-05-31 2013-05-30 太陽電池用シリコンウエハー及びその製造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012-123943 2012-05-31
JP2012123943 2012-05-31

Publications (1)

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WO2013180221A1 true WO2013180221A1 (fr) 2013-12-05

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JP (1) JP5717309B2 (fr)
CN (1) CN104364913B (fr)
WO (1) WO2013180221A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105671641A (zh) * 2014-11-20 2016-06-15 日本化成株式会社 太阳能电池用硅晶片的制造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030119332A1 (en) * 1999-12-22 2003-06-26 Armin Kuebelbeck Method for raw etching silicon solar cells
WO2005117138A1 (fr) * 2004-05-28 2005-12-08 Sharp Kabushiki Kaisha Substrat semi-conducteur pour cellule solaire, procédé de fabrication dudit substrat, et cellule solaire
WO2011032880A1 (fr) * 2009-09-21 2011-03-24 Basf Se Solutions aqueuses acides de mordançage et méthode de texturation de la surface de substrats de silicium mono et polycristallin
JP2011249671A (ja) * 2010-05-28 2011-12-08 Sharp Corp シリコン基板の表面処理方法および太陽電池

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010027981A (ja) * 2008-07-23 2010-02-04 Ricoh Co Ltd 光電変換素子

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030119332A1 (en) * 1999-12-22 2003-06-26 Armin Kuebelbeck Method for raw etching silicon solar cells
WO2005117138A1 (fr) * 2004-05-28 2005-12-08 Sharp Kabushiki Kaisha Substrat semi-conducteur pour cellule solaire, procédé de fabrication dudit substrat, et cellule solaire
WO2011032880A1 (fr) * 2009-09-21 2011-03-24 Basf Se Solutions aqueuses acides de mordançage et méthode de texturation de la surface de substrats de silicium mono et polycristallin
JP2011249671A (ja) * 2010-05-28 2011-12-08 Sharp Corp シリコン基板の表面処理方法および太陽電池

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105671641A (zh) * 2014-11-20 2016-06-15 日本化成株式会社 太阳能电池用硅晶片的制造方法

Also Published As

Publication number Publication date
CN104364913B (zh) 2016-09-14
JPWO2013180221A1 (ja) 2016-01-21
JP5717309B2 (ja) 2015-05-13
CN104364913A (zh) 2015-02-18

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