WO2013131742A1

WO2013131742A1 - Semiconductor circuit with electrical connections having multiple signal or potential assignments

Info

Publication number: WO2013131742A1
Application number: PCT/EP2013/053277
Authority: WO
Inventors: Gerhard Kahmen; Thomas DABROWSKI
Original assignee: Rohde & Schwarz Gmbh & Co. Kg
Priority date: 2012-03-08
Filing date: 2013-02-19
Publication date: 2013-09-12
Also published as: CN103891146B; DE202012004532U1; DE112013000145A5; US9177946B2; US20140225664A1; CN103891146A

Abstract

A semiconductor circuit has at least one first electrical connection (1) having multiple signal or potential assignments for integrating a plurality of circuit variants into the semiconductor circuit. Said semiconductor circuit has a switching element (5, 6, 8, 20) for disconnecting a first electrical connection (1) from or connecting it to an input or output of a functional unit (2, 3) integrated into the semiconductor circuit.

Description

Semiconductor circuit with electrical connections with multiple signal or potential assignment

The invention relates to a semiconductor circuit with electrical connections with multiple signal or

Potential occupancy.

In hardware development, it is common on the basis of a semiconductor integrated circuit developed in a first development process in subsequent ones

Development processes each successor circuit variants (circuit generations, versions) of integrated semiconductor circuits to generate.

These follow-up circuit variants of integrated

Semiconductor circuits usually have one

extended functionality and better

Performance characteristics. In particular, the extended range of functions requires a larger number of

electrical connections (pins).

In order to minimize the unit cost of the integrated semiconductor circuits as much as possible, a successor circuit variant of a semiconductor integrated circuit includes the functional scopes and performance characteristics of all predecessor circuit variants and is installed in an identical housing with an identical number and an identical arrangement of electrical connections. In this way, each successor circuit variant of a semiconductor integrated circuit is constructed to be compatible with each of its predecessor circuit variants and can be retrofitted without changing the external circuit

Wiring and without the use of an additional

Replace wiring. The extension of the functional scope of successive circuit variants typically requires a functionally modified pinout or a higher number of

electrical connections to the respective

Previous versions.

From US 2003/0141578 AI it is known, in this case on the chip surface of the semiconductor circuit for each

Circuit variant each one set of internal

provide electrical connections. In the final assembly process of the semiconductor circuit, the electrical connections of the circuit variant of the semiconductor circuit used in each case by the user via a respective bonding wire to the electrical terminals of the housing

Semiconductor circuit connected. Such a technical realization with several circuit and

function-dependent bond variants leads to an increase in the chip area. The different wiring of the individual circuit variants of the semiconductor circuit requires a dependent on the selected circuit variant marker, which increases the manufacturing cost. The implementation of multiple sets of internal

electrical connections on the chip surface of the

Semiconductor circuit may require

different test setups, the cost of testing

additionally increase. Finally, with one too

Increase in logistics costs, as expected for each

Semiconductor circuit each one of the number of

Circuit variants corresponding number of part numbers is necessary.

The object of the invention is therefore, a

Developing a semiconductor circuit, in each of which the functional scope of the respective predecessor Circuit variants is implemented with and the cost of the connection between the electrical connections of each of the individual circuit variants associated functional units and the electrical connections of the housing is minimized.

The invention is achieved by a semiconductor circuit having the features of claim 1. Advantageous technical extensions are listed in the respective dependent claims.

According to the invention, a plurality of electrical connections of the semiconductor circuit - hereinafter electrical first

Terminals called the semiconductor circuit - repeatedly occupied by a signal and / or a potential for each one of the circuit variants of the semiconductor circuit. In this way, multiple bond variants are no more

required. To the signal or potential assignment of the individual first electrical connections of the semiconductor circuit with the associated inputs or outputs of

Functional units used by the user

To correctly connect circuit variant of the semiconductor circuit, switching elements are provided in the semiconductor circuit, which the first electrical connections with the inputs or outputs of the used

Circuit variant respectively associated functional units connects or separates from the inputs or outputs of each of the unused circuit variants associated functional units.

In addition, such an inventive

Device preferably has a selection unit, which the individual switching elements depending on the used circuit variant of the semiconductor circuit controls.

For this purpose, the potential level of at least one electrical connection of the

Semiconductor circuit - in the following second electrical

Terminals called the semiconductor circuit - evaluated.

Due to the multiple assignment of the first electrical connections of the semiconductor circuit, each is first

electrical connection with one of the number of signal ^¬ or potential ^{assignments of} the respective first

electrical connection corresponding number of

Switching elements associated with the respective first electrical connection input or output of each of the individual circuit variants associated

Function units connected.

On the other hand, the multiple occupancy of first electrical connections of the semiconductor circuit may cause an input or an output of a

Functional unit or a plurality of functional units, which in a circuit variant of the semiconductor circuit due to a locked switching element of a first

electrical connection is disconnected, via another conductive switching element with another first

electrical connection of the semiconductor circuit is connected.

The control of the individual switching elements via the selection unit takes place in a preferred first variant of the invention on the basis of the applied to a single second electrical connection of the semiconductor circuit potential level. The number of potential levels to be distinguished by the selection unit corresponds to the number of realized in the semiconductor circuit circuit types.

In a preferred second variant of the invention, the activation of the individual switching elements takes place by evaluation of the two potential levels of a plurality of second electrical terminals by the selection unit.

To the number of second electrical connections of the semiconductor circuit, which serve as electrical connections for the actual technical function of in the

Semiconductor circuit selected circuit variant is not available to minimize or completely save, are preferred as the second electrical connections, the electrical connections of the

Semiconductor circuit used over which the

Supply voltage or the enable signal of a

Function unit is performed. As switching elements, field-effect transistors are preferably used which have a comparatively high volume resistance in the blocked state and thus an optimum and almost galvanic separation between the respective first electrical connection and the associated inputs or outputs of the one connected to the respective first electrical connection

Effect functional units.

While in a first preferred embodiment of the invention, the first electrical connections of

Semiconductor circuit correspond to the arranged on the housing of the semiconductor circuit electrical connections, in the second preferred embodiment of the invention, a first electrical connection of the semiconductor circuit also realized as a wire bridge to an electrically conductive plate which is in direct communication with the semiconductor circuit and has a defined electrical potential. The electrically conductive plate having a defined electrical potential is preferably an electrically conductive plate located above or below the housing of the semiconductor circuit and having a reference potential for the latter

Semiconductor circuit identical potential.

This may be an exposed over the housing of the semiconductor circuit, exposed and on the ground potential of the semiconductor circuit located plate (so-called exposed Päd (ePad)) be. Alternatively, however, a plate projecting beyond the housing of the semiconductor circuit and located on a positive or negative reference potential of the semiconductor circuit is also possible.

Embodiments of semiconductor circuit according to the invention will be explained in the following with reference to the drawing by way of example in detail. The figures of the drawing show: an exemplary representation of the signal or potential assignment of the individual electrical connections for two circuit variants of the semiconductor circuit, a block diagram of a first embodiment of a semiconductor circuit according to the invention, a block diagram of a second embodiment with a first circuit variant of a semiconductor circuit according to the invention, 3B is a block diagram of a second embodiment with a second circuit variant of a semiconductor circuit according to the invention,

4 shows a three-dimensional exemplary representation of an ePad connected via wire bridges to a semiconductor chip and FIG

5 is a block diagram of a third embodiment of a semiconductor circuit according to the invention.

In Fig. 1, the housing of a semiconductor circuit, for. As an ASIC, shown with a total of 48 electrical connections. While on the outside, the occupation (occupation_A) of the 48 electrical connections with signals or

Potentials for a first circuit variant (ASIC-A) can be seen on the inside is the assignment (assignment_B) of the 48 electrical connections with signals or

Potentials for a second circuit variant (ASIC-B) shown. There are common shortcuts for the

Assignments of the individual electrical connections used (I / O: binary input / output signal; RF: high-frequency input / output signal; ANALOG: analog input / output signal; VCC: positive reference potential; VEE:

Ground potential).

In an occupancy (allocation_C) of the 48 electrical connections according to the invention, the occupancy (occupancy_A) of the first circuit variant (ASIC-A) and the occupancy

(Occupancy_B) of the second circuit variant (ASIC-B) combined, in Fig. 1 certain electrical

Connections (with the outlined filed

Occupancy labels) assigned twice. Of course, the invention also includes semiconductor circuits with each covered with any other number of electrical connections and with any other number of multiple occupancy of an electrical connection or multiple electrical connections.

To two circuit variants in a single

Semiconductor circuit in an inventive

Integrating multiple occupancy of one or more electrical connections and thus avoiding multiple bond variants are in a first

Embodiment of an inventive

Semiconductor circuit of FIG. 2 to take the following technical precautions. For the sake of simplicity, in the first embodiment shown in FIG

Semiconductor circuit schematically the case of a

Double assignment of the first electrical terminal 1 with the ground potential V _EE and the binary input / output signal V _s2 treated. Of course, a first electric

Connection 1 also with other types of signals and

Potentials assignable in parallel and is covered by the invention. While in a first circuit variant of

Semiconductor circuit, the ground potential V _{EE of} the supply of the first functional unit 2 and at the same time the second functional unit 3 with the ground reference potential is used in a second circuit variant of

Semiconductor circuit, the binary input / output signal V _S 2 only between the input / output stage only the second functional unit 3 and the first electrical connection 1 transferred. Is in a first circuit variant of

Semiconductor circuit for connecting the first electrical terminal 1 to the ground terminal of a first

Functional unit 2 and a second functional unit 3 which is applied to the first electrical connection 1

Ground potential V _EE to the corresponding ground terminal of the first functional unit 2 and the second

Function unit 3 out, so is a generated by a selection unit 4 drive signal in the

Signal path between the first electrical terminal 1 and the two ground terminals of the first

Function unit 2 and the second functional unit 3 befindliches switching element 5, which is realized in the embodiment as a field effect transistor, converted into the conductive state.

At the same time, in the first circuit variant of the semiconductor circuit for disconnecting the first electrical terminal 1 with the input / output terminal of the second functional unit 3, a switching element located in the signal path between the first electrical terminal 1 and the input / output terminal of the second functional unit 3 6, which is also preferably realized as a field effect transistor and has an inverse drive logic to the switching element 5, generated by the same from the selection unit 4

Control signal in the locked state transferred. In this way it is prevented that on the first

electrical terminal 1 is applied to the input / output terminal of the second functional unit 3 and possibly leads to a malfunction of the second functional unit 3. The interposition of the switching element 6 in the signal path between the first electrical connection 1 and the

Input / output terminal of the second functional unit 3, as shown in Figures 3A and 3B, is not mandatory, since input / output terminals of functional units typically one

Have decoupling stage for separation. On the other hand, if the first electrical connection via the switching elements 6 were different from the ground potential

Potential connection of the second functional unit 3

connected, so this potential terminal would have to be maintained at the required potential level throughout the operating time of the semiconductor circuit and would thus the interposition of a locked

Switching element 6 to avoid connection of the lying at ground potential first electrical connection 1 with the potential connection of the second functional unit 3 require. In the second circuit variant of the semiconductor circuit, to separate the first electrical connection 1 from the ground connections of the first functional unit 2 and the second functional unit 3, the switching element 5 in the signal path between the first electrical terminal 1 and the ground terminal of the first functional unit 2 and the second functional unit 3 about that of the

Selection unit 4 generated inverted drive signal disabled, while simultaneously for connecting the first electrical terminal to the input / output terminal of the second functional unit 3, the switching element 6 in the signal path between the first electrical terminal 1 and the input / output terminal of the second

Function unit 3 is transferred to the conductive state. At the same time, to supply the first

Function unit 2 and the second functional unit 3 with a ground potential in a signal path between a further first electrical terminal 7 to ground potential and the ground terminals of the first

Function unit 2 and the second functional unit 3 befindliches switching element 8, which is also preferably implemented as a field effect transistor and has a drive logic for the switching element 5 inverse control logic, via the same of the selection unit of 4 generated control signal in the conductive state

convicted. The generation of the drive signal in the selection unit 4 for driving the switching elements 5, 6 and 8 takes place in a first variant of the invention, which is also shown in Fig. 2, by evaluating the level of the at a single second electrical connection. 9

applied potentials V _Se i.

For the operation of the selection unit 4, the supply with a typically positive reference potential V _C c and a ground potential V _{EE is} required. The positive

Reference potential V _C c and the ground potential V _EE can, as shown in Fig. 2, over additional first

electrical connections 10 and 11 are referred to or to save on the first electrical connections on the for the supply of the first functional unit 2 and the second functional unit 3 with a positive

Reference potential V _C c provided for the first electrical

Ports 12 and 13 and the supply of the first

Function unit 2 and the second functional unit 3 with a ground potential V _EE provided first electrical connections 1 and 7 be realized.

In a second embodiment of the invention, the supply of the first functional unit 2 and the second

Function unit 3 with a ground potential in the case of a locked switching element 5 in the signal path between the first electrical terminal 1 and the ground terminals of the first functional unit 2 and the second

Function unit 3 according to FIG. 3A realized without interposition of a switching element 8 via a wire bridge 14 to a plate 16 which is located at the ground potential of the semiconductor circuit. This electrically conductive plate 16 is shown in FIG. 4 at the bottom of the

Semiconductor chips 15 arranged (but can also on the

Top of the semiconductor chip 15 are arranged) and protrudes beyond the semiconductor chip 15 and is thus exposed (so-called exposed Päd (ePad)). At the

exposed surface of the electrically conductive plate 16 is at least one wire bridge 14, which is in communication with a contact on the semiconductor chip, attached, in particular bonded. The electrically conductive plate 16 is connected to a first electrical connection 7 of

Semiconductor circuit relying on ground potential

is connected. The semiconductor chip 15 is over

Bond wires 17 contacted with the individual electrical terminals 18 on the housing of the semiconductor circuit.

In Fig. 3B, the case is shown in which no

Connection via a wire bridge 14 between the ground terminals of the first functional unit 2 and the second functional unit 3 and the ground potential at a first electrical terminal 7 is present and the ground terminals of the first functional unit 2 and the second Function unit 3 are connected via the switching elements 5 to the ground potential at the first electrical connection 1. In the illustration of FIG

Selection unit 4, the drive signal for the

Switching element 5 is determined from the level of the enable signal V _EN for activating the second functional unit 3 at an electrical connection 19. In this case, the requirement of an additional second electrical connection 9 to which the potential V _Se i to be evaluated is advantageously saved.

In the third embodiment of FIG. 5, the first electrical connection 1 with three signals or

Potentials occupied. In addition to the ground potential V _EE for ground supply of the first functional unit 2 and the second functional unit 3, the input / output signal V _s2 , which is connected to an input / output terminal of the second fusion unit 3, also another input / Output signal V _S i, which is connected to an input / output terminal of the first functional unit 2. For connecting or disconnecting the first electrical connection to or from the input / output connection of the first

Function unit 2, a further switching elements 20 is connected in the signal path between the first electrical terminal 1 and the input / output terminal of the first functional unit 2.

The control of the switching elements 5 and 8, 6 and 20 is carried out in this technical embodiment by three separate control signals from a

Selection unit 4 'for the three circuit variants of Semiconductor circuit can be generated. In addition, in the illustrated in Fig. 5 the second variant of the invention for driving the individual switching elements not different signal or. Potential level of a single signal or potential V _Se i evaluated as in the case of the first variant of the invention shown in Fig. 3A, but the signal or potential level of several

Signals or potentials - in Fig. 5, the signals or potentials V _Se n, V _{Se Se} ₂ and V _Se i ₃ at the second electrical terminals 21, 22 and 23 - evaluated in the selection unit 4 ^' .

With regard to a practicable interpretation of

Cable cross sections of the individual cables in the

Semiconductor circuit and a practical dimensioning of the individual serving as switching elements 5, 6, 8 and 20 field-effect transistors are the signals or potentials that alternatively abut against a first electrical terminal 1 to be selected so that their voltage or

Current levels are of the same order of magnitude.

The invention is not limited to those shown

Embodiments and variants of the invention limited. The invention covers all combinations of the features claimed in the claims and / or the features disclosed in the description and / or the features illustrated in the drawing.

For example, bipolar transistors can also be used instead of field-effect transistors.

Claims

claims

1. semiconductor circuit having at least one first electrical connection (1) with multiple signal or potential assignment for the integration of several

Circuit variants in the semiconductor circuit with

at least one switching element (5,6,8,20) for separating or connecting at least a first

electrical connection (1) from or to an input or output of at least one functional unit (2, 3) integrated in the semiconductor circuit.

2. A semiconductor circuit according to claim 1,

marked by

a selection unit (4, 4 ') for controlling the at least one switching element (5, 6, 8, 20) as a function of a potential assignment of at least one second electrical connection (9, 21, 22, 23) of FIG

Semiconductor circuit.

3. A semiconductor circuit according to claim 1 or 2,

characterized,

a first electrical connection (1) is connected to a number of intermediate switching elements (5, 6, 20) corresponding to a number of signal or potential occupancies of the first electrical connection (1) and having an input or output of the first electrical connection (1) to the individual circuit variants respectively associated functional units (2,3) is connected.

4. A semiconductor circuit according to one of claims 1 to 3, characterized

that the input or output of at least one

Function module (2, 3) which is separated from a first electrical connection (1) in a circuit variant via a blocked switching element (5, 6, 20) via another conductive switching element (8), each having a different electrical connection (7) connected is.

5. A semiconductor circuit according to claim 2,

characterized,

in that the activation of at least one switching element (5, 6, 8, 20) in the selection unit (4, 4 ') takes place as a function of at least two potential levels applied to the second electrical connection (9).

6. A semiconductor circuit according to claim 2 or 4,

characterized,

the activation of at least one switching element (5, 6, 8, 20) in the selection unit (4, 4 ') as a function of at least two at a plurality of second electrical

Terminals (21,22,23) applied potential levels

he follows.

7. A semiconductor circuit according to any one of claims 2, 4 or 5,

characterized,

that at a second electrical connection

(9, 21, 22, 23) applied potential, the supply voltage of a functional unit (2,3) or on a

electrical connection (19) signal applied

Release signal (V _EN ) of a functional unit (2,3).

8. A semiconductor circuit according to one of claims 1 to 7, characterized

in that the switching element (5, 6, 8, 20) is a transistor,

In particular, a field effect transistor is.

9. Semiconductor circuit according to one of claims 1 to 8, characterized

in that the first electrical connection is a wire bridge (14) to one with a housing of the semiconductor circuit

connected plate (16) having a reference potential of the semiconductor circuit.

10. A semiconductor circuit according to claim 9, characterized ,

that the plate (16) has a housing over the

Semiconductor circuit protruding, exposed plate with the ground potential of the semiconductor circuit.