CN107329417B - Microcontroller and input/output pin mapping circuit thereof - Google Patents
Microcontroller and input/output pin mapping circuit thereof Download PDFInfo
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- CN107329417B CN107329417B CN201610280683.XA CN201610280683A CN107329417B CN 107329417 B CN107329417 B CN 107329417B CN 201610280683 A CN201610280683 A CN 201610280683A CN 107329417 B CN107329417 B CN 107329417B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/21—Pc I-O input output
- G05B2219/21119—Circuit for signal adaption, voltage level shift, filter noise
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The invention belongs to the technical field of circuits, and provides a microcontroller and an input/output pin mapping circuit thereof. In the invention, the control information storage module receives and stores control information and sends the control information to the decoding module, the decoding module decodes the control information and outputs a first control signal to the pin mapping module, and the pin mapping module correspondingly maps a plurality of input ends and a plurality of output ends of the functional module to a plurality of input and output pins of the pin interface module according to the first control signal and a second control signal output by a control end of the functional module. The input/output pin mapping circuit can generate different pin mapping relations according to different control signals, so that the positions of the special function input/output pins of the microcontroller can be changed along with the change of the control signals, and the problem that the volume of the printed circuit board is difficult to reduce due to the fixed positions of the special function input/output pins of the MCU is solved.
Description
Technical Field
The invention belongs to the technical field of circuits, and particularly relates to a microcontroller and an input/output pin mapping circuit thereof.
Background
The microcontroller (Microcontroller Unit, MCU) is an indispensable circuit control core unit in various electronic products and industrial control systems, and the MCU generally internally comprises various functional units, wherein the functional units can be a timing counting unit, a PWM generating unit, an infrared encoding unit or an infrared decoding unit, and the like, and the various functional units contained in the MCU are called functional modules. In order to meet the requirements of different application occasions, different functional modules are arranged in the MCU for different electronic products, and a plurality of input pins and a plurality of output pins of the functional modules are respectively mapped to different input and output pins of the MCU to form special function input and output pins of the MCU. For wearable devices, it is required that the smaller and better the volume of the printed circuit board, the layout of the wiring and devices on the printed circuit board directly affects the volume of the printed circuit board, while the location of the special function input output pins of the MCU is one of the important factors affecting the layout of the wiring and devices on the printed circuit board. However, for the existing MCU, the positions of the special function input/output pins are fixed on the MCU, so that the connection lines between some special function input/output pins on the MCU and other devices on the printed circuit board are usually avoided from crossing, and the connection lines have to be prolonged or the space between the MCU and other devices is increased, so that it is difficult to reduce the size of the printed circuit board. Therefore, the prior art has the problem that the volume of the printed circuit board is difficult to reduce due to the fixed positions of the input and output pins with the special function of the MCU.
Disclosure of Invention
The invention aims to provide an input/output pin mapping circuit, which aims to solve the problem that the volume of a printed circuit board is difficult to reduce due to the fixed position of an input/output pin with a special function of an MCU in the prior art.
The invention is realized in such a way that the input/output pin mapping circuit of the microcontroller is arranged in the microcontroller, and comprises a control information storage module, a decoding module and a pin mapping module.
The control information storage module receives control information sent by the outside of the microcontroller, the output end of the control information storage module is connected with the input end of the decoding module, the output end of the decoding module is connected with the first control end of the pin mapping module, the second control end of the pin mapping module is connected with the control end of the functional module in the microcontroller, the plurality of connection ends of the pin mapping module are respectively connected with the plurality of input ends and the plurality of output ends of the functional module, and the plurality of mapping ends of the pin mapping module are respectively connected with the plurality of input and output pins of the pin interface module in the microcontroller.
The control information storage module stores the control information and sends the control information to the decoding module, the decoding module decodes the control information and outputs a first control signal to the pin mapping module, and the pin mapping module maps a plurality of input ends and a plurality of output ends of the function module to a plurality of input and output pins of the pin interface module correspondingly according to the first control signal and a second control signal output by a control end of the function module.
It is still another object of the present invention to provide a microcontroller including the above-described input-output pin mapping circuit.
In the invention, the input/output pin mapping circuit is built in the microcontroller and comprises a control information storage module, a decoding module and a pin mapping module. The control information storage module receives and stores control information sent by the outside of the microcontroller, and sends the control information to the decoding module, the decoding module decodes the control information and outputs a first control signal to the pin mapping module, and the pin mapping module correspondingly maps a plurality of input ends and a plurality of output ends of the functional module to a plurality of input and output pins of the pin interface module according to the first control signal and a second control signal output by a control end of the functional module. The input/output pin mapping circuit can generate different pin mapping relations according to different control signals, so that the positions of the special function input/output pins of the microcontroller can be changed along with the change of the control signals, and the problem that the volume of the printed circuit board is difficult to reduce due to the fixed positions of the special function input/output pins of the MCU is solved.
Drawings
Fig. 1 is a schematic diagram of an input/output pin mapping circuit according to an embodiment of the present invention;
fig. 2 is a schematic diagram of an input/output pin mapping circuit according to another embodiment of the present invention;
fig. 3 is a schematic diagram of an input/output pin mapping circuit according to another embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Fig. 1 shows the structure of the input/output pin mapping circuit according to the embodiment of the present invention, and for convenience of explanation, only the parts related to the embodiment of the present invention are shown in detail as follows:
the input/output pin mapping circuit is built in the microcontroller, and the input/output pin mapping circuit includes a control information storage module 100, a decoding module 200, and a pin mapping module 300.
The control information storage module 100 receives control information transmitted from the outside of the microcontroller, an output end of the control information storage module 100 is connected with an input end of the decoding module 200, an output end of the decoding module 200 is connected with a first control end of the pin mapping module 300, a second control end of the pin mapping module 300 is connected with a control end of the functional module 10 in the microcontroller, a plurality of connection ends of the pin mapping module 300 are respectively connected with a plurality of input ends and a plurality of output ends of the functional module 10, and a plurality of mapping ends of the pin mapping module 300 are respectively connected with a plurality of input and output pins of the pin interface module 20 in the microcontroller.
The control information storage module 100 stores the control information and sends the control information to the decoding module 200, the decoding module 200 decodes the control information and outputs a first control signal to the pin mapping module 300, and the pin mapping module 300 maps the plurality of input ends and the plurality of output ends of the function module 10 to the plurality of input and output pins of the pin interface module 20 according to the first control signal and a second control signal output by the control end of the function module 10.
Specifically, the pin interface module 20 is a general purpose input/output (General Purpose Input Output, GPIO) module in a microcontroller. The functional module 10 is a generic term of a plurality of functional units contained in the microcontroller, wherein the functional units may be a timing counting unit, a PWM generating unit, a watchdog unit, an infrared encoding unit, an infrared decoding unit, or the like, the plurality of inputs of the functional module 10 are a sum of the inputs of the plurality of functional units, and the plurality of outputs of the functional module 10 are a sum of the outputs of the plurality of functional units.
Specifically, the control information sent from the outside of the microcontroller is transmitted to the control information storage module 100 through the burning interface of the microcontroller; the control information storage module 100 stores and forwards the received control information to the decoding module 200; the decoding module 200 parses the control information, and sends a first control signal obtained by parsing to the pin mapping module 300, where the first control signal is used to control mapping relationships between multiple input ends of the functional module 10 and multiple input/output pins of the pin interface module 20, and between multiple output ends of the functional module 10 and multiple input/output pins of the pin interface module 20; the control terminal of the functional module 10 outputs a second control signal to the pin mapping module 300, where the second control signal is used to select a plurality of output terminals mapped to the same input/output pin, so as to ensure that only one output terminal of the functional module 10 is mapped to each input/output pin of the pin interface module 20 at each moment. When the control information sent from the outside of the microcontroller is changed or the second control signal output from the control terminal of the functional module 10 is changed, the mapping relationship between the plurality of input terminals and the plurality of output terminals of the functional module 10 and the plurality of input and output pins of the pin interface module 20 is changed.
As an embodiment of the present invention, as shown in fig. 2, the control information storage module 100 includes a programming unit 101 and a storage unit 102; the programming unit 101 receives control information sent from the outside of the microcontroller, the output end of the programming unit 101 is connected with the input end of the storage unit 102, and the output end of the storage unit 102 is the output end of the control information storage module 100.
The programming unit 101 programs control information to the storage unit 102, and the storage unit 102 stores the control information and transmits the control information to the decoding module 200.
Specifically, the programming unit 101 programs control information to the memory cell 102 at a timing required by the memory cell 102. The memory unit 102 is a non-volatile memory, and the content stored in the memory unit 102 is not lost in case of power down of the microcontroller.
As an embodiment of the present invention, as shown in fig. 2, the pin mapping module 300 includes an input pin mapping unit 301 and an output pin mapping unit 302.
The plurality of connection ends of the input pin mapping unit 301 and the plurality of connection ends of the output pin mapping unit 302 form a plurality of connection ends of the pin mapping module 300 together, the plurality of connection ends of the input pin mapping unit 301 are respectively connected with the plurality of input ends of the functional module 10, and the plurality of connection ends of the output pin mapping unit 302 are respectively connected with the plurality of output ends of the functional module 10; the plurality of mapping ends of the input pin mapping unit 301 and the plurality of mapping ends of the output pin mapping unit 302 are the plurality of mapping ends of the pin mapping module 300; the control terminal of the input pin mapping unit 301 is a first control terminal of the pin mapping module 300, and the first control terminal and the second control terminal of the output pin mapping unit 302 are a first control terminal and a second control terminal of the pin mapping module 300, respectively.
As shown in fig. 3, the input pin mapping unit 301 includes a plurality of multiplexers Q as an embodiment of the present invention.
The control terminal of each multiplexer Q is commonly connected to form the control terminal of the input pin mapping unit 301, the plurality of input terminals of each multiplexer Q are the plurality of mapping terminals of the input pin mapping unit 301, and the output terminal of each multiplexer Q is one connection terminal of the input pin mapping unit 301.
Specifically, the number of multiplexers Q is the same as the number of input ends of the functional module 10, the output end of each multiplexer Q is connected to one input end of the functional module 10, the control signal of each multiplexer Q is the first control signal output by the decoding module 200, and each multiplexer Q selects a certain input/output pin in the pin interface module 20 according to the first control signal to be communicated with the output end of the multiplexer Q, that is, selects a certain input/output pin according to the first control signal to form a mapping relationship with the corresponding input end of the functional module 10. When the first control signal changes, the mapping relationship between the plurality of input/output pins of the pin interface module 20 and the plurality of input terminals of the functional module 10 also changes.
As an embodiment of the present invention, as shown in fig. 3, the output pin mapping unit 302 includes a plurality of mapping subunits (Z1 to Zn). The first control end of each of the plurality of mapping subunits (Z1-Zn) is commonly connected to form a first control end of the output pin mapping unit 302, the second control end of each of the plurality of mapping subunits is commonly connected to form a second control end of the output pin mapping unit 302, the plurality of connection ends of each of the plurality of mapping subunits are the plurality of connection ends of the output pin mapping unit 302, and the mapping end of each of the plurality of mapping subunits is one mapping end of the output pin mapping unit 302.
Specifically, the number of the plurality of mapping subunits (Z1 to Zn) is the same as the number of input/output pins of the pin interface module 20.
As shown in fig. 3, each of the plurality of mapping subunits (Z1 to Zn) has the same structure, and each of the mapping subunits includes a first multiplexer Q1 and a second multiplexer Q2;
the control end of the first multiplexer Q1 and the control end of the second multiplexer Q2 are a first control end and a second control end of the mapping subunit respectively, the plurality of input ends of the first multiplexer Q1 are a plurality of connection ends of the mapping subunit, the output end of the first multiplexer Q1 is connected with the first input end of the second multiplexer Q2, one input end of the plurality of input ends of the first multiplexer Q1 is connected with the second input end of the second multiplexer Q2, and the output end of the second multiplexer Q2 is the mapping end of the mapping subunit.
Specifically, one of the multiple input ends of the first multiplexer Q1 is connected to the second input end of the second multiplexer Q2, where specifically, which of the multiple input ends of the first multiplexer Q1 is connected to the second input end of the second multiplexer Q2 is selected, and can be freely selected by a user according to requirements. The output of the second multiplexer Q2 is connected to one input/output pin of the pin interface module 20.
The working principle of each mapping subunit is the same, and the specific working principle is as follows: the first multiplexer Q1 selects one of the plurality of output terminals of the functional module 10 to be in communication with the output terminal of the first multiplexer Q1 according to the first control signal, i.e., one of the plurality of output terminals of the functional module 10 is connected to the first input terminal of the second multiplexer Q2, and the second multiplexer Q2 selects the first input terminal or the second input terminal thereof to be in communication with the output terminal thereof according to the second control signal, i.e., one of the plurality of output terminals of the functional module 10 is mapped onto one of the input/output pins of the pin interface module 20.
Based on the application advantages of the input/output pin mapping circuit in the microcontroller, the invention also provides the microcontroller comprising the input/output pin mapping circuit.
In the invention, the control information storage module receives and stores control information and sends the control information to the decoding module, the decoding module decodes the control information and outputs a first control signal to the pin mapping module, and the pin mapping module correspondingly maps a plurality of input ends and a plurality of output ends of the functional module to a plurality of input and output pins of the pin interface module according to the first control signal and a second control signal output by a control end of the functional module. The input/output pin mapping circuit can generate different pin mapping relations according to different control signals, so that the positions of the special function input/output pins of the microcontroller can be changed along with the change of the control signals, and the problem that the volume of the printed circuit board is difficult to reduce due to the fixed positions of the special function input/output pins of the MCU is solved.
The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather is intended to cover all modifications, equivalents, and alternatives falling within the spirit and principles of the invention.
Claims (6)
1. An input/output pin mapping circuit of a microcontroller, wherein the input/output pin mapping circuit is arranged in the microcontroller, and the input/output pin mapping circuit is characterized by comprising a control information storage module, a decoding module and a pin mapping module;
the control information storage module receives control information sent by the outside of the microcontroller, the output end of the control information storage module is connected with the input end of the decoding module, the output end of the decoding module is connected with the first control end of the pin mapping module, the second control end of the pin mapping module is connected with the control end of the functional module in the microcontroller, the plurality of connection ends of the pin mapping module are respectively connected with the plurality of input ends and the plurality of output ends of the functional module, and the plurality of mapping ends of the pin mapping module are respectively connected with the plurality of input and output pins of the pin interface module in the microcontroller;
the control information storage module stores the control information and sends the control information to the decoding module, the decoding module decodes the control information and outputs a first control signal to the pin mapping module, and the pin mapping module correspondingly maps a plurality of input ends and a plurality of output ends of the functional module to a plurality of input and output pins of the pin interface module according to the first control signal and a second control signal output by a control end of the functional module;
the pin mapping module comprises an input pin mapping unit and an output pin mapping unit;
the plurality of connection ends of the input pin mapping unit and the plurality of connection ends of the output pin mapping unit form a plurality of connection ends of the pin mapping module together, the plurality of connection ends of the input pin mapping unit are respectively connected with the plurality of input ends of the functional module, and the plurality of connection ends of the output pin mapping unit are respectively connected with the plurality of output ends of the functional module; the plurality of mapping ends of the input pin mapping unit and the plurality of mapping ends of the output pin mapping unit are all the plurality of mapping ends of the pin mapping module; the control end of the input pin mapping unit is a first control end of the pin mapping module, and the first control end and the second control end of the output pin mapping unit are respectively a first control end and a second control end of the pin mapping module;
the pin interface module is a general purpose input/output module in the microcontroller.
2. The input-output pin mapping circuit of claim 1, wherein the input-pin mapping unit comprises a plurality of multiplexers;
the control end of each multiplexer is commonly connected to form the control end of the input pin mapping unit, the plurality of input ends of each multiplexer are the plurality of mapping ends of the input pin mapping unit, and the output end of each multiplexer is one connecting end of the input pin mapping unit.
3. The input-output pin mapping circuit of claim 1, wherein the output pin mapping unit comprises a plurality of mapping subunits;
the first control end of each mapping subunit is commonly connected to form a first control end of the output pin mapping unit, the second control end of each mapping subunit is commonly connected to form a second control end of the output pin mapping unit, the plurality of connection ends of each mapping subunit are the plurality of connection ends of the output pin mapping unit, and the mapping end of each mapping subunit is one mapping end of the output pin mapping unit.
4. The input-output pin mapping circuit of claim 3, wherein each of the mapping subunits is identical in structure and each of the mapping subunits comprises a first multiplexer and a second multiplexer;
the control end of the first multiplexer and the control end of the second multiplexer are respectively a first control end and a second control end of the mapping subunit, a plurality of input ends of the first multiplexer are a plurality of connection ends of the mapping subunit, an output end of the first multiplexer is connected with a first input end of the second multiplexer, one input end of the plurality of input ends of the first multiplexer is connected with a second input end of the second multiplexer, and an output end of the second multiplexer is a mapping end of the mapping subunit.
5. The input-output pin mapping circuit of claim 1, wherein the control information storage module comprises a programming unit and a storage unit; the programming unit receives control information sent by the outside of the microcontroller, the output end of the programming unit is connected with the input end of the storage unit, and the output end of the storage unit is the output end of the control information storage module;
the programming unit programs the control information to the storage unit, and the storage unit stores the control information and transmits the control information to the decoding module.
6. A microcontroller comprising the input-output pin mapping circuit of any one of claims 1 to 5.
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CN112037497B (en) * | 2020-09-16 | 2022-04-15 | 深圳市爱尚智联科技有限公司 | Bluetooth BLE and infrared integrated remote control assembly and remote control method |
CN113986799B (en) * | 2021-11-12 | 2023-11-03 | 上海威固信息技术股份有限公司 | FPGA-based digital pin dynamic multiplexing method and device |
Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1525561A (en) * | 2003-08-29 | 2004-09-01 | 北京中星微电子有限公司 | Chip having input and output terminal configurable function and method thereof |
US6825689B1 (en) * | 2000-10-26 | 2004-11-30 | Cypress Semiconductor Corporation | Configurable input/output interface for a microcontroller |
CN101136005A (en) * | 2007-09-29 | 2008-03-05 | 中兴通讯股份有限公司 | Terminal chip pin multiplexing device |
CN101378617A (en) * | 2007-08-30 | 2009-03-04 | 盛群半导体股份有限公司 | Apparatus for dynamically configuring chip pin function |
CN101625889A (en) * | 2009-07-29 | 2010-01-13 | 深圳国微技术有限公司 | Memory with redefined pins and protection method thereof |
CN103745050A (en) * | 2013-12-27 | 2014-04-23 | 北京亚科鸿禹电子有限公司 | Pin mapping method and system |
CN103891146A (en) * | 2012-03-08 | 2014-06-25 | 罗德施瓦兹两合股份有限公司 | Semiconductor circuit with electrical connections having multiple signal or potential assignments |
CN104011697A (en) * | 2011-09-27 | 2014-08-27 | 密克罗奇普技术公司 | Virtual general purpose input/output for a microcontroller |
CN105279051A (en) * | 2014-06-25 | 2016-01-27 | 深圳市中兴微电子技术有限公司 | Method and device for realizing multiplexing pin |
CN205594383U (en) * | 2016-04-28 | 2016-09-21 | 深圳市博巨兴实业发展有限公司 | Microcontroller and input/output pin mapping circuit thereof |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8176296B2 (en) * | 2000-10-26 | 2012-05-08 | Cypress Semiconductor Corporation | Programmable microcontroller architecture |
US8269524B2 (en) * | 2010-04-27 | 2012-09-18 | Atmel Corporation | General purpose input/output pin mapping |
-
2016
- 2016-04-28 CN CN201610280683.XA patent/CN107329417B/en active Active
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6825689B1 (en) * | 2000-10-26 | 2004-11-30 | Cypress Semiconductor Corporation | Configurable input/output interface for a microcontroller |
CN1525561A (en) * | 2003-08-29 | 2004-09-01 | 北京中星微电子有限公司 | Chip having input and output terminal configurable function and method thereof |
CN101378617A (en) * | 2007-08-30 | 2009-03-04 | 盛群半导体股份有限公司 | Apparatus for dynamically configuring chip pin function |
CN101136005A (en) * | 2007-09-29 | 2008-03-05 | 中兴通讯股份有限公司 | Terminal chip pin multiplexing device |
CN101625889A (en) * | 2009-07-29 | 2010-01-13 | 深圳国微技术有限公司 | Memory with redefined pins and protection method thereof |
CN104011697A (en) * | 2011-09-27 | 2014-08-27 | 密克罗奇普技术公司 | Virtual general purpose input/output for a microcontroller |
CN103891146A (en) * | 2012-03-08 | 2014-06-25 | 罗德施瓦兹两合股份有限公司 | Semiconductor circuit with electrical connections having multiple signal or potential assignments |
CN103745050A (en) * | 2013-12-27 | 2014-04-23 | 北京亚科鸿禹电子有限公司 | Pin mapping method and system |
CN105279051A (en) * | 2014-06-25 | 2016-01-27 | 深圳市中兴微电子技术有限公司 | Method and device for realizing multiplexing pin |
CN205594383U (en) * | 2016-04-28 | 2016-09-21 | 深圳市博巨兴实业发展有限公司 | Microcontroller and input/output pin mapping circuit thereof |
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