CN210015439U - Domestic high-integration core board for display control equipment - Google Patents
Domestic high-integration core board for display control equipment Download PDFInfo
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- CN210015439U CN210015439U CN201921330094.3U CN201921330094U CN210015439U CN 210015439 U CN210015439 U CN 210015439U CN 201921330094 U CN201921330094 U CN 201921330094U CN 210015439 U CN210015439 U CN 210015439U
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Abstract
The utility model discloses a domestic high integration core plate for display control equipment, which comprises a core plate, wherein the core plate comprises a main control module, an FPGA, a special video processor, a function daughter card connector and a memory daughter card connector, the core plate single plate integrates core processing devices required by the application of the display control equipment such as the FPGA, the CPU, an independent display card and the special video processor, and the vast majority of display control application requirements can be covered by reasonably matching the interconnection relationship among the processors, a user can reasonably distribute tasks to different processors for processing according to different task characteristics to achieve the optimal processing and display effect, so that the system application construction based on the core plate is very flexible, in addition, the core plate can flexibly expand external interfaces and board-mounted storage through the FPGA and the function and the memory daughter card connector, so that the core plate can flexibly expand the external interfaces according to the application requirements, and key processing devices of the core plate all adopt the domestic devices, the technology dependence on foreign countries is reduced.
Description
Technical Field
The utility model relates to a nuclear core plate, in particular to core plate for showing the homemade high integration of accuse equipment belongs to and shows the accuse equipment field.
Background
The display and control equipment is an important component of an electronic information system in weaponry, and with the continuous development of informatization war, information of multiple sensors such as radar, photoelectric and infrared sensors and information of auxiliary data such as terrain and chart are fused into the development trend of a new generation of display and control equipment.
Among traditional weapon system, need to occupy many independent equipment during multisensor information display and show respectively, a large amount of physical space has been occupied when needing higher cost, be unfavorable for further integration and the miniaturized design of complete machine system, many independent equipments need many operator operations, it is inconvenient to use the maintenance, the CPU of main integrated circuit board among the current display control equipment, FPGA, the most adopted foreign products of core devices such as GPU and special video processor, there are supply of material safety and technical safety dual risk, progressively promote the localization rate of core device in the design and have very important realistic meaning, many data utensil system application demands of main integrated circuit board are customized in the current display control equipment and are designed, the commonality is poor, be unfavorable for the reuse of mature technique, to sum up, the following problem that the core integrated circuit board of display control equipment exists:
(1) low single board integration
(2) Non-domestic core device
(3) Poor versatility and difficult expansion and reconstruction
SUMMERY OF THE UTILITY MODEL
The utility model provides a core plate of domestic high integration level for showing accuse equipment to solve the problem mentioned in the above-mentioned background art.
In order to solve the technical problem, the utility model provides a following technical scheme:
a homemade high integration nuclear core plate for showing accuse equipment, including nuclear core plate, include host system, FPGA, special video processor, function daughter card connector and storage daughter card connector on the nuclear core plate, FPGA passes through the PCIe bus and is connected with host system, FPGA passes through the BT1120 bus and is connected with special video processor, host system passes through 100/1000M ethernet and is connected with special video processor, and host system output HDMI to special video processor, FPGA passes through private function expansion interface and is connected with function daughter card connector, FPGA passes through private storage expansion interface and is connected with storage daughter card connector.
As a preferred technical scheme of the utility model, nuclear core plate externally fixes providing following interface: the device comprises a 2-path HDMI output interface, a 2-path 100/1000M Ethernet electric port, a 1-path 1000M Ethernet optical port, a 3-path RS422 interface and a 3-path USB interface, wherein the HDMI interface is respectively output by a special video processor and a main control module, and other fixed interfaces are provided by the main control module.
As an optimal technical scheme of the utility model, the external non-fixed interface of nuclear core plate passes through FPGA and function daughter card connector extension according to the application demand, and the extensible interface includes SDI, SRIO, PCIE, ethernet, CAN, 1553B, CameraLink, HDMI, custom LVDS/LVTTL/LVCMOS/TTL.
As an optimal technical scheme of the utility model, kernel core board plug-in memory resource passes through FPGA and memory daughter card connector extension according to the application demand, and the extensible interface includes DDR2, DDR3, QDRII +.
As a preferred technical solution of the present invention, the private function extension interface includes a plurality of LVDS signals, a plurality of LVTTL signals, a plurality of LVCMOS signals, a plurality of serial high-speed transceiver signals, a plurality of clock signals and a plurality of power signals.
As a preferred technical scheme of the utility model, private storage extension interface includes a plurality of LVDS signals, a plurality of LVTTL signals, a plurality of clock signal and a plurality of power signal.
As an optimal technical scheme of the utility model, host system includes bridge piece, CPU and independent display card, CPU adopts domestic device, and the optional model of domestic CPU includes but not limited to godson 3A3000, the bridge piece adopts domestic device, and the optional model of domestic bridge piece includes but not limited to godson 7A1000, independent display card adopts domestic device, and the optional model of domestic independent display card includes but not limited to GP101 of a long time.
As a preferred technical solution of the present invention, the FPGA adopts a domestic device, and selectable device models include but are not limited to JFM7K325T, JFM7V690T of double denier microelectronics, the dedicated video processor adopts a domestic device, and selectable models include but are not limited to haisi HI 3531A.
As an optimized technical scheme of the utility model, FMC connector is all chooseed for use to function daughter card connector and memory daughter card connector.
The utility model has the advantages that:
the core board single board integrates the FPGA, the CPU, the core processing device required by the application of display and control equipment such as an independent display card and a special video processor, the interconnection relationship among the processors is reasonably matched, most display and control application requirements can be covered, a user can reasonably distribute tasks to different processors for processing according to different task characteristics, the optimal processing and display effect is achieved, the system application construction based on the core board is very flexible, in addition, the core board can expand the external interface and board-mounted storage through the FPGA and the function and memory sub-card connector, the core board can flexibly expand the external interface according to the application requirements, all key processing devices of the core board adopt domestic devices, the technical dependence on foreign countries is reduced, and the technical safety and the supply safety of the system are effectively improved.
Drawings
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention, and together with the description serve to explain the invention and not to limit the invention. In the drawings:
FIG. 1 is a core architecture diagram of the present invention;
fig. 2 is an exemplary diagram of an embodiment of the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are presented herein only to illustrate and explain the present invention, and not to limit the present invention.
Examples
As shown in fig. 1, the utility model discloses a homemade high integration core plate for showing accuse equipment, including core plate, include host system on the core plate, FPGA, special video processor, function daughter card connector and memory daughter card connector, FPGA passes through the PCIe bus and is connected with host system, FPGA passes through BT1120 bus and is connected with special video processor, host system passes through 100/1000M ethernet and is connected with special video processor, and host system output HDMI to special video processor, FPGA passes through private function expansion interface and is connected with function daughter card connector, FPGA passes through private memory expansion interface and is connected with memory daughter card connector;
the core board is externally fixed with the following interfaces: the system comprises a 2-path HDMI output interface, a 2-path 100/1000M Ethernet electric port, a 1-path 1000M Ethernet optical port, a 3-path RS422 interface and a 3-path USB interface, wherein the HDMI interface is respectively output by a special video processor and a main control module, and other fixed interfaces are provided by the main control module;
the external non-fixed interface of the core board is expanded with the functional daughter card connector through the FPGA according to application requirements, and the expandable interface comprises SDI, SRIO, PCIE, Ethernet, CAN, 1553B, CameraLink, HDMI and self-defined LVDS/LVTTL/LVCMOS/TTL;
the core board plug-in memory resources are expanded through the FPGA and the memory daughter card connector according to application requirements, and the expandable interface comprises DDR2, DDR3 and QDRII +;
the private function extension interface comprises a plurality of LVDS signals, a plurality of LVTTL signals, a plurality of LVCMOS signals, a plurality of serial high-speed transceiver signals, a plurality of clock signals and a plurality of power signals;
the private storage expansion interface comprises a plurality of LVDS signals, a plurality of LVTTL signals, a plurality of clock signals and a plurality of power signals;
the main control module comprises a bridge piece, a CPU and an independent display card, wherein the CPU adopts a domestic device, the selectable type of the domestic CPU comprises but is not limited to a Loongson 3A3000, the bridge piece adopts a domestic device, the selectable type of the domestic bridge piece comprises but is not limited to a Loongson 7A1000, the independent display card adopts a domestic device, and the selectable type of the domestic independent display card comprises but is not limited to a long GP 101;
the FPGA adopts a domestic device, and the models of the selectable devices include but are not limited to JFM7K325T, JFM7V690T of double denier microelectronics, the special video processor adopts a domestic device, and the models of the selectable devices include but are not limited to Haisi HI 3531A;
the functional daughter card connector and the memory daughter card connector both adopt FMC connectors;
fig. 2 is a specific embodiment of the present invention, which includes: 1 host module, 1 piece FPGA, 1 piece special video processor, 1 individual function daughter card connector and 1 memory daughter card connector, host module core device includes: the system comprises 1 CPU processor, 1 bridge and 1 independent display card, wherein the core processing devices on a core board are realized by domestic devices, the FPGA adopts JFM7K325T of double-denier microelectronics, a special video processor adopts Haisi HI3531A, the CPU adopts Loongson 3A3000, the bridge adopts Loongson 7A1000, the independent display card adopts durable GP101, the national production of the core processing devices reduces the technical dependence on foreign countries, the technical safety and the supply safety of the system are effectively improved, and in addition, the functional daughter card connector and the memory daughter card connector both adopt FMC connectors;
the connection relationship of the key components of the core board is as follows: JFM7K325T is connected with the master control module through PCIe2.0 x 4; JFM7K325T is connected with HI3531A through BT1120 bus; the master control module is connected with an HI3531A through an 100/1000M Ethernet and outputs the HDMI to the HI 3531A; the FPGA, the video processor and the main control module are interconnected through standard bus interfaces such as PCIe, BT1120, Ethernet, HDMI and the like, so that data transmission among core processing devices on the whole core card is very flexible and efficient;
JFM7K325T is connected with a functional daughter card FMC connector through two Serdes x1 high-speed serial transceivers and one LVTTL x6, 2 optical fiber interfaces and one user-defined LVTTL interface are expanded outwards, JFM7K325T is connected with a memory daughter card FMC connector through 100 HSTL _ I interfaces, 1 DIFF _ HSTL _ I interfaces and 1 DIFF _ HSTL _ II interfaces, and is stored on a 72Mb QDR board, and the programmable and reconfigurable characteristics of the FPGA are combined with a private function expansion interface and a private memory expansion interface with standard definition, so that the core board in the embodiment is very flexible and convenient to expand the external interface, the interfaces are flexible and expandable, the efficient interconnection and intercommunication characteristics of core devices are realized, the application range of the core board is greatly expanded, and the single board integration degree of the core board is improved;
the core board is externally fixed with the following interfaces: the HDMI interface comprises a 2-path HDMI output interface, a 2-path 100/1000M Ethernet power port, a 1-path 1000M Ethernet optical port, a 3-path RS422 interface and a 3-path USB interface, the HDMI interface is respectively output by an HI3531A and the main control module, and other fixed interfaces are provided by the main control module.
Finally, it should be noted that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments described in the foregoing embodiments, or equivalents may be substituted for elements thereof. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (9)
1. A homemade high integration core plate for showing accuse equipment, including core plate, its characterized in that, include host system, FPGA, special video processor, function daughter card connector and memory daughter card connector on the core plate, FPGA passes through the PCIe bus and is connected with host system, FPGA passes through the BT1120 bus and is connected with special video processor, host system passes through 100/1000M ethernet and is connected with special video processor, and host system output HDMI to special video processor, FPGA passes through the private function expansion interface and is connected with function daughter card connector, FPGA passes through the private memory expansion interface and is connected with memory daughter card connector.
2. The homemade high-integration core board for display and control devices as claimed in claim 1, wherein the core board provides the following interfaces for external fixation: the device comprises a 2-path HDMI output interface, a 2-path 100/1000M Ethernet electric port, a 1-path 1000M Ethernet optical port, a 3-path RS422 interface and a 3-path USB interface, wherein the HDMI interface is respectively output by a special video processor and a main control module, and other fixed interfaces are provided by the main control module.
3. The homemade high-integration core board for display and control devices of claim 1, wherein the external non-fixed interface of the core board is extended by the FPGA and the functional daughter card connector according to the application requirement, and the extensible interface includes SDI, SRIO, PCIE, ethernet, CAN, 1553B, CameraLink, HDMI, custom LVDS/LVTTL/LVCMOS/TTL.
4. The homemade high-integration core board for display and control devices of claim 1, wherein the memory resources external to the core board are extended by the FPGA and the memory daughter card connector according to application requirements, and the extensible interface comprises DDR2, DDR3, QDRII +.
5. The homemade high-integration core board for display control devices of claim 1, wherein the proprietary function extension interface comprises a plurality of LVDS signals, a plurality of LVTTL signals, a plurality of LVCMOS signals, a plurality of serial high-speed transceiver signals, a plurality of clock signals and a plurality of power signals.
6. The homemade high-integration core board for a display control device of claim 1, wherein the private memory expansion interface comprises a plurality of LVDS signals, a plurality of LVTTL signals, a plurality of clock signals and a plurality of power signals.
7. The homemade high-integration core board for display and control devices of claim 1, wherein the main control module comprises a bridge chip, a CPU and an independent display card, the CPU employs a homemade device, and the selectable model of the homemade CPU includes but is not limited to loongson 3a3000, the bridge chip employs a homemade device, and the selectable model of the homemade bridge chip includes but is not limited to loongson 7a1000, the independent display card employs a homemade device, and the selectable model of the homemade independent display card includes but is not limited to long GP 101.
8. The homemade high-integration core board for display and control devices of claim 1, wherein the FPGA is a homemade device, and selectable device models include, but are not limited to, JFM7K325T, JFM7V690T of double denier microelectronics, and the dedicated video processor is a homemade device, and selectable models include, but are not limited to, haisi HI 3531A.
9. The core board with high integration density for display and control equipment as claimed in claim 1, wherein FMC connectors are used for both the functional daughter card connector and the memory daughter card connector.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921330094.3U CN210015439U (en) | 2019-08-16 | 2019-08-16 | Domestic high-integration core board for display control equipment |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921330094.3U CN210015439U (en) | 2019-08-16 | 2019-08-16 | Domestic high-integration core board for display control equipment |
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| CN210015439U true CN210015439U (en) | 2020-02-04 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115118553A (en) * | 2022-06-22 | 2022-09-27 | 北京航天发射技术研究所 | Multi-protocol gateway based on domestic CPU and real-time operating system |
| CN115934631A (en) * | 2022-12-30 | 2023-04-07 | 武汉麓谷科技有限公司 | Intelligent storage platform based on MPSoC |
-
2019
- 2019-08-16 CN CN201921330094.3U patent/CN210015439U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115118553A (en) * | 2022-06-22 | 2022-09-27 | 北京航天发射技术研究所 | Multi-protocol gateway based on domestic CPU and real-time operating system |
| CN115118553B (en) * | 2022-06-22 | 2024-04-09 | 北京航天发射技术研究所 | Multiprotocol gateway based on domestic CPU and real-time operation system |
| CN115934631A (en) * | 2022-12-30 | 2023-04-07 | 武汉麓谷科技有限公司 | Intelligent storage platform based on MPSoC |
| CN115934631B (en) * | 2022-12-30 | 2023-10-27 | 武汉麓谷科技有限公司 | Intelligent storage platform based on MPSoC |
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