WO2013078903A1 - 阵列基板、液晶面板及显示设备 - Google Patents

阵列基板、液晶面板及显示设备 Download PDF

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Publication number
WO2013078903A1
WO2013078903A1 PCT/CN2012/081844 CN2012081844W WO2013078903A1 WO 2013078903 A1 WO2013078903 A1 WO 2013078903A1 CN 2012081844 W CN2012081844 W CN 2012081844W WO 2013078903 A1 WO2013078903 A1 WO 2013078903A1
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Prior art keywords
electrode layer
pixel electrode
common
common electrode
pixel
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PCT/CN2012/081844
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English (en)
French (fr)
Inventor
董向丹
玄明花
高永益
黄炜赟
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京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US13/704,696 priority Critical patent/US9195100B2/en
Publication of WO2013078903A1 publication Critical patent/WO2013078903A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134381—Hybrid switching mode, i.e. for applying an electric field with components parallel and orthogonal to the substrates

Definitions

  • Embodiments of the present invention relate to an array substrate, a liquid crystal panel, and a display device. Background technique
  • a voltage is applied between a pixel electrode (for example, an ITO (Indium Tin Oxide) electrode) and a common electrode (for example, an ITO electrode) to form an electric field, and the liquid crystal is controlled to control the liquid crystal.
  • a pixel electrode for example, an ITO (Indium Tin Oxide) electrode
  • a common electrode for example, an ITO electrode
  • the TFT-LCD may include two types of In Plane Switching (IPS) type and Advanced Super Dimension Switch (ADSDS or ADS).
  • IPS In Plane Switching
  • ADSDS Advanced Super Dimension Switch
  • the spacing between the electrodes is small, and a surface electric field is generated between the electrodes when a voltage is applied, and the liquid crystal can only rotate at the portion to realize the light valve, thereby causing the light to be penetrated. limit.
  • ADS type display mode a multi-dimensional electric field is formed by an electric field generated by the edge of the slit electrode in the same plane and an electric field generated between the slit electrode layer and the plate electrode layer, so that the slit electrode between the liquid crystal cells is formed.
  • All of the aligned liquid crystal molecules directly above the electrode can be rotated, thereby improving the liquid crystal working efficiency and increasing the light transmission efficiency.
  • Advanced super-dimensional field switching technology can improve the picture quality of TFT-LCD products, with high resolution, high transmittance, low power consumption, wide viewing angle, high aperture ratio, low chromatic aberration, no squeeze water wave (ush Mura), etc. advantage.
  • FIG 1 is a cross-sectional view showing the structure of a conventional ADS type display.
  • the structure of the ADS type display includes: a color filter substrate C and an array substrate A, and a liquid crystal layer 5 filled between the color filter substrate C and the array substrate A.
  • the color filter substrate C includes a glass substrate 2 and a color film layer 6, and the array substrate A includes a glass substrate 71, a pixel electrode layer 3, a common electrode layer 4, and an insulating layer 72. Further, a polarizing plate 1 is attached to both the color filter substrate C and the outer side of the array substrate A.
  • Pixel electrode layer plate electrode
  • the positive and negative electrodes of the third electrode and the common electrode layer (slit electrode) 4 are arranged to be overlapped by the insulating layer 72.
  • the above electrode layer generates a multi-dimensional electric field after being energized during operation, so that the liquid crystal molecules between the electrodes and the electrodes rotate in the plane of the panel.
  • FIG. 2 is a view for explaining the pixel electrode layer 3 in the structure of the above-described conventional ADS type display Schematic diagram of a pixel electrode (e.g., ITO electrode) 31 and a common electrode (e.g., ITO electrode) 41 of the common electrode layer 4. Since the aperture ratio and the capacitive coupling effect are taken into consideration in the design, there is a certain distance between the edge of the pixel electrode 31 and the edge of the common electrode 41, which may cause uneven light transmission at the edge of the pixel, resulting in light transmission of the liquid crystal display. The effect is not uniform overall. Summary of the invention
  • Embodiments of the present invention provide an array substrate, a liquid crystal panel, and a display device for solving the problem of uneven light transmission effect of the existing liquid crystal panel.
  • An aspect of the present invention provides an array substrate, the array substrate includes a pixel electrode layer and a common electrode layer, wherein the common electrode layer is provided with a plurality of common electrodes, and the pixel electrode layer is provided with a plurality of pixel electrodes
  • the projections of the respective common electrodes on the pixel electrode layer in a vertical direction overlap or partially overlap with the corresponding pixel electrodes, respectively.
  • the pixel electrode layer includes adjacent first pixel electrodes and second pixel electrodes
  • the common electrode layer includes a first common electrode above the data lines, wherein two opposite edges of the first common electrode Projection lines on the pixel electrode layer in the vertical direction are respectively located on the first pixel electrode and the second pixel electrode.
  • the adjacent edges of the first pixel electrode and the second pixel electrode are located on the first common electrode in a vertical direction at a projection line of the common electrode layer.
  • the common electrode layer further includes a second common electrode, and two opposite edges of the second common electrode are located on the same pixel electrode in a vertical direction at a projection line of the pixel electrode layer.
  • the common electrode layer is parallel to the pixel electrode layer, and the common electrode layer is located above or below the pixel electrode layer.
  • a liquid crystal panel including an opposite substrate and an array substrate, wherein the array substrate includes a pixel electrode layer and a common electrode layer, wherein the common electrode layer is provided with a plurality of common electrodes.
  • a plurality of pixel electrodes are disposed on the pixel electrode layer, wherein projections of the common electrodes on the pixel electrode layer in a vertical direction overlap or partially overlap with the corresponding pixel electrodes, respectively.
  • a further aspect of the present invention provides a display device including an array substrate, the array substrate includes a pixel electrode layer and a common electrode layer, wherein the common electrode layer is provided with a plurality of common electrodes, and the pixel electrode layer a plurality of pixel electrodes are disposed thereon, wherein each of the common electrodes is sag Projections on the pixel electrode layer in a straight direction overlap or partially overlap the corresponding pixel electrodes, respectively.
  • the display device described above wherein the pixel electrode layer includes adjacent first pixel electrodes and second pixel electrodes, and the common electrode layer includes a first common electrode located above the data lines, wherein the first A projection line of the two opposite edges of a common electrode in the vertical direction on the pixel electrode layer is located on the first pixel electrode and the second pixel electrode, respectively.
  • the common electrode layer further includes a second common electrode, and two opposite edges of the second common electrode are located at the same pixel electrode in a vertical direction at a projection line of the pixel electrode layer on.
  • the common electrode layer is parallel to the pixel electrode layer, and the common electrode layer is located above the pixel electrode layer.
  • Figure 1 is a cross-sectional view showing the structure of a conventional ADS type display
  • FIG. 2 is a schematic view showing a structural relationship between a pixel electrode and a common electrode in the structure of a conventional ADS type display
  • Figure 3 is a plan view of an array substrate of an embodiment of the present invention.
  • FIG. 4 is a schematic diagram showing a structural relationship between a pixel electrode layer and a common electrode layer in an array substrate according to an embodiment of the present invention
  • Figure 5 is an enlarged view of a portion of the broken line in Figure 4.
  • Embodiment 1 of the present invention provides an array substrate.
  • 3 shows a plan view of the array substrate 100.
  • the array substrate 100 includes a plurality of gate lines 13 and a plurality of data lines 14, and the gate lines 13 and the data lines 14 cross each other to define a plurality of sub-pixel units arranged in an array.
  • Each sub-pixel unit is used, for example, to display a pixel point such as a certain color (e.g., red, green, or blue). The following description will be made for two sub-pixel units adjacent to each other in one or a row.
  • the array substrate 100 includes a pixel electrode layer 10 and a common electrode layer 20.
  • a plurality of common electrodes 21, 22 are disposed on the common electrode layer, and a plurality of pixel electrodes 11, 12 are disposed on the pixel electrode layer.
  • Each of the sub-pixel units includes a pixel electrode and a thin film transistor T as a switching element.
  • the gate of the thin film transistor ⁇ is electrically connected to a gate line
  • the source is electrically connected to one data line
  • the drain is electrically connected to the pixel electrode in the corresponding sub-pixel unit.
  • Projections of the respective common electrodes on the pixel electrode layer in a vertical direction overlap or partially overlap with the corresponding pixel electrodes, respectively. That is, a projection line of the edge of the common electrode of the common electrode layer on the pixel electrode layer in the vertical direction is located on one of the pixel electrodes of the pixel electrode layer.
  • the pixel electrode is, for example, a plate electrode
  • the common electrode includes a slit portion formed with a plurality of slits, for example, parallel to each other, the slit portion being, for example, a portion for the sub-pixel for display .
  • FIG. 4 is a schematic view showing a structural relationship between a pixel electrode layer and a common electrode layer in an array substrate according to Embodiment 1 of the present invention, showing a cross-sectional view taken along line ⁇ - ⁇ in FIG. 3; and
  • FIG. 5 is a portion of a broken line frame in FIG. Magnified view.
  • the array substrate of Embodiment 1 of the present invention can be used for a liquid crystal panel including an array substrate, a counter substrate, and a liquid crystal layer sandwiched between the array substrate and the opposite substrate, the array substrate including the pixel electrode layer and the common electrode layer
  • the pixel electrode layer and the common electrode layer are respectively located on different layers, and a super-dimensional electric field can be formed between each other to drive the liquid crystal layer.
  • the structure of the liquid crystal panel of the embodiment of the present invention is generally similar to that of the conventional ADS type liquid crystal panel shown in FIG. 1, and will not be described herein.
  • the common electrode layer 20 As shown in FIG. 4 and FIG. 5, in the array substrate of Embodiment 1 of the present invention, the common electrode layer 20 The pixel electrode layer 10 is parallel, and the common electrode layer 20 is located above the pixel electrode layer 10. Compared with the conventional structure shown in FIG. 2, the array substrate of Embodiment 1 of the present invention performs the relative structure between the pixel electrodes 11, 12 on the pixel electrode layer 10 and the common electrodes 21, 22 on the common electrode layer 20.
  • the vertical projection of each common electrode on the pixel electrode layer 10 is overlapped or partially overlapped with the corresponding pixel electrode 11, 12 respectively, that is, the projection line of the edge of the common electrode 21, 22 of the common electrode layer at the pixel electrode layer Located on a certain pixel electrode 11, 12 of the pixel electrode layer.
  • the common electrode layer 20 includes a first common electrode 21.
  • a first edge of the first common electrode 21 is located on a pixel electrode in a direction perpendicular to the direction of the array substrate (vertical direction) on the pixel electrode layer 10, and a second edge of the first common electrode 21 is in a vertical direction
  • the projection line on the pixel electrode layer 10 is located on the other pixel electrode. As shown in FIG. 5, the second edge of the first common electrode 21 and the first edge of the first common electrode 21 are opposite edges.
  • a gate line (not shown) and a data line 14 are disposed on the array substrate, and the pixel electrode layer 10 includes a first pixel electrode 11 and a second pixel electrode 12, which are respectively located on the data line 14.
  • the opposite sides, that is, respectively, are located in two sub-pixel units adjacent to each other in one row (as shown in FIG. 3).
  • the first common electrode 21 is parallel to and faces the data line 14.
  • the first common electrode 21 is located directly above the data line 14, wherein the first edge of the first common electrode 21 is projected in the vertical direction onto the projection line I on the pixel electrode layer 10, and is located at the first pixel electrode 11
  • the projection line II of the second edge of the first common electrode 21 on the pixel electrode layer 10 is located on the second pixel electrode 12.
  • the first edge of the first pixel electrode 11 is located on the first common electrode 21 along the projection line III of the common electrode layer 20 in the vertical direction; the first edge of the second pixel electrode 12 is in the vertical direction in the common
  • the projection line IV of the electrode layer 20 is also located on the first common electrode 21.
  • the first edge of the first pixel electrode 11 is adjacent to the edge of the data line 14, and the first edge of the second pixel electrode 12 is also the edge of the adjacent data line 14, that is, the first pixel electrode 11
  • the first edge of one edge and the second pixel electrode 12 are respectively two adjacent edges.
  • the common electrode layer 20 further includes a common electrode located outside the first common electrode 21, that is, the second common electrode 22 as shown in FIGS. 4 and 5.
  • the second common electrode 22 is a common electrode portion in which a slit electrode is formed in a pixel unit region.
  • the first common electrode 21 is a portion for connecting the second common electrode 22 of the laterally adjacent two pixel units, which appears above and overlaps the data line 14.
  • a projection line V of the first edge of the second common electrode 22 on the pixel electrode layer 10 in the vertical direction is located on a pixel electrode 11, and a second edge of the second common electrode 22 is on the pixel electrode layer 10.
  • a projection line (not shown) is also located on a pixel electrode such that a vertical projection of the second common electrode 22 on the pixel electrode layer 10 overlaps with one of the pixel electrodes.
  • the second common electrode 22 is a common electrode on the left side of the first common electrode 21, one of the pixel electrodes is the first pixel electrode 11 in the pixel electrode layer 10.
  • the three common electrodes are disposed on the common electrode layer, and two pixel electrodes are disposed on the pixel electrode layer as an example, and the structure between the pixel electrode layer and the common electrode layer in the array substrate of Embodiment 1 of the present invention is as follows. It was explained. Referring to FIG. 4 and FIG. 5, the array substrate includes a plurality of common electrodes, and the projections of the two opposite edges of the common electrodes in the vertical direction on the pixel electrode layer are located on the corresponding pixel electrodes, and are viewed in a vertical direction. Forming overlapping structures. Similarly, the array substrate includes a plurality of pixel electrodes, and the projections of the two opposite edges of the respective pixel electrodes on the common electrode layer are respectively located on the corresponding common electrodes, and the overlapping structures are formed in the vertical direction. .
  • the array substrate of Embodiment 1 of the present invention can implement the method of increasing the width of the pixel electrode, the method of increasing the width of the common electrode, or the method of increasing the width of the pixel electrode and the width of the common electrode simultaneously.
  • the array substrate shown in Fig. 4 and Fig. 5 is described by taking the common electrode layer above the pixel electrode layer as an example, and the structure of the first embodiment of the present invention is described.
  • the pixel electrode layer is located above the common electrode layer, similar structural arrangement can be performed as well, and will not be described in detail herein.
  • Embodiment 2 of the present invention provides a liquid crystal panel including: an array substrate, a counter substrate (for example, a color filter substrate), and a liquid crystal layer filled between the array substrate and the opposite substrate, a pixel electrode layer and a common electrode layer are disposed on the array substrate, wherein the pixel electrode layer Forming an electric field between the common electrode layer and deflecting liquid crystal molecules of the liquid crystal layer, the common electrode layer is provided with a plurality of common electrodes, and the pixel electrode layer is provided with a plurality of pixel electrodes, wherein each of the plurality of pixel electrodes The projection of the common electrode on the pixel electrode layer overlaps or partially overlaps with the corresponding pixel electrode. That is, the edge of the common electrode of the common electrode layer on the projection line of the pixel electrode layer is located on one of the pixel electrodes of the pixel electrode layer.
  • the liquid crystal panel of Example 2 was the same as the array substrate of Example 1.
  • the color filter substrate includes, for example, a glass substrate or a plastic substrate as a base substrate and a color film layer.
  • the color film layer may have, for example, red, green, and blue sub-pixel units corresponding to corresponding sub-pixel units of the array substrate.
  • a color film layer is formed on the array substrate, and correspondingly includes, for example, red, green, and blue sub-pixel units.
  • Embodiment 3 of the present invention also provides a display device, including a liquid crystal display device and other types of display devices.
  • the liquid crystal display device may be a liquid crystal television, a mobile phone, a liquid crystal display or the like, and includes a color filter substrate, and the array substrate in the above-described Embodiment 1.
  • the liquid crystal display device includes a liquid crystal panel, wherein the liquid crystal panel includes: an array substrate, an opposite substrate (eg, a color filter substrate), and a liquid crystal layer filled between the array substrate and the opposite substrate, on the array substrate a pixel electrode layer and a common electrode layer are disposed, wherein an electric field is formed between the pixel electrode layer and the common electrode layer to deflect liquid crystal molecules of the liquid crystal layer; and a plurality of common electrodes are disposed on the common electrode layer.
  • a plurality of pixel electrodes are disposed on the pixel electrode layer, wherein projections of the common electrodes on the pixel electrode layer overlap or partially overlap with corresponding pixel electrodes, respectively.
  • the liquid crystal display device of Example 2 used the liquid crystal panel described in Example 2.
  • the liquid crystal display device may further include components such as a backlight, a driving circuit, and the like.

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Abstract

一种阵列基板（100）、液晶面板及显示设备，所述阵列基板（100）上设置有像素电极层（10）和公共电极层（20），所述公共电极层（20）上设置有多个公共电极（21，22），所述像素电极层（10）上设置有多个像素电极（11，12），其中各个所述公共电极（21，22）沿垂直方向在所述像素电极层（10）上的投影，分别与相应的所述像素电极（11，12）重叠或部分重叠。所述液晶面板中，由于在沿着光入射方向，像素电极（11，12）与相邻的公共电极（21）之间具有重叠，因此，不会产生像素电极（11，12）周边透光不均匀的现象，能够达到更加均匀的透光效果。

Description

阵列基板、 液晶面板及显示设备 技术领域
本发明的实施例涉及一种阵列基板、 液晶面板及显示设备。 背景技术
在薄膜场效应晶体管液晶显示器（ TFT-LCD )中，在像素电极（例如 ITO (氧化铟锡） 电极）和公共电极（例如 ITO电极）之间施加电压形成电场， 通过控制该电压大小从而控制液晶分子旋转的程度从而实现光阀。
根据正负电极排列方式不同， TFT-LCD按结构可以包括面内切换 （ In Plane Switching, IPS)型和高级超维场转换技术（Advanced Super Dimension Switch, ADSDS或 ADS )型两种。 在釆用 IPS型显示方式的液晶显示器中， 各电极之间的间距很小， 在施加电压时电极间产生面电场， 液晶只能在该部 位产生旋转以实现光阀， 从而令光穿透受到限制。 在釆用 ADS 型显示方式 的液晶显示器中， 通过同一平面内狭缝电极边缘所产生的电场以及狭缝电极 层与板状电极层间产生的电场形成多维电场， 使液晶盒内狭缝电极间、 电极 正上方所有取向液晶分子都能够产生旋转， 从而提高了液晶工作效率并增大 了透光效率。 高级超维场开关技术可以提高 TFT-LCD产品的画面品质， 具 有高分辨率、 高透过率、 低功耗、 宽视角、 高开口率、 低色差、 无挤压水波 故 ( ush Mura )等优点。
如图 1为传统的 ADS型显示器的结构的截面图。 该 ADS型显示器的结 构包括： 彩膜基板 C和阵列基板 A, 以及填充在所述彩膜基板 C和阵列基板 A之间的液晶层 5。 彩膜基板 C包括玻璃基板 2和彩膜层 6, 阵列基板 A包 括玻璃基板 71、 像素电极层 3、 公共电极层 4和绝缘层 72。 此外， 在所述彩 膜基板 C和阵列基板 A的外侧均贴附有偏振片 1。 像素电极层（板状电极）
3和公共电极层 (狭缝电极 ) 4的正负电极通过绝缘层 72分隔而重叠排列。 上述电极层在工作过程中于通电之后产生多维电场， 使电极间和电极上的液 晶分子均在面板的面内旋转。
图 2为用于说明在上述传统的 ADS型显示器的结构中， 像素电极层 3 中的像素电极（例如 ITO电极） 31和公共电极层 4的公共电极 (例如 ITO 电极） 41 的结构示意图。 由于在设计时考虑到开口率、 电容耦合效应等因 素， 像素电极 31的边缘与公共电极 41边缘之间有一定的距离， 这会产生像 素边缘透光不均勾现象， 造成液晶显示器的透光效果整体上不均匀。 发明内容
本发明的实施例提供了一种阵列基板、 液晶面板及显示设备， 用于解决 现有液晶面板透光效果不均匀的问题。
本发明一方面提供一种阵列基板， 所述阵列基板包括像素电极层和公共 电极层， 其中， 所述公共电极层上设置有多个公共电极， 所述像素电极层上 设置有多个像素电极， 其中， 各个所述公共电极沿垂直方向在所述像素电极 层上的投影， 分别与相应的所述像素电极重叠或部分重叠。
例如， 所述像素电极层包括相邻的第一像素电极和第二像素电极， 所述 公共电极层包括位于数据线上方的第一公共电极， 其中， 所述第一公共电极 的两个相对边缘沿垂直方向在所述像素电极层的投影线分别位于所述第一像 素电极上和所述第二像素电极上。
例如， 所述第一像素电极和所述第二像素电极的相邻边缘沿垂直方向在 所述公共电极层的投影线均位于所述第一公共电极上。
例如， 所述公共电极层还包括第二公共电极， 所述第二公共电极的两个 相对边缘沿垂直方向在所述像素电极层的投影线位于同一像素电极上。
例如， 所述公共电极层与所述像素电极层平行， 且所述公共电极层位于 所述像素电极层的上方或下方。
本发明的另一方面还提供一种液晶面板， 包括对置基板和阵列基板， 所 述阵列基板包括像素电极层和公共电极层， 其中， 所述公共电极层上设置有 多个公共电极， 所述像素电极层上设置有多个像素电极， 其中， 各个所述公 共电极沿垂直方向在所述像素电极层上的投影， 分别与相应的所述像素电极 重叠或部分重叠。
本发明的再一方面还提供一种显示设备， 包括阵列基板， 所述阵列基板 包括像素电极层和公共电极层； 其中， 所述公共电极层上设置有多个公共电 极， 所述像素电极层上设置有多个像素电极， 其中， 各个所述公共电极沿垂 直方向在所述像素电极层上的投影， 分别与相应的所述像素电极重叠或部分 重叠。
例如， 上述所述的显示设备， 其中， 所述像素电极层包括相邻的第一像 素电极和第二像素电极， 所述公共电极层包括位于数据线上方的第一公共电 极， 其中所述第一公共电极的两个相对边缘沿垂直方向在所述像素电极层的 投影线分别位于所述第一像素电极上和所述第二像素电极上。
例如， 上述所述的显示设备， 其中， 所述公共电极层还包括第二公共电 极， 所述第二公共电极的两个相对边缘沿垂直方向在所述像素电极层的投影 线位于同一像素电极上。
例如， 上述所述的显示设备， 其中， 所述公共电极层与所述像素电极层 平行， 且所述公共电极层位于所述像素电极层的上方。
在本发明具体实施例的液晶面板中， 由于在沿着光入射方向 （垂直于像 素电极层和公共电极层的方向）,像素电极与相邻的公共电极之间沿垂直方向 彼此重叠， 因此不会产生像素电极周边透光不均匀的现象， 能够达到更加均 勾的透光效果。 附图说明
为了更清楚地说明本发明实施例的技术方案， 下面将对实施例的附图作 简单地介绍，显而易见地，下面描述中的附图仅仅涉及本发明的一些实施例， 而非对本发明的限制。
图 1为传统的 ADS型显示器的结构的截面图；
图 2为传统的 ADS型显示器的结构中， 像素电极和公共电极之间结构 关系的示意图；
图 3本发明的实施例的阵列基板的俯视图；
图 4为本发明的实施例的阵列基板中的像素电极层和公共电极层之间结 构关系的示意图；
图 5为图 4中虚线方框部分的放大图。 具体实施方式
为使本发明实施例的目的、 技术方案和优点更加清楚， 下面将结合本发 明实施例的附图，对本发明实施例的技术方案进行清楚、 完整地描述。显然， 所描述的实施例是本发明的一部分实施例， 而不是全部的实施例。 基于所描 述的本发明的实施例， 本领域普通技术人员在无需创造性劳动的前提下所获 得的所有其他实施例， 都属于本发明保护的范围。
实施例 1
本发明实施例 1提供了一种阵列基板。 图 3示出了该阵列基板 100的平 面图， 该阵列基板 100包括多条栅线 13和多条数据线 14, 这些栅线 13和数 据线 14彼此交叉限定了多个以阵列设置的子像素单元。每个子像素单元例如 用于显示例如某种颜色（例如红色、 绿色或蓝色） 的像素点。 下面的描述将 针对一个或一行中彼此相邻的两个子像素单元进行。
该阵列基板 100包括像素电极层 10和公共电极层 20。 所述公共电极层 上设置有多个公共电极 21、 22, 所述像素电极层上设置有多个像素电极 11、 12。 每个子像素单元包括像素电极和作为开关元件的薄膜晶体管 T。 例如， 薄膜晶体管 Τ的栅极与一条栅线电连接， 源极与一条数据线电连接， 而漏极 与相应子像素单元中的像素电极电连接。 各个所述公共电极沿垂直方向在所 述像素电极层上的投影，分别与相应的所述像素电极重叠或部分重叠。也即， 所述公共电极层的公共电极的边缘沿垂直方向在所述像素电极层上的投影 线， 位于所述像素电极层的其中一像素电极上。
在每个子像素单元中， 像素电极例如为板状电极， 而公共电极包括形成 有多个例如彼此平行的狭缝的狭缝部分， 该狭缝部分例如是用于该子像素用 于显示的部分。
图 4为本发明实施例 1的阵列基板中像素电极层和公共电极层之间的结 构关系的示意图， 示出了沿图 3中 Α-Α线的剖视图； 图 5为图 4中虚线框部 分的放大图。
本发明实施例 1的阵列基板可以用于液晶面板， 该液晶面板包括阵列基 板、 对置基板和夹置在阵列基板和对置基板之间的液晶层， 阵列基板包括像 素电极层和公共电极层， 像素电极层和公共电极层分别位于不同的层上， 彼 此之间可以形成超维电场以驱动液晶层。 本发明实施例的液晶面板的结构总 体上与图 1所示的传统 ADS型液晶面板相似， 这里不再赘述。
如图 4和图 5所示， 在本发明实施例 1的阵列基板中， 公共电极层 20 与像素电极层 10平行， 且公共电极层 20位于像素电极层 10的上方。 与图 2 所示的传统结构相比较，本发明实施例 1的阵列基板对像素电极层 10上的像 素电极 11、 12和公共电极层 20上的公共电极 21、 22之间的相对结构进行了 改进，使各个公共电极在像素电极层 10上的垂直投影，分别与相应的像素电 极 11、 12重叠或部分重叠， 也即公共电极层的公共电极 21、 22的边缘在像 素电极层的投影线， 位于像素电极层的某一像素电极 11、 12上。
本发明实施例 1的阵列基板中，公共电极层 20上包括第一公共电极 21。 该第一公共电极 21的第一边缘沿垂直于该阵列基板的方向（垂直方向）在像 素电极层 10上的投影线， 位于一像素电极上， 第一公共电极 21的第二边缘 沿垂直方向在像素电极层 10上的投影线，位于另一像素电极上。如图 5所示， 第一公共电极 21的第二边缘与第一公共电极 21的第一边缘为相对的两边缘。
更具体地如图 4所示， 阵列基板上设置有栅线（未示出）和数据线 14, 像素电极层 10上包括第一像素电极 11和第二像素电极 12,分别位于数据线 14的相对两侧， 即分别位于一行中彼此相邻的两个子像素单元中（如图 3所 示）。 第一公共电极 21与数据线 14平行且相面对。 本实施例中， 第一公共电 极 21位于数据线 14的正上方，其中第一公共电极 21的第一边缘沿垂直方向 所投影至像素电极层 10上的投影线 I, 位于第一像素电极 11上； 第一公共 电极 21 的第二边缘在像素电极层 10上的投影线 II, 位于第二像素电极 12 上。
同时，如图 4,第一像素电极 11的第一边缘沿垂直方向在公共电极层 20 的投影线 III, 位于第一公共电极 21上； 第二像素电极 12的第一边缘沿垂直 方向在公共电极层 20的投影线 IV, 也位于第一公共电极 21上。 如图所示， 第一像素电极 11的第一边缘为邻近数据线 14的边缘，第二像素电极 12的第 一边缘也为邻近数据线的 14的边缘， 也即第一像素电极 11的第一边缘和第 二像素电极 12的第一边缘分别为两相邻的边缘。
本领域技术人员应该理解， 根据显示原理， 在通电之后第一像素电极 11 和第二像素电极 12分别与第一公共电极 21之间应该具有电势差。
此外， 如图 4和图 5所示， 公共电极层 20上还包括位于第一公共电极 21外侧的公共电极， 即如图 4和图 5所示的第二公共电极 22。 这里， 如图 3 所示， 第二公共电极 22是位于像素单元区域中形成狭缝电极的公共电极部 分；而第一公共电极 21则是用于连接横向相邻两个像素单元中的第二公共电 极 22的部分， 出现在数据线 14的上方并与之重叠。
如图 4, 第二公共电极 22的第一边缘沿垂直方向在像素电极层 10上的 投影线 V, 位于一像素电极 11上， 该第二公共电极 22的第二边缘在像素电 极层 10上的投影线（未示出）， 也位于一像素电极上， 使得第二公共电极 22 在像素电极层 10上的垂直投影， 与其中一像素电极重叠。如图 4所示， 本实 施例中， 当第二公共电极 22为第一公共电极 21左侧的一公共电极时， 该其 中一像素电极为像素电极层 10中的第一像素电极 11。
以上参考图 3-5, 以公共电极层上设置三个公共电极， 像素电极层上设 置二个像素电极为例， 对本发明实施例 1的阵列基板中像素电极层与公共电 极层之间的结构进行了说明。 参阅图 4和图 5所示， 所述阵列基板中包括多 个公共电极，各个公共电极的两个相对边缘沿垂直方向在像素电极层的投影， 均位于相应的像素电极上， 沿垂直方向看形成相互重叠的结构。 同样， 阵列 基板中包括多个像素电极， 各个所述像素电极的两个相对边缘垂直方向在所 述公共电极层上的投影， 分别位于相应的公共电极上， 沿垂直方向看形成相 互重叠的结构。
通过上述设置方式， 由于沿着光入射方向（垂直于像素电极层 10和公共 电极层 20的方向）， 像素电极与相邻的公共电极之间具有重叠， 公共电极与 相邻的像素电极之间也具有重叠， 因此可以避免产生图 2所示的像素电极周 边透光不均勾的现象， 能够达到更加均勾的透光效果。
相对于传统的阵列基板， 本发明实施例 1的阵列基板可以釆用增大像素 电极宽度的方法、 增大公共电极宽度的方法或者同时增大像素电极宽度和公 共电极宽度的方法， 来实现本发明实施例的技术方案。
图 4与图 5所示阵列基板， 以公共电极层位于像素电极层上方为例， 对 本发明实施例 1的结构进行了描述。当像素电极层位于公共电极层的上方时， 同样能够进行相似的结构设置， 在此不再详细描述。
实施例 2
本发明的实施例 2提供了一种液晶面板，所述液晶面板包括： 阵列基板、 对置基板 (例如彩膜基板 )、填充在所述阵列基板和所述对置基板之间的液晶 层， 所述阵列基板上设置有像素电极层和公共电极层， 其中所述像素电极层 和所述公共电极层之间形成电场， 使所述液晶层的液晶分子偏转， 所述公共 电极层上设置有多个公共电极， 所述像素电极层上设置有多个像素电极， 其 中各个所述公共电极在所述像素电极层上的投影， 分别与相应的所述像素电 极重叠或部分重叠。 也即， 所述公共电极层的公共电极的边缘在所述像素电 极层的投影线， 位于所述像素电极层的其中一像素电极上。
实施例 2的液晶面板釆用了实施例 1的阵列基板。 当对置基板为彩膜基 板时，该彩膜基板例如包括作为基底基板的玻璃基板或塑料基板以及彩膜层。 彩膜层可以具有例如红色、 绿色和蓝色子像素单元， 与阵列基板的相应子像 素单元对应。 当对置基板非彩膜基板时， 例如在阵列基板之上还形成有彩膜 层， 并相应地包括例如红色、 绿色和蓝色子像素单元。
实施例 3
本发明实施例 3还提供一种显示设备， 包括液晶显示设备以及其他类型 的显示设备。 液晶显示设备可以是液晶电视、 手机、 液晶显示器等， 其包括 彩膜基板、 以及上述实施例 1中的阵列基板。 上述其他类型显示设备， 比如 电子纸， 其不包括彩膜基板， 但是包括上述实施例中的阵列基板。
这里以液晶显示设备为例进行。 液晶显示设备包括液晶面板， 其中所述 液晶面板包括： 阵列基板、对置基板（例如彩膜基板）、 填充在所述阵列基板 和所述对置基板之间的液晶层， 所述阵列基板上设置有像素电极层和公共电 极层， 其中所述像素电极层和所述公共电极层之间形成电场， 使所述液晶层 的液晶分子偏转； 所述公共电极层上设置有多个公共电极， 所述像素电极层 上设置有多个像素电极,其中各个所述公共电极在所述像素电极层上的投影， 分别与相应的所述像素电极重叠或部分重叠。
实施例 3的液晶显示设备釆用了实施例 2所述的液晶面板。 除此之外， 该液晶显示设备还可以包括背光源、 驱动电路等部件。
以上所述仅是本发明的优选实施方式， 应当指出， 对于本技术领域的普 通技术人员来说， 在不脱离本发明原理的前提下， 还可以做出若干改进和润 饰， 这些改进和润饰也应视为本发明的保护范围。

Claims

权利要求书
1. 一种阵列基板， 包括像素电极层和公共电极层，
其中， 所述公共电极层上设置有多个公共电极， 所述像素电极层上设置 有多个像素电极，
其中， 各个所述公共电极沿垂直方向在所述像素电极层上的投影， 分别 与相应的所述像素电极重叠或部分重叠。
2. 如权利要求 1所述的阵列基板， 其中， 所述像素电极层包括相邻的第 一像素电极和第二像素电极， 所述公共电极层包括位于数据线上方的第一公 共电极，
其中， 所述第一公共电极的两个相对边缘沿垂直方向在所述像素电极层 的投影线分别位于所述第一像素电极上和所述第二像素电极上。
3. 如权利要求 2所述的阵列基板， 其中， 所述第一像素电极和所述第二 像素电极的相邻边缘沿垂直方向在所述公共电极层的投影线均位于所述第一 公共电极上。
4. 如权利要求 2所述的阵列基板， 其中， 所述公共电极层还包括第二公 共电极， 所述第二公共电极的两个相对边缘沿垂直方向在所述像素电极层的 投影线位于同一像素电极上。
5. 如权利要求 1所述的阵列基板， 其中， 所述公共电极层与所述像素电 极层平行， 且所述公共电极层位于所述像素电极层的上方。
6. 如权利要求 1所述的阵列基板， 其中， 所述公共电极层与所述像素电 极层平行， 且所述公共电极层位于所述像素电极层的下方。
7. 一种液晶面板， 包括对置基板和阵列基板， 其中， 所述阵列基板包括 像素电极层和公共电极层，
其中， 所述公共电极层上设置有多个公共电极， 所述像素电极层上设置 有多个像素电极，
其中， 各个所述公共电极沿垂直方向在所述像素电极层上的投影， 分别 与相应的所述像素电极重叠或部分重叠。
8. 如权利要求 7所述的液晶面板， 其中， 所述像素电极层包括相邻的第 一像素电极和第二像素电极， 所述公共电极层包括位于数据线上方的第一公 共电极，
其中， 所述第一公共电极的两个相对边缘沿垂直方向在所述像素电极层 的投影线分别位于所述第一像素电极上和所述第二像素电极上。
9. 如权利要求 8所述的液晶面板， 其中， 所述第一像素电极和所述第二 像素电极的相邻边缘沿垂直方向在所述公共电极层的投影线均位于所述第一 公共电极上。
10. 如权利要求 8所述的液晶面板， 其中， 所述公共电极层还包括第二 公共电极， 所述第二公共电极的两个相对边缘沿垂直方向在所述像素电极层 的投影线位于同一像素电极上。
11. 如权利要求 7所述的液晶面板， 其中， 所述公共电极层与所述像素 电极层平行， 且所述公共电极层位于所述像素电极层的上方。
12. 如权利要求 7所述的液晶面板， 其中， 所述公共电极层与所述像素 电极层平行， 且所述公共电极层位于所述像素电极层的下方。
13. 一种显示设备， 包括阵列基板， 所述阵列基板包括像素电极层和公 共电极层；
其中， 所述公共电极层上设置有多个公共电极， 所述像素电极层上设置 有多个像素电极，
其中， 各个所述公共电极沿垂直方向在所述像素电极层上的投影， 分别 与相应的所述像素电极重叠或部分重叠。
14. 如权利要求 13所述的显示设备， 其中， 所述像素电极层包括相邻的 第一像素电极和第二像素电极， 所述公共电极层包括位于数据线上方的第一 公共电极，
其中， 所述第一公共电极的两个相对边缘沿垂直方向在所述像素电极层 的投影线分别位于所述第一像素电极上和所述第二像素电极上。
15. 如权利要求 14所述的显示设备， 其中， 所述第一像素电极和所述第 二像素电极的相邻边缘沿垂直方向在所述公共电极层的投影线均位于所述第 一公共电极上。
16. 如权利要求 14所述的显示设备， 其中， 所述公共电极层还包括第二 公共电极， 所述第二公共电极的两个相对边缘沿垂直方向在所述像素电极层 的投影线位于同一像素电极上。
17. 如权利要求 13所述的显示设备， 其中， 所述公共电极层与所述像素 电极层平行， 且所述公共电极层位于所述像素电极层的上方。
18. 如权利要求 13所述的显示设备， 其中， 所述公共电极层与所述像素 电极层平行， 且所述公共电极层位于所述像素电极层的下方。
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