WO2013043950A1 - Suiveur de source différentiel à gain de 6db avec applications à des filtres en bande de base wigig - Google Patents

Suiveur de source différentiel à gain de 6db avec applications à des filtres en bande de base wigig Download PDF

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Publication number
WO2013043950A1
WO2013043950A1 PCT/US2012/056458 US2012056458W WO2013043950A1 WO 2013043950 A1 WO2013043950 A1 WO 2013043950A1 US 2012056458 W US2012056458 W US 2012056458W WO 2013043950 A1 WO2013043950 A1 WO 2013043950A1
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Prior art keywords
source follower
output signal
coupled
impedance
voltage
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Application number
PCT/US2012/056458
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English (en)
Inventor
Zaw Soe
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Tensorcom, Inc.
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Publication date
Priority claimed from US13/243,908 external-priority patent/US8680899B2/en
Priority claimed from US13/243,880 external-priority patent/US8487695B2/en
Priority claimed from US13/243,986 external-priority patent/US8406710B1/en
Application filed by Tensorcom, Inc. filed Critical Tensorcom, Inc.
Publication of WO2013043950A1 publication Critical patent/WO2013043950A1/fr

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45475—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using IC blocks as the active amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/50—Amplifiers in which input is applied to, or output is derived from, an impedance common to input and output circuits of the amplifying element, e.g. cathode follower
    • H03F3/505—Amplifiers in which input is applied to, or output is derived from, an impedance common to input and output circuits of the amplifying element, e.g. cathode follower with field-effect devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/04—Frequency selective two-port networks
    • H03H11/12—Frequency selective two-port networks using amplifiers with feedback
    • H03H11/126—Frequency selective two-port networks using amplifiers with feedback using a single operational amplifier
    • H03H11/1286—Sallen-Key biquad
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45138—Two or more differential amplifiers in IC-block form are combined, e.g. measuring amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45394—Indexing scheme relating to differential amplifiers the AAC of the dif amp comprising FETs whose sources are not coupled, i.e. the AAC being a pseudo-differential amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/04—Frequency selective two-port networks
    • H03H11/12—Frequency selective two-port networks using amplifiers with feedback
    • H03H11/1213—Frequency selective two-port networks using amplifiers with feedback using transistor amplifiers

Definitions

  • the Federal Communications Commission has allotted a spectrum of bandwidth in the 60GHz frequency range (57 to 64GHz).
  • the Wireless Gigabit Alliance ⁇ WiGig is targeting the standardization of this frequency band that will support data, transmission rates up to 7 Gbps, integrated circuits, formed in semiconductor die, offer high frequency operation in this millimeter wavelength range of frequencies.
  • Some of these integrated circuits utilize Complementary Metal Oxide Semiconductor (CMOS) or Silicon-Germanium (SiGe) technology to form the dice in these designs.
  • CMOS Complementary Metal Oxide Semiconductor
  • SiGe Silicon-Germanium
  • At 60GHz achieving the desired parameters of gain (G), bandwidth (BW) and noise figure (NF) present difficult challenges. These parameters can be traded against the other in the design of these high frequency circuits.
  • a source follower also known as a common drain amplifier, is a circuit configuration of an active device that is used in circuit designs to provide a voltage buffer or to transform impedances.
  • a CMOS source follower circuit provides high input impedance, moderate current gain, low output impedance and a voltage gain approaching one.
  • Such a device can be fabricated using the CMOS 40nm technology designed to operate at. a VDD of 1.2 V,
  • a Sallen-Key topology is a second-order active filter that presents a finite input impedance and a small output impedance in its external filter characteristics.
  • the filters can be designed as a low-pass, band-pass or high-pass filter.
  • Such active filters avoid the use of inductors which can consume large areas in integrated circuits.
  • a higher filter gain is achieved by cascading two or more Sail en -Key filter st ages.
  • A. source follower amplifier can be formed from two series stacked dev ces coupled between the VDD and GRD where one device translates the input signal (active device) while the second device is the load (load device).
  • a CMOS source follower is formed by placing two series stacked n- channel (N OS) devices coupled between VDD and GRD with the lower device presenting a controlled current load to the upper device that is driven by the input. If the supply voltage (VDD- GRD) is 1.2V, the headroom, or available output signal swing, is an. important concern. With only two devices between the power supplies, the source follower generates an output signal with a maximum voltage swing of 400m V to 500m V. This maximum voltage swing is called the headroom.
  • One of the embodiments of the disclosure modifies the load device in a source follower so that the load device also all ws the introduction an input signal that enhances the gain of the source follower.
  • the load device provides a DC (Direct Current) bias to operate the source follower and introduces an AC ⁇ Alternating Current) gain when the load device is driven by a signal with the proper phase (180°) compared to the signal being applied to the active device.
  • the AC voltage gain of the load device is added constructively to the AC voltage gain of the conventional source follower to provide an improvement in the gai n of the source follower by 6dB.
  • the AC voltage gain of a source follower using this inventi ve concept can be increased from OdB to 6dB.
  • Another one of the embodiments of the disclosure is to incorporate the source follower with A voltage in the load device into a differential amplifier configuration, A differential
  • the configuration amplifies an AC input signal and a complement AC input signal and generates an AC output signal and a complement AC output signal .
  • the complement AC input signal is phase shifted 180° from the AC input signal and the complement AC output signal is phase shifted 180° from the AC output signal.
  • the complement AC output signal i also referred as an inverse AC output signal.
  • the gain of the source follower differential amplifier can be as large as a 6dB gain.
  • a different one of the embodiments of the disclosure is to incorporate the source foll was into the design of a Sa!len-Key filter.
  • the operational amplifier 1-15 in the S alien-Key filter in FIG, lb limits the high frequency behavior of the filter.
  • the inventive source follower can significantly extend the range of the high frequency behavior of this filter.
  • This source follower has input/output characteristics simila to that of the operational amplifier.
  • the operational amplifier presents infinite input impedance, good current dri e and a small output impedance at its input and output terminals.
  • the source follower has attributes that include having a high input impedance, good current drive and a low output impedance at its input and output terminals.
  • the operational amplifier is replaced with the source follower and is utilized to create a Salien-Key filter that provides an 880MHz bandwidth filter.
  • the source follower itself would require an overall bandwidth of 8.8 GHz to achieve this filter bandwidth.
  • a conventional operational amplifier is typically uses two cascaded stages and requires a negative feedback network to compensation for any potential stability issues. Such additional networks increase capacitance, increase die area, and limits high frequency performance.
  • the source follower uses a single stage using two series coupled devices between VDD and GRD and furthermore does not require a negative
  • the Salien-Key filter with the source follower can have a bandwidth that can filter baseband WiGig signals.
  • the WiGig signal content is within a bandwidth of 0 to SSOMHz,
  • the inventive technique removes the first 2MHz by the use of an RC network but does not cause any performance degradation.
  • the features of the differentia! signal output stage using the first and second source follower stages are advantageously leveraged to form the Salien-Key filter topology.
  • the overall front end gain of the receiver of the LNA, Mixer and Base-Band amplifier of devices fabricated at 40nm CMOS fails to deliver the desired gain to design a receiver that can operate with 60 GHz signals at low power. Additional gain was required in the RF link.
  • the Salien-Key LPF Low Pass Filter
  • uses the inventive source followers to provide 6dB of AC voltage gain per differential signal .
  • two SaHen-Key LPFs are concatenated in series to provide 12dB of additional AC voltage gain.
  • FIG. la depicts an on-chip RF link.
  • FIG. lb illustrates a Sallen- ey filter.
  • FIG. Jc illustrates a low-pass Sallen-Key filter.
  • FIG. 2a shows a two device source follower in accordance with the present invention.
  • FIG. 2b presents the current mirror generating the voltage bias in accordance with the present invention.
  • FIG. 2c depicts a 6dB AC voltage gain in a soivrce follower in accordance with the present invention.
  • FIG. 2d illustrates the 6dB AC voltage gain in a source follower with RC networks in accordance with the present invention.
  • FIG. 2e shows the current source and a dynamic source follower block i accordance with the present invention
  • FIG. 2f illustrates a differential source follower with 6dB of ACireage gain in accordance with the present invention.
  • FIG. 2g shows a differential source follower with the biasing and RC networks in place in accordance with the present invention.
  • FIG. 2 ⁇ presents FIG. 2e with dynamic source follower blocks in accordance with the present invention.
  • FIG. 3a presents the two pole Sallen-Key filter in accordance with the present invention.
  • FIG. 3b presents a cascaded two pole Sallen-Key filter in accordance with the present invention.
  • FIG. 3c depicts an implementation of the differential two pole Sallen-Key filter cascaded in accordance with the present invention.
  • FIG. 4a illustrates the two pole Sallen-Key filter in accordance with the present invention.
  • FIG, 4b illustrates the two pole Sallen-Key filter using a source follower as an operational amplifier in accordance with the present invention.
  • FIG. 4c depicts a low pass Sallen-Key filter as in FIG. 4b replaced with a dynamic source follower block in accordance with the present invention.
  • FIG. 4d illustrates a generalized Sail en-Key filter replaced with a dynamic source follower block in accordance with the present invention.
  • FIG. 5a presents the second cascaded stage of FIG. 3c in accordance with the present invention.
  • FIG. 5b illustrates the second cascaded stage of FIG. 3c replaced with dynamic source follower blocks in accordance with the present invention.
  • FIG. 6a shows a differential cascaded low pass Sallen-Key filter using the dynamic source follower with the biasing, R.C networks and components in accordance with the present invention.
  • FIG. 6b depicts a differential cascaded low pass Salten-Key filter with dynamic source follower blocks in accordance with the present invention.
  • FIG. 7a illustrates a differential cascaded low pass Salien-Key filter using the dynamic source follower as in FIG. 6a but modified with two independent current biasing voltages and the C networks and components in accordance with the present invention.
  • the inventions presented in this specification can be used in any wired or wireless high frequency system design
  • One application of the inventions can be applied to the front end of a receiver circuit 1-1 as illustrated in FIG. la.
  • the Low Noise Amplifier (LNA) 1-2 can receive a weak signal at its input 1-3. This signal may have been be provided by an antenna or a wired line and is amplified by the LNA and applied to the Mixer 1-4.
  • the CMOS design of an LNA at millimeter waves with a gain greater than 30dB is very difficult.
  • the signal is demodulated into a baseband signal.
  • the baseband signal is amplified by the Base Band Amplifier (BBAMP) 1-5 and sent to the Low Pass Filter (LPF) 1-6.
  • BBAMP Base Band Amplifier
  • LPF Low Pass Filter
  • the LPF filters the signal and also provides an additional gain before the signal is sent to the Programmable Gain Amplifier (PGA) 1-7 which generates an output 1-8.
  • PGA Programmable Gain Amplifier
  • the weak signal is amplified, demodulated, amplified, filtered and amplified as an output 1-8 before being applied to an A/D (Analog to Digital) converter (not shown).
  • A/D Analog to Digital
  • the block diagram can be operated using a single signal stream or differential signal stream.
  • FIG. lb illustrates a Sail en-Key filter 1-9 which has a large Input impedance and small output impedance.
  • the input 1-10 to the filter is via Zt 1-11 whose output is coupled to Zj 1-1 and Z-31-14.
  • Z i 1-14 couples to the output 1-16.
  • Z 2 1-12 is coupled to 4 1-13 and the positive input of the operational arapiifier 1-1 .
  • the other end of Z ( 1-13 is grounded.
  • the output 1-1.6 is also coupled to the negative input of the operational amplifier 1-1 S.
  • the operational amplifier offers high gain and allows the construction of a second order filter without the use of inductors.
  • the impedances are replaced with resistors or capacitors in the Salleii-Ke filter 1-17 to form a low pass filter.
  • FIG. 2a depicts two n-channel devices (N- OS) coupled in series forming a path between the power supplies VDD and GRD (ground). This configuration is known as a source follower.
  • the lower device j acts as a load device and is biased by a DC bias voltage V bte$ while the upper device j acts as an active device and is driven by V lal 2-2.
  • the output signal V oat 2-3 is in phase
  • FIG. 2b illustrates how the current source is formed using device isl a d 1%
  • a bias current Ibfcs can be applied to the device 3 that is connected in saturation where the gate is connected to the drain.
  • the stacked devices form a path between the power supplies.
  • the load device (lower device) and the reference transistor form a current mirror.
  • the active device (upper device) has first signal ⁇ ⁇ 2-2 applied to the input.
  • the first signs! V inl causes the generation of an output signal V 03 ⁇ 4t 2-3 that is in phase with the input signal V Jnl and has a AC voltage gain approaching one (OdB).
  • the maximum swing of the output signal V owt equals the headroom. Since the gain is OdB, the input voltage has a voltage swing equal to the headroom.
  • a source follower stage is modified to provide an AC voltage gain that approaches two (6dB) as illustrated in FIG. 2c.
  • the bias voltage V bSas is applied to the load device t as before.
  • an RC network (not illustrated) provides two functions: 1) in one case the RC network presents a low pass filter that filters the bias voltage V bfe , s applied to Nj.; and 2) in a second case presents a high pass filter (using the same RC network) to a couple a second input signal V, H to the load device, simultaneously.
  • the second input signal 2-8, and the filter bias voltage are applied to load device Nj.
  • the first input signal V in 2-6 is applied to the active device j and generates a first output signal component V out ⁇ 2-7
  • inverts the signal V u , 2-8 at its input and generates a second output signal component V 0l ⁇ tb ⁇ 9.
  • the active device N 3 ⁇ 4 generates a first output signal component V outt of ihe output signal that is in phase with the input signal V ia and the load device j generates the second output signal component V OMtb of the output signal that is out of phase with the input signal V,
  • the load device inverts the input signal V >a and generates a second output signal component of the output signal that is in phase with the first output signal component of the output signal, the overall gain of the active and load devices is in phase causing the first and second output signal components of the output signal to be summed constructively.
  • V 0Utt 2-7 and V ou 3 ⁇ 4 2-9 lias an overall maximum amplitude equal to the headroom or in this case the magnitude of V 0llt 2-3.
  • the maximum amplitude of the summation equals the headroom mentioned earlier .
  • the input signals Vg strig 2-6 and V in 2-8 each have half the magnitude of V jirX 2-2. Assuming the magnitude of the AC voltage gain of the active load is almost one while the magnitude of the AC voltage gain of the load device can be designed to be one; thereby allowing this inventive source follower stage to have an AC voltage gain equal to 6dB.
  • the circuit 2-17 in FIG. 2d illustrates the addition of the RC networks and current source with the bias current to FIG. 2c. Note that the two output voltages V outt 2-7 and V outb 2-9 of FIG. 2c are combined into V out i to FIG. 2d» the bias current I blas creates a DC bias voltage across the device 3 and is applied to the device i in the first source follower through a low pass filter comprising of R»2 and C»2 (see arrow 2-18). Assume the impedance of the voltage source V, note 2-8 Is very low, thereby effectively grounding the far end of the capacitor C « a formi g the low pass filter.
  • the high frequency input signal V, R 2-8 is applied to the load device i through the high pass filter comprising the same two components C» and R ⁇ i see arrow 2-19).
  • the far end of the resistor R personallyj is coupled to AC ground forming the high pass filter.
  • the load device ⁇ is biased to the correct bias voltage and simultaneously the high frequency signal V, n 2-8 is also applied to the load device i,
  • the second RC network of FIG. 2d comprising R «t and C Computef also presents a low pass or high pass filter to the input DC bias voltage from VDD and the high frequency signal of V ift 2-6.
  • the voltage VDD is applied to the device 2 in the first source follower through a low pass filter comprising of R «j and C selfishi. Assume the impedance of the voltage source V Jtt 2-6 is very low. thereby effectively grounding the far end of the capacitor €»t forming the low pass filter.
  • the high frequency input signal V Ja 2-6 and is applied to the load device N 2 through the high pass filter comprising the same two components C t u and The far end of the resistor R réellei is coupled to AC ground forming the high pass filter.
  • the load device !Nfe is biased to the correct DC bias voltage and simultaneously the high frequency signal V ia 2-6 and is also applied to the load device 2
  • the circuit 2-20 in FIG, 2e depicts the replacement of the inventive source follower and RC networks by the Dynamic Source follower which has several terminals: VDD 2-22, signal V itt 2-6, complementary signal V m 2-8. GRD ⁇ not shown) and DC bias voltage 2-21. The signal is applied to the positive terminal while the complementary signal is applied to the negative terminal.
  • the output of the Dynamic Source follower is V OHt 2-23.
  • the Dynamic Source follower comprises the two series devices j and N 2 coupled between two power supplies VDD and GRD (ground),
  • a first RC network C»2 and R,a acts as a high pass filter and couples the high frequency components of a first input signal (V m 2-8) to the Ni device.
  • the first RC network also acts as a low pass filter and couples a first biasing DC voltage component to the Ni device.
  • the second RC network Cm and R B3 acts as a high pass filter and couples the high frequency components of a second input signal (V to 2-6) to the N j device.
  • the second RC network also acts as a low pass filter and couples a second biasing DC voltage component (from VDD) to the N 3 ⁇ 4 device.
  • An output signal 2-23 is generated at the output of the Dynamic Source follower.
  • the di ferential source follower 2- 10 as illustrated in FIG. 2f can offer an overall AC voltage gain of 6dB and improved noise
  • a differential signal output stage is created by using a first 2-13 and second 2-14 inventive source follower stage forming a differential interface 2-10.
  • the first source follower 2-13 is driven by the signals V jB 2-6 and V JB 2-8 and generates a first output signal by the summation of the generated output signal components V o 2-7 and V oett> 2-9, respectively.
  • the second source follower 2-14 is also driven by the same two input signals V u , 2-8 and V jjB 2-6 and but these inputs are applied to the second source follower 2-14 in a complementary manner when compared to the first source follower 2-13,
  • the second source follower 2-14 is driven by the input signals V m 2-8 and V it , 2-6 to generate the output signal components V oult 2-12 and V otltb 2-11, respectively.
  • the summation of the output signal components 2-11 and 2-12 has the same magnitude as the summation of the output signal components 2-7 and 2-9, but with a phase reversal since the inputs to the second source follower are flipped.
  • FIG, 2g depicts the circuit 2-15 with RC networks and the current source applied to the circuit shown in FIG. 2f in accordance with another embodiment of the invention.
  • the device ,3 ⁇ 4 2-16 is connected in a saturation configuration and is part of the current mirror with devices j and N4, By scaling the size of the load device Nj with respect to j allows the current in the first source follower to be adjusted.
  • the bias current I 3 ⁇ 4 j as creates a DC voltage due to the device N$ and is applied to the device j in the first source follower through a tow pass filter comprising of R n2 and C2; simultaneously, the input signal V taste, 2-8 is applied through the high pass filter to the load device
  • the load device Nj i s biased to the correct voltage and simultaneously the signal V i( , 2-8 i also applied to the load device Nj.
  • the RC network of Em and C»j in first source follower of FIG, 2g provides a high pass and low pass function for the active device N 2 .
  • the low pass circuit filters VDD to the active device N 2 enabling the n-channel device.
  • the input V in is applied through the RC hig pass network of C » i and R » j.
  • the second source follower operates in a similar way except that the inputs are applied to the second source follower using complementary inputs.
  • the differentia! circuit 2-27 in FIG. 2h depicts the replacement of both of the inventive source follower and RC networks by the Dynamic Source followers 2-28 and 2-29 which each have several -terminals: VDD, signal V !a , complementary signal V, e , GRD (not shown) and a DC bias voltage.
  • the outputs of the differential Dynamic Source follower are V out and V 0iU .
  • one of the Dynamic Source Follower 2-28 comprises the two series devices j and z coupled between two power supplies VDD and GRD (ground).
  • a first RC network C Compute 2 and R behalfz acts as a high pass filter and couples the high frequency components of a first input signal (V m ) to the j device.
  • the first RC network also acts as a low pass filter and couples a first biasing DC voltage component to the Nt device.
  • the second RC network C n i and R,,j acts as a high pass fiiter and couples the high frequency components of a second input signal (Vj a ) to the 2 device.
  • the second RC network also acts as a low pass fiiter and couples a second biasing DC voltage component (from VDD) to the 3 ⁇ 4 device.
  • An output signal 2-23 is generated at the output of the Dynamic Source follower,
  • the other Dynamic Source follower 2-29 operates the same way except that the two inputs V ⁇ wish and V IB are flipped when compared to 2-28.
  • FIG. 3a The Sallen-Key fiiter 3-1 is depicted in FIG. 3a which corresponds to a portion of the fi iter 1-6 in FIG, la in accordance with another embodiment of the inventive idea.
  • the second filter cascaded between the output of the first filter and the input to the Programmable Gain Amplifier
  • PGA 1-7 Note that the source 'follower in the first filter provides the lo output impedance of — as required for the impedance of Zi in the second filter.
  • the impedance of Z t in the second fiiter is al so called the source impedance.
  • the remaining components of the second fiiter: 3 ⁇ 4- Z4 and the operational amplifier are similar to that which was depicted in FIG. lb.
  • FIG. 3b illustrates the first and second Sallen-Key filters cascaded together.
  • the Low Pass Fiiter LPF 1-6 in FIG. la is formed by replacing the impedances with the appropriate capacitors and resistors in FIG. 3b.
  • the LPF is between the BBAMP base hand amplifier 1-5 and the Programmable Gain Amplifier PG A 1- 7 as shown in FIG. la.
  • the output impedance g of the BBAMP at node V, Hf is designed to provide a low impedance meeti ng the specification cri teria required for the fi rst element of the first filter. This low impedance is also called the source impedance.
  • FIG. 3c illustrates the differential Sallen-Key filter 3-4 coupled between the differential outputs of the BBAMP 3-5 at nodes V itif and V mf and the differentia! inputs of the PGA 3-10 at nodes V outf and % at f.
  • the BBAMP 3-5 provides the Sow output impedance ⁇ 3 ⁇ 4 and 7 ⁇ ) thai is required to satisfy the design requirements of the first filters (3-6 and 3-8).
  • Inside the top filter chain are two cascaded Sallen-Key filters 3-6 and 3-7.
  • FIG. 4a illustrates a Sallen-Key filter 4-1 in accordance with another embodiment of the inventive idea.
  • the resistance Rj is not illustrated but is presented to this circuit when the previous stage is coupled to the input node VV, sM -.
  • the capacitance ⁇ 3 ⁇ 4 couples the input signal ⁇ ' ⁇ > « « ⁇ to the output signal V 0(!tf while the impedances R 2 and C ⁇ fonn a voltage divider between V* ⁇ and G D (or VSS) generating Vtrada.
  • the operational amplifier requires both an input signal V in 4-4 and its complement V m 4-5
  • output impedance 3 ⁇ 4 or— can be altered by adjusting the current flow through the two series coupled devices N :t and j.
  • FIG- 4c illustrates the Dynamic Source Follower 4-7 replacing the RC networks of C «j - ni and C Compute2 - R «a along with the devices :i and IN 2 given in FIG * 4b.
  • the signal V in 4- 4 is applied to the positive input Dynamic Source follower.
  • a signal V, a 4-5 is required for the negative input of the Dynamic Source follower but is currently not available. As will he seen shortly, this signal is available in a differential filter design.
  • FIG. 4d presents a generalized Sallen-Key filter 4-8 since the resistors and capacitors of FIG. 4c are replaced by impedances.
  • a differential Sallen-Key filter (for example, the 3-7 and 3-9 filters of FIG. 3c) generates both signals V, himself and V ia internally.
  • the operational amplifier 145 as illustrated in FIG. 5a requires an internal feedback path to maintain the stability of the operational amplifier.
  • a differential amplifier typically contains several devices, incorporates a input and output stage, and uses an RC feedback path to maintain stability. The device count and feedback adds additional ci rcuit components and l imits the high frequency performance of the operational amplifier since the delay in the feedback loop limits the maximum performance that can be achievable in the operational amplifier and ultimately the SaJlen-Key filter.
  • the operational amplifiers 1-15 and 1-15' can be replaced by the Dynamic Source
  • the Dynamic Source followers 5-3 and 5-3' provide the feed forward signals 5-5 and 5-4 between the differential path.
  • V m 5-5 is provided to the negative input of the Dynamic Source follower 5-3 while Via 5-4 is provided to the negative input of the Dynamic Source follower 5-3 * .
  • the circuit in FIG. 5b should outperform the circuit shown in FIG. 5a since the Dynamic Source followers only requires a feed forward signal and a mi i mum of two devices.
  • FIG. 6 The cascaded differential Sallen- ey filter presented in FIG. 3c whe used as a low pass filter 6- ⁇ is further illustrated in FIG. 6 after the operational amplifiers are replaced by the source followers and the impedances replaced by resistors or capacitors to form the LPF.
  • This is one of the circuits used for the LPF 1-6 in FIG. 1.
  • On the left side is the BBA P Differential Output 3-7 while the right side couples to the PGA Differential Input 3-10.
  • the voltage of the current source caused by h is duplicated to devices N «, Ni and i3 ⁇ 4 through the symbols C2-C4 defined in FIG. 6b.
  • Each differential section of the Sallen-Key filter contains two cascaded filters.
  • the feedback paths joining the first two differential filters are paths 6-4 (joined by A) and 6-2.
  • the second cascaded differential filters have feedback paths 6-3 and 6-5 (joined by B).
  • the cascaded differential LPF Sailen- ey filter is designed to have a cutoff frequency of about 900MHz. This cutoff is determined by the low pass filter consisting of Zj (output impedance of the previous filter), 13 ⁇ 4 and €4 However, V m - 2 is coupled to the device N 2 by the high pass filter formed by C Cincinnati :i - Rleton.
  • the high pass filter is designed to pass frequencies greater than 1 to 2MHz.
  • the initial 9G0 Bz bandwidth signal of the Sailen-Key filter is notched out at DC and up to 2MHz.
  • the current can also be adjusted to after the bandwidth of the overall filter by altering the output Impedance of the Dynamic Source followers
  • the filter can be changed through lum to control the — - of these four devices.
  • FIG. 6b replaces all four source followers in FIG, 6a wit the block; symbol Dynamic Source followers 6-7 through 6-10.
  • the feed forward paths 6-4 provides the signal V 3 ⁇ 4tll from the positive input of the Dynamic Source followers 6-7 to the negative input of the Dynamic Source followers 6- .
  • the feed forward paths 6-2 provides the signal V, nl from the positive input of the Dynamic Source followers 6- to the negative input of the Dynamic Source followers 6-7.
  • Sailen-Key LPF filter provides gain, increased bandwidth and a more stable system.
  • FIG. 7a illustrates a circuit 7-1 where several current bias circuits (7-2 through 7-5) are used.
  • the first bias current 3 ⁇ 4, 3 ⁇ 4» ⁇ « j adjusts the— of the first cascaded sta3 ⁇ 4e of the filter while the second bias current J fctes2 adjusts the— of the second cascaded stage of the filter.
  • the two independent controls of the current bias iumt and I ⁇ sa allow the bandwidth of the Sailen-Key filter to be altered in another dimension when compared to the circuit given In FIG. 6a.
  • luasi controls the — of the first cascaded stage and control the— of the second cascaded stage.
  • — of the first stage is slightly difference from the— of the second stage due to loading of PGA
  • CMOS complementary metal-oxide-semiconductor
  • CMOS or SOI Silicon on Insulator
  • N-MOS n-channe!
  • P-MOS p-channel
  • a network and a portable system can exchange information wirelessly by using communication techniques such as TD A (Time Division Multiple Access
  • the network can comprise the phone network; IP (Internet protocol) network, LA (Local Are ' Network), ad hoc networks, local routers and even other portable systems.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Networks Using Active Elements (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Microwave Amplifiers (AREA)

Abstract

Un filtre de Sallen-Key nécessite un amplificateur opérationnel ayant une forte impédance d'entrée et une faible impédance de sortie. L'amplificateur opérationnel nécessite un chemin de rétroaction interne pour sa stabilité, ce qui limite les performances. Cette invention élimine le besoin d'une rétroaction interne et augmente le gain d'un suiveur de source qui possède des caractéristiques correspondant à l'amplificateur opérationnel dans le filtre de Sallen-Key. Le suiveur de source procure un gain de tension alternative de 6dB et est substitué à l'amplificateur opérationnel. Le filtre de Sallen-Key nécessite une configuration différentielle pour générer tous les signaux requis avec leurs compléments et utilise ces signaux dans un chemin d'action directe. En outre, un dispositif empilé à canal n double maximise la tension de marge à plusieurs centaines de millivolts pour une tension d'alimentation de 1,2 V en technologie CMOS 40 nm. Ainsi, la largeur de bande de 880 MHz requise du filtre de Sallen-Key peut être facilement atteinte à l'aide du suiveur de source selon l'invention.
PCT/US2012/056458 2011-09-23 2012-09-21 Suiveur de source différentiel à gain de 6db avec applications à des filtres en bande de base wigig WO2013043950A1 (fr)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US13/243,908 US8680899B2 (en) 2011-09-23 2011-09-23 High performance divider using feed forward, clock amplification and series peaking inductors
US13/243,880 US8487695B2 (en) 2011-09-23 2011-09-23 Differential source follower having 6dB gain with applications to WiGig baseband filters
US13/243,986 2011-09-23
US13/243,908 2011-09-23
US13/243,880 2011-09-23
US13/243,986 US8406710B1 (en) 2011-09-23 2011-09-23 Method and apparatus of minimizing extrinsic parasitic resistance in 60 GHz power amplifier circuits

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WO2013043950A1 true WO2013043950A1 (fr) 2013-03-28

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PCT/US2012/056466 WO2013043957A2 (fr) 2011-09-23 2012-09-21 Procédé et appareil pour réduire au minimum la résistance parasite extrinsèque dans des circuits amplificateurs de puissance à 60 ghz
PCT/US2012/056458 WO2013043950A1 (fr) 2011-09-23 2012-09-21 Suiveur de source différentiel à gain de 6db avec applications à des filtres en bande de base wigig
PCT/US2012/056463 WO2013043954A2 (fr) 2011-09-23 2012-09-21 Diviseur à haute performance utilisant une action directe, une amplification d'horloge et des inductances de compensation série

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CN103939068A (zh) * 2014-04-16 2014-07-23 东北石油大学 一种开采稠油或沥青的方法

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DE112012003966T5 (de) 2014-09-18
DE112012003966B4 (de) 2024-01-11
WO2013043957A3 (fr) 2014-05-08
WO2013043957A2 (fr) 2013-03-28
WO2013043954A2 (fr) 2013-03-28
WO2013043954A4 (fr) 2013-07-04
CN104054267A (zh) 2014-09-17
WO2013043954A3 (fr) 2013-06-06

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