WO2013038980A1 - Substrat ayant une structure de couche tampon pour la croissance d'une couche semi-conductrice de nitrure - Google Patents

Substrat ayant une structure de couche tampon pour la croissance d'une couche semi-conductrice de nitrure Download PDF

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WO2013038980A1
WO2013038980A1 PCT/JP2012/072704 JP2012072704W WO2013038980A1 WO 2013038980 A1 WO2013038980 A1 WO 2013038980A1 JP 2012072704 W JP2012072704 W JP 2012072704W WO 2013038980 A1 WO2013038980 A1 WO 2013038980A1
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layer
substrate
buffer layer
nitride semiconductor
flow rate
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暢行 布袋田
信明 寺口
大輔 本田
伸之 伊藤
雅和 松林
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シャープ株式会社
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    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/403—AIII-nitrides
    • C—CHEMISTRY; METALLURGY
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    • H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
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    • H01L29/2003—Nitride compounds

Definitions

  • the present invention relates to improvement of a substrate having a buffer layer structure for growing a nitride semiconductor layer, and more particularly to improvement of a buffer layer structure of the substrate.
  • An epitaxial wafer including a plurality of nitride semiconductor layers stacked on such an improved substrate can be preferably used for manufacturing a nitride semiconductor device such as a heterojunction field effect transistor.
  • a GaN substrate is expensive, so that it is on a substrate of a different material such as sapphire, SiC, or Si Conventionally, these nitride semiconductor layers have been crystal-grown.
  • a nitride semiconductor layer is grown by MOCVD (Metal Organic Vapor Deposition) on a substrate of a different material, strain based on the difference in crystal structure, lattice mismatch, thermal expansion coefficient, etc. between the substrate and the semiconductor layer Various buffer layer structures are used for relaxation.
  • MOCVD Metal Organic Vapor Deposition
  • Japanese Patent Laid-Open No. 2-229476 of Patent Document 1 teaches that an AlN layer is deposited as a buffer layer on a sapphire substrate at a relatively low substrate temperature of 400 ° C. or higher and 900 ° C. or lower.
  • Such a buffer layer deposited at a relatively low temperature is also called a low-temperature buffer layer.
  • the low-temperature buffer layer contains microcrystals and polycrystals in the amorphous matrix. Therefore, when the substrate temperature is increased to about 1000 ° C. or higher in order to grow a nitride semiconductor layer for a semiconductor device on the low-temperature buffer layer, the amorphous parent phase in the buffer layer is polycrystallized. It will contain a relatively large amount of dislocations inside. In the nitride semiconductor multilayer structure for devices grown on the buffer layer, a large amount of dislocations are introduced, the crystal quality varies, and cracks tend to occur.
  • Japanese Patent Application Laid-Open No. 2002-367917 of Patent Document 2 teaches that an AlN crystal layer is deposited on a sapphire substrate as a buffer layer at a relatively high substrate temperature of 1100 ° C. or more and 1250 ° C. or less.
  • a buffer layer deposited at a relatively high temperature is also referred to as a high temperature buffer layer.
  • Patent Document 3 also states that if the thickness of the buffer layer is increased, the substrate is likely to warp due to the difference in lattice constant between the substrate and the buffer layer, and the deposition temperature of the AlN buffer layer is further increased. It also states that if the height is increased, the surface of the buffer layer is more likely to become cloudy.
  • Patent Document 3 discloses that the temperature, pressure, and source gas during the deposition of the high-temperature AlN buffer layer are controlled in order to suppress the occurrence of white turbidity even when the high-temperature AlN buffer layer is formed thin. It teaches changing at least one of MOCVD conditions such as flow rate.
  • JP-A-2-229476 Japanese Patent Laid-Open No. 2002-367917 JP 2007-59850 A
  • An AlN crystal having a hexagonal wurtzite structure is a polar crystal in which Al atoms and N atoms are arranged asymmetrically along the c-axis.
  • the thickness of the AlN crystal layer is grown on the non-polar substrate in the c-axis direction, either the Al polarity where Al atoms exist stably on the surface or the N polarity where N atoms exist stably exists on the surface. grow up. This difference in polarity appears characteristically in the morphology of the crystal growth surface, while the Al polar surface is a highly flat surface, whereas the N polar surface is a remarkably uneven surface having hexagonal facets. Tend to be.
  • the AlN crystal layer is grown as a buffer layer without considering the polar face as in Patent Document 3, the surface of the AlN crystal layer in which the Al polar face and the N polar face are mixed is generated, and high surface flatness is obtained. I can't get it.
  • the mixture of the Al polar face and the N polar face is inherited into the nitride semiconductor multilayer structure for devices grown on the AlN buffer layer, and further deteriorates the surface flatness of the semiconductor multilayer structure.
  • the main object of the present invention is to provide a substrate having an improved buffer layer structure for growing a semiconductor laminated structure for a nitride semiconductor device.
  • the present inventors have not formed a high-temperature AlN buffer layer directly on the silicon substrate, but have a surface flatness compared to a conventional high-temperature AlN buffer layer by interposing an Al layer. As a result, it has been found that a novel buffer layer structure with significantly improved can be obtained.
  • a substrate having a buffer layer structure for growing a nitride semiconductor layer has an Al layer and an AlN crystal layer sequentially stacked on a (111) main surface of a Si single crystal substrate,
  • the Al layer has a thickness of 2 atomic layers or more and 10 atomic layers or less, and the surface of the AlN crystal layer has a (0001) plane orientation and an Al polar surface.
  • the Al layer preferably has a thickness of 2 atomic layers or more and 4 atomic layers or less.
  • the substrate according to the present invention may further have an AlGaN crystal layer on the AlN crystal layer.
  • the AlGaN crystal layer can also include a plurality of sub-layers in which the Al composition ratio is sequentially reduced.
  • a good Al polar surface can be obtained on the surface of the AlN crystal buffer layer by uniformly forming the Al layer on the Si substrate surface before growing the AlN crystal buffer layer. That is, since the surface of the AlN crystal buffer layer substantially includes only the Al polar face, it has high flatness.
  • FIG. 1 It is typical sectional drawing which shows an example of the laminated structure of the heterojunction field effect transistor which can be produced using the board
  • FIG. 1 is a schematic cross-sectional view showing an example of a laminated structure of heterojunction field effect transistors that can be manufactured using a substrate according to the present invention.
  • a Si substrate having a (111) main surface is used as the substrate 1.
  • the substrate is set in a chamber of an MOCVD (metal organic chemical vapor deposition) apparatus.
  • MOCVD metal organic chemical vapor deposition
  • the Si substrate 1 is heated to 1050 ° C., and the substrate surface is cleaned for 300 seconds in a hydrogen atmosphere with a chamber internal pressure of 13.3 kPa. Thereafter, an Al layer 2a and an AlN crystal buffer layer 2b are laminated on the Si substrate 1 under the conditions detailed in Examples described later.
  • TMA trimethylaluminum
  • TMG trimethylgallium
  • NH 3 flow rate 12.5 slm.
  • a Ga 0.3 N layer 3 is deposited to a thickness of 400 nm.
  • the superlattice multilayer buffer layer structure 6 may be omitted from the viewpoint of the manufacturing cost and manufacturing time of the heterojunction field effect transistor.
  • the GaN layer 8 is deposited to a thickness of 0.5 ⁇ m under a pressure of 90 kPa.
  • the deposition pressure is low, carbon contained in TMG is easily doped into the GaN layer, and when the deposition pressure is high, carbon tends to be hardly doped from TMG into the GaN layer.
  • an AlN characteristic improving layer 9 (1 nm thickness), an Al 0.2 Ga 0.8 N barrier layer 10 (20 nm thickness), and a GaN cap layer 11 (1 nm) under a pressure of 13.3 kPa.
  • An electron supply layer is deposited, including (thickness).
  • the Al composition ratio of the AlGaN layers 3, 4 and 5 was changed in the order of 0.7, 0.4 and 0.1.
  • the combination of composition ratios is not limited to this combination.
  • the number of AlGaN layers included in the composition gradient buffer layer structure and having different Al composition ratios is not limited to three, and can be any number. What is important is that the Al composition ratio gradually decreases from the lower surface to the upper surface of the composition gradient buffer layer structure.
  • the super lattice multi-layer buffer layer structure 6 is not limited to the repetition of the AlN layer / the Al 0.1 Ga 0.9 N layer,, for example the Al 0.1 Ga 0.9 N layer, has another composition ratio AlGaN It is also possible to replace it with a layer.
  • Comparative Example 1 In order to investigate the improvement effect of the substrate of the present invention, a substrate as Comparative Example 1 was produced using conventional technology.
  • the substrate of Comparative Example 1 has the Si substrate 1, the AlN crystal buffer layer 2b, and the composition gradient buffer layer structure 3-5 in FIG. 1, but does not have the Al layer 2a.
  • the AlN crystal buffer layer 2b is formed on the Si substrate 1 that has been surface-cleaned in the same manner as in the above-described embodiment.
  • the substrate temperature is 1050 ° C.
  • the pressure is 13.3 kPa
  • the TMA is 108.5 sccm.
  • the film was grown to a thickness of 200 nm under MOCVD conditions with a flow rate and NH 3 flow rate of 12.5 slm.
  • a composition gradient buffer layer structure 3-5 was formed on the AlN crystal buffer layer 2b in the same manner as in the above-described embodiment.
  • FIG. 2 shows an optical dark field photomicrograph of the surface of the Al 0.1 Ga 0.9 N layer 5 on the substrate of Comparative Example 1 obtained in this way.
  • the white line segment in this micrograph has shown the scale of 50 micrometers.
  • the surface of the substrate of Comparative Example 1 contained many fine convex defects, and the defect density was measured to be 4.4 ⁇ 10 7 pieces / cm 2 .
  • Comparative Example 2 In order to more reliably investigate the improvement effect of the substrate of the present invention, a substrate as Comparative Example 2 was further fabricated using the conventional technique.
  • the substrate of Comparative Example 2 has the Si substrate 1, the AlN crystal buffer layer 2b, and the composition gradient buffer layer structure 3-5 in FIG. 1, but has a silicon nitride layer instead of the Al layer 2a. .
  • the surface of the Si substrate 1 subjected to the surface cleaning process in the same manner as in the above-described embodiment is performed under the conditions of the substrate temperature of 1050 ° C., the pressure of 13.3 kPa, and the NH 3 flow rate of 12.5 slm. Nitrided for 40 seconds.
  • the AlN crystal buffer layer 2b has a substrate temperature of 1050 ° C., a pressure of 13.3 kPa, a TMA flow rate of 108.5 sccm, and 12.5 slm.
  • the film was grown to a thickness of 200 nm under MOCVD conditions with NH 3 flow rate, after which a compositionally graded buffer layer structure 3-5 was formed.
  • FIG. 3 shows an optical dark field photomicrograph of the surface of the Al 0.1 Ga 0.9 N layer 5 on the substrate of Comparative Example 2 obtained in this way.
  • the white line segment in this micrograph also shows the scale of 50 micrometers.
  • the surface of the substrate of Comparative Example 2 also contains many fine convex defects, and the defect density was measured to be 2.4 ⁇ 10 7 pieces / cm 2 . That is, in the substrate of Comparative Example 2, it can be seen that the defect density is reduced to about 1 ⁇ 2 compared to Comparative Example 1 due to the effect of nitriding the surface of the Si substrate 1.
  • Reference Example 1 In order to investigate the effective range of the present invention, a substrate as Reference Example 1 closely related to the present invention was also produced.
  • the substrate of Reference Example 1 includes the Si substrate 1, the Al layer 2a, the AlN crystal buffer layer 2b, and the composition gradient buffer layer structure 3-5 shown in FIG.
  • the Al layer 2a was deposited for 6 seconds under the conditions of a substrate temperature of 1050 ° C., a pressure of 13.3 kPa, and a TMA flow rate of 27 sccm.
  • This deposition condition corresponds to the condition for depositing the Al layer 2a having an average thickness of one atomic layer on the surface of the Si substrate 1.
  • the AlN crystal buffer layer 2b has a substrate temperature of 1050 ° C., a pressure of 13.3 kPa, a TMA flow rate of 108.5 sccm, and NH 3 of 12.5 slm.
  • the film was grown to a thickness of 200 nm under flow rate MOCVD conditions, after which a compositionally graded buffer layer structure 3-5 was formed.
  • FIG. 4 shows an optical dark field photomicrograph of the surface of the Al 0.1 Ga 0.9 N layer 5 on the substrate of Reference Example 1 thus obtained.
  • the white line segment in this micrograph also shows a scale of 50 ⁇ m.
  • the surface of the substrate of Reference Example 1 also contains many fine convex defects, and the defect density measured was 1.2 ⁇ 10 8 / cm 2 . That is, in the substrate of Reference Example 1, the Al layer 2a corresponding to the average thickness of one atomic layer was deposited, but it can be seen that the defect density is increased rather than reduced as compared with Comparative Example 1. This is because, on average, the Al layer 2a corresponding to the thickness of one atomic layer is non-uniform, and the surface of the Si substrate is partially exposed. This non-uniformity rather increases the defect density. It is thought that I let you.
  • Example 1 A substrate according to Example 1 according to the present invention was prepared in a manner similar to Reference Example 1.
  • the substrate of Example 1 is different from that of Reference Example 1 only in that the deposition conditions for the Al layer 2a are changed.
  • the flow rate of TMA is increased from 27 sccm in Reference Example 1 to 54 sccm. That is, the TMA flow rate of 54 sccm corresponds to the condition for depositing the Al layer 2 a having an average thickness of two atomic layers on the surface of the Si substrate 1.
  • the AlN crystal buffer layer 2b has a substrate temperature of 1050 ° C., a pressure of 13.3 kPa, a TMA flow rate of 108.5 sccm, and NH 3 of 12.5 slm.
  • the film was grown to a thickness of 200 nm under flow rate MOCVD conditions, after which a compositionally graded buffer layer structure 3-5 was formed.
  • FIG. 5 shows an optical dark field photomicrograph of the surface of the Al 0.1 Ga 0.9 N layer 5 on the substrate of Example 1 obtained in this way.
  • the white line segment in this micrograph also shows a scale of 50 ⁇ m.
  • the fine convex defects were remarkably reduced on the surface of the substrate of Example 1, and the defect density measured was 1.1 ⁇ 10 5 / cm 2. It was. That is, in the substrate of Example 1, the defect density is drastically reduced to about 1/400 compared with Comparative Example 1 as an effect of depositing the Al layer 2a corresponding to the average thickness of the two atomic layers. .
  • the surface of the Si substrate 1 is covered with the Al layer 2a corresponding to the thickness of the two atomic layers on the average without being exposed, and the AlN crystal has a smooth surface of Al polarity on the Al layer 2a.
  • the buffer layer 2b has grown. That is, since the AlN crystal buffer layer 2b has an Al-polar smooth surface, it is considered that the defect density is drastically reduced also on the surface of the composition gradient buffer layer structure 3-5 grown thereon.
  • Example 2 A substrate according to Example 2 according to the present invention was further fabricated similar to Example 1.
  • the substrate of Example 2 is different from that of Example only in that the average deposition thickness of the Al layer 2a is changed.
  • the flow rate of TMA is further increased from 54 sccm in the first embodiment to 108 sccm. That is, the TMA flow rate of 108 sccm corresponds to the condition for depositing the Al layer 2 a having an average thickness of four atomic layers on the surface of the Si substrate 1.
  • the AlN crystal buffer layer 2b has a substrate temperature of 1050 ° C., a pressure of 13.3 kPa, a TMA flow rate of 108.5 sccm, and NH 3 of 12.5 slm.
  • the film was grown to a thickness of 200 nm under flow rate MOCVD conditions, after which a compositionally graded buffer layer structure 3-5 was formed.
  • FIG. 6 shows an optical dark field photomicrograph of the surface of the Al 0.1 Ga 0.9 N layer 5 on the substrate of Example 2 obtained in this way.
  • the white line segment in this micrograph also shows a scale of 50 ⁇ m.
  • fine convex defects were significantly reduced on the surface of the substrate of Example 2 as compared with Comparative Example 1, and the defect density was measured to find 1.9 ⁇ 10 5.
  • Pieces / cm 2 it can be seen that the defect density in the substrate of Example 2 does not change significantly as compared to Example 1, but rather increases slightly.
  • the thickness of the Al layer 2a is preferably a thickness of 10 atomic layers or less in order to avoid the adverse effects of the fine protrusions generated on the surface.
  • FIGS. 9 and 10 show graphs showing the cross-sectional shape of the surface irregularities along one scanning line in the AFM images of FIGS. 7 and 8, respectively. That is, the horizontal axis of these graphs represents the distance ( ⁇ m) parallel to the surface, and the vertical axis represents the distance (nm) in the direction perpendicular to the plane parallel to the surface.
  • the surface roughness can be measured from such a surface cross-sectional shape.
  • the RMS roughness average square root roughness
  • Ra arithmetic average roughness
  • a nitride semiconductor device in which the Al layer 2a, the composition gradient buffer layer 3-5, and the superlattice multilayer buffer layer structure 6 are omitted from the stacked structure shown in FIG. It was made. That is, in this nitride semiconductor device, the AlN crystal buffer layer 2b was deposited on the Si substrate 1 under the conditions described in Comparative Example 1. On the AlN crystal buffer layer 2b, the carbon-doped GaN layer 7, the undoped GaN channel layer 8, the AlN characteristic improving layer 9, the Al 0.2 Ga 0.8 N barrier layer 10, and the GaN cap layer 11 are described above. Deposited sequentially under the conditions described in the embodiment.
  • the electronic characteristics of the GaN channel layer 8 in the nitride semiconductor device according to the related art obtained in this way were obtained by using well-known hole measurement.
  • the sheet resistance Rs was 1240 ⁇ / ⁇
  • the sheet carrier concentration Ns was 4.6 ⁇ 10 12 cm ⁇ 2
  • the carrier mobility ⁇ was 1090 cm 2 / Vs.
  • nitride semiconductor device using the present invention was fabricated in a manner similar to the above-described conventional nitride semiconductor device.
  • This nitride semiconductor device utilizing the present invention is nitrided according to the above-described prior art only in that the diatomic Al layer 2a according to the first embodiment is interposed between the Si substrate 1 and the AlN crystal buffer layer 2b. It was different from physical semiconductor devices.
  • the electronic properties of the GaN channel layer 8 in this nitride semiconductor device using the present invention were also determined using well-known hole measurements.
  • the sheet resistance Rs was 748 ⁇ / ⁇
  • the sheet carrier concentration Ns was 5.03 ⁇ 10 12 cm ⁇ 2
  • the carrier mobility ⁇ was 1660 cm 2 / Vs.
  • the sheet resistance Rs is reduced, the carrier concentration Ns is increased, and the carrier concentration is increased in the channel layer in the nitride semiconductor device using the present invention as compared with the nitride semiconductor device according to the prior art.
  • the mobility ⁇ is increased and all the electronic characteristics are improved.
  • it is preferable that the carrier mobility ⁇ is remarkably improved.
  • the AlN crystal buffer layer surface is smoothened by uniformly forming an Al layer having a predetermined thickness on the substrate surface before the AlN crystal buffer layer is grown.
  • the smoothness of the surface of the nitride semiconductor layer grown on the AlN crystal buffer layer can be improved.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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Abstract

L'invention concerne un substrat ayant une structure de couche tampon pour la croissance d'une couche semi-conductrice de nitrure, comprenant une couche d'Al et une couche de cristal d'AlN empilées séquentiellement sur une surface principale (111) d'un substrat monocristallin de Si, la couche d'Al ayant une épaisseur de deux couches atomiques à dix couches atomiques, et la surface de la couche cristalline d'AlN ayant une surface qui est Al polaire avec l'orientation de plan d'une surface (0001).
PCT/JP2012/072704 2011-09-15 2012-09-06 Substrat ayant une structure de couche tampon pour la croissance d'une couche semi-conductrice de nitrure WO2013038980A1 (fr)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114093753A (zh) * 2021-11-12 2022-02-25 松山湖材料实验室 氮化铝单晶衬底的表面处理方法及紫外发光二极管的制备方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003033781A1 (fr) * 2001-10-16 2003-04-24 Arizona Board Of Regents, A Body Corporate Acting On Behalf Of Arizona State University Croissance epitaxiale a faible temperature de semi-conducteurs quaternaires a grande largeur de bande interdite
WO2006014472A1 (fr) * 2004-07-07 2006-02-09 Nitronex Corporation Matériaux de nitrure iii englobant de faibles densités de dislocation et procédés associés auxdits matériaux
WO2007077666A1 (fr) * 2005-12-28 2007-07-12 Nec Corporation Transistor a effet de champ, et film epitaxial multicouche pour un usage dans la preparation de transistor a effet de champ
WO2008123213A1 (fr) * 2007-03-26 2008-10-16 Kyoto University Dispositif à semi-conducteurs et procédé de fabrication de semi-conducteurs
WO2009001888A1 (fr) * 2007-06-27 2008-12-31 Nec Corporation Transistor à effet de champ et film épitaxial multicouche destiné à être utilisé dans la fabrication du transistor à effet de champ
JP2010205988A (ja) * 2009-03-04 2010-09-16 Panasonic Corp 窒化物半導体素子及びその製造方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003033781A1 (fr) * 2001-10-16 2003-04-24 Arizona Board Of Regents, A Body Corporate Acting On Behalf Of Arizona State University Croissance epitaxiale a faible temperature de semi-conducteurs quaternaires a grande largeur de bande interdite
WO2006014472A1 (fr) * 2004-07-07 2006-02-09 Nitronex Corporation Matériaux de nitrure iii englobant de faibles densités de dislocation et procédés associés auxdits matériaux
WO2007077666A1 (fr) * 2005-12-28 2007-07-12 Nec Corporation Transistor a effet de champ, et film epitaxial multicouche pour un usage dans la preparation de transistor a effet de champ
WO2008123213A1 (fr) * 2007-03-26 2008-10-16 Kyoto University Dispositif à semi-conducteurs et procédé de fabrication de semi-conducteurs
WO2009001888A1 (fr) * 2007-06-27 2008-12-31 Nec Corporation Transistor à effet de champ et film épitaxial multicouche destiné à être utilisé dans la fabrication du transistor à effet de champ
JP2010205988A (ja) * 2009-03-04 2010-09-16 Panasonic Corp 窒化物半導体素子及びその製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114093753A (zh) * 2021-11-12 2022-02-25 松山湖材料实验室 氮化铝单晶衬底的表面处理方法及紫外发光二极管的制备方法
CN114093753B (zh) * 2021-11-12 2022-10-25 松山湖材料实验室 氮化铝单晶衬底的表面处理方法及紫外发光二极管的制备方法

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