WO2013031480A1

WO2013031480A1 - Semiconductor device manufacturing method and bonding method

Info

Publication number: WO2013031480A1
Application number: PCT/JP2012/069765
Authority: WO
Inventors: 菅　勝行
Original assignee: シャープ株式会社
Priority date: 2011-09-01
Filing date: 2012-08-02
Publication date: 2013-03-07

Abstract

This semiconductor device manufacturing method includes: a step (S12) of disposing, at intervals larger than those at bonding, second substrates on supporting tables; a step (S13) of disposing the supporting tables at bonding positions by moving the supporting tables; and a step (S15) of pushing up the second substrates from the supporting tables, and bonding the second substrates to a first substrate held above the second substrates. Consequently, the intervals at which the second substrates are bonded on the first substrate can be made smaller than the conventional intervals, and use efficiency of the first substrate is improved.

Description

Semiconductor device manufacturing method and bonding method

The present invention relates to a method for manufacturing a semiconductor device such as an SOI (Silicon-on-Insulator) substrate having a structure in which a plurality of small substrates are bonded to a large substrate, and a bonding method.

Currently, in a liquid crystal display device, low-temperature polysilicon (p-Si) has become the mainstream as a thin film transistor (Thin Film Transistor: TFT) for a small and medium size liquid crystal panel. However, since the low temperature polysilicon has a small crystal grain size, the variation in characteristics is large. In order to reduce the variation, a single crystal without a crystal grain boundary may be formed, but it is impossible to form single crystal silicon (c-Si) on a large substrate by a normal film formation method. Therefore, techniques for transferring a single crystal silicon wafer onto a large glass substrate have been proposed (see, for example, Non-Patent Documents 1 and 2).

Here, single crystal silicon wafers are several times smaller than large glass substrates. For this reason, when a plurality of wafers are attached to the glass substrate, it takes time if they are attached one by one. Therefore, in order to efficiently perform the bonding operation, a bonding method has been proposed in which all the wafers are arranged on a jig and then bonded to a glass substrate at once (for example, see Patent Document 1).

The joining method described in Patent Document 1 will be described. Here, a manufacturing process of an SOI substrate in which a plurality of semiconductor substrates (single crystal silicon wafers) are bonded to an insulating base substrate (glass substrate) will be described. 28A to 28C are diagrams showing a manufacturing process of an SOI substrate described in Patent Document 1. FIG. FIGS. 29A and 29B are views showing the configuration of the first substrate support 551 (jig) used in the SOI substrate manufacturing process of FIG.

First, as shown in FIG. 28A, a plurality of semiconductor substrates 502 are installed on the first substrate support base 551, and the base substrate 501 is installed on the second substrate support base 561. Then, after the second substrate support base 561 is disposed above the first substrate support base 551 so that the surface of each semiconductor substrate 502 and the surface of the base substrate 501 face each other with a predetermined interval, all the semiconductors The substrate 502 is charged. Note that the structure is not limited to charging only the semiconductor substrate 502. If the semiconductor substrate 502 and the base substrate 501 have different polarities, only the base substrate 501 or both can be charged.

Subsequently, as shown in FIG. 28B, the plurality of lift pins 553 provided below the first substrate support base 551 are raised to raise each semiconductor substrate 502. As a result, the distance between the surface of each semiconductor substrate 502 and the surface of the base substrate 501 is reduced.

When the distance between the surface of each semiconductor substrate 502 and the surface of the base substrate 501 is narrowed to some extent, the two attract each other due to static electricity, and each semiconductor substrate 502 is separated from the lift pins 553 and contacts the surface of the base substrate 501. Thereafter, as shown in FIG. 28C, one of the lift pins 553 is raised with respect to each semiconductor substrate 502, and pressure is applied to each semiconductor substrate 502, whereby each semiconductor substrate 502 is applied to the surface of the base substrate 501. Are joined.

Thus, a plurality of semiconductor substrates 502 can be attached to the base substrate 501 at once. In addition, since the semiconductor substrate 502 is brought into contact with the base substrate 501 using static electricity, even when a plurality of semiconductor substrates 502 having different thicknesses are bonded to the base substrate 501, bonding is performed efficiently. Is possible.

Japanese Patent Publication “Japanese Patent Laid-Open No. 2009-231819 (published on Oct. 8, 2009)”

However, the bonding method described in Patent Document 1 has a problem that a gap between the semiconductor substrates 502 bonded to the base substrate 501 is large. In the bonding method described in Patent Document 1, each semiconductor substrate 502 is normally sequentially installed on the corresponding concave substrate placement portion 552 of the first substrate support 551 using the transfer robot 600, as shown in FIG. Is done. However, in the operation of arranging the semiconductor substrates 502 so as to be adjacent to each other, it is difficult to arrange the semiconductor substrates 502 as close as possible due to the accuracy of the transfer robot 600 or the like. Therefore, it is necessary to reserve a margin (Q in FIG. 30) in consideration of deviation in conveyance and interference between wafers during conveyance in advance between adjacent substrate placement portions 552. If there is no margin, as shown in FIG. 31, troubles such as collision between the installed semiconductor substrate 502 and the next transported semiconductor substrate 502 'occur. Further, since each semiconductor substrate 502 is brought into contact with the base substrate 501 by an inquiry utilizing static electricity, a margin in consideration of this point is also necessary.

Therefore, the position of the substrate placement portion 552 is designed to ensure a sufficient margin (about several mm), and the placement position of the semiconductor substrate 502 is fixed according to the position of the substrate placement portion 552. As shown in FIG. 32, a large gap (P in FIG. 32) where the semiconductor substrate 502 is not transferred is surely generated on the base substrate 501 after bonding. . Since the size and number of SOI substrates that can be manufactured can be increased if the semiconductor substrate 502 to be attached is made as large as possible and the gap between the semiconductor substrates 502 is made as small as possible, the above problem reduces the utilization efficiency of the base substrate 501. It is a factor.

Further, the bonding method described in Patent Document 1 uses the first substrate support base 551 (jig) in which the region (position and size of the substrate placement portion 552) where the semiconductor substrate 502 is placed is different. The first substrate support 551 cannot be shared with other semiconductor substrates of the size. Therefore, when the size of the semiconductor substrate is changed in order to optimize the SOI substrate to be manufactured, it is necessary to replace the first substrate support itself.

The present invention has been made in view of the above-described conventional problems, and an object thereof is to provide a first substrate (an insulating substrate such as a glass substrate) and a plurality of second substrates (a semiconductor substrate such as a single crystal silicon wafer). In the production of the structure in which the first substrate is bonded, the gap between the second substrates bonded to the first substrate can be made smaller than before, and the semiconductor device manufacturing method that can improve the utilization efficiency of the first substrate, And providing a joining method.

In order to solve the above problems, a method for manufacturing a semiconductor device of the present invention provides
A method for manufacturing a semiconductor device comprising a first substrate and a second substrate smaller than the first substrate, wherein the plurality of second substrates are joined to the first substrate,
A bonding step of bonding the plurality of second substrates on the first substrate;
The joining process
A first arrangement step of arranging a plurality of independently movable support bases apart from each other;
An installation step of installing a second substrate on the upper surface of each support;
A second disposing step of disposing each support base by moving each support base on which the second substrate is disposed so that the distance between the second substrates is the first distance;
A bonding step in which the second substrates are pushed up from the support bases and bonded to the first substrates held above the second substrates,
The upper surface of the support table is smaller than the installation surface of the second substrate on the support table,
In the first arrangement step, the plurality of support bases are arranged so that the interval between the second substrates when the installation step is completed is a second interval larger than the first interval. Yes.

According to the above configuration, the support bases on which the second substrate is installed can move independently. Therefore, it is possible to optimize the arrangement of the second substrate when the second substrate is installed and when the second substrate is bonded.

In other words, when the second substrate is installed, the support table is arranged so that the interval between the installed second substrates is a second interval larger than the first interval at the time of bonding, so that the deviation in the conveyance can be prevented. Even if it occurs, it is possible to eliminate a problem caused by the shift such as collision between the second substrates.

Then, after the installation, the support bases are moved so that the intervals between the second substrates are set to the first intervals, regardless of the installation position of the second substrate with respect to the support base (presence of installation deviation). The second substrates can be arranged at the first interval. In other words, since the placement of the second substrate can be adjusted with high accuracy after installation, the position of the second substrate can be corrected by the support stand even if the placement shift occurs during installation.

Therefore, the interval between the second substrates, which is the first interval, can be brought close to the limit. Therefore, at the time of bonding the second substrate, the interval between the second substrates can be set to a minimum interval instead of the interval considering the margin of the transfer system as in the prior art.

Therefore, the gap between the second substrates joined to the first substrate can be made smaller than before, and the utilization efficiency of the first substrate can be improved. In other words, since the gap between the second substrates joined to the first substrate can be minimized, the utilization efficiency of the first substrate can be increased to the maximum.

Moreover, in order to solve the above problems, a method for manufacturing a semiconductor device of the present invention provides
A method for manufacturing a semiconductor device comprising a first substrate and a second substrate smaller than the first substrate, wherein the plurality of second substrates are joined to the first substrate,
A bonding step of bonding the plurality of second substrates on the first substrate;
The joining process
After installing the second substrate on the upper surface of the support table that can be moved independently at the installation position, the installation movement process for moving the support table on which the second substrate is installed to the first region is repeated a plurality of times, An installation arrangement step of arranging each support on which the second substrate is installed in the first region such that the interval between the second substrates is the first interval;
A bonding step in which the second substrates are pushed up from the support bases and bonded to the first substrates held above the second substrates,
The upper surface of the support table is smaller than the installation surface of the second substrate on the support table,
The installation position is a fixed position outside the first region.

In other words, when the second substrate is installed, the second substrates are installed one by one on the support base at a fixed position different from the position at the time of bonding, and the second substrates collide with each other. Therefore, it is possible to eliminate the problem caused by the deviation. In addition, since the operating area for conveyance for installation is narrowed, it is possible to increase the accuracy of the installation position of the second substrate with respect to the support base.

Then, after the installation, each support base is moved so that the intervals between the second substrates are the same as the first interval. It is possible to arrange them at one interval. In other words, since the placement of the second substrate can be adjusted with high accuracy after installation, the position of the second substrate can be corrected by the support stand even if the placement shift occurs during installation.

Moreover, in order to solve the above-mentioned problem, the bonding method of the present invention
A bonding method for bonding a plurality of second substrates smaller than the first substrate on the first substrate,
At a position different from the position for bonding, each of the plurality of second substrates is moved more independently than the bonding surface of each of the plurality of support bases that can be moved independently of the second substrate to the first substrate. An installation process to install on a small upper surface;
An arrangement step of moving each support base on which the second substrate is installed and arranging it at a position for bonding;
A bonding step in which the second substrates are pushed up from the support bases and bonded to the first substrate held above the second substrates.

In other words, when the second substrate is installed, the second substrate is arranged on the support base at a position different from the bonding position, for example, at a position where the previously installed second substrate is sufficiently away. Thus, it is possible to eliminate a problem caused by a shift in conveyance at the time of installation such as collision between the second substrates.

Then, after the installation, each support base is moved and arranged at a position for bonding, so that each second board is packed and arranged regardless of the installation position of the second board with respect to the support base (presence of installation deviation). It becomes possible to make it. In other words, since the placement of the second substrate can be adjusted with high accuracy after installation, the position of the second substrate can be corrected by the support stand even if the placement shift occurs during installation.

Therefore, the interval between the second substrates can be made as close as possible. Therefore, at the time of bonding the second substrate, the interval between the second substrates can be set to a minimum interval instead of the interval considering the margin of the transfer system as in the prior art.

As described above, in the method for manufacturing a semiconductor device according to the present invention, after the second substrate is installed on the support base at a position different from that at the time of bonding, the support base is moved and disposed at the position for bonding. is doing. Therefore, the gap between the second substrates joined to the first substrate can be made smaller than before, and the use efficiency of the first substrate can be improved.

It is a figure which shows the structure of the SOI substrate which is one Embodiment of this invention, (a) is a planar view, (b) is a side view. 3 is a flowchart illustrating a joining method according to the first embodiment. It is a figure which shows one structural example of the stage which is a jig | tool for semiconductor substrates. It is a figure which shows arrangement | positioning of the stage in a joining process, (a) * (b) shows the position for installation (plan view and side view), (c) * (d) is the position for transfer (plan view and side view) ). It is a figure which shows a mode when each stage is each arrange | positioned in the position for installation, (a) is a planar view, (b) is a side view. It is a figure which shows a mode that a semiconductor substrate is each installed in each stage, (a) is a planar view, (b) is a side view. It is a figure which shows a mode that each stage with which the semiconductor substrate was installed is moved and arrange | positioned in the position for transcription | transfer, respectively, (a) is a planar view, (b) is a side view. It is a figure which shows a mode that an insulating substrate is arrange | positioned above a semiconductor substrate, (a) is planar view, (b) is a side view. It is a figure which shows a mode when the pin of each stage is raised. It is a figure which shows a mode when each semiconductor substrate is bonded together to an insulating substrate. (A) * (b) is a figure which shows the effect by the joining method of Example 1. FIG. 5 is a flowchart showing a joining method of Example 2. It is a figure which shows the other structural example of the stage which is a jig | tool for semiconductor substrates. It is a figure which shows a mode that each stage in which the semiconductor substrate was installed is moved, and each is arrange | positioned in the position for transcription | transfer. (A) * (b) is a figure which shows a mode that fine adjustment is performed. It is a figure which shows a mode when the shift | offset | difference of the rotation direction has arisen in the semiconductor substrate at the time of installation. It is a figure which shows a mode when the thickness of each semiconductor substrate differs at the time of bonding. It is a figure which shows a mode when an insulating board | substrate is not flat at the time of bonding. 10 is a flowchart showing a joining method of Example 3. It is a figure which shows the mode of conveyance and installation of Example 1-2. It is a figure which shows the mode of conveyance of the Example 3, installation, and a movement. (A) * (b) is a figure which shows the effect by an example of the joining method of Example 3. FIG. It is a figure which shows the effect by an example of the joining method of Example 3. 10 is a flowchart showing a joining method of Example 4. It is a figure which shows the mode of conveyance of the Example 4, installation, and a movement. It is a figure which shows an example of a mode that it is moved to the predetermined position using the stage provided with the distance measurement function, (a) is a side view, (b) is a plan view. It is a figure which shows the other example of a mode that it is moving to the predetermined position using the stage provided with the distance measurement function, (a) is a side view, (b) is a planar view. (A) to (C) are diagrams showing a conventional SOI substrate manufacturing process. FIGS. 29A and 29B are views showing a configuration of a first substrate support used in the manufacturing process of the SOI substrate of FIG. It is a figure which shows the mode of conveyance and installation of the manufacturing process of the SOI substrate of FIG. It is a figure which shows a mode when there is no margin between semiconductor substrates at the time of conveyance and installation. It is a figure which shows the structure of the conventional SOI substrate.

An embodiment of the present invention will be described below with reference to the drawings. In this embodiment, a method for manufacturing an SOI substrate used as an active matrix substrate of a liquid crystal display device, particularly a method for bonding a plurality of semiconductor substrates to an insulating substrate will be described. However, the bonding method according to the present embodiment is not limited to the SOI substrate, but can be applied to a semiconductor device having a structure in which a plurality of small substrates (second substrates) are bonded to a large substrate (first substrate). For example, in organic EL, MEMS, and the like, it can be applied to a process of bonding glass or a metal cap for protecting an element from moisture or the like to a glass substrate on which the element is formed.

(Configuration of SOI substrate)
FIGS. 1A and 1B are diagrams showing a configuration example of an SOI substrate 100, where FIG. 1A is a plan view and FIG. 1B is a side view. As shown in FIG. 1, the SOI substrate 100 (semiconductor device) includes one insulating substrate 101 (first substrate) and a plurality of semiconductor substrates 102 (second substrates).

The insulating substrate 101 is, for example, a glass substrate. The insulating substrate 101 has a rectangular shape in plan view, and the front surface and the back surface have a large area. The large area is, for example, an area that is larger than the display unit of the liquid crystal display device and is large enough to be incorporated in the housing of the liquid crystal display device.

The semiconductor substrate 102 is, for example, a single crystal silicon wafer. The semiconductor substrate 102 has a rectangular shape in plan view, and the front surface and the back surface have a small area. The small area is an area several times smaller than the surface of the insulating substrate 101.

The SOI substrate 100 has a structure in which a plurality of semiconductor substrates 102 are bonded to the surface of an insulating substrate 101. The plurality of semiconductor substrates 102 are arranged in a tile shape (matrix shape). Note that FIG. 1 illustrates a configuration in which nine semiconductor substrates 102 are bonded in a 3 × 3 matrix arrangement, but the number of semiconductor substrates 102 to be bonded is the number of insulating substrates 101, semiconductor substrates 102, and the like. It is determined according to the size of the, and is not limited to nine. In addition, the shape of the insulating substrate 101 is not limited to a rectangle, and the shape of the semiconductor substrate 102 may be any shape as long as a gap is not easily formed.

Here, what should be noted is the bonding process (bonding method, particularly bonding method) of the plurality of semiconductor substrates 102 to the insulating substrate 101 included in the manufacturing process of the SOI substrate 100. Therefore, below, the detail of a joining process is demonstrated. The SOI substrate 100 may have a conventional general configuration as the SOI substrate 100 in addition to the above-described configuration, and the manufacturing process of the SOI substrate 100 includes a conventional general process in addition to the bonding process. Although it may be provided, it is omitted for convenience of explanation.

In the following description of each embodiment, differences from the other embodiments will be mainly described, and the same reference numerals are given to components having the same functions as the respective components described in the other embodiments. The description is omitted as appropriate.

(Example 1)
FIG. 2 is a flowchart illustrating the bonding method according to the first embodiment. The joining method of the present embodiment includes steps S11 to S15 shown in FIG. 2, and a joining jig is used in the implementation of these steps.

(1-1) Configuration of Jig As the jig, at least a jig for a semiconductor substrate and a jig for an insulating substrate are used.

FIG. 3 is a diagram illustrating a configuration example of a stage 200 that is a jig for a semiconductor substrate. As shown in FIG. 3, the stage 200 protrudes from the lower table 201, the support column 202 provided on the upper surface of the lower table 201, the installation table 203 (support table) supported by the support column 202, and the upper surface of the lower table 201. A pin 204 and a moving unit 205 provided on the lower surface of the lower base 201 are provided.

The installation table 203 is a table on which the semiconductor substrate 102 is installed. The installation table 203 has a rectangular shape in plan view, and the front surface (upper surface) and the back surface thereof are smaller than the back surface (installation surface on the installation table 203) of the semiconductor substrate 102 to be installed. . The support column 202 is disposed at the center of the upper surface of the lower base 201. Four pins 204 are provided, and are arranged at four corners around the column 202 on the upper surface of the lower base 201. The pin 204 is configured to be able to rise and fall. The installation base 203 is formed with an opening (not shown) through which the raised pin 204 can pass. The pin 204 has a length such that the tip is positioned below the installation table 203 when the lowering is completed, and the tip is positioned above the installation table 203 when the lifting is completed. The stage 200 can be moved by the moving unit 205.

The holding table, which is a jig for the insulating substrate, is a table for holding the insulating substrate 101 in a downward state as shown in FIG. The holding table may have any shape and holding mechanism as long as the insulating substrate 101 can be held when the semiconductor substrate 102 is bonded to the insulating substrate 101.

(1-2) Stage Arrangement In the joining step, the stage 200 is particularly arranged so as to be positioned at the “installation position” and the “transfer position”. FIGS. 4A and 4B are diagrams showing the arrangement of the stage 200 in the joining process, where FIGS. 4A and 4B show installation positions (plan view and side view), and FIGS. (Plan view and side view).

The installation position is a position when the semiconductor substrate 102 is installed on the installation table 203 of the stage 200. In the installation position, the stages 200 are arranged in a matrix (here, 3 × 3) and are separated from each other. Specifically, each stage 200 is arranged such that the distance between the semiconductor substrate 102 and another semiconductor substrate 102 adjacent to the semiconductor substrate 102 when the installation is completed is a (second interval).

The transfer position is a position when the semiconductor substrate 102 is bonded to the insulating substrate 101. At the transfer position, each stage 200 has a matrix shape (3 × 3 in this case), and the interval between the semiconductor substrate 102 and another semiconductor substrate 102 adjacent to the semiconductor substrate 102 is b (first interval). It is arranged to be.

Interval a is a value sufficiently larger than interval b. The interval a is determined in consideration of the deviation of the transport system from the assumption that the semiconductor substrate 102 is accurately arranged on the installation base 203 of the stage 200. The interval b is a very small value. The semiconductor substrates 102 adjacent to each other at the interval b at the transfer position are close to each other (closely close to each other).

(1-3) Joining Method The joining method of Example 1 will be specifically described.

First, as shown in FIG. 5, each stage 200 is arranged at an installation position (step S11 in FIG. 2). For example, each stage 200 can be moved according to a command from a control device (not shown) so that it can be placed at the installation position.

Subsequently, as shown in FIG. 6, the semiconductor substrate 102 is installed on the upper surface of the installation table 203 of each stage 200 (step S12 in FIG. 2). Specifically, using the transfer robot 210, one semiconductor substrate 102 is transferred toward the corresponding stage 200, and installed on the upper surface of the installation table 203 of the stage 200, one by one. The transfer robot 210 has an arm for mounting and transferring the semiconductor substrate 102. In this installation, it is preferable to install the semiconductor substrate 102 in order from the stage 200 far from the installation position of the transfer robot 210, that is, the stage 200 in the back. Thereby, the semiconductor substrate 102 is installed in all nine stages.

Note that the pins 204 of the stage 200 may be located below the upper surface of the installation table 203 after the semiconductor substrate 102 is installed, and may be in any position before the semiconductor substrate 102 is installed.

Subsequently, as shown in FIG. 7, each stage 200 on which the semiconductor substrate 102 is installed is moved and placed at the transfer position (step S13 in FIG. 2). Specifically, each stage 200 other than the stage 200 located at the center is moved so as to gather on the stage 200 located at the center, and each stage 200 is arranged at the transfer position. In addition, although the movement which gathers to said center is efficient, not only this but the transfer position (the space | interval of each semiconductor substrate 102 should just become a space | interval b).

Subsequently, as shown in FIG. 8, the insulating substrate 101 is disposed above the semiconductor substrate 102 (step S14 in FIG. 2). Specifically, first, the insulating substrate 101 is placed and held on the holding table 220 such that the surface (bonding surface) of the insulating substrate 101 faces away from the holding table 220. Then, the holding table 220 is moved to a position above the semiconductor substrate 102 and overlapping with all the semiconductor substrates 102 with the insulating substrate 101 facing downward. Thereby, the insulating substrate 101 is disposed above the semiconductor substrate 102.

Subsequently, each semiconductor substrate 102 is bonded to the insulating substrate 101 (step S15 in FIG. 2). Specifically, first, as shown in FIG. 9, by raising all the pins 204 of each stage 200 all at once (pushing up), each semiconductor substrate 102 is pushed up from each installation base 203 all at once, Adhere to the insulating substrate 101. For example, the pin 204 can be raised by a command from a controller (not shown). Note that “all at once” does not have to be strictly all at once, and may be slightly shifted. In addition, the amount by which the semiconductor substrate 102 is pushed up, that is, the amount by which the pin 204 is raised, is optimally set so that the semiconductor substrate 102 is in close contact with the insulating substrate 101 at the time of this pushing up. Then, after the semiconductor substrates 102 and the insulating substrate 101 are brought into close contact with each other, the pins 204 are lowered (lowered) as shown in FIG. Thereby, each semiconductor substrate 102 is bonded (bonded) to the insulating substrate 101.

In addition, the said bonding can be performed by sticking both together and it is hard to peel off. This is because the oxide film formed on the semiconductor substrate 102 and the insulating substrate 101 (glass substrate) start to join from the portion where pressure is applied by the pins 204, and the bond is spontaneously formed and covers the entire surface. Because. This bonding can be performed at room temperature without van der Waals force or hydrogen bonding and without heat treatment.

In this way, the bonding process is completed, and the insulating substrate 101 onto which the plurality of semiconductor substrates 102 are transferred can be obtained. Thereafter, post processing is appropriately performed to manufacture the SOI substrate 100.

(1-4) Effects According to the bonding method of the first embodiment, the gap between the semiconductor substrates 102 bonded to the insulating substrate 101 can be made extremely small as compared with the conventional case.

That is, conventionally, as described above with reference to FIGS. 30 and 31, since the semiconductor substrates are arranged on an integrated jig (first substrate support 551), troubles such as collision of the semiconductor substrates occur. In order to avoid this, it is necessary to secure a margin (Q in FIG. 30) in consideration of the deviation in conveyance. For this reason, a gap between the semiconductor substrates is largely formed on the insulating substrate, and the utilization efficiency of the substrate is reduced (see FIG. 32).

On the other hand, in the present embodiment, the stage 200 (installation table 203) on which the semiconductor substrate 102 is installed can move independently. Therefore, the placement of the semiconductor substrate 102 can be optimized when the semiconductor substrate 102 is installed and when the semiconductor substrate 102 is bonded.

More specifically, when the semiconductor substrate 102 is installed, the stage 200 is arranged so that the interval between the installed semiconductor substrates 102 is sufficiently larger than the interval b at the time of bonding. Even if this occurs, it is possible to eliminate a problem caused by the shift such as collision between the semiconductor substrates (see FIG. 11A). In FIG. 11A, a dotted line E indicates the outline of the semiconductor substrate 102 when correctly arranged.

Then, after the installation, each stage 200 is moved so that the intervals between the semiconductor substrates 102 are set to be the interval b, so that the semiconductor substrate 102 is installed with respect to the installation table 203 regardless of the installation position (presence or absence of installation deviation). Thus, the semiconductor substrates 102 can be arranged at intervals b (see FIG. 11B). That is, since the arrangement (interval) of the semiconductor substrate 102 can be accurately adjusted after installation, the position of the semiconductor substrate 102 can be corrected by the stage 200 even if the installation is displaced during installation.

Therefore, the interval of the semiconductor substrates 102, which is the interval b, can be brought close to the limit. Therefore, at the time of bonding the semiconductor substrate 102, it is possible to set the interval between the semiconductor substrates 102 to a minimum interval rather than the interval considering the margin of the transfer system as in the conventional case.

Therefore, in this embodiment, as is apparent from a comparison between FIG. 1A and FIG. 32, the interval between the semiconductor substrates 102 bonded to the insulating substrate 101 can be made smaller than before, and the insulating property can be reduced. The utilization efficiency of the substrate 101 can be improved. In other words, since the gap between the semiconductor substrates 102 bonded to the insulating substrate 101 can be minimized, the utilization efficiency of the insulating substrate 101 can be increased to the maximum.

In addition, conventionally, as a jig for a semiconductor substrate, an integrated jig in which a region for arranging the semiconductor substrate is determined is used, so that the jig cannot be shared by other semiconductor substrates of different sizes. When the size of the semiconductor substrate was changed according to the design, it was necessary to replace the jig itself.

On the other hand, according to the present embodiment, an independent movable jig (stage 200) is used as a jig for the semiconductor substrate. The number can be changed freely. Therefore, since a jig can be shared, it is possible to flexibly cope with changes in the size and number of semiconductor substrates 102.

(Example 2)
FIG. 12 is a flowchart illustrating the joining method according to the second embodiment. The joining method of this embodiment includes steps S21 to S26 shown in FIG. 12, and a joining jig is used in carrying out these steps.

(2-1) Jig Configuration As the jig, at least a jig for a semiconductor substrate and a jig for an insulating substrate are used. In this embodiment, the configuration of the semiconductor substrate jig is different from that in the first embodiment.

FIG. 13 is a diagram showing a configuration example of the stage 230 which is a jig for a semiconductor substrate. FIG. 13 shows a state when the semiconductor substrate 102 is installed. As shown in FIG. 13, the stage 230 protrudes from the lower base 231, the support 232 provided on the upper surface of the lower base 231, the installation base 233 (support base) supported by the support 232, and the upper surface of the lower base 231. A pin 236 and a moving part 237 provided on the lower surface of the lower base 231 are provided.

Here, as shown in FIG. 13, with respect to the movable region N in which the stage 230 can move for placement, the parallel direction is the x direction / y direction (the through direction in the drawing is the y direction), and the vertical direction Let the direction be the z direction. The xy direction is also referred to as the left-right direction, and the z direction is also referred to as the up-down direction.

The lower base 231 has a mechanism that can move a little in the xy direction with high accuracy (high precision). The moving range of the lower base 231 is narrower than the moving range of the moving unit 237 (movable region N). As a result, the position of the installation table 233, that is, the position of the semiconductor substrate 102 installed on the installation table 233 can be further finely adjusted in addition to the adjustment by the movement of the moving unit 237.

The installation base 233 includes a fixing unit 234 and an inclination adjusting unit 235. The semiconductor substrate 102 is installed on the upper surface of the inclination adjusting unit 235. The installation table 233 has a size smaller than the back surface of the semiconductor substrate 102 to be installed (installation surface to the tilt adjustment unit 235). The inclination adjusting unit 235 can change the inclination of the upper surface thereof, and thereby the inclination of the semiconductor substrate 102 installed on the installation table 233 can be adjusted.

The support column 232 is disposed at the center of the upper surface of the lower base 231. The support column 232 has a mechanism that can move up and down in the z direction and a mechanism that can rotate in the xy direction. Thereby, it is possible to adjust the height and position of the rotation direction of the semiconductor substrate 102 installed on the installation table 233.

Four pins 236 are provided, and are arranged around the columns 232 on the upper surface of the lower base 231 and at the four corners, respectively. The pin 236 is configured to be able to ascend and descend. The installation base 233 is formed with an opening (not shown) through which the raised pin 236 can pass. The pin 236 has such a length that the tip is positioned below the installation table 233 when the lowering is completed and the tip is positioned above the installation table 233 when the lifting is completed.

The moving unit 237 can move over a wide operating range (movable area N) at high speed. The stage 230 can be moved by the moving unit 237.

As described above, the stage 230 (particularly the installation table 233) has an adjustment function (position adjustment function, height adjustment function) that can adjust the installation position of the semiconductor substrate 102 installed on the installation table 233 in the 360 ° direction. , Rotation function, and tilt correction function).

(2-2) Joining Method The joining method of Example 2 will be specifically described. Note that the present embodiment is different from the first embodiment in the process of step S13 in FIG.

First, each stage 230 is arranged at an installation position (step S21 in FIG. 12). Then, the semiconductor substrate 102 is installed on the upper surface of the installation table 233 of each stage 230 (step S22 in FIG. 12). The processing so far is the same as the processing in steps S11 to S12 in FIG. Thereby, the semiconductor substrate 102 is installed in all nine stages.

Subsequently, as shown in FIG. 14, each stage 230 on which the semiconductor substrate 102 is placed is moved and placed at the transfer position (step S23 in FIG. 12). Specifically, each stage 230 other than the stage 230 located at the center is moved so as to gather on the stage 230 located at the center, and each stage 230 is arranged at the transfer position. At this time, each stage 230 places importance on high-speed movement, and does not need to be accurately positioned at the transfer position.

Subsequently, as shown in FIG. 15, fine adjustment is performed so that each stage 230 on which the semiconductor substrate 102 is placed is accurately positioned at the transfer position (step S24 in FIG. 12). Specifically, the adjustment function of each stage 230 is used to adjust the interval between the semiconductor substrates 102 from the state of being roughly arranged at the transfer position (FIG. 15A) to be the interval b. (FIG. 15B). At this time, each stage 230 places importance on precise movement and does not need to move at high speed.

Subsequently, the insulating substrate 101 is disposed above the semiconductor substrate 102 (step S25 in FIG. 12). Thereafter, each semiconductor substrate 102 is bonded to the insulating substrate 101 (step S26 in FIG. 12). The processing in steps S25 to S26 may be performed in the same manner as the processing in steps S14 to S15 in FIG. In this way, the bonding process is completed, and the insulating substrate 101 onto which the plurality of semiconductor substrates 102 are transferred can be obtained.

(2-3) Effect According to the bonding method of the second embodiment, the position of the semiconductor substrate 102 can be controlled with higher accuracy, so that the utilization efficiency of the insulating substrate 101 can be further increased.

Here, in the first embodiment, the position of the semiconductor substrate 102 is adjusted by the movement of the stage 200 in the two-dimensional plane (movement in the xy direction). However, it is desirable to improve the throughput as necessary. is there. In order to increase the throughput, it is necessary to shorten the adjustment time, and it is necessary to increase the moving speed of the stage 200. However, if it does so, position accuracy will fall. In particular, when the moving distance is long, it is difficult to obtain accuracy.

Therefore, in the second embodiment, each stage 230 includes not only a mechanism that moves a long distance but also a mechanism that can be precisely adjusted in the 360 ° direction, thereby enabling high-accuracy placement, which is referred to as the above-described low accuracy. The problem has been solved.

Also, since long-distance movement can be performed at high speed, adjustment time can be shortened. Therefore, in the second embodiment, the provision of the stage 230 makes it possible to achieve both shortening of the adjustment time and accurate control, and improve the throughput.

The stage 230 (especially the installation base 233) does not need to have all the above-mentioned adjustment functions (position adjustment function, height adjustment function, rotation function, and tilt correction function), and depends on the desired effect. It is sufficient that at least one of the adjustment functions is added.

FIG. 16 is a diagram illustrating a state in which the semiconductor substrate 102 is displaced in the rotational direction during installation. In general, when the installed semiconductor substrate 102 is displaced in the rotational direction, there is a possibility that the semiconductor substrate 102 and the semiconductor substrate 102 transported next collide with each other. On the other hand, when the rotation function (rotation mechanism of the support column 232) is added to the stage 230, the rotation shift of the semiconductor substrate 102 can be corrected by rotating the installation base 233 of the stage 230.

FIG. 17 is a diagram showing a state where the thicknesses of the semiconductor substrates 102 are different at the time of bonding. In general, when the thickness of each semiconductor substrate 102 to be bonded varies, the degree of adhesion to the insulating substrate 101 may vary, and a semiconductor substrate 102 that cannot be bonded may be generated. On the other hand, when the height adjustment function (the vertical mechanism of the support column 232) is added to the stage 230, the contact surfaces of the respective semiconductor substrates 102 can be made to have the same height and can be optimally crimped. It becomes.

FIG. 18 is a diagram illustrating a state where the insulating substrate 101 is not flat at the time of bonding. Normally, a silicon wafer that is the semiconductor substrate 102 is very flat, but a glass substrate that is the insulating substrate 101 may have an inclination or a swell. In this case, there is a possibility that the semiconductor substrate 102 cannot be attached. On the other hand, when the tilt adjustment function (tilt correction mechanism of the tilt adjusting unit 235) is added to the stage 230, the tilt of the semiconductor substrate 102 can be adjusted in accordance with the tilt of the insulating substrate 101 or the like. Thus, it is possible to suitably bond them together.

(Example 3)
FIG. 19 is a flowchart illustrating the joining method according to the third embodiment. The joining method of this embodiment includes steps S31 to S35 shown in FIG. 19, and a jig for joining is used in carrying out these steps. As this jig, the same one as in Example 1 or Example 2 may be used, and here, the same one as in Example 1 is used.

(3-1) Stage Arrangement It should be noted that in the first and second embodiments, the “installation position” and the “transfer position” are relatively close to the difference between the interval a and the interval b. In the third embodiment, there is an area (first area) where the “transfer position” is provided, and the “installation position” is provided outside this area. is there.

That is, in the first and second embodiments, as shown in FIG. 20, the “installation position” is a position where the “transfer position” is slightly enlarged, and is provided in the same region. However, according to this configuration, the operating area of the transfer robot 210 (the area including the storage portion 240 where the semiconductor substrate 102 for bonding is prepared and the installation position) must be wide to some extent. Further, the position where the semiconductor substrate 102 is placed is also different for each stage (there are a plurality of locations). For this reason, misalignment of the semiconductor substrate 102 is likely to occur, and a fine adjustment mechanism as in the second embodiment may be required.

On the other hand, in Example 3, as shown in FIG. 21, the “installation position” is outside the region where the “transfer position” is provided and is a position fixed at one place. Therefore, there is only one position where the semiconductor substrate 102 is placed, and the operating area of the transfer robot 210 is narrow.

(3-2) Joining Method The joining method of Example 3 will be specifically described.

First, at the time of installation, a plurality of stages 200 are prepared in advance in another place (second region) different from the installation position and the transfer position. When the installation is started, the stage 200 waiting in this place is sequentially sent out to the installation position (step S31 in FIG. 19).

At the installation position, the semiconductor substrate 102 is installed on the stage 200 that is sequentially sent out (step S32 in FIG. 19). Specifically, the operation of installing one semiconductor substrate 102 on the stage 200 that has reached the installation position using the transfer robot 210 is repeatedly performed. Since the installation position is fixed at one place, it can be installed with high accuracy.

After installation, the stage 200 on which the semiconductor substrate 102 is installed is moved and placed at the transfer position (step S33 in FIG. 19). Specifically, the stage 200 on which the moving semiconductor substrate 102 is placed is sequentially arranged at the transfer position.

Thus, by repeating the processing (installation movement processing) of steps S31 to S33 for all the semiconductor substrates 102 to be bonded together, the arrangement at the transfer position is completed.

Thereafter, the insulating substrate 101 is disposed above the semiconductor substrate 102 (step S34 in FIG. 19). Then, each semiconductor substrate 102 is bonded to the insulating substrate 101 (step S35 in FIG. 19). The processes in steps S34 to S35 may be performed in the same manner as the processes in steps S14 to S15 in FIG. In this way, the bonding process is completed, and the insulating substrate 101 onto which the plurality of semiconductor substrates 102 are transferred can be obtained.

(3-3) Effect According to the bonding method of the third embodiment, when the semiconductor substrate 102 is installed, the semiconductor substrate 102 is placed on the installation base 203 of the stage 200 at a fixed position different from the position at the time of bonding. Since it is installed one by one, it is possible to eliminate problems caused by deviations in conveyance such as semiconductor substrates colliding with each other. In addition, since the operation area of the transfer robot 210 (operation area for transfer for installation) is narrowed, it is possible to increase the accuracy of the installation position of the semiconductor substrate 102 with respect to the installation table 203.

Then, after the installation, each stage 200 is moved so that the intervals between the semiconductor substrates 102 are set to be the interval b, so that the semiconductor substrate 102 is installed with respect to the installation table 203 regardless of the installation position (presence or absence of installation deviation). The semiconductor substrates 102 can be arranged at intervals b. Therefore, the interval of the semiconductor substrates 102 which is the interval b can be brought close to the limit.

Therefore, in this embodiment, the interval between the semiconductor substrates 102 bonded to the insulating substrate 101 can be made smaller than before, and the utilization efficiency of the insulating substrate 101 can be improved.

In this embodiment, it is preferable to prepare the number of stages 200 with a margin. Thereby, as shown in FIGS. 22A and 22B, even if the stage 200 is left in the bonding process of the SOI substrate 100, the semiconductor substrate 102a whose size is reduced in the bonding process of another SOI substrate. When a larger number of stages 200 are required to bond the two, it is possible to flexibly cope with them.

Further, in this embodiment, as shown in FIG. 23, it is desirable to place the semiconductor substrate 102 on the surplus stage 200 and wait for the bonding process. As a result, the next processing time can be shortened, and the throughput can be improved.

In this embodiment, the plurality of transfer robots 210 may be used for parallel processing. Specifically, each of the plurality of transfer robots 210 performs installation at a corresponding installation position (fixed position), and moves the stage 200 on which the semiconductor substrate 102 is installed from each installation position to perform transfer. It can be arranged at each position. In this way, by providing a plurality of installation locations and performing the installation process in parallel, it is possible to improve the throughput.

(Example 4)
FIG. 24 is a flowchart illustrating the joining method according to the fourth embodiment. The joining method of this embodiment includes steps S41 to S46 shown in FIG. 24, and a jig for joining is used in carrying out these steps. As this jig, the same one as in Example 1 or Example 2 may be used, and here, the same one as in Example 1 is used.

(4-1) Joining Method The joining method of Example 4 will be specifically described. In this embodiment, in addition to the bonding method of the third embodiment, a process for measuring the installation position of the semiconductor substrate 102 is added.

First, the standby stage 200 is sequentially sent to the installation position (step S41 in FIG. 24), and the semiconductor substrate 102 is installed on the stage 200 that is sequentially sent out at the installation position (step in FIG. 24). (S42) After that, the stage 200 on which the semiconductor substrate 102 is placed is moved to the transfer position and placed at the transfer position (step S44 in FIG. 24).

Then, the position of the semiconductor substrate 102 with respect to the installation table 203 is measured between Step S42 and Step S44, that is, during the movement from the installation of the semiconductor substrate 102 to the stage 200 to the transfer position. Step S43 in FIG. Note that the processing in steps S41 to S42, 44 is the same as the processing in steps S31 to S33 in FIG.

Specifically, as shown in FIG. 25, a measuring device 250 is provided in the vicinity of the movement path from the installation position to the transfer position area. The measurement apparatus 250 measures the position of the semiconductor substrate 102 with respect to the installation table 203 with respect to the installation table 203 that is moving, for example, using a detection function such as a sensor. This measurement result is transmitted to a control device (not shown) for controlling the arrangement of the transfer position, and is considered for the arrangement at the transfer position. As long as the measurement device 250 can perform the measurement, the configuration thereof and the position on the movement route are not limited.

In this way, by repeatedly performing the processing of steps S41 to S44 (installation movement processing) for all the semiconductor substrates 102 to be bonded together, it is possible to arrange the transfer positions with higher accuracy.

Subsequently, after the insulating substrate 101 is disposed above the semiconductor substrate 102 (step S45 in FIG. 24), each semiconductor substrate 102 is bonded to the insulating substrate 101 (step S46 in FIG. 24). The processes in steps S45 to S46 may be performed in the same manner as the processes in steps S14 to S15 in FIG. In this way, the bonding process is completed, and the insulating substrate 101 onto which the plurality of semiconductor substrates 102 are transferred can be obtained.

(4-2) Effects According to the bonding method of the fourth embodiment, the position of the semiconductor substrate 102 with respect to the installation table 203 is measured, and the measurement result is taken into consideration, and the transfer position is further arranged. Arrangement accuracy can be increased.

(Stage distance measurement function)
As described above, the bonding methods of Examples 1 to 4 are characterized in that the arrangement of the semiconductor substrate 102 can be optimized when the semiconductor substrate 102 is installed and when the semiconductor substrate 102 is bonded. .

Here, the means for detecting the distance to the adjacent semiconductor substrate 102 is not particularly limited, and an optimum means / configuration can be adopted. For example, the distance from the object adjacent to the stage 200 (stage 230) can be taken. By providing a distance measuring function capable of measuring the distance, it is possible to realize a configuration for detecting the distance to the adjacent semiconductor substrate 102.

FIG. 26 is a diagram illustrating an example of a state in which the stage 200 including the detection unit 261 for measuring the position of the adjacent semiconductor substrate 102 is moved to a predetermined position, and FIG. View (b) is a plan view.

The stage 200 includes a horizontal plate 260 and a detection unit 261. The horizontal plate 260 is provided on each of the four side surfaces of the lower base 201, and the horizontal plate 260 on each side surface is disposed at one end of the side surface in the left-right direction. The horizontal plate 260 has a length that exceeds the outline of the semiconductor substrate 102 in plan view. The detection unit 261 is provided on the upper surface of each horizontal plate 260, and the detection unit 261 on each upper surface is disposed at a position so as not to overlap with the installed semiconductor substrate 102. The detection unit 261 detects a distance from an adjacent object, and includes, for example, an optical sensor. By detecting the distance to an adjacent object, the presence or absence of a nearby object can be detected.

When two stages 200 approach each other as shown in FIG. 26 in a period (for example, step S13 in FIG. 2) in which each stage 200 on which the semiconductor substrate 102 is installed is moved and placed at the transfer position, each stage is moved. The semiconductor substrate 102 installed on the opposite stage 200 approaches the detection unit 261 of 200. Thereby, the edge part of the adjacent semiconductor substrate 102 can be detected by the detection part 261, and a board | substrate space | interval can be calculated | required from this detection result (arrow F).

However, as described above, the method of directly detecting the adjacent semiconductor substrate 102 has good accuracy, but the structure is slightly complicated. Therefore, as in the fourth embodiment, when the installation deviation is found by measuring the position of the semiconductor substrate 102 with respect to the installation table 203 in advance by the measurement device 250, the difference between the adjacent stage 200 and the adjacent stage 200 is determined. By measuring the distance, the distance between the semiconductor substrates 102 can be optimized.

FIG. 27 is a diagram illustrating an example of a state in which the stage 200 including the detection unit 262 for measuring the position of the adjacent stage 200 is moved to a predetermined position, and (a) is a side view. , (B) is a plan view.

The stage 200 includes a detection unit 262. The detection unit 262 is provided on each of two continuous side surfaces of the lower base 201, and the detection unit 262 on each side surface is disposed on one end side in the left-right direction of the side surface. The detection unit 261 detects a distance from an adjacent object, and includes, for example, an optical sensor.

In the period (for example, step S44 in FIG. 24) in which each stage 200 on which the semiconductor substrate 102 is placed is moved and placed at the transfer position (see, for example, step S44 in FIG. 24), as shown in FIG. On the other hand, the distance to the adjacent stage 200 can be measured by the detection unit 262 of each stage 200 (arrow G). Therefore, the distance between the semiconductor substrates 102 can be optimized by reducing the distance between the stages in consideration of the information on the installation deviation acquired in advance. According to this configuration, it is only necessary to measure the distance to the adjacent stage 200, and the structure of the stage 200 can be simplified and the number of detection units 262 can be reduced.

In the semiconductor device manufacturing method according to the present embodiment, the first substrate may be an insulating substrate, and the second substrate may be a semiconductor substrate.

Further, in the method of manufacturing a semiconductor device according to the present embodiment, the first substrate can be a glass substrate, and the second substrate can be a single crystal silicon wafer.

Further, in the method of manufacturing a semiconductor device according to the present embodiment, the support base is provided with a position adjustment function capable of moving in a narrower moving range with higher accuracy than the movement in the second arrangement step, ascending and At least one of a height adjustment function capable of descending, a rotation function capable of rotating in the left-right direction, and an inclination adjustment function capable of changing the inclination of the upper surface of the support base is added. It is preferable that

According to the above configuration, since the position of the second substrate can be controlled with higher accuracy, the utilization efficiency of the first substrate can be further increased. Further, the final fine adjustment is performed by the above function, so that the movement of the support base can be performed at a high speed, and the adjustment time can be shortened. Thus, throughput can be improved.

Further, in the method for manufacturing a semiconductor device according to the present embodiment, it is preferable that the support base has a distance measuring function capable of measuring a distance from an adjacent object.

In the method for manufacturing a semiconductor device according to the present embodiment, the first substrate may be an insulating substrate, and the second substrate may be a semiconductor substrate.

Further, in the method of manufacturing a semiconductor device according to the present embodiment, the support base on which the second substrate is installed at the installation position is the first outside the first region before the second substrate is installed. It is preferable to wait in two areas and to sequentially send out the second substrate to the installation position when the second substrate is installed.

Further, in the method of manufacturing a semiconductor device according to the present embodiment, at least the number of the second substrates to be bonded to the first substrate is provided in the second region when the installation / placement process is started. It is preferable that the stand is waiting.

Further, in the method for manufacturing a semiconductor device according to the present embodiment, in the installation and placement step, the support table is moved during the period from the installation of the second substrate to the support table until reaching the first region. It is preferable to measure the position of the second substrate with respect to and to arrange the first substrate in consideration of the measurement result.

According to the above configuration, it is possible to further increase the placement accuracy by performing the placement in the first region in consideration of the result of measuring the position of the second substrate with respect to the support base.

Further, in the method of manufacturing a semiconductor device according to the present embodiment, the support base is provided with a position adjustment function capable of moving in a narrower moving range with higher accuracy than the movement in the installation movement process, and ascending and descending. At least one of a height adjustment function that can be performed, a rotation function that can be rotated in the left-right direction, and an inclination adjustment function that can change the inclination of the upper surface of the support base is added. It is preferable.

The present invention is not limited to the above-described embodiments and examples, and various modifications can be made within the scope shown in the claims, and obtained by appropriately combining technical means disclosed in different examples. Such embodiments are also included in the technical scope of the present invention.

The present invention can be suitably used in the field relating to a method for manufacturing a semiconductor device such as an SOI substrate, which has a structure in which a plurality of small substrates are bonded to a large substrate. Further, the present invention can also be applied to a method in which a large number of small substrates and covers are attached to a large substrate on which elements are formed, such as organic EL and MEMS.

100 SOI substrate (semiconductor device)
101 Insulating substrate (first substrate)
102 Semiconductor substrate (second substrate)
200 stage 203 installation stand (support stand)
220 Holding stand 230 Stage 233 Installation stand (support stand)
250 measuring device

Claims

A method for manufacturing a semiconductor device comprising a first substrate and a second substrate smaller than the first substrate, wherein the plurality of second substrates are joined to the first substrate,
A bonding step of bonding the plurality of second substrates on the first substrate;
The joining process
A first arrangement step of arranging a plurality of independently movable support bases apart from each other;
An installation step of installing a second substrate on the upper surface of each support;
A second disposing step of disposing each support base by moving each support base on which the second substrate is disposed so that the distance between the second substrates is the first distance;
A bonding step in which the second substrates are pushed up from the support bases and bonded to the first substrates held above the second substrates,
The upper surface of the support table is smaller than the installation surface of the second substrate on the support table,
In the first arrangement step, the plurality of support bases are arranged such that the interval between the second substrates when the installation step is completed is a second interval larger than the first interval. A method for manufacturing a semiconductor device.
2. The method of manufacturing a semiconductor device according to claim 1, wherein the first substrate is an insulating substrate and the second substrate is a semiconductor substrate.
2. The method of manufacturing a semiconductor device according to claim 1, wherein the first substrate is a glass substrate, and the second substrate is a single crystal silicon wafer.
The support base has a position adjustment function capable of moving in a narrower movement range with higher accuracy than the movement in the second arrangement step, a height adjustment function capable of moving up and down, and rotating in the left-right direction. The rotation function that can be performed and the tilt adjustment function that can change the tilt of the upper surface of the support base are added with at least one function. A method for manufacturing a semiconductor device according to claim 1.
5. The method of manufacturing a semiconductor device according to claim 1, wherein the support base has a distance measuring function capable of measuring a distance to an adjacent object.
A method for manufacturing a semiconductor device comprising a first substrate and a second substrate smaller than the first substrate, wherein the plurality of second substrates are joined to the first substrate,
A bonding step of bonding the plurality of second substrates on the first substrate;
The joining process
After installing the second substrate on the upper surface of the support table that can be moved independently at the installation position, the installation movement process for moving the support table on which the second substrate is installed to the first region is repeated a plurality of times, An installation arrangement step of arranging each support on which the second substrate is installed in the first region such that the interval between the second substrates is the first interval;
A bonding step in which the second substrates are pushed up from the support bases and bonded to the first substrates held above the second substrates,
The upper surface of the support table is smaller than the installation surface of the second substrate on the support table,
The method for manufacturing a semiconductor device, wherein the installation position is a fixed position outside the first region.
The method of manufacturing a semiconductor device according to claim 6, wherein the first substrate is an insulating substrate, and the second substrate is a semiconductor substrate.
The method of manufacturing a semiconductor device according to claim 6, wherein the first substrate is a glass substrate, and the second substrate is a single crystal silicon wafer.
The support base on which the second substrate is installed at the installation position stands by in a second region outside the first region before the second substrate is installed. 9. The method of manufacturing a semiconductor device according to claim 6, wherein the semiconductor device is sequentially sent to the installation position.
The number of the support bases at least equal to the number of the second substrates to be bonded to the first substrate is waiting in the second region when the installation and placement process is started. The manufacturing method of the semiconductor device of description.
In the installation / arrangement step, the position of the second substrate relative to the support base is measured during the movement from the installation of the second substrate on the support base to the arrival of the first region. 11. The method for manufacturing a semiconductor device according to claim 6, wherein the arrangement in the first region is performed in consideration of the above.
The support base has a position adjustment function capable of moving within a narrower movement range with higher accuracy than the movement in the installation movement process, a height adjustment function capable of moving up and down, and rotating in the left-right direction. 12. A rotation function capable of rotating, and a tilt adjustment function capable of changing a tilt of the upper surface of the support base, wherein at least one function is added. 2. A method for manufacturing a semiconductor device according to item 1.
13. The method of manufacturing a semiconductor device according to claim 6, wherein the support base has a distance measuring function capable of measuring a distance from an adjacent object.
A bonding method for bonding a plurality of second substrates smaller than the first substrate on the first substrate,
At a position different from the position for bonding, each of the plurality of second substrates is moved more independently than the bonding surface of each of the plurality of support bases that can be moved independently of the second substrate to the first substrate. An installation process to install on a small upper surface;
An arrangement step of moving each support base on which the second substrate is installed and arranging it at a position for bonding;
And a bonding step of pressing each of the second substrates up from each of the support bases and bonding the second substrate to the first substrate held above each of the second substrates.