WO2012174949A1

WO2012174949A1 - Deep ultraviolet semiconductor light emitting device

Info

Publication number: WO2012174949A1
Application number: PCT/CN2012/075070
Authority: WO
Inventors: 陈文欣; 钟志白; 梁兆煊
Original assignee: 厦门市三安光电科技有限公司
Priority date: 2011-06-20
Filing date: 2012-05-04
Publication date: 2012-12-27
Also published as: CN102222760A; CN102222760B

Abstract

Disclosed is a deep ultraviolet semiconductor light emitting device, comprising a heat dissipation substrate having an electrically conductive channel; a light emitting epitaxial structure, formed of an n-type semiconductor layer, a light emitting layer, a p-type semiconductor layer in sequence, and having two main surfaces being a light output surface on one side and a non light output surface on the other side; a semiconductor covering layer having a dim light channel and formed at the non light output surface side of the light emitting epitaxial structure. A reflective layer is formed on the semiconductor covering layer. The substrate is connected to the reflective layer. In the present invention, the light emitting epitaxial structure is connected to the heat dissipation substrate having the electrically conductive channel, thereby effectively solving the heat dissipation problem thereof. The covering layer, away from the light output surface side, of the light emitting epitaxial structure has the dim light channel, and in conjunction with the reflective layer, most of the light produced by the light emitter is output through the optical mechanical support structure side, so as to prevent the covering layer p-GaN from absorbing the ultraviolet light, thereby increasing the light output efficiency.

Description

Deep ultraviolet semiconductor light emitting device

The present application claims priority to Chinese Patent Application No. 201110165297.3, entitled "A Deep Ultraviolet Semiconductor Light Emitting Device", which is incorporated herein by reference. .

Technical field

The present invention relates to a semiconductor light emitting device, and more particularly to a deep ultraviolet semiconductor light emitting device having an emission wavelength of 100 nm to 315 nm.

Background technique

The UV coverage range is from 100nm to 400nm. Generally, the UVA wavelength range is 400-315 nm; the UVB wavelength range is 315-280 nm; and the UVC wavelength range is 280-100 nm. Compared to fluorescent luminescence and gas discharge luminescence, the illuminating method of the illuminating diode can be more efficient.

Ultraviolet light-emitting diodes emit light in the ultraviolet range (from 100 to 400 nm), but at actual wavelengths below 365 nm, the luminous efficiency is very limited. At 365 nm, the luminous efficiency is 5 to 8%, and at 395 nm, the wavelength is close to 20%. The longer wavelength ultraviolet light is better. These UV-emitting diodes have been used in UV-curable materials, photocatalytic air purifiers, counterfeit identification, phototherapy, white LEDs and solar machines. In the current state of the art, the light intensity of the ultraviolet diode has been close to 3000 mW/cm2 (30 kW/m2). With the development of advanced photoinitiators and resin synthesis formulations, UV light-emitting diodes will be expanded to be used in the development of cured materials. At the same time, UVC has bactericidal ultraviolet light, which can be effectively applied to disinfection and sterilization, purified water, and medical applications. Therefore, the development of ultraviolet light-emitting diode light flux technology has a great impact on the future application of ultraviolet light-emitting diodes.

Generally, ultraviolet light emitting diodes have multiple layers of different material structures. The choice of material and thickness affects the wavelength of the LED. In order to improve the light extraction efficiency, these multilayer structures are selected with different chemical composition to promote the independent entry of photocarriers into the composite region (generally a quantum well). The quantum well is doped with a donor atom to increase the concentration of electrons (N-type layer), and the other side is doped with a acceptor atom to increase the concentration of the void (P-type layer:). The ultraviolet light emitting diode includes an electronic contact structure, and different electrode structures can be connected to the power source according to the properties of different devices, and the power source can supply current to the device through the contact structure. The contact structure injects current into the light-emitting region along the surface of the device and converts it into light. A conductive material can be used as the contact structure on the surface of the ultraviolet light emitting diode, but these structures block the emission of light and reduce the luminous flux.

As shown in FIG. 1, a prior art illuminator chip structure is listed, including a single crystal substrate.

120, doped N-type semiconductor layer 101, luminescent layer 102, doped P-type semiconductor layer 103 and a cap layer 104 are used to prepare low resistivity contacts. In these chip structures, the surface epitaxial overlay p-GaN layer absorbs ultraviolet light generated from the illuminator, especially at a wavelength of 280 to 100 nm. Due to the high resistance, the high-current driving, the ultraviolet light-emitting diode has poor heat dissipation, which affects the performance of the device.

Summary of the invention

In view of the above problems in the prior art, the present invention provides a deep ultraviolet semiconductor light emitting device.

The technical solution of the present invention to solve the above problems is as follows: A deep ultraviolet semiconductor light emitting device comprising: a heat dissipating substrate with a conductive path; and an illuminating epitaxial structure, which in turn is composed of an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer, There are two main surfaces, one side is a light-emitting surface, and the other side is a non-light-emitting surface; a semiconductor coating layer with a micro-light channel is formed on the non-light-emitting surface side of the light-emitting epitaxial structure; and a reflective layer is formed on the semiconductor coating layer The substrate is connected to the reflective layer.

Preferably, the light-emitting layer of the present invention produces light having a wavelength of from 100 nm to 315 nm.

Preferably, the area of the micro-optical channel on the semiconductor cover layer of the present invention is less than 80% of the surface area of the cover layer.

Preferably, there is a metal structure between the substrate and the reflective layer of the present invention.

Preferably, the metal structure comprises: an ohmic metal contact layer and a bonding layer.

Preferably, the bonding layer is composed of a conductive material, and the resistivity of the material is ι.ο χ 10· ⁸ ~1.0 χ

10 ^-4 Ω·ηι.

Preferably, the material of the reflective layer is selected from the group consisting of Al, Ag, Pt or Au.

Preferably, the reflective layer has a thickness of 50 to 1000 nm. The invention connects the light-emitting epitaxial structure to the heat-dissipating substrate with the conductive channel, and effectively solves the heat-dissipation problem, and the cover layer of the light-emitting epitaxial structure away from the light-emitting surface has a micro-light channel, plus a reflective layer, the light-emitting body generates Most of the light is output from one side of the optomechanical support structure, which avoids the absorption of ultraviolet rays by the cover layer p-GaN, which effectively improves the light extraction efficiency.

DRAWINGS

The drawings are intended to provide a further understanding of the invention, and are intended to be a part of the description of the invention.

1 is a schematic structural view of a prior art semiconductor light emitting device.

2 is a schematic view of a semiconductor light emitting device of the present invention.

3 is a schematic view showing the path of the light emitting direction of the semiconductor light emitting device of the present invention.

4 to 9 are schematic cross-sectional views showing the manufacturing process of the semiconductor light-emitting device of the invention.

The figures are: luminescent epitaxial structure 100, n-type semiconductor contact layer 101, luminescent layer 102, p semiconductor contact layer 103, p-type semiconductor cap layer 104, micro-light channel 105, metal structure 110, metal reflective layer 111, ohm Metal contact layer 112, bonding layer 113, single crystal substrate 120, heat dissipation substrate 200, via 201, conductive via 202.

detailed description

Embodiments of the present invention will be described in detail below with reference to the drawings and embodiments. It should be noted that all fall within the scope of protection of the present invention.

In the present invention, any one of the two sides of the n-type semiconductor layer and the p-type semiconductor layer may be a light-emitting surface in the light-emitting epitaxial structure. In the following embodiments, the side of the n-type semiconductor layer is used as the light-emitting surface, because the P-type layer is taken. The principle that the side is the light-emitting surface and the side of the n-type layer is basically the same, and therefore the description will not be repeated.

Embodiment 1:

As shown in FIG. 2, a deep ultraviolet semiconductor light emitting device includes: a heat dissipation substrate 200, a metal structure 110, a reflective layer 111, and an illuminating epitaxial structure 100.

The heat dissipation substrate 200 is used for supporting the light-emitting epitaxial structure, and is composed of a material having good thermal conductivity, and can be a ceramic or a silicon wafer, and a series of through holes 201 are provided thereon, and the total area of the substrate is the largest considering the stress tolerance of the substrate. It is better than 60% of the total area of the pedestal substrate, and about 40% here. A conductive material is filled in the via hole to form a conductive via 202 for transferring current into the light emitting epitaxial structure to emit light with the excitation light emitting layer.

The metal structure 110 is composed of an ohmic metal contact layer 112 and a bonding layer 113. The towel bonding layer 113 is composed of a conductive material having a resistivity of 1.0 X 10 ^-8 to 1.0 X 1 (Τ ⁴ Ω·ηι, a melting point of 200 ° C or more; the contact layer 112 is composed of a conductive material, the material The resistivity is between 1.0 X 10- ⁸ and 1.0 X 10" ⁴ Ω. ηι, and the material can be selected from Au, Ag, Cu, Al, Pt.

The metal reflective layer 111 is located between the metal structure 110 and the light-emitting epitaxial structure 100 and is connected to the ohmic metal contact layer 112. The material of the metal reflective layer 111 is preferably NiAu, having a thickness of 50 to 1000 nm, and may be made of an alloy including Al, Ag, Ni, Au, Cu, Pd, and Rh.

The light emitting epitaxial structure 100 includes an n-type semiconductor contact layer 101 (such as n-Al _x Ga^M), a light emitting layer

102 (if

It may be a multiple quantum well or a single quantum well structure), a p semiconductor contact layer 103 (e.g., p-Al _x Ga _{1 → c} N), a p-type semiconductor cap layer 104 (p-GaN). Wherein, the p-type semiconductor cap layer 104 is provided with a series of low-light channels 105, and the area thereof preferably does not exceed 80% of the total area. The micro-light channel 105 is prepared on the surface of the P-type layer to enhance the amount of light transmission to reach the surface of the reflective layer, and reflect the light to effectively improve the luminosity. In order to enhance the light extraction efficiency, the surface of the n-type semiconductor contact layer 101 on the light-emitting side may be subjected to a brightness enhancement process.

As shown in FIG. 3, the light emitting device turns on an external current through the conductive path 202 of the substrate 200, and the light emitting layer 102 emits light under the excitation of current. The direct light directly passes through the n-layer type 101, and is directly emitted through the surface light-increasing structure. The reflected light passes through the micro-light channel 105 of the p-type semiconductor layer cover layer 104, and is reflected by the metal reflective layer 111 to be emitted to the light-emitting direction. The absorption of ultraviolet light by the p-type semiconductor layer cap layer 104 is effectively reduced, and the light extraction efficiency is improved.

Embodiment 2:

The embodiment is the process for manufacturing the deep ultraviolet semiconductor light-emitting device according to the first embodiment, comprising: a substrate stripping method, a method for preparing the illuminant structure to be transferred to a highly thermally conductive pedestal substrate with a conductive path, and a P layer A method of preparing a micro-light channel.

The P-layer micro-light channel can be implemented by dry etching or chemical wet etching. In both technologies, photoresist can be used for protection. Using a photolithographic method to form the desired pattern, and then etching out the desired pattern After removing the photoresist and the protective layer, each layer of the metal reflective film layer is first formed on the surface of the P, and the highly reflective metal material may be Al, Pt, Ag, etc., and then an ohmic contact metal structure is prepared. The total coverage area of the micro-light channel does not affect the conductivity of the P layer, and does not exceed 80% of the total area. The P-layer micro-optical channel can greatly improve the luminous efficiency.

A susceptor substrate with conductive material filled apertures can be implemented in a number of different ways. Laser or mechanical holes can be used to inject conductive materials such as gold, copper and nickel. After the eutectic alloy layer is formed on the surface of the susceptor substrate, the susceptor substrate with the conductive material filled pores and the eutectic alloy is bonded to the metal layer on the P layer. The eutectic metal may be a eutectic alloy such as AuSn or AgSn, which is characterized in that a molten state is formed between the pedestal substrate and the P-layer metal at a lower temperature to form a void-free bond.

The details will be described below with reference to Figs. 4 to 9 .

First, an n-type semiconductor contact layer 101, a light-emitting layer 102, a p-layer semiconductor contact layer 103, and a p-type semiconductor cap layer 104 are epitaxially grown on the A1N substrate 120 in this order.

Next, on the P-type semiconductor cap layer 104, the microchannel 105 is prepared by a dry etching method, and the depth of the microchannel is between 10 and 500 nm; the reflective metal layer 111 is formed on the top surface of the p-type semiconductor cladding layer 104, and the metal is reflective. NiAu is preferred as the layer material, and the thickness is between 50 and 1000 nm. It may also be made of an alloy including Al, Ag, Ni, Au, Cu, Pd and Rh, and the ohmic contact is achieved by high temperature annealing in a N ₂ atmosphere. Characterizing and enhancing adhesion to the p-type semiconductor cap layer 104; preparing the ohmic metal contact layer 112 and the bonding layer 113 on the reflective metal layer 111, the material of the ohmic metal contact layer is preferably Ti/Pt/Au alloy, and the thickness is Between 0.5~10um, it can also be made of any alloy including Cr, Ni, Co, Cu, Sn, Au. The bonding layer 113 is made of AuSn alloy with a thickness of l~10um. It is any alloy process including Ag, Ni, Sn, Cu, Au, and the like.

Next, the wafer is bonded to the substrate 200 having the periodic conductive path on the contact layer 112 and the bonding layer 113. Process conditions: The temperature is between 0~500 °C, the pressure is between 0~800kg, and the time is between 0-180 minutes.

Next, the A1N single crystal substrate 120 for growing the epitaxial structure is subjected to chemical polishing removal treatment, and the n-type semiconductor contact layer 101 is exposed by chemical polishing thickness control, in the n-type semiconductor An n-type ohmic contact metal layer is prepared on the surface of the body contact layer 101, and the material is preferably made of any alloy of Ti, Al, Au, or any alloy such as Ti, Al, Au, Ag, Rh, Co. An ultraviolet antireflection layer is prepared on the exposed N-type semiconductor layer; an n-electrode pad is prepared on the n-type ohmic contact metal layer, and the material is preferably TiAu, and the thickness is between 1 and 20 μm.

Next, the unit devices on the wafer are separated one by one according to the pitch period of the substrate 200 of the conductive path to form core particles.

Features and structures of the present invention can be seen in the detailed description of the drawings. The figures are a summary of the description and are not drawn to scale. For the sake of clarity, there is no remark in the logo of each figure. All patent applications, patents, are hereby incorporated by reference in their entirety in their entirety in their entireties in the the the the the the

Claims

A deep ultraviolet semiconductor light emitting device comprising:

a heat dissipation substrate with conductive channels;

An illuminating epitaxial structure is sequentially composed of an n-type semiconductor layer, a luminescent layer, and a P-type semiconductor layer, and has two main surfaces, one side being a light-emitting surface and the other side being a non-light-emitting surface;

It is characterized in that it further comprises:

a semiconductor cap layer with a micro-light channel formed on a non-light-emitting surface side of the light-emitting epitaxial structure; a reflective layer formed on the semiconductor cap layer;

The substrate is connected to the reflective layer.

The semiconductor light emitting device according to claim 1, wherein the light emitting layer generates light having a wavelength of from 100 nm to 315 nm.

The semiconductor light emitting device according to claim 1, wherein the area of the micro light passage on the semiconductor cover layer is less than 80% of the surface area of the cover layer.

The semiconductor light emitting device according to claim 1, wherein the optical channel on the semiconductor cladding layer has a depth of 10 to 500 nm.

The semiconductor light emitting device according to claim 1, wherein a metal structure is formed between the substrate and the reflective layer.

The semiconductor light emitting device according to claim 4, wherein the metal structure comprises: an ohmic metal contact layer and a bonding layer.

The semiconductor light emitting device according to claim 5, wherein the bonding layer is composed of a conductive material having a resistivity of 1.0 10" ⁸ - 1.0 10 ^-4 Ω · ηι.

The semiconductor light emitting device according to claim 1, wherein the material of the reflective layer is selected from the group consisting of Al, Ag, Pt or Au.

The semiconductor light emitting device according to claim 1, wherein the reflective layer has a thickness of 50 to 1000 nm.