200919775 九、發明說明： 【發明所屬之技術領诚】 本發明是有關於〆種固態發光元件（s〇lid-state light-emitting device) ， 特別是 指一種 高發光 效率固 態發光 元件及 其製作方法。 【先前技術】 近十年來，固態發光知明8X備的出現已經被帶領向高 亮度的發光二極體（light-emitting diode，簡稱LED)產品上 快速發展。LED在持續增加與照度（illumination)有關的能量 需求之成本效益的解決方案上，是持有希望的。因此，在 先進LED技術上，意味著能量消耗量將可被減少。 LED的亮度（brightness)現在是與現有的鎢絲燈 (incandescent)及螢光燈（fluorescent)等光源相互競爭；因此 ，以現階段觀之，大晶片尺寸（chip-size)之LED以及高驅動 電流（drive-current)之LED，是改善關鍵。在突破性進展的 核心技術中，較高的光萃取量（light extraction)之晶片結構 與高傳熱性（thermal-conductivity)基板兩大方向扮演著主要 角色。 光取出率（extraction efficiency)反映出LED晶片内部所 發射之光子（photon)逃逸進入周圍介質中的能力。例如，以 GaP為主之材料的折射率（refractive index)是趨近3.4，與空 氣之折射率為1及環氧樹脂之折射率為1.5相比較，這導致 光子在空氣與環氧樹脂中產生全反射的臨界角（critical angle)分別為17°與25°。若只有一個介面被考量時，則2% 200919775 的入射光進入空氣且4%進入環氧樹脂（epoxy)的光將被萃取 。以此作為比較，以GaN為主之材料的折射率是趨近2.3。 這導致進入空氣的臨界角為26°且進入環氧樹脂的臨界角為 41 °。若只有一個介面被考量時，則5%的入射光進入空氣 且12%進入環氧樹脂的光將被萃取。剩餘的光源是被反射 進入半導體，最後被反覆吸收或循環利用並導致元件降性 能的下降。 當光取出率在LED的設計中是個重要的考量因素時， 那麼，其他因素可能也很是重要的。例如，為了確保LED 中的整體發光層（active layer)有效地被利用在發光放射，傳 播電流到整體發光層中則是所被期望的。為了增加電流在 產生光的有效使用，那麼，應盡可能地降低歐姆接觸的電 阻。為了增加光萃取量，那麼，發光層與LED發射表面之 間的膜層應具備有高的光源穿透率特性。另外，為了有效 地反射自發光層產生的光源朝向離開LED之光源發射表面 的方向行進，反射鏡之各層應具備有高度反差的折射率。 一種用於LED的反射鏡是在Jong Qyu Kim等人於 Proc. Of SPIE, vol· 6134, ρ· D-1 〜D-12 所發表之用於 LED 的 全方向反射鏡的文章中被提出。於此文章的第5圖中，顯 示有一具有全方向反射鏡（omni-directional reflector，簡稱 ODR)之氮化鎵銦（GalnN)的LED。其LED結構包含有一支 撐一 GalnN之藍寶石（sapphire)基板。氧化釕（Ru)之薄膜是 被用來作為一半穿透（semi-transparent)低電阻之p型歐姆接 觸（ohmic contact)。低折射率之氧化石夕（Si〇2)的 1/4波 200919775 (quarter-wave)厚膜，被銀的微接觸點（silver micro-contacts) 之陣列所穿透設置，且厚的銀底層亦被使用。然而，在此 文章之第D-9頁的第3.3.3節中，作者指出此文章之第5圖 的結構是不利的，因為此種設計需要如Ru02之吸收性 (absorptive)半穿透電流傳播層（current spreading layer)，這 將導致ODR的反射性降低。再者，對於高折射率之半導體 材料而言，Si02被認定為折射率並未低到可提供足夠大的 折射率反差；因此，進一步地限制了以GaN為主之LED的 光取出率之改善空間。 另一選擇，前揭文章的作者在其文章中的第11、12圖 提及另一種ODR結構。在該另一種ODR結構中，顯示於 前揭文章之第5圖的1〇1〇2與Si02，是被一說明於前揭文章 之第12圖的氧化銦錫（indium-tin oxide，簡稱IT0)奈米桿 (nanorod)之低折射率層所取代。然而，如說明於前揭文章 之第13圖，該IT0奈米桿層提供的歐姆接觸之特性貢獻度 不大。此外，ITO材質強烈地與銀（Ag)等金屬材質產生反應 。當由Kim等人所提之ITO奈米桿層接觸到銀底層時，那 麼，發生於ITO奈米桿層與銀底層之介面間的交互擴散 (interdiffusion)，將大幅地降低整體結構的反射特性。此等 交互擴散亦將大幅地降低LED的光取出率。因此，提供一 改良的LED結構以減緩前述困難，是被期望的。 熱能的控制手段，已嚴然成為改善LED之另一關鍵因 素。而帶有功率高的LED，其不得不產生更多的熱。因此 ，缺乏熱能的控制手段，將導致LED的性能下降並減少 200919775 LED的使用壽命。高熱傳率（thermal conductivity)的基板容 許由晶片所產生的熱，有效地透過基板被遷移離開晶片。 因此’咼熱傳率的基板則成為必然性。 —般傳統的紅光（AlGalnP)LED與藍光（InGaN)LED是分 另J被成長於N的GaAs基板上與藍寶石基板上，而GaAs與 藍寶石的主要缺點則是它們的熱傳導率不足。GaAs與藍寶 石分別具有約50 W/mK與40 W/mK的熱傳導率值。顯然地 ’以諸如Si(150 W/mK)或Cu(400 W/mK)等具有高熱傳導率 的基板取代GaAs或藍寶石，則可因較佳的散熱效果而大幅 地改善LED的性能。 一般LED是被蟲晶成長於前述的GaAs或藍寶石基板 上。當成長基板是被諸如Si、Cu等替代基板（substitute substrate)所取代時，那麼，LED蟲晶層（epitaxial layer)可能 需受到應力改變的支配，這亦可能損壞到LED。這個問題 可舉US 7,1〇5,857發明專利案（以下簡稱857案）來被解釋。 如在857案中所解釋的，就LED本身存在有應力，應該不 會損壞到LED，但是在應力改變的條件下，則會損壞到 LED。前述現象可見於857案之圖2A〜4D的說明。 於是，成長在藍寶石上之以GaN為主的LED，在製造 過程中，將在LED中引入大量的應力。當藍寶石基板被取 代時，若此等大量的應力快速地被釋放則可能會損壞到 LED。因此，應力的控制手段則成為重要的問題。此等應力 問題主要是起因於兩種材料在LED的製造過程接觸時，可 能存在有極大差異的熱膨脹係數（coefficients of thermal 8 200919775 expansion，簡稱cte)。因此，當材料是經歷大量的溫度變 化被處理時，材料將大幅地膨脹及縮小。因為這些材料緊 密接觸，此等不均勻的膨脹及縮小等趨勢，在LED的製造 引入龐大的應力。 起因於CTE不匹配度（mismatch)所產生的應力可由下列 式（1)算得： σ=Ε(αχ~α2\Τ-Τϋ)ΐ(ΐ-ν)..............................................(1) 其中’ σ為應力、五為楊氏模數（Y〇ung，s modulus)、α丨 與A為Ni、Cu及GaN磊晶層等材料的CTE、r與rG是如裸 片黏貼製程（die attach process)的晶片製程溫度（如250°C )， v是浦松比（poisson ratio，Ni 與 GaN 分別是 0.31 及 0.23)。 舉例來說，藍寶石具有5_0〜5.6的CTE值，而GaN具有 5.6的CTE值。雖然兩種材料的CTE值相差不大，在製程 期間溫度變化是1 〇〇〇度的等級，會導致產生於LED的壓縮 應力約為-1 ·2 GPa的等級。 相關於應力的控制手段之解決措施已被提出。例如解 釋於在857案中的第3〜5攔，可選擇具有相稱之cte值的 材料。然而’此等技術將限制可被選用的材料，這是業界 所不欲見的。 因此，開發出不同的應力控制手段以避免產生晶圓破 裂及機械應力等問題，是此技術領域者所待突破的課題。 【發明内容】 因此，本發明之目的，即在提供一種高發光效率固態 發光元件。 200919775 本發明之另一目的，即在提供一種高發光效率固態發 光元件的製作方法。 本發明之又一目的，亦在提供一種高發光效率固態發 光元件的製作方法。 於是，本發明高發光效率固態發光元件，包含：一具 有呈相反設置的一第一表面及一第二表面的蠢晶層、一形 成於該第一表面的接觸電極、一形成於該第二表面並具導 電性之散熱載座、一炎置於該蟲晶層與該散熱載座之間的 複合式反射鏡（composite reflective mirror)，及一夾置於該 散熱載座與該複合式反射鏡之間並提供該磊晶層一内部應 力（built-in stress)的第一應力束缚層（holding layer)。 另，本發明高發光效率固態發光元件的製作方法，包 含以下步驟： (a) 於一成長基板之蠢晶層上形成一複合式反射鏡； (b) 於該複合式反射鏡上形成一第一應力束缚層以於該 磊晶層内引入一内部應力； (c) 利用一鍵合層（bonding layer)將一形成有背面電極 (back-side metallization)的取代基板鍵合於該第一 應力束縛層； (d) 移除該成長基板並對該磊晶層施予表面粗化處理 (roughen)； (e) 於該蟲晶層形成平台（mesa)、接觸電極及保護層 (passivation layer)； (f) 移除部分的複合式反射鏡與第一應力束缚層以完成 10 200919775 第一階段的晶片定義； (g) 轉貼到一電子級膠帶（blue tape)上；及 (h) 分割該鍵合層、取代基板與背面電極以完成第一匕 段的晶片定義。 又，本發明另一高發光效率固態發光元件的製 包含以下步驟： 、 (A) 於一成長基板之磊晶層上形成一複合式反射鏡； (B) 形成一晶種層（seed layer)以包覆該磊晶層與複合式 反射鏡； (c)於對應該複合式反射鏡之晶種層上依序形成—第一 應力束缚層1-散熱層卩形成一取代基板並於該蟲 晶層内引入一内部應力； (D) 形成一第二應力束縛層以包覆該取代基板、第一應 力束缚層及晶種層； (E) 形成一包覆該第二應力束缚層且與該第二應力束缚 層互為高選擇蝕刻（selective etching)比的結合層； (F) 將該結合層與一暫時基板貼合； (G) 移除該成長基板並對該磊晶層施予表面粗化處理； ⑻於該蟲晶層形成平台、接觸電極及保護層； ⑴移除該暫時基板並_該第二應力束缚層且停止於 該結合層；及 )轉貼到电子級膠帶上並钱刻該結合層以完成晶片 定義。 本發明之功效在於 可防止應力的釋放並改善晶圓的 200919775 破裂問題’此外’實施濕式蝕刻法來完成晶圓切割製程不 僅經濟效应咼，且少掉了因晶片切割（die sawing)或雷射切 割（laser dicing)所致的機械應力、髒污、熱影響區邙邮 affected zone)等問題。 【實施方式】 有關本發明之則述及其他技術内容、特點與功效，在 以下配合參考圖式之兩個較佳實施例的詳細說明中，將可 清楚的呈現。 在本發明被詳細描述之前，要注意的是’在以下的說 明内容中，類似的元件是以相同的編號來表示。 參閱圖1，本發明高發光效率固態發光元件之一第一較 佳貫施例’包含：一具有呈相反設置的一第一表面21及— 第二表面22的蠢晶層2、—形成於該第—表面21的接觸電 極3、-形成於該第二表面22並具導電性之散熱載座 -夾置於該蟲晶層2與該散熱載座4之間的複合式反射鏡5 、-夾置於該散熱載座4與該複合式反射鏡5之間並提供 該悬晶層2 -内部應力的第—應力束缚層6卜及一覆蓋該 磊晶層2之一周圍的保護層（passivati〇n㈣即，其中，該 磊晶層2的第一表面21是呈粗化表面。 在本發明該第一較佳實施例中，該第-應力束缚層61 的抗剪彈性模數(shear mGdulus)是至少大於的⑽。適用於 本發明之第—應力束缚層61是選自Ni、Cr或此等之—組 。在本發明該第一較佳實施例中，該第一應力束缚層Μ 是Ni。 12 200919775 该散熱載座4具有一背面電極41、一夾置於該背面電 極41與該第一應力束缚層61之間的取代基板42 ,及一夾 置於该取代基板42與該第一束缚層61之間的鍵合層43。 適用於本發明該鍵合層43是選自Sn、pb、In或Sn/Au合 金等低熔點與具有高延展性（dUCtility)之低揚氏模數（Y〇ung ,s mochdus)材料。適合於本發明該散熱載座4之取代基板42 的熱傳導率是至少大於60 W/mt ;該背面電極41是選自 Ti、Pt、Ni或Au ;該取代基板42是選自si、GaAs、Cu、 八卜 SiC、AlSiC、石墨（graphite)、A1N、Cu/M 或 Cu/m/Cu ’其中’ M是Mo & W。在本發明該第一較佳實施例中， 該取代基板42是Si。 丹,一金屬反射層 战硬合式反射 八且成 金屬反射層51與該蟲晶層2之間的介電層52、一夹置於該 二：層52與該磊晶層2之間的接觸層&及複數穿置於該 二層52並提供該接觸層53與金屬反射層51 義該接觸層53與介電層52之折射率分別為 1、2 J_ni>n2。適用於本發明該金屬反射 柱 Μ 是選自 Au、A1、Ag、Ni、Cu、pt'p 7 = 觸層53是選自IT〇、N ，該接 ^ 或RU〇2。在本發明該第一較 二二接觸广1電層Μ與該接觸層53分別是Si〇2 * IT〇，該接觸層53的厚戶县八认2 〇 值得一提的是，該介%^/；^5〇〇nm之間。 該金屬反射層51之門的 貝者於該接觸層53與 式反射於Λ 障層，不僅大幅地改善了該複- 式反射鏡5的性能，且敕 ° 體疋件長在時間的使用下亦維持 13 200919775 其信賴性。此外，該接觸層53之折射率大於該介電層η， 亦改善該複合式反射鏡5之折射率反差値。因此，在沒有 顯著地減少整體發光元件的電性下，降低了該接觸層^(即 ，_與金屬反射層51的接觸面積，仍可達到提昇折射率 反差值的特點。 參閱圖2〜圖3,本發明該第一較佳實施例的製作方法 ’包含以下步驟： ⑷於-成長基板U之蟲晶層2上形成該複合式反射 鏡5 ; ㈨於該複合式反射鏡5上形成該第一應力束缚層61 以於11亥猫日日層2内引入一内部鹿力· (C)利用該鍵合㉟43將該形成有f面電極41的取代基 板42鍵合於該第一應力束縛層61 ; ⑷#除該成長基板11並對該蟲晶層2施予表面粗化 處理； ⑷於該蟲晶層2形成平台、該接觸電極3及保護層7 (f) 移除部分的複合式反射鏡5與第一應力束缚層61 以完成第一階段的晶片定義； (g) 轉貼到一電子級膠帶12上；及 (h) 刀剎该鍵合層43、取代基板42與背面電極41以完 成第二階段的晶片定義並完成如圖i所示的第一較 佳實施例。 在本發明該第一較佳實施例中，該步驟（a)的成長基板 14 200919775 11為藍寶石基板，該步驟（a)的磊晶層2為GaN系材料，該 磊晶層2内的内部應力為壓縮應力（c〇mpressive;該 步驟⑷之第-應力束缚層61是利用電鍍法所製成；該㈣ (d)是利用雷射剝離（iaser lift_off，簡稱lL0)法所完成；該 步驟（f)是利用濕式韻刻法移除分的複合式反射鏡5與第一 應力束缚層61。利用電鍍法於形成該步驟（c)之第一廡力束 縛層61的過程中，是同時引入一處理溫度介於i5〇t〜4〇〇 C且處理時間介於1〇分鐘〜200分鐘之間的熱處理 treatment)。在本發明該第一較佳實施例中，該步驟⑷之熱 處理溫度及熱處理時間分別是25〇t與30分鐘。 值得一提的是，該磊晶層2對溫度變化的反應，是沿 著實質上平行於該磊晶層2内的介面（如，pn介面，圖未示） 之一方向或多方向產生膨脹或收縮；此外，成長於該成長 基板11上之磊晶層2,將因CTE不匹配而在室溫下處於高 壓縮應力狀悲。而值得注意的是，當該磊晶層2在實施 LLO製程中吸收到脈衝式紫外光（uv)雷射時，將於該成長 基板11與該磊晶層2之（Al)GaN的界面間產生高溫分解 (decomposition)。於分解過程產生電漿（piasma)以製造出氮 氣（NO並在原處留下一 Ga金屬層（熔點< 3〇cc)。此 製程將大幅地增加整體元件的溫度。 相對地，在本發明該第一較佳實施例之方法的步驟（b) 中，其形成於該磊晶層2中的内部壓縮應力，可在後續的 元件製私（如，裸片黏貼製程）中或操作中防止整體應力自壓 縮應力轉換成拉伸應力，其形成於該磊晶層2内的壓縮應 15 200919775 2 ’僅會在超過裸片黏貼製程的溫度或超過操作狀態下的 溫度被釋放出來。由前述今 自J江說月可知’該步驟（b)中所形成的 第一應力束縛層61不僅可维拉兮石 个1里」堆符該磊晶層2内之該方向或該 多方向的壓縮應力；此外，亦在 Γ耳在LLO製程、裸片黏貼製程 led封裝過程巾防止壓縮應力的释放並提供優異的產量 〇 土 —，閲圖4,本發明高發光效率固態發光元件之一第二較 :貫施例’大致上是相同於該第一較佳實施例。其不同處 於，更包含-包裹該散熱載座4、該第一應力束缚層6ι 复合式反射鏡5的第二應力束缚層62。在本發明該第 =佳實施财，該散熱健4具有—取代基板Μ。適用 :I月4取代基板44是選自Cu或Ni。在本發明該第二 二，例中’該取代基板44 & CU ’且該取代基板44的 又疋"於30 μηι〜200 μηι之間。 參閱圖5〜圖7,本發明該第二較佳實施例的製作 ，包含以下步驟： / (Α)於-成長基板13之蟲晶層2上形成該複合式反射 鏡5 ; (Β)形成一晶種層63以包覆該磊晶層2與複合式反 鏡5 ; ' (C) 於對應該複合式反射鏡5之晶種層63上依序形戍 s亥第一應力束缚層61及一散熱層以形成該取代義 板44並於該蟲晶層2内引入一内部鹿力； (D) 形成該第二應力束缚層62以包覆該取代基板44、 16 200919775 第一應力束缚層61及晶種層63 ; (E) 形成一包覆該第二應力束缚層62且與該第二應力 束缚層62互為高選擇蝕刻比的結合層14 ; (F) 將該結合層14與一暫時基板16貼合； (G) 移除該成長基板13並對該蟲晶層2施予表面粗化 處理； ⑻於該磊晶層2形成平台、接觸電極3及保護層八 (I)移除該暫時基板^並麵刻該第二應力束缚層Μ且 停止於該結合層14 ;及 ⑺轉貼到一電子級膠帶17上並蝕刻該結合層Μ以完 成晶片定義。 該步驟（Β)〜(Ε)的晶種層63、第200919775 IX, invention description: [Technology of the invention] The present invention relates to a s〇lid-state light-emitting device, in particular to a high luminous efficiency solid-state light-emitting element and a manufacturing method thereof . [Prior Art] In the past ten years, the emergence of solid-state light-emitting 8X equipment has been led to the rapid development of high-brightness light-emitting diode (LED) products. LEDs are promising in terms of cost-effective solutions that continue to increase the energy requirements associated with illumination. Therefore, in advanced LED technology, it means that energy consumption can be reduced. The brightness of LEDs is now competing with existing light sources such as incandescents and fluorescents; therefore, at this stage, large chip-size LEDs and high-drive The drive-current LED is the key to improvement. In the core technology of breakthrough development, higher light extraction wafer structure and high thermal conductivity (thermal-conductivity) substrate play a major role. The extraction efficiency reflects the ability of photons emitted inside the LED chip to escape into the surrounding medium. For example, the refractive index of a material based on GaP is close to 3.4, which is compared with the refractive index of air of 1 and the refractive index of epoxy resin of 1.5, which causes photons to be produced in air and epoxy. The critical angles of total reflection are 17° and 25°, respectively. If only one interface is considered, then 2% of the 200919775 incident light enters the air and 4% of the light entering the epoxy will be extracted. As a comparison, the refractive index of a GaN-based material approaches 2.3. This results in a critical angle of entry into the air of 26° and a critical angle of entry into the epoxy resin of 41 °. If only one interface is considered, 5% of the incident light enters the air and 12% of the light entering the epoxy will be extracted. The remaining light source is reflected into the semiconductor and is eventually absorbed or recycled and causes a drop in component degradation. When the light extraction rate is an important consideration in the design of the LED, then other factors may also be important. For example, in order to ensure that the entire active layer in the LED is effectively utilized in illuminating radiation, it is desirable to propagate current into the overall luminescent layer. In order to increase the effective use of current in generating light, the resistance of the ohmic contact should be reduced as much as possible. In order to increase the amount of light extraction, the film layer between the light-emitting layer and the LED emitting surface should have high light source transmittance characteristics. Further, in order to efficiently reflect the light source generated from the light-emitting layer toward the direction away from the light-emitting surface of the LED, the layers of the mirror should have a highly contrasting refractive index. A mirror for an LED is proposed in an article for omnidirectional mirrors for LEDs published by Jong Qyu Kim et al., Proc. Of SPIE, vol. 6134, ρ·D-1 to D-12. In Fig. 5 of this article, an LED having an omni-directional reflector (ODR) of gallium indium nitride (GalnN) is shown. The LED structure includes a sapphire substrate supporting a GalnN. A film of ruthenium oxide (Ru) is used as a p-type ohmic contact with a semi-transparent low resistance. 1/4 wave 200919775 (quarter-wave) thick film of low refractive index oxidized stone (Si〇2), penetrated by an array of silver micro-contacts, and a thick silver underlayer Also used. However, in Section 3.3.3 on page D-9 of this article, the authors point out that the structure of Figure 5 of this article is unfavorable because this design requires an absorptive half-through current such as Ru02. A current spreading layer, which will result in a decrease in the reflectivity of the ODR. Furthermore, for high refractive index semiconductor materials, SiO 2 is considered to have a refractive index that is not low enough to provide a sufficiently large refractive index contrast; thus, further limiting the improvement of the light extraction rate of GaN-based LEDs space. Alternatively, the authors of the previous article mentioned another ODR structure in Figures 11 and 12 of their article. In the other ODR structure, 1〇1〇2 and SiO2 shown in Fig. 5 of the foregoing article are indium-tin oxide (IT0) illustrated in Fig. 12 of the previous article. ) The low refractive index layer of the nanorod is replaced. However, as illustrated in Figure 13 of the previous article, the characteristics of the ohmic contact provided by the IT0 nanorod layer are not significant. In addition, the ITO material reacts strongly with metal materials such as silver (Ag). When the ITO nanorod layer proposed by Kim et al. contacts the silver underlayer, then the interdiffusion between the interface between the ITO nanorod layer and the silver underlayer will greatly reduce the reflection characteristics of the overall structure. . These cross-diffusions will also significantly reduce the light extraction rate of the LEDs. Therefore, it would be desirable to provide an improved LED structure to alleviate the aforementioned difficulties. Thermal energy control has become another key factor in improving LEDs. With a high power LED, it has to generate more heat. Therefore, the lack of thermal control means that the performance of the LED will be reduced and the service life of the 200919775 LED will be reduced. The substrate with high thermal conductivity allows the heat generated by the wafer to be efficiently transported away from the wafer through the substrate. Therefore, the substrate of the heat transfer rate becomes inevitable. The conventional red light (AlGalnP) LEDs and blue light (InGaN) LEDs are grown on N GaAs substrates and sapphire substrates, while the main disadvantage of GaAs and sapphire is their insufficient thermal conductivity. GaAs and sapphire have thermal conductivity values of about 50 W/mK and 40 W/mK, respectively. Obviously, replacing GaAs or sapphire with a substrate having a high thermal conductivity such as Si (150 W/mK) or Cu (400 W/mK) can greatly improve the performance of the LED due to the preferable heat dissipation effect. Generally, LEDs are grown by insect crystals on the aforementioned GaAs or sapphire substrate. When the growth substrate is replaced by a substitute substrate such as Si or Cu, then the LED epitaxial layer may be subject to stress changes, which may also damage the LED. This problem can be explained by the US 7,1〇5,857 invention patent case (hereinafter referred to as the 857 case). As explained in the case of 857, there is stress in the LED itself and it should not be damaged to the LED, but under stress conditions, the LED will be damaged. The foregoing phenomenon can be seen in the description of Figures 2A to 4D of the 857 case. As a result, GaN-based LEDs grown on sapphire will introduce a large amount of stress into the LED during the manufacturing process. When the sapphire substrate is replaced, if such a large amount of stress is quickly released, the LED may be damaged. Therefore, the control method of stress becomes an important issue. These stress problems are mainly caused by the fact that there are greatly different coefficients of thermal expansion (coefficients of thermal 8 200919775 expansion, referred to as cte) when the two materials are in contact with the LED manufacturing process. Therefore, when the material is subjected to a large amount of temperature change, the material will greatly expand and contract. Because of the tight contact of these materials, such uneven expansion and contraction trends have introduced enormous stresses in the manufacture of LEDs. The stress due to the CTE mismatch can be calculated by the following formula (1): σ = Ε (αχ~α2\Τ-Τϋ)ΐ(ΐ-ν)........... .............................(1) where 'σ is stress and five is Young's modulus (Y〇ung, s modulus), α丨 and A are materials such as Ni, Cu and GaN epitaxial layers. The CTE, r and rG are wafer process temperatures such as die attach process (eg 250 ° C). ), v is the Poisson ratio (Ni and GaN are 0.31 and 0.23, respectively). For example, sapphire has a CTE value of 5_0 to 5.6, and GaN has a CTE value of 5.6. Although the CTE values of the two materials are not much different, the temperature change during the process is a level of 1 〇〇〇, which results in a compressive stress of about -1 · 2 GPa. Solutions to the control measures related to stress have been proposed. For example, in the 3rd to 5th blocks in the case of 857, a material having a commensurate cte value can be selected. However, these technologies will limit the materials that can be selected, which is not desired in the industry. Therefore, the development of different stress control means to avoid problems such as wafer cracking and mechanical stress is a subject to be solved by the technical field. SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a solid-state light-emitting element having high luminous efficiency. 200919775 Another object of the present invention is to provide a method of fabricating a high luminous efficiency solid state light emitting device. Still another object of the present invention is to provide a method of fabricating a high luminous efficiency solid-state light-emitting element. Therefore, the high luminous efficiency solid state light emitting device of the present invention comprises: a doped layer having a first surface and a second surface disposed oppositely, a contact electrode formed on the first surface, and a second formed on the second surface a heat-dissipating carrier having a conductive surface, a composite reflective mirror disposed between the worm layer and the heat-dissipating carrier, and a sandwich placed on the heat-dissipating carrier and the composite reflection A first stress holding layer of the epitaxial layer is built-in stress between the mirrors. In addition, the method for fabricating a high luminous efficiency solid-state light-emitting device of the present invention comprises the steps of: (a) forming a composite mirror on a stray layer of a growing substrate; (b) forming a first layer on the composite mirror. a stress-binding layer for introducing an internal stress into the epitaxial layer; (c) bonding a replacement substrate formed with a back-side metallization to the first stress by using a bonding layer a binding layer; (d) removing the growth substrate and applying a surface roughening treatment to the epitaxial layer; (e) forming a mesa, a contact electrode, and a passivation layer on the crystal layer (f) removing part of the composite mirror and the first stress-bonding layer to complete the wafer definition of the first stage of 2009 200919775; (g) reposting onto an electronic tape; and (h) dividing the The bonding layer, the substrate and the back electrode are replaced to complete the wafer definition of the first segment. Furthermore, another high luminous efficiency solid-state light-emitting device of the present invention comprises the steps of: (A) forming a composite mirror on an epitaxial layer of a growth substrate; (B) forming a seed layer. Coating the epitaxial layer and the composite mirror; (c) sequentially forming a seed layer corresponding to the composite mirror - the first stress-binding layer 1 - the heat dissipation layer 卩 forming a replacement substrate and the worm Introducing an internal stress in the crystal layer; (D) forming a second stress-binding layer to coat the replacement substrate, the first stress-bonding layer, and the seed layer; (E) forming a coating of the second stress-binding layer and The second stress-binding layer is a bonding layer with a high selective etching ratio; (F) bonding the bonding layer to a temporary substrate; (G) removing the growth substrate and applying the epitaxial layer Surface roughening treatment; (8) forming a platform, a contact electrode, and a protective layer on the insect layer; (1) removing the temporary substrate and the second stress-binding layer and stopping at the bonding layer; and) transferring to the electronic grade tape and The bond layer is engraved to complete the wafer definition. The effect of the present invention is to prevent the release of stress and improve the 200919775 cracking problem of the wafer. 'In addition, the wet etching method is performed to complete the wafer cutting process, which is not only economical, but also less due to die sawing or thunder. Problems such as mechanical stress, dirt, and heat affected zone caused by laser dicing. The detailed description of the two preferred embodiments of the present invention will be apparent from the following description of the preferred embodiments of the invention. Before the present invention is described in detail, it is to be noted that in the following description, similar elements are denoted by the same reference numerals. Referring to FIG. 1, a first preferred embodiment of the high luminous efficiency solid state light emitting device of the present invention includes: a doped layer 2 having a first surface 21 and a second surface 22 disposed oppositely. a contact electrode 3 of the first surface 21, a heat-dissipating carrier formed on the second surface 22 and having a conductivity - a composite mirror 5 sandwiched between the crystal layer 2 and the heat dissipation carrier 4 a first stress-bonding layer 6 interposed between the heat-dissipating carrier 4 and the composite mirror 5 and providing the suspension layer 2 - internal stress and a protective layer covering one of the epitaxial layers 2 (passively) wherein the first surface 21 of the epitaxial layer 2 is a roughened surface. In the first preferred embodiment of the invention, the shear modulus of the first stress-bonding layer 61 ( Shear mGdulus) is at least greater than (10). The first stress-bonding layer 61 suitable for use in the present invention is selected from the group consisting of Ni, Cr or the like. In the first preferred embodiment of the invention, the first stress is bound The layer Μ is Ni. 12 200919775 The heat dissipating carrier 4 has a back electrode 41, a clip placed on the back electrode 41 and the first a replacement substrate 42 between the stress-binding layers 61, and a bonding layer 43 interposed between the replacement substrate 42 and the first binding layer 61. The bonding layer 43 suitable for use in the present invention is selected from the group consisting of Sn and pb. Low melting point such as In or Sn/Au alloy and low Young's modulus (Y moung, s mochdus) material with high ductility (dUCtility). Thermal conductivity of the substituted substrate 42 suitable for the heat dissipating carrier 4 of the present invention. Is at least greater than 60 W/mt; the back electrode 41 is selected from Ti, Pt, Ni or Au; the replacement substrate 42 is selected from the group consisting of si, GaAs, Cu, IB, SiC, AlSiC, graphite, A1N, Cu /M or Cu/m/Cu 'where 'M is Mo & W. In the first preferred embodiment of the invention, the replacement substrate 42 is Si. Dan, a metal reflective layer is hard-constructed and reflected. a dielectric layer 52 between the metal reflective layer 51 and the insectized layer 2, a contact layer & and a plurality of layers 52 interposed between the two layers 52 and the epitaxial layer 2 Providing the contact layer 53 and the metal reflective layer 51, the refractive indices of the contact layer 53 and the dielectric layer 52 are respectively 1, 2 J_ni > n2. The metal reflective column is suitable for use in the present invention. Au, Al, Ag, Ni, Cu, pt'p 7 = the contact layer 53 is selected from the group consisting of IT〇, N, the connection or RU〇2. In the present invention, the first two-two contact wide electric layer The contact layer 53 is respectively Si〇2*IT〇, and the contact layer 53 is thickened by the county. It is worth mentioning that the dielectric layer is between %^/;^5〇〇nm. The metal reflective layer 51 The door of the door is reflected by the contact layer 53 and the barrier layer, which not only greatly improves the performance of the complex mirror 5, but also maintains the length of the body element under the time of use 13 200919775 Trustworthiness. In addition, the refractive index of the contact layer 53 is greater than the dielectric layer η, which also improves the refractive index contrast 値 of the composite mirror 5. Therefore, under the electrical property of the overall light-emitting element is not significantly reduced, the contact area of the contact layer (ie, _ with the metal reflective layer 51 is reduced, and the contrast of the refractive index difference can still be achieved. Referring to FIG. 2 to FIG. 3. The manufacturing method of the first preferred embodiment of the present invention comprises the following steps: (4) forming the composite mirror 5 on the crystal layer 2 of the growth substrate U; (9) forming the composite mirror 5 The first stress-binding layer 61 introduces an internal deer force into the 11-day cat day layer 2 (C) bonding the substitute substrate 42 formed with the f-face electrode 41 to the first stress bond by the bonding 3543 Layer 61; (4) # In addition to the growth substrate 11 and applying a surface roughening treatment to the crystal layer 2; (4) forming a platform on the crystal layer 2, the contact electrode 3 and the protective layer 7 (f) Mirror 5 and first stress-bonding layer 61 to complete the wafer definition of the first stage; (g) affixed to an electronic grade tape 12; and (h) knives the bonding layer 43, the replacement substrate 42 and the back electrode 41 to complete the second stage wafer definition and complete the first preferred embodiment as shown in FIG. In the first preferred embodiment of the present invention, the growth substrate 14 200919775 11 of the step (a) is a sapphire substrate, and the epitaxial layer 2 of the step (a) is a GaN-based material, and the internal stress in the epitaxial layer 2 For the compressive stress (c〇mpressive; the first - stress-binding layer 61 of the step (4) is made by electroplating; the (d) (d) is performed by the laser lift-off (iaser lift_off, abbreviated as lL0) method; f) is a composite mirror 5 and a first stress-bonding layer 61 which are removed by wet rhyme method. In the process of forming the first force-binding layer 61 of the step (c) by electroplating, Introducing a heat treatment treatment having a treatment temperature between i5〇t and 4〇〇C and a treatment time of between 1 minute and 200 minutes. In the first preferred embodiment of the invention, the heat treatment temperature of the step (4) And the heat treatment time is 25 〇t and 30 minutes respectively. It is worth mentioning that the reaction of the epitaxial layer 2 to the temperature change is along a interface substantially parallel to the inside of the epitaxial layer 2 (eg, a pn interface, Figure does not show expansion or contraction in one or more directions; in addition, grows in The epitaxial layer 2 on the growth substrate 11 will be subjected to high compressive stress at room temperature due to CTE mismatch. It is worth noting that when the epitaxial layer 2 is absorbed into the pulsed ultraviolet in the LLO process In the case of a light (uv) laser, a high temperature decomposition occurs between the growth substrate 11 and the (Al)GaN interface of the epitaxial layer 2. A plasma (piasma) is generated during the decomposition to produce nitrogen (NO). And leave a layer of Ga metal (melting point < 3 〇 cc) in place. This process will greatly increase the temperature of the overall component. In contrast, in step (b) of the method of the first preferred embodiment of the present invention, the internal compressive stress formed in the epitaxial layer 2 can be used for subsequent component fabrication (eg, die attach process) In the middle or operation, the overall stress is prevented from being converted from the compressive stress into the tensile stress, and the compression formed in the epitaxial layer 2 is 15 200919775 2 'only exceeds the temperature of the die attach process or exceeds the operating state. Was released. It can be seen from the above-mentioned J. Jiang said that the first stress-binding layer 61 formed in the step (b) can not only be in the direction of the epitaxial layer 2 but also the multi-directional direction. Compressive stress; in addition, in the LLO process, the die-bonding process led package process towel prevents the release of compressive stress and provides excellent yield of alumina - see Figure 4, one of the high luminous efficiency solid state light-emitting elements of the present invention Second comparison: The embodiment is substantially the same as the first preferred embodiment. The difference is that the second stress-binding layer 62 of the heat-dissipating carrier 4 and the first stress-bonding layer 6 ι compound mirror 5 is further included. In the present invention, the heat sink 4 has a substrate Μ. Applicable: The I month 4 replacement substrate 44 is selected from Cu or Ni. In the second and second embodiments of the present invention, the substrate 44 & CU ' and the substrate 44 are further between 30 μm and 200 μm. Referring to FIG. 5 to FIG. 7, the second preferred embodiment of the present invention comprises the following steps: / (Α) forming the composite mirror 5 on the crystal layer 2 of the growth substrate 13; a seed layer 63 is formed to cover the epitaxial layer 2 and the composite mirror 5; '(C) is sequentially formed on the seed layer 63 corresponding to the composite mirror 5, and the first stress-binding layer 61 is sequentially formed. And a heat dissipation layer to form the replacement layer 44 and introduce an internal deer force into the insect layer 2; (D) forming the second stress-binding layer 62 to cover the replacement substrate 44, 16 200919775 first stress bondage The layer 61 and the seed layer 63; (E) forming a bonding layer 14 covering the second stress-bonding layer 62 and having a high selective etching ratio with the second stress-binding layer 62; (F) the bonding layer 14 Bonding to a temporary substrate 16; (G) removing the growth substrate 13 and applying a surface roughening treatment to the crystal layer 2; (8) forming a land, a contact electrode 3, and a protective layer 8 on the epitaxial layer 2 (I) Removing the temporary substrate ^ and engraving the second stress-binding layer and stopping at the bonding layer 14; and (7) transferring onto an electronic grade tape 17 and etching the bonding layer to complete Piece definitions. The seed layer 63 of the step (Β)~(Ε), the first
、一應力束缚層61、 62、取代基板44及結合層14是湘是使用電子束基鑛法 (e-beam evaporation)或電鍍法所製成；該步驟是使用一 高分子_师)層15貼合該結合層14與該暫時基板16。 在本發㈣第二較佳實施例中，該步驟⑻的晶種層Ο是使 用電子束蒸鍍法；該步驟(D)、⑻的第二應力束缚層^、結 合層14是使用連續電鐘；該步驟（c)第一應力束缚層6卜 取代基板44是使用圖案化（patterned)電鍍。 適用於本發明該步驟（B)之晶種層63是選自Ti/Au或 τ愚；該第一、二應力束缚是選自Ni、。，或此 等的 '組合，錢熱層（即，該取代基板44)及結合層14是 選自Cu或Nie在本發明該第二較佳實施例令，該第一、二 應力束缚層61、62是Ni;該取代基板44及結合層14是 17 200919775The stress-bonding layers 61, 62, the replacement substrate 44, and the bonding layer 14 are formed by e-beam evaporation or electroplating; the step is to use a polymer layer 15 The bonding layer 14 and the temporary substrate 16 are bonded. In the second preferred embodiment of the present invention, the seed layer layer of the step (8) is an electron beam evaporation method; the second stress-binding layer of the steps (D), (8), and the bonding layer 14 are continuous electricity. The step (c) of the first stress-bonding layer 6 is to replace the substrate 44 using patterned plating. The seed layer 63 suitable for the step (B) of the present invention is selected from the group consisting of Ti/Au or τ; the first and second stress binding is selected from Ni. Or such a combination, the carbon heat layer (ie, the replacement substrate 44) and the bonding layer 14 are selected from Cu or Nie. In the second preferred embodiment of the present invention, the first and second stress-binding layers 61 62 is Ni; the replacement substrate 44 and the bonding layer 14 are 17 200919775
Cu。 值得一提的是，利用電鍍法於形成該步驟（c)之散熱層（ 即，該取代基板44)的過程中是同時引入一熱處理（thermal treatment)。適合於在本發明該第二較佳實施例之該步驟（C) 的熱處理溫度與熱處理時間分別是介於150°C〜400°C之間與 介於10分鐘〜200分鐘之間。在本發明該第二較佳實施例中 ，該步驟（C)的熱處理溫度與熱處理時間分別是250°C與30 分鐘。 經前述說明可知，本發明該第二較佳實施例是在實施 電鍍銅以形成該取代基板44的過程中引入熱處理致使銅產 生再結晶（recrytallization)，並於冷卻至室溫的過程中在該 蟲晶層2内引入該内部應力（即，壓縮應力）。當該蟲晶層2( 即，GaN系材料）達250°C的溫度時，GaN與Ni兩者之CTE 不匹配所產生的熱應力是0.49 GPa。因此，形成於該複合 式反射鏡5周圍的Ni(即，該等應力束縛層61、62)之剛性 金屬（rigid metal)，及經由使用退火製程以預先形成於該蟲 晶層2内部的壓縮應力，主要是為了維持該磊晶層2中的 壓縮應力（-1.2 GPa)，以使得在LL0製程中所產生的熱應力 衝擊減到最小並降低晶片破裂的機率。 適用於本發明該第二較佳實施例之步驟（I)的濕式蝕刻 劑（wet etching agent)是選自FeCl3水溶液或HN〇3水溶液； 該步驟（J)的濕式蝕刻劑是選自含有NH40H及H202的水溶 液，或含有KCN的水溶液。 較佳地，該步驟（I)的濕式蝕刻劑是使用FeCl3水溶液， 18 200919775 且FeCl3溶液的濃度是介於1 %〜 /。之間，該步驟（j)是使 用含有nh4oh及h2o2的太、玄你 。. π水办液，且 Nh4〇h : h2〇2 : 的體積濃度是介於1 ·· 1 : i ~ 1 i . 1 . 300之間。在本發明該 弟·一車父佳實施例中，該舟駿i m 邊步驟⑴的濕式蝕刻劑是使用Cu. It is worth mentioning that a thermal treatment is simultaneously introduced during the formation of the heat dissipation layer of the step (c) (i.e., the replacement substrate 44) by electroplating. The heat treatment temperature and the heat treatment time suitable for the step (C) of the second preferred embodiment of the present invention are between 150 ° C and 400 ° C and between 10 minutes and 200 minutes, respectively. In the second preferred embodiment of the present invention, the heat treatment temperature and the heat treatment time of the step (C) are 250 ° C and 30 minutes, respectively. As can be seen from the foregoing description, the second preferred embodiment of the present invention introduces heat treatment during the process of electroplating copper to form the replacement substrate 44 to cause recrystallization of copper, and during cooling to room temperature. This internal stress (i.e., compressive stress) is introduced into the wormhole layer 2. When the crystal layer 2 (i.e., GaN-based material) reaches a temperature of 250 ° C, the thermal stress generated by the CTE mismatch of both GaN and Ni is 0.49 GPa. Therefore, the rigid metal of Ni (ie, the stress-bonding layers 61, 62) formed around the composite mirror 5, and the compression formed in advance in the crystal layer 2 by using an annealing process The stress is mainly to maintain the compressive stress (-1.2 GPa) in the epitaxial layer 2 to minimize the thermal stress shock generated in the LL0 process and to reduce the probability of wafer cracking. The wet etching agent suitable for the step (I) of the second preferred embodiment of the present invention is selected from an aqueous solution of FeCl3 or an aqueous solution of HN〇3; the wet etchant of the step (J) is selected from the group consisting of An aqueous solution containing NH40H and H202, or an aqueous solution containing KCN. Preferably, the wet etchant of the step (I) is an aqueous solution of FeCl3, 18 200919775 and the concentration of the FeCl3 solution is between 1% and /. Between this step (j) is the use of nh4oh and h2o2. π水液液, and the volume concentration of Nh4〇h : h2〇2 : is between 1 ·· 1 : i ~ 1 i . 1. 300. In the embodiment of the present invention, the wet etchant of the step (1) is used.
Transene 公司（Transenp 。一 ( 6 C〇mpany，Inc.)所製造之型號為The model manufactured by Transene (Transenp. One (6 C〇mpany, Inc.) is
Nickel Etchant TFG 的、;晶六' 為 μ w 的屬;該步驟⑺的濕式钱刻劑 是使用Transene公司所製造之型號為c〇卯以獅邮A”. 100的濕式姓刻劑。 再參圖7’值付-提的是，由於該步驟⑴所使用的濕式 姓刻劑無法關該結合層14僅能㈣掉該第二應力束缚層 62;因此，該步驟⑴的蝕刻行為是終止於該結合層14。相 對地，由料步驟⑴所使用的濕式㈣劑無法㈣該第二 應力束缚層62僅該刻掉該結合層14;因此，該第二應力 束缚層62於該步驟⑺的钱刻行為中主要是扮演著㈣阻障 (etching stop)的作用。 經前段說明可知，本發明主要是藉由該第二應力束縛 層62與該結合層14相互提供蝕刻阻障的作用並實施濕式 蝕刻法來完成晶圓切割製程(singulati〇n pr〇cess)。藉此避免 其他先前技術所使用的晶圓切割製程’如晶片切割或雷射 切割等製程所致的機械應力或其他應力。因此，經濟效益 高；此外，因未遭受到典型的機械切割製程，不僅少掉了 機械應力或髒污問題，亦沒有典型的雷射切割製程才有的 熱影響區。 綜上所述，本發明高發光效率固態發光元件及其製作 19 200919775 方法’可防止壓縮應力的釋放並改善晶圓的破裂問題，此 外’實施濕式蝕刻法來完成晶圓切割製程不僅經濟效益高 ，且少掉了機械應力、髒污、熱影響區等問題，確實達到 本發明之目的。 惟以上所述者，僅為本發明之較佳實施例而已，當不 能以此限定本發明實施之範圍，即大凡依本發明申請專利 範圍及發明說明内容所作之簡單的等效變化與修飾，皆仍 屬本發明專利涵蓋之範圍内。 【圖式簡單說明】 一圖1是一正視示意圖，說明本發明高發光效率固態發 光元件之一第一較佳實施例； 說明本發明該第—較佳每 圖2是一元件製作流程圖 施例之製作方法的步驟（a)〜(d); 明本發明該第—較佳實 說 圖3是一元件製作流程圖 施例之製作方法的步驟（e)〜(h); 、…圖4是-正視示意圖’說明本發明高發光效率固 光7L件之一第二較佳實施例； 〜、 〃圖5是-元件製作流程圖，說明本發明該 細*例之製作方法的步驟（A)〜(D); 只 實 ^圖6是一元件製作流程圖，說明本發明該第 知例之製作方法的步驟〜;及 圖7疋一 7L件製作流程圖，說明本 施例之製作方法的步驟⑻〜⑴。 月以—較佳實 20 200919775 【主要元件符號說明】 11…… …成長基板 42•…· ……取代基板 12...... …電子級膠帶 43...· -----鍵合層 13…… …成長基板 44…·· 取代基板 14…… …結合層 5…… •…複合式反射鏡 15…… …高分子層 51 … .....金屬反射層 16…… …暫4基板 52.…· •…介電層 ...... …電子級膠帶 53.…· .....接觸層 2 ....... •猫日日^ 54·..._ 金屬柱 21…… …第一表面 61•…· •…第一應力束缚層 22…… …第二表面 62…·· -----第一應力束缚層 3 ....... …接觸電極 63·... .....晶種層 4 ....... …散熱載座 7…… •…保護層 41…… …背面電極 1 21Nickel Etchant TFG; Jing Liu' is a genus of μ w; the wet money engraving agent of the step (7) is a wet type engraving agent of the model 为 A A". 100 manufactured by Transene. Referring again to FIG. 7', it is noted that since the wet-type surrogate used in the step (1) cannot close the bonding layer 14, the second stress-binding layer 62 can only be removed (4); therefore, the etching behavior of the step (1) Is terminated by the bonding layer 14. In contrast, the wet (four) agent used in the step (1) cannot be used. (4) the second stress-binding layer 62 only engraves the bonding layer 14; therefore, the second stress-binding layer 62 is The money engraving behavior of the step (7) mainly plays the role of (4) an etching stop. As can be seen from the foregoing description, the present invention mainly provides an etch barrier between the second stress-binding layer 62 and the bonding layer 14 by the second stress-bonding layer 62. The role of the wet etching method to complete the wafer dicing process (singulati〇n pr〇cess), thereby avoiding the wafer cutting process used in other prior art processes such as wafer cutting or laser cutting Stress or other stress. Therefore, high economic efficiency; Because it does not suffer from the typical mechanical cutting process, not only the mechanical stress or dirt problem is lost, but also the heat affected zone which is typical of the laser cutting process. In summary, the high luminous efficiency solid state light emitting device of the present invention Its fabrication 19 200919775 method 'prevents the release of compressive stress and improves the cracking of the wafer. In addition, the implementation of wet etching to complete the wafer cutting process is not only economically efficient, but also reduces mechanical stress, dirt, and thermal effects. The problem of the present invention is achieved by the present invention. The above is only the preferred embodiment of the present invention, and the scope of the present invention cannot be limited thereto. The simple equivalent changes and modifications made by the content are still within the scope of the present invention. [Simplified Schematic] FIG. 1 is a front view showing a first comparison of the high luminous efficiency solid-state light-emitting elements of the present invention. BEST MODE FOR CARRYING OUT THE INVENTION The first preferred embodiment of the present invention is a step (a) to (d) of a method for fabricating a component fabrication flowchart. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 3 is a step (e) to (h) of a method for fabricating a component fabrication flow chart; FIG. 4 is a front elevational view showing the high luminous efficiency solid light 7L of the present invention. A second preferred embodiment; FIG. 5 is a flow chart of component fabrication, illustrating steps (A) to (D) of the manufacturing method of the present invention; FIG. 6 is a component manufacturing process. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 7 is a flow chart showing the steps of the manufacturing method of the present invention, and FIG. 7 is a flow chart showing the steps (8) to (1) of the manufacturing method of the present embodiment. Description of the component symbols] 11...the growth substrate 42•...·...instead of the substrate 12...the electronic grade tape 43...·--the bonding layer 13...the growth substrate 44... · Replace the substrate 14 ... ... bonding layer 5 ... • ... composite mirror 15 ... ... polymer layer 51 ... .... metal reflective layer 16 ... ... temporary 4 substrate 52....· •... Electrical layer... ...electronic grade tape 53....·..... contact layer 2 ....... • cat day ^ 54·..._ metal column 21... first Face 61•...·...the first stress-binding layer 22...the second surface 62...·--the first stress-binding layer 3...the contact electrode 63·... .... seed layer 4 . . . ... heat sink carrier 7 ... • ... protective layer 41 ... ... back electrode 1 21