KR20090119259A - Vertical light emitting diode package and fabrication method thereof - Google Patents

Vertical light emitting diode package and fabrication method thereof Download PDF

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Publication number
KR20090119259A
KR20090119259A KR20080045186A KR20080045186A KR20090119259A KR 20090119259 A KR20090119259 A KR 20090119259A KR 20080045186 A KR20080045186 A KR 20080045186A KR 20080045186 A KR20080045186 A KR 20080045186A KR 20090119259 A KR20090119259 A KR 20090119259A
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South Korea
Prior art keywords
light emitting
emitting diode
layer
method
metal layer
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KR20080045186A
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Korean (ko)
Inventor
김강호
김상묵
백종협
유영문
이상헌
이승재
전성란
탁 정
진정근
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한국광기술원
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PURPOSE: A vertical light emitting diode package and a fabrication method thereof are provided to implement thermal conductivity in comparison with a price by laminating a ceramic substrate with a via hole in it on a semiconductor layer and removing a sapphire substrate having low thermal conductance. CONSTITUTION: A vertical type light-emitting diode package includes a light emitting diode, an ohmic contact layer, a bonding metal layer, and a ceramic substrate. A texturing structure in a lower-part of the light emitting diode(210), and the light emitting diode includes the semiconductor layer and the active layer which are different type. The light emitting diode has an inverted mesa structure or a mesa structure, and the ohmic contact layer(220) is laminated on the light emitting diode. The ohmic contact layer is composed of an electrode and a reflective film, and the bonding metal layer includes the ohmic contact layer inside it. The bonding metal layer is composed of a seed metal layer and a conductive bonding layer, and the ceramic substrate is laminated on the top of the bonding metal layer.

Description

Vertical light emitting diode package and fabrication method thereof

The present invention relates to a vertical light emitting diode package and a method for manufacturing the same, in which a ceramic substrate including a metal-filled via hole is stacked on the nitride semiconductor device to minimize thermal expansion coefficients of the ceramic substrate and the semiconductor device. It is about.

Compound semiconductor light emitting devices that convert electrical signals to light using characteristics of compound semiconductors, that is, light emitting devices such as LEDs (Lght Emitting Diodes) or laser diodes (LDs), are used in lighting, optical communication, and multiple communication applications. Has been studied and put into practical use.

Recently, as a light emitting device (LED) using a nitride-based (GaN) semiconductor can be replaced by a conventional light source such as an incandescent lamp, a fluorescent lamp, a mercury lamp, research on a high power light emitting device (LED) is being conducted.

In general, in order to fabricate a nitride (GaN) light emitting device, as shown in FIGS. 1A to 1D, the buffer layer 112, the N-type gallium nitride semiconductor layer 114, and the active layer 116 are disposed on the sapphire substrate 100. And sequentially depositing the P-type gallium nitride semiconductor layer 118 (FIG. 1A), depositing the transparent electrode 120 on the P-type gallium nitride semiconductor layer 118 (FIG. 1B), and then etching the plasma. Etching is performed so that a portion of the N-type gallium nitride semiconductor layer 114 is exposed (FIG. 1C), and an upper portion of the exposed N-type gallium nitride semiconductor layer 114 or the P-type gallium nitride semiconductor layer 118. The pad electrode was formed on the N-type 140 or P-type 130 (FIG. 1D).

In the case of the light emitting device manufactured by the above method, the light output is decreased due to the increase of the current diffusion resistance during the high output operation, and the stability of the device is lowered because the heat generated from the light emitting device is not smoothly removed through the sapphire substrate when the high current is applied. Problems will arise.

In order to overcome the above disadvantages, a light emitting device using a flip chip method has been recently manufactured. However, the flip chip light emitting device has an advantage of improving thermal characteristics compared to the conventional method, but the manufacturing process is complicated. While light emitted from the active layer penetrates the sapphire substrate, a large amount is absorbed by the sapphire substrate, which reduces the light efficiency.

In order to solve the problems of the prior art, the present invention removes a sapphire substrate having low thermal conductivity, and mounts a ceramic substrate including a via hole filled with a metal therein, thereby providing a thermal expansion coefficient between the gallium nitride semiconductor layer and the ceramic substrate. The purpose of the present invention is to provide a reliable vertical light emitting diode package and a method of manufacturing the same by minimizing and improving thermal conductivity.

In order to achieve the above object, the vertical light emitting diode package and a method of manufacturing the same according to the present invention bond a ceramic substrate having via holes on a gallium nitride semiconductor layer to form a light emitting device, thereby thermal expansion between the semiconductor layer and the ceramic substrate. It is possible to improve the light efficiency by minimizing the coefficient.

The present invention relates to a vertical light emitting diode, which forms a texturing structure on a lower surface, includes a semiconductor layer and an active layer of different types, includes a light emitting diode having an inverted mesa or mesa structure, and is stacked on top of the light emitting diode. And an ohmic contact layer composed of an electrode and a reflective film. And a ceramic substrate including a ohmic contact layer therein, a bonding metal layer including a seed metal layer and a conductive adhesive layer, stacked on top of the bonding metal layer, and including a via hole filled with a metal therein. It is preferable.

In the present invention, the light emitting diode preferably includes a protective thin film layer on its side.

In the present invention, the protective thin film layer is preferably made of silicon oxide (SiO 2 ) or silicon nitride (Si 3 N 4 ).

In the present invention, the reflective ohmic contact layer may be formed of indium tin oxide (ITO), indium oxide, tin oxide, silicon cloth side (SiO 2 ), silicon nitride (Si 3 N 4 ), aluminum oxide, titanium oxide, silver (Ag). At least one selected from nickel (Ni), aluminum (Al), titanium (Ti), palladium (Pd), platinum (Pt), ruthenium (Ru), gold (Au), rhodium (Rh), and iridium (Ir) It is preferably formed of a material.

In the present invention, the via hole is preferably filled with at least one metal selected from copper (Cu), copper (CuW), aluminum (Al), gold (Au), and silver (Ag).

In the present invention, the seed metal layer is silver (Ag), nickel (Ni), aluminum (Al), titanium (Ti), palladium (Pd), platinum (Pt), ruthenium (Ru), gold (Au), rhodium (Rh) ), Iridium (Ir), tantalum (Ta), copper (Cu), tungsten (W), tungsten titanium alloy (WTi) and molybdenum (Mo).

In the present invention, the conductive adhesive layer is a palladium indium compound (Pd / In), palladium tin compound (Pd / Sn), tin tin compound (Au-Sn), tin (Sn), indium (In), gold (Au), It is preferably formed of one or more metals selected from gold and silver compounds (Au / Ag) and lead tin compounds (Pb-Sn).

In the present invention, the ceramic substrate is preferably formed of a material selected from boron nitride (BN), alumina (Alumina), aluminum nitride (AlN), beryllium oxide (BeO) and glass ceramic (glass ceramic).

The present invention also relates to a method of manufacturing a vertical light emitting diode package, comprising stacking an ohmic contact layer formed of an electrode and a reflective film on top of a light emitting diode including a substrate and a semiconductor layer, wherein the ohmic contact layer is disposed therein. And laminating a bonding metal layer formed of a seed metal layer and a conductive adhesive layer. And laminating a ceramic substrate including a via hole filled with a metal on top of the bonding metal layer, removing the substrate, and etching the semiconductor layer in a trench to create individual light emitting devices. It is preferable.

In the present invention, after generating the individual light emitting device, it is preferable to further include forming a protective thin film layer on the side of the individual light emitting device.

In the present invention, it is preferable that the semiconductor layer exposed under the individual light emitting device further includes forming a texturing structure.

In the present invention, the texturing structure is preferably formed by dry etching after patterning or by wet chemical etching in one of the methods selected from nanoimprinting, lithography, and laser holography.

According to the present invention, a ceramic substrate having a via hole filled with a filling metal is stacked on the semiconductor layer, and a sapphire substrate having low thermal conductivity is removed, thereby exhibiting excellent thermal conductivity.

In addition, since the via hole is filled with a metal in the ceramic substrate to enable electrical communication with the outside, the thermal expansion coefficient between the semiconductor layer and the ceramic substrate is minimized, thereby improving reliability of the light emitting device.

In addition, a large area can be produced using a ceramic substrate, and the light emitting devices can be manufactured at low cost by simply separating the light emitting devices individually through a trench forming process under the semiconductor layer, and at the same time, various light emitting devices can be applied. It works.

Preferred embodiments of the present invention will be described with reference to the accompanying drawings. In adding reference numerals to components of the following drawings, it is determined that the same components have the same reference numerals as much as possible even if displayed on different drawings, and it is determined that they may unnecessarily obscure the subject matter of the present invention. Detailed descriptions of well-known functions and configurations will be omitted.

2A to 2H illustrate a method of manufacturing a vertical light emitting diode including a ceramic substrate including a via hole according to an exemplary embodiment of the present invention.

Referring to FIG. 2A, a buffer layer, an undoped-GaN layer 212, an n-type semiconductor layer 214, an active layer 216, and a p-type semiconductor layer 218 are sequentially formed on a substrate 200 for growing a light emitting diode. Laminated.

The light emitting diode growth substrate 200 may use a sapphire substrate, and the n-type semiconductor layer 214 and the p-type semiconductor layer 218 may use a nitride semiconductor layer, and more preferably gallium nitride (GaN). ) A semiconductor layer can be used. In addition, the n-type semiconductor layer may be grown once more on the p-type semiconductor layer 218.

Referring to FIG. 2B, a reflective ohmic contact layer 220 including a p-type electrode and a reflective film is stacked on the p-type semiconductor layer 218 of FIG. 2A.

The ohmic contact layer 220 includes a conductive metal such as silver (Ag) or aluminum (Al), and may be configured by selecting various structures.

More specifically, indium tin oxide (ITO), indium oxide, tin oxide, silicon cloth side (SiO 2 ), silicon nitride (Si 3 N 4 ), aluminum oxide, titanium oxide, silver (Ag), nickel (Ni), It may be formed of one or more materials selected from aluminum (Al), titanium (Ti), palladium (Pd), platinum (Pt), ruthenium (Ru), gold (Au), rhodium (Rh) and iridium (Ir). And at least one layer.

Referring to FIG. 2C, the bonding metal layer 230 is stacked on the ohmic contact layer 220 of FIG. 2B to easily bond the bonding metal of the p-type semiconductor layer.

The bonding metal layer 230 mediates the bonding between the ceramic substrate having the via hole and the p-type semiconductor layer 218 and may be formed of the seed metal layer 232 and the conductive adhesive layer 234.

The seed metal layer 232 includes an ohmic contact layer 220 therein, and includes silver (Ag), nickel (Ni), aluminum (Al), titanium (Ti), palladium (Pd), and platinum (Pt). , Ruthenium (Ru), gold (Au), rhodium (Rh), iridium (Ir), tantalum (Ta), copper (Cu), tungsten (W), tungsten titanium alloy (WTi) and molybdenum (Mo) It is preferred to form one or more layers formed of one or more metals.

The conductive adhesive layer 234 may include a palladium indium compound (Pd / In), a palladium tin compound (Pd / Sn), a tin compound (Au-Sn), tin (Sn), indium (In), gold (Au), It may be formed of a material selected from a palladium gold compound (Pd / Au) and lead tin compound (Pb-Sn).

Referring to FIG. 2D, the ceramic substrate 240 having the light emitting diode 210 and the via hole 242 formed in FIG. 2C is bonded to each other using the bonding metal layer 230. It may be formed of an insulating material having a thermal conductivity of 100 W / mK or more, and may be formed of a material selected from boron nitride (BN), alumina, aluminum nitride (AlN), beryllium oxide (BeO), and glass ceramic. have. More preferably, aluminum nitride (AlN), which has excellent thermal conductivity for the cost, has a small difference in coefficient of thermal expansion with a gallium nitride (GaN) layer, and can be used in a large area, may be used.

In addition, a plurality of via holes 242 may be formed in the ceramic substrate 240, and an inside thereof may be filled with a metal to electrically communicate the light emitting diodes with the outside. A method of forming the via hole 242 in the ceramic substrate 240 is described with reference to FIGS. 3A to 3E below.

In addition, in order to bond the ceramic substrate 240 and the bonding metal layer 230 formed on the light emitting diode 210, a seed metal layer 244 and a conductive adhesive layer 246 are sequentially stacked on the ceramic substrate 240. can do. Accordingly, when the ceramic substrate 240 is bonded to the light emitting bonding metal layer 230, the conductive adhesive layer 234 of the bonding metal layer 230 and the conductive adhesive layer 246 stacked on the ceramic substrate 240 are formed. It is attached and formed.

The seed metal layer 244 and the conductive adhesive layer 246 stacked on the ceramic substrate 240 may be formed of the same material as the seed metal layer 232 and the conductive adhesive layer 234 of the bonding metal layer 230. The conductive adhesive layers 246 and 234 may be formed on only one of the ceramic substrate 240 or the top of the seed metal layer 232.

Referring to FIG. 2E, the sapphire substrate may be removed by laser light by removing the light emitting diode growth substrate 200, that is, the sapphire substrate, which may cause the gallium nitride-based light emitting diode to be broken.

Referring to FIG. 2F, the sapphire substrate 200 is removed to form patterning on the exposed portion, and a portion of the light emitting diode 210 is etched to form an inverted mesa or mesa shape by using a plasma dry etching method. The light emitting diode 210 formed in FIG. 2E may be separated into individual devices.

In this case, the light emitting diode 210 may have a shape of reverse mesa or mesa, and after laminating the light emitting diode 210 and the ceramic substrate 240 including the via hole, etching is performed to separate the polymer organic compound and the like. It is possible to prevent the cracking phenomenon of the light emitting diode without the filling material and the filling process.

In addition, the light emitting diodes 210 of the etched portions are all removed by etching so as to prevent a short-circuit phenomenon later, and silicon oxide (SiO 2 ) or silicon nitride (Si) is formed on the etched light emitting diodes 210 side. A protective film 250 formed of 3 N 4 ) may be deposited.

Referring to FIG. 2G, the lower surface of the light emitting diode 210 in which the passivation layer 250 is not deposited in FIG. 2F, that is, the buffer layer and the undoped-GaN layer 212 is removed by plasma etching or chemical etching. After the semiconductor layer 214 is formed to be exposed, it can be seen that the n-type electrode 260 is coupled to the exposed n-type semiconductor layer 214 surface.

In this case, the etching of the buffer layer and the undoped-GaN layer 212 to expose the n-type semiconductor layer 214 is not in any order, but may be performed at any time after the sapphire substrate 200 is removed.

Referring to FIG. 2H, a process of separating the above-described light emitting diode package (a ceramic substrate on which the light emitting diode and the via hole are formed) into individual devices, and the cutting method is used in the art such as a dicing process and a scribing process. Method can be used.

3A to 3E are views illustrating a method of manufacturing a ceramic substrate including a via hole according to an exemplary embodiment of the present invention.

FIG. 3A illustrates a side view of the ceramic substrate 240, and forms a via hole 242 having a space penetrating therein. Referring to FIG. 3B, the ceramic substrate 240 including the via hole 242 is formed. The seed metal layer 244 is stacked on the bottom surface.

The seed metal layer 244 may be formed to facilitate bonding between the ceramic substrate 240 and the filling metal when the metal is filled in the via hole 242, and may include silver (Ag), nickel (Ni), and aluminum ( Al, titanium (Ti), palladium (Pd), platinum (Pt), ruthenium (Ru), gold (Au), rhodium (Rh), iridium (Ir), tantalum (Ta) and copper (Cu) It can be formed from a metal.

FIG. 3C illustrates a metal filling layer 300 formed by filling a metal in the lower surface of the via hole 242 and the seed metal layer 244. The metal filling layer 300 may include copper (Cu), copper (CuW), It may be formed of aluminum (a), gold (Au), silver (Ag), or the like.

In this case, the metal filling layer 300 may be filled only in the via hole 242 and may not be formed on the bottom surface of the seed metal layer 244.

In addition, when the metal filled in the via hole 242 protrudes and fills the upper portion of the ceramic substrate 240, the planarization process of uniformly flattening the ceramic substrate 240 should be performed. It is not limited and may proceed in any order before forming the contact metal layer. See the contact metal layer in FIG. 3E below.

FIG. 3D illustrates a bonding metal layer 246 formed on the bottom surface of the metal filling layer 300. The bonding metal layer 246 is formed by sequentially forming the light emitting diodes 210 on the growth substrate 200. When the light emitting device is configured, the stacking layer may be sequentially stacked on the light emitting device, and the bonding metal layer 246 may be formed in the process of forming the ceramic substrate having the via hole as shown in the embodiment of the present invention.

Referring to FIG. 3E, the filling metal layer 300 formed on the top surface of the ceramic substrate may be flattened, and then the contact metal layer 310 may be formed on the top surface of the filling metal 300 of the via hole 242.

4 is a view illustrating a vertical light emitting diode including a texturing structure on a lower semiconductor layer according to another exemplary embodiment of the present invention.

Referring to FIG. 4, after cleaning portions exposed to the bottom surface of the light emitting diode formed through the process of FIGS. 2A to 2F, the texturing structure 400 is formed on the n-type semiconductor layer 214.

The texturing structure 400 is not determined at a processing time, and may be processed at any time before forming the n-type electrode 260.

In addition, the texturing structure 400 may be used using a regular pattern and random patterning, and when using the regular pattern, nanoimprinting, electron beam lithography, and laser holographic methods may be used.

In the case of using the random patterning, nano-sized clusters are formed through heat treatment of metals such as silver (Ag), nickel (Ni), gold (Au), platinum (Pt), and chaladium (Pd), followed by dry etching. Random texturing structures can be formed.

In addition, when a random texturing structure is formed by a wet chemical etching method, a texturing structure may be formed on the n-type semiconductor layer 214 after etching using a concentrated aqueous potassium hydroxide (KOH) solution or an aqueous ammonia solution. have.

When the texturing structure is formed on the n-type semiconductor layer 214 through the above method, it is possible to bring about an effect of improving the thermal conductivity when the LED package is operated.

The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting of the invention. Singular expressions include plural expressions unless the context clearly indicates otherwise. In this application, the terms "comprise" or "having" are intended to indicate that there is a feature, number, step, operation, component, part, or combination thereof described in the specification, and one or more other features. It is to be understood that the present invention does not exclude the possibility of the presence or the addition of numbers, steps, operations, components, components, or a combination thereof.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art. Terms such as those defined in the commonly used dictionaries should be construed as having meanings consistent with the meanings in the context of the related art and shall not be construed in ideal or excessively formal meanings unless expressly defined in this application. Do not.

Those skilled in the art can change or modify the described embodiments without departing from the scope of the present invention, and such changes or modifications are within the scope of the present invention. In addition, the materials of each component described herein can be readily selected and coped by a variety of materials known to those skilled in the art. In addition, those skilled in the art may omit some of the components described herein without adding to the performance or add the components to improve performance. In addition, those skilled in the art may change the order of the method steps described herein according to the process environment or equipment. Therefore, the scope of the present invention should be determined not by the embodiments described, but by the claims and their equivalents.

1A to 1D illustrate a method of manufacturing a conventional nitride based light emitting device.

2A to 2H illustrate a method of manufacturing a vertical light emitting diode including a ceramic substrate including a via hole according to an embodiment of the present invention.

3A to 3E are views illustrating a method of manufacturing a ceramic substrate including a via hole according to an embodiment of the present invention.

4 is a view illustrating a vertical light emitting diode including a texturing structure on a lower semiconductor layer according to another exemplary embodiment of the present invention.

           <Explanation of symbols for the main parts of the drawings>

100, 200: substrate for growth of light emitting diodes

112: buffer layer 114, 214: n-type semiconductor layer

116 and 216 active layer 118 and 218 p-type semiconductor layer

120: transparent electrode 130: p-type electrode

140, 260: n-type electrode 210: light emitting diode

212: buffer layer and undoped-GaN layer 220: reflective ohmic contact layer

230: bonding metal layer 232, 244: seed metal layer

234, 246: conductive adhesive layer 240: ceramic substrate

242: via hole 250: protective film layer

300: filled metal layer 310: contact metal layer

400: texturing structure

Claims (12)

  1. A light emitting diode having a texturing structure formed on a lower surface thereof, including a semiconductor layer and an active layer of different types, and having an inverse mesa structure or a mesa structure;
    An ohmic contact layer stacked on the light emitting diode and composed of an electrode and a reflective film;
    A bonding metal layer including the ohmic contact layer therein and comprising a seed metal layer and a conductive adhesive layer; And
    And a ceramic substrate stacked on top of the bonding metal layer, the ceramic substrate including a via hole filled with a metal therein.
  2. The method of claim 1, wherein the light emitting diode
    Vertical light emitting diode package comprising a protective thin film layer on the side.
  3. The method of claim 2, wherein the protective thin film layer
    Vertical light emitting diode package, characterized in that consisting of silicon oxide (SiO 2 ) or silicon nitride (Si 3 N 4 ).
  4. The method of claim 1, wherein the reflective ohmic contact layer
    Indium Tin Oxide (ITO), Indium Oxide, Tin Oxide, Silicon Oxide (SiO 2 ), Silicon Nitride (Si 3 N 4 ), Aluminum Oxide, Titanium Oxide, Silver (Ag), Nickel (Ni), Aluminum (Al ), Vertically formed of one or more materials selected from titanium (Ti), palladium (Pd), platinum (Pt), ruthenium (Ru), gold (Au), rhodium (Rh) and iridium (Ir) Type light emitting diode package.
  5. The method of claim 1, wherein the via hole is
    A vertical light emitting diode, wherein the vertical light emitting diode is filled with at least one metal selected from copper (Cu), copper (CuW), aluminum (Al), gold (Au), and silver (Ag).
  6. The method of claim 1, wherein the seed metal layer is
    Silver (Ag), nickel (Ni), aluminum (Al), titanium (Ti), palladium (Pd), platinum (Pt), ruthenium (Ru), gold (Au), rhodium (Rh), iridium (Ir), A vertical light emitting diode, characterized in that formed of at least one metal selected from tantalum (Ta), copper (Cu), tungsten (W), tungsten titanium alloy (WTi), and molybdenum (Mo).
  7. The method of claim 1, wherein the conductive adhesive layer
    Palladium indium compound (Pd / In), palladium tin compound (Pd / Sn), tin compound (Au-Sn), tin (Sn), indium (In), gold (Au), palladium gold compound (Pd / Au And a lead tin compound (Pb-Sn).
  8. The method of claim 1, wherein the ceramic substrate
    A vertical light emitting diode package, which is formed of a material selected from boron nitride (BN), alumina, aluminum nitride (AlN), beryllium oxide (BeO), and glass ceramic.
  9. Stacking an ohmic contact layer formed of an electrode and a reflective film on top of a light emitting diode including a substrate and a semiconductor layer;
    Stacking a bonding metal layer formed of a seed metal layer and a conductive adhesive layer by including the ohmic contact layer therein;
    Stacking a ceramic substrate including a via hole filled with a metal on the bonding metal layer;
    Removing the substrate and etching the semiconductor layer into a trench to create individual light emitting devices.
  10. The method of claim 9, wherein after generating the individual light emitting device,
    Forming a protective thin film layer on the side of the individual light emitting device further comprises a vertical light emitting diode package manufacturing method.
  11. 10. The method of claim 9, wherein the semiconductor layer exposed to the lower portion of the individual light emitting device further comprises forming a texturing structure.
  12. 12. The method of claim 11 wherein the texturing structure is
    Method of manufacturing a vertical light emitting diode package, characterized in that formed by dry etching after the patterning by a method selected from the nano-imprinting method, lithography method and laser holography method or by wet chemical etching method.
KR20080045186A 2008-05-15 2008-05-15 Vertical light emitting diode package and fabrication method thereof KR20090119259A (en)

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Cited By (7)

* Cited by examiner, † Cited by third party
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KR101020995B1 (en) * 2010-02-18 2011-03-09 엘지이노텍 주식회사 Light emitting device, method of fabricating the light emitting device and light emitting device package
US8354664B2 (en) 2010-02-11 2013-01-15 Lg Innotek Co., Ltd. Light emitting device and light emitting device package having the same
KR101278063B1 (en) * 2012-02-06 2013-06-24 전남대학교산학협력단 Separation method of semiconductor device using nanoporous gan
US8723213B2 (en) 2010-02-18 2014-05-13 Lg Innotek Co., Ltd. Light emitting device and light emitting device package
KR20160100880A (en) * 2016-08-11 2016-08-24 엘지전자 주식회사 Solar cell and manufacturing method thereof
US9537056B2 (en) 2010-02-18 2017-01-03 Lg Innotek Co., Ltd. Light emitting device
US9972738B2 (en) 2010-09-03 2018-05-15 Lg Electronics Inc. Solar cell and method for manufacturing the same

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8723210B2 (en) 2010-02-11 2014-05-13 Lg Innotek Co., Ltd. Light emitting device and light emitting device package having the same
US8354664B2 (en) 2010-02-11 2013-01-15 Lg Innotek Co., Ltd. Light emitting device and light emitting device package having the same
US8581277B2 (en) 2010-02-11 2013-11-12 Lg Innotek Co., Ltd. Light emitting device and light emitting device package having the same
US8179039B2 (en) 2010-02-18 2012-05-15 Lg Innotek Co., Ltd. Light emitting device, method of manufacturing the same, light emitting device package, and illumination system
US8723213B2 (en) 2010-02-18 2014-05-13 Lg Innotek Co., Ltd. Light emitting device and light emitting device package
KR101020995B1 (en) * 2010-02-18 2011-03-09 엘지이노텍 주식회사 Light emitting device, method of fabricating the light emitting device and light emitting device package
US9537056B2 (en) 2010-02-18 2017-01-03 Lg Innotek Co., Ltd. Light emitting device
US9972738B2 (en) 2010-09-03 2018-05-15 Lg Electronics Inc. Solar cell and method for manufacturing the same
US10090428B2 (en) 2010-09-03 2018-10-02 Lg Electronics Inc. Solar cell and method for manufacturing the same
US10424685B2 (en) 2010-09-03 2019-09-24 Lg Electronics Inc. Method for manufacturing solar cell having electrodes including metal seed layer and conductive layer
KR101278063B1 (en) * 2012-02-06 2013-06-24 전남대학교산학협력단 Separation method of semiconductor device using nanoporous gan
KR20160100880A (en) * 2016-08-11 2016-08-24 엘지전자 주식회사 Solar cell and manufacturing method thereof

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