WO2012043923A1 - 반도체 패키지 제작용 접착제 조성물 및 접착시트 - Google Patents

반도체 패키지 제작용 접착제 조성물 및 접착시트 Download PDF

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Publication number
WO2012043923A1
WO2012043923A1 PCT/KR2010/007841 KR2010007841W WO2012043923A1 WO 2012043923 A1 WO2012043923 A1 WO 2012043923A1 KR 2010007841 W KR2010007841 W KR 2010007841W WO 2012043923 A1 WO2012043923 A1 WO 2012043923A1
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WIPO (PCT)
Prior art keywords
adhesive
adhesive composition
component
adhesive sheet
chip
Prior art date
Application number
PCT/KR2010/007841
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English (en)
French (fr)
Inventor
김성수
김진원
신광호
조경남
황교성
정창범
Original Assignee
주식회사 케이씨씨
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Publication date
Application filed by 주식회사 케이씨씨 filed Critical 주식회사 케이씨씨
Priority to CN201080069397XA priority Critical patent/CN103140558A/zh
Publication of WO2012043923A1 publication Critical patent/WO2012043923A1/ko

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    • C09J133/00—Adhesives based on homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and at least one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides, or nitriles thereof; Adhesives based on derivatives of such polymers
    • C09J133/04—Homopolymers or copolymers of esters
    • C09J133/06—Homopolymers or copolymers of esters of esters containing only carbon, hydrogen and oxygen, the oxygen atom being present only as part of the carboxyl radical
    • C09J133/08—Homopolymers or copolymers of acrylic acid esters
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    • C09J133/00—Adhesives based on homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and at least one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides, or nitriles thereof; Adhesives based on derivatives of such polymers
    • C09J133/04—Homopolymers or copolymers of esters
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    • H01—ELECTRIC ELEMENTS
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    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
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    • C09J7/00—Adhesives in the form of films or foils
    • C09J7/20—Adhesives in the form of films or foils characterised by their carriers
    • C09J7/22—Plastics; Metallised plastics
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    • C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08L—COMPOSITIONS OF MACROMOLECULAR COMPOUNDS
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    • C09J2203/00—Applications of adhesives in processes or use of adhesives in the form of films or foils
    • C09J2203/326—Applications of adhesives in processes or use of adhesives in the form of films or foils for bonding electronic components such as wafers, chips or semiconductors
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    • C09J2301/00—Additional features of adhesives in the form of films or foils
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    • C09J2301/40—Additional features of adhesives in the form of films or foils characterized by the presence of essential components
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Definitions

  • the present invention relates to an adhesive composition that can be used in the process of manufacturing a semiconductor device, and an adhesive material processed into a sheet shape including the same, and more particularly, is attached to the end surface of the wafer during the semiconductor manufacturing process It is used to bond chips. Especially, the flowability at the time of high temperature bonding increases the embedding of structures such as unevenness and metal wiring, and improves interfacial adhesion with supporting members.
  • the present invention relates to an adhesive composition capable of securing reliability and an adhesive sheet including the same.
  • the semiconductor manufacturing process after the circuit etching process of the wafer is divided into a dicing process for cutting the wafer into chips, an expansion and pick-up process for reorganizing the cut chips into individual chips, and a reorganization process by the pickup process.
  • Bonding process for mounting the chip on the substrate metal wiring process for the electrical connection between the chip and the substrate and epoxy molding process for protecting the chip.
  • a protective adhesive sheet for protecting the wafer and an adhesive or adhesive sheet to which the chip can be attached are used.
  • a method of obtaining each chip in a structure in which the chip and the adhesive sheet are integrated by adhering the adhesive sheet to the back surface of the wafer in advance and proceeding with the dicing process is used.
  • Such an adhesive sheet may be provided as a single body in a state in which the adhesive sheet is usually attached, and in this case, unlike the process in which the adhesive sheet is attached to the back side of the wafer and diced, the adhesive sheet is laminated on the back side of the adhesive sheet and provided integrally. Attached to the wafer and then subjected to a series of processes.
  • the method of manufacturing the adhesive sheet integrally with the adhesive sheet and attaching it to the back surface of the wafer during the semiconductor manufacturing process simplifies the process from cutting the wafer to the die attaching process, for example, Korean Patent Publication No. 10-2006-0021337, Korea It is disclosed in the registered patent No. 10-0826420, Republic of Korea Patent No. 10-0646069, Republic of Korea Patent No. 10-0845092.
  • a stacking method of stacking a plurality of semiconductor chips vertically in one space is used as a method for increasing the degree of integration of a semiconductor package.
  • stacking two or more layers of chips in a package consisting of a lead frame or a flexible circuit board can improve the degree of integration.
  • CSP Chip Scale Package
  • a technique of increasing the degree of integration by vertically stacking chips on a substrate having solder bumps is used.
  • a method of vertically stacking chips and chips of the same area is mainly used as a method for efficiently using chip space when stacking a plurality of chips to improve the degree of integration.
  • the chip In order to stack chips of the same size in multiple stages, the chip is attached to a lead frame or board, and the metal wiring work for the electrical connection between the chip and the substrate or the metal bumps mounted on the back of the chip are attached to the substrate.
  • the technique of completing the electrical connection and continuously stacking the chips prepared with the same size on top of the chip is used.
  • the adhesive sheet used in this series of processes has sufficient flowability during the chip attaching process to secure the reliability of the semiconductor device, so that bubbles are formed in the structure such as metal wiring or bump existing between the chip and the chip or the chip and the substrate. It should be buried so as not to generate or damage the structure, and show high interfacial adhesion through the curing process after attachment.
  • thermoplastic rubber component in order to secure flexibility in a solid epoxy resin composition having excellent heat resistance for the manufacture of a sheet-like adhesive that can be handled at room temperature, and diluted with an appropriate mixing solvent to perform a coating process. It manufactures in sheet form and is used for a general chip adhesion process.
  • such a conventional adhesive sheet has a lack of fluidity enough to bury the metal wiring and metal bumps in the process of attaching the chip of the same size, generating bubbles during adhesion, or damage to the wiring arranged on the attachment surface is damaged. There is a problem that occurs.
  • the compatibility between the thermoplastic rubber component and the epoxy resin composition is not good, so that fine phase separation occurs and the adhesion strength is reduced due to aging of the rubber component when exposed to high temperature / high humidity conditions for a long time.
  • a solder resist formed on a surface to be bonded to a chip to protect a board and a chip in which a circuit is planted in addition to a metal component constituting a lead frame, a wiring, a bump, and the like, which is formed to give characteristics of a semiconductor device.
  • a variety of organic materials, such as passivation (Passivation) are exposed at the same time, because they usually have a lower surface energy than the metal, the adhesion may be inhibited when the chip is attached using the adhesive sheet.
  • the present invention is to solve the problems of the prior art as described above, excellent embedding properties for structures such as irregularities and metal wiring exposed on the surface of the semiconductor device to be bonded, and interfacial adhesion with the semiconductor support member It is an object of the present invention to provide an adhesive composition capable of securing the reliability of a semiconductor device even under high temperature / high humidity conditions and an adhesive sheet including the same.
  • the present invention comprises (A) a copolymerized acrylate compound comprising at least one reactive group, (B) a thermosetting epoxy mixture, (C) curing agent, (D) filler and (E) curing accelerator
  • the weight ratio of the component (A): (B) is 95: 5 to 65: 35
  • the component (B) contains at least one epoxy resin having a melt viscosity of 0.1 Pa?
  • the amount of (D) is 10 to 80 parts by weight based on 100 parts by weight of the total amount of the components (A) + (B) + (C), and the amount of the component (E) is the component (A) + (B) + (
  • the adhesive composition is 0.1 to 1.4 parts by weight based on 100 parts by weight of the total amount of C).
  • an adhesive sheet for manufacturing a semiconductor comprising a coating layer of the adhesive composition of the present invention.
  • the adhesive composition and the adhesive film of the present invention are used during the semiconductor manufacturing process, the interfacial adhesion with the adhesive objects is improved, the adhesive property is maintained even under high temperature / high humidity conditions, and the reliability is excellent. Excellent embedding properties can be obtained for structures that can be exposed to the target surface.
  • the copolymer acrylate compound included in the adhesive composition of the present invention includes one or more reactive groups (eg, polar groups), so that the surface energy is appropriately controlled to enable intermolecular crosslinking with other compounds or intramolecular crosslinking with other compounds. Adhesion of the composition is improved, and interfacial adhesion with an organic material having low surface energy in the semiconductor support member is improved.
  • the preferred surface energy is 40 dyne / cm to 50 dyne / cm
  • the preferred weight average molecular weight is 300,000 to 150,000
  • the preferred glass transition temperature is -20 °C to 50 °C. .
  • Preferred examples of the reactive group which can be included in the copolymerized acrylate compound component (A) are at least one selected from acrylonitrile group, epoxy group, hydroxy group and carboxyl group.
  • resins containing an epoxy group and a hydroxyl group in the copolymer acrylate compound include Nagase Chemtex SG-PT115 (0.21 eq / kg epoxy, 20 mgKOH / g hydroxy, Mw 80,000), SG-PT134 (epoxy) 0.21 eq / kg, hydroxy 30 mg KOH / g, Mw 80,000), SG-PT135 (epoxy 0.21 eq / kg, hydroxy 400 mgKOH / g, Mw 80,000), and the like.
  • Copolymer acrylate compounds containing nitrile groups include Xeon Nipol® DN631 (acrylonitrile 33.5%, specific gravity 0.99) and Xeon Nipol® NBR N34 (acrylonitrile 27%, specific gravity 0.98).
  • Copolymer acrylate compounds containing a ronitrile group may include, but are not limited to, Hyundai Petrochemical® SEETEC series.
  • Adhesive composition of this invention WHEREIN: The weight ratio of the said copolymerization acrylate compound component (A): the epoxy mixture component (B) mentioned later is 95: 5-65: 35, More preferably, it is (A) of (B) The weight ratio is 90:10 to 70:30. If the weight ratio of component (A) is used less than the above-mentioned level, the adhesive composition becomes excessively hard and brittle during the coating or cutting process of the adhesive sheet. Sufficient adhesion is not guaranteed, which may cause reliability problems.
  • thermosetting epoxy mixture (B) thermosetting epoxy mixture
  • Examples of the epoxy mixture included in the adhesive composition of the present invention include bisphenol A type epoxy resins, bisphenol F type epoxy resins, bisphenol S type epoxy resins, alicyclic epoxy resins, aliphatic chain epoxy resins, phenol novolac type epoxy resins, Cresol novolak type epoxy resin, bisphenol A novolak type epoxy resin, diglycidyl ether compound of biphenol, diglycidyl ether compound of naphthalenediol, diglycidyl ether compound of phenols, diglycides of alcohols At least one of those generally known, including dialkyl ethers and their alkyl substituents, halides or hydrogenated compounds, polyfunctional epoxy resins, heterocyclic epoxy resins, and the like, and a melt viscosity of 0.1 Pa. Mixtures with one or more epoxy resins of less than or equal to s (eg 0.001 to 0.01 Pa.s) are usable.
  • the epoxy mixture component (B) contains at least one epoxy resin having a melt viscosity of 0.1 Pa ⁇ s or less (for example, 0.001 to 0.1 Pa ⁇ s) at 150 ° C.
  • epoxy resins include YDC-1312 (Epoxy equivalent 180g / eq, 0.01 Pa.s of 150 ° C viscosity), YSLV-80XY (Epoxy equivalent 195g / eq, 0.01 Pa.s of 150 ° C), YSLV- 120TE (Epoxy equivalent 245g / eq, 150 °C viscosity 0.1 Pa.s), Yuccacel YX-4000 (Epoxy equivalent 192g / eq, 150 °C viscosity 0.005 Pa.s), Nippon Kayaku XD-1000-2L (Epoxy equivalent 240 g / eq, 150 degreeC viscosity 0.05 Pa.s), CER-3000-L (epoxy equivalent 233g /
  • An epoxy resin having a melt viscosity of 0.1 Pa ⁇ s or less at 150 ° C. is used so that the ratio of the value of (Log. Damping ratio) is 3.0 to 5.0, and the damping ratio is 0.01 to 0.1 at 120 ° C. It may be included in the epoxy mixture component (B).
  • the damping ratio of 80 ° C./120° C. is less than 3.0, the flowability at high temperature is too high, and thus it is difficult to keep the upper and lower gaps constant while attaching the chip and the substrate or the chip and the chip.
  • the damping ratio at 120 ° C. is greater than 0.1, it may be difficult to have sufficient flowability when attached to the semiconductor support member and thus may not have sufficient embedding properties for unevenness or metal wiring exposed on the adhesive surface.
  • the meaning of the adhesive sheet property ranges, characterized by ROME® RPT-3000W, is described later in the adhesive sheet evaluation method.
  • the weight ratio of the copolymerized acrylate compound component (A) to the epoxy mixture component (B) is 95: 5 to 65:35, and more preferably the weight ratio of (A) :( B) is 90:10 to 80:20. If the weight ratio of component (B) is used in excess of the above-mentioned level, the adhesive composition becomes too hard to be brittle during the coating or cutting process of the adhesive sheet. Sufficient adhesion is not guaranteed, which may cause reliability problems.
  • a curing agent is used for curing the epoxy resin.
  • a curing agent those known in the art may be used, and for example, may be selected from known curing agent compounds for epoxy resins including phenolic compounds, amine compounds, and acid anhydrides.
  • phenolic resins such as phenol novolac resins having two or more hydroxy groups and having a hydroxy equivalent weight of 100 g / eq to 300 g / eq are used without particular limitation.
  • the adhesive composition of this invention it is preferable to use a hardening
  • the amount of the curing agent is out of this range, unreacted epoxy resin or curing agent resin may remain, resulting in deterioration at high temperature, thereby lowering reliability.
  • the adhesive composition of the present invention includes a filler for adjusting heat resistance, high temperature flowability, process handleability, and the like of the adhesive sheet.
  • the filler usable in the adhesive composition of the present invention is not particularly limited, and for example, as particles of silica, alumina, silver, gold coating beads, silicon beads, carbon black, aluminum hydroxide, magnesium hydroxide, boron nitride, titanium dioxide, ceramics, and the like. Particles with an average particle size of 10 nanometers to 10 micrometers and in spherical form can be used. It is preferable to use spherical silica, which has good dispersibility in the adhesive composition and is advantageous for imparting flowability at high temperature.
  • the amount of the filler (D) contained in the adhesive composition of the present invention is 10 to 80 parts by weight, more preferably 20 to 60 parts by weight based on 100 parts by weight of the total amount of the components (A) + (B) + (C). to be.
  • the amount of the filler used is less than 10 parts by weight based on 100 parts by weight of the total amount of the components (A) + (B) + (C)
  • the strength of the adhesive sheet is lowered and deformation due to thermal stress at high temperature is likely to occur, and 80 weights If the portion exceeds the brittleness of the adhesive sheet is easy to be broken during the process, and also has a problem in that the process workability is inferior to the adhesive strength with the adhesive film.
  • a curing accelerator is used to improve the curing rate.
  • the filler usable in the adhesive composition of the present invention is not particularly limited and may be used as long as it can shorten the curing time of the adhesive composition at the temperature of the curing conditions.
  • commercially available products include Chrysanthemum Co., Ltd. 2MZ-A, C11Z-A, 2MA-OK, 2PHZ, 2P4MHZ, and Hoko Chemical's TPP, TBP, TBP, TPP-K, TPP-MK, TPPO. , DPPE, DPPB and the like.
  • the amount of the curing accelerator (E) contained in the adhesive composition of the present invention is 0.1 to 1.4 parts by weight, more preferably 0.2 to 1.0 weight based on 100 parts by weight of the total amount of the components (A) + (B) + (C). It is wealth.
  • the amount of the curing accelerator is less than 0.1 part by weight based on 100 parts by weight of the total amount of the components (A) + (B) + (C)
  • sufficient curing degree cannot be obtained in the curing process after chip stacking. Shaking of the lower chip may cause defects, and if it exceeds 1.4 parts by weight, some side reactions may occur due to heat generated during the manufacturing process of the adhesive sheet, and there is a possibility that long-term storage of the product may be impaired. .
  • the adhesive composition of the present invention in addition to the components described above, components commonly used in the adhesive composition for semiconductor processing, for example, solvents such as acetone, methyl ethyl ketone, toluene, ethyl acetate, etc., adhesion promoters, coupling agents, antistatic agents Fastening agents, heat curing aids, adhesion enhancers, wetting properties, leveling enhancers and the like may be further included in an appropriate amount.
  • a coupling agent that helps to improve the elastic modulus and heat resistance can be used within 3.0 parts by weight with respect to 100 parts by weight of the total composition.
  • the adhesive composition of the present invention may be prepared by dispersing and mixing the above-described components at room temperature to an appropriately elevated temperature using a mixing equipment such as a bead mill.
  • an adhesive sheet for manufacturing a semiconductor comprising a coating layer of the adhesive composition of the present invention as described above.
  • Adhesive sheet for semiconductor production according to the invention is characterized in that it comprises a coating layer of the adhesive composition of the present invention, in addition to one or more substrate (film) layer [release (film) layer or protective (film) as necessary in the film configuration ) Layer] and an adhesive (film) layer may be further included.
  • Adhesive sheet for semiconductor production according to an embodiment of the present invention is a substrate layer + adhesive composition layer; Base layer + adhesive composition layer + base layer; Base material layer + pressure-sensitive adhesive layer + adhesive composition layer; It may have a layer configuration such as a base layer + pressure-sensitive adhesive layer + adhesive composition layer + base layer, but is not limited thereto.
  • the base layer material that can be included in the adhesive sheet for manufacturing a semiconductor of the present invention is not particularly limited, and those commonly available as the base film of the adhesive sheet for manufacturing a semiconductor, such as polyethylene terephthalate, polyolefin-based or polyvinyl chloride-based materials, may be used.
  • the adhesive layer such as an acrylic material containing a photoreactive oligomer, may be used an adhesive material commonly used in the adhesive sheet for semiconductor manufacturing.
  • the coating layer dry thickness of the adhesive composition preferably 10 to 200 ⁇ m thickness. If the thickness of the coating layer of the adhesive composition is less than 10 ⁇ m the adhesive effect may not be sufficient, if it exceeds 200 ⁇ m coating process by the residual volatile components in the coating film drying process is not easy, high temperature due to the high step even when applying the adhesive process When attaching, the adhesive may flow out to the side.
  • the adhesive composition preferably exhibits a degree of cure of at least 50% within 125 ° C. and 60 minutes, and the residual volatile content in the coating layer of the adhesive composition is preferably 1% by weight or less.
  • the adhesive sheet manufacturing method of the present invention can be prepared in a conventional process using a conventional multi-layer adhesive sheet manufacturing equipment.
  • the adhesive composition of the present invention is diluted with an organic solvent which can be diluted if necessary, mixed at an appropriate concentration for easy coating production, and then coated and dried on a base film such as polyethylene terephthalate.
  • the adhesive sheet can be produced in a manner.
  • any method may be used as long as it can form a coating film such as bar coating, gravure coating, comma coating, roll reverse coating, roll naipper coating, die coating, and lip coating.
  • the adhesive sheet for manufacturing a semiconductor of the present invention is excellent in high temperature flowability and has excellent embedding properties for structures such as uneven and metal wirings exposed on the adhesive surface, and improves interfacial adhesion with a semiconductor support member. It is possible to secure the reliability of semiconductor devices even under high temperature and high humidity conditions.
  • Specimen for the evaluation of Leo Vibron in the following evaluation method was prepared by laminating the prepared adhesive sheet at 60 °C to 200 ⁇ m thickness.
  • the adhesive composition and the adhesive sheet were prepared in the same manner as in Example 1.
  • A1 SG-PT115 (Nagase Chemtex, 0.21eq / kg epoxy, 20mgKOH / g hydroxy)
  • A2 SG-PT134 (Nagase Chemtex Co., Ltd., 0.21eq / kg epoxy, 30mgKOH / g hydroxy)
  • KNB 40M Kelho Petrochemical, Acrylonitrile-butadiene rubber, Acrylonitrile 41%, Mooney viscosity (ML + 4,100 ° C) 60
  • R2 KNB 20LM (Kumho Petrochemical Co., Ltd., acrylonitrile-butadiene rubber, acrylonitrile 28%, Mooney viscosity (ML + 4,100 °C) 50)
  • each of the prepared adhesive compositions was prepared by coating a uniform coating thickness on a flat, rigid support plate.
  • the surface energy with water was measured using a contact angle measuring instrument (Surface Electro Optics, SEO300A).
  • Adhesion was measured by a 90 ° peel test using a universal testing machine according to JIS Z 0237 standard and KSA 1107 standard (test method of adhesive tape and adhesive sheet).
  • both sides of the adhesive sheet were heated and pressed at 65 ° C. with a 1 mil polyimide film (INS70, IN70), and the specimen was prepared at a width of 10 mm and a length of 150 mm.
  • the test speed was 50 mm / min. It evaluated on condition.
  • the adhesive sheets prepared in Examples and Comparative Examples were laminated with a patterned 8-inch wafer by using a tape mounting facility (DT-MWM 1230A, Dynatech Co., Ltd., DT-MWM 1230A) once reciprocally pressed using a rubber roller.
  • DT-MWM 1230A Dynatech Co., Ltd.
  • DT-MWM 1230A Dynatech Co., Ltd.
  • an adhesive sheet prepared with a coating film thickness of 200 ⁇ m was placed on a heating plate of Leo Vibron, and a probe in the form of a pipe (RBP020) or a knife (RBE130) was impregnated into the adhesive sheet.
  • a probe in the form of a pipe (RBP020) or a knife (RBE130) was impregnated into the adhesive sheet.
  • A1 is the first amplitude value of the sine wave
  • A2 is the second amplitude value
  • An is the nth amplitude value
  • n is the total wave number.
  • a die-attach device (Secron, SDB-30US) is used for the second layer chip with the adhesive sheet on the semiconductor chip wired with gold wires so that the height is 50 ⁇ m at the top of the chip through the metal wiring between the semiconductor chip and the substrate.
  • the laminate was heat-bonded under the conditions of 130 ° C., 0.5 MPa, and 1 second, and cured at 170 ° C. for 2 hours.
  • the cross-section of the manufactured laminated chip was polished to observe whether the wire was damaged and whether bubbles were generated having a diameter of 5 ⁇ m or more around the periphery. The measurement results are divided by X when wire damage occurs, ⁇ when bubbles are generated, and ⁇ when good.
  • Shear strength 2 Using specimen prepared by maintaining at 175 °C for 2 hours and curing at 85 °C / 85% relative humidity for 24 hours
  • the reactive copolymerized acrylate compound used in the Examples showed high surface energy and adhesive strength compared to the rubber components used in the Comparative Example, and thus, the adhesive sheet using the same had an area of about 60 ° C. Under the mounting conditions, the initial adhesion with organic-inorganic materials forming the semiconductor support member is improved.

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Abstract

본 발명은 반도체 소자를 제조하는 공정에서 사용할 수 있는 접착제 조성물 및 이를 포함하여 시트 형상으로 가공된 접착소재에 관한 것으로, 더욱 상세하게는 반도체 제조공정 중 웨이퍼의 단면에 부착되어 칩과 기판 또는 칩과 칩의 접착에 사용되며, 특히, 고온 접착시 흐름성이 증가함으로써 요철 및 금속배선과 같은 구조물에 대한 매립성이 우수하고, 지지부재와의 계면접착성이 향상되어 고온/고습조건에서도 반도체 소자의 신뢰성 확보가 가능한 접착제 조성물 및 이를 포함하는 접착시트에 관한 것이다.

Description

반도체 패키지 제작용 접착제 조성물 및 접착시트
본 발명은 반도체 소자를 제조하는 공정에서 사용할 수 있는 접착제 조성물 및 이를 포함하여 시트 형상으로 가공된 접착소재에 관한 것으로, 더욱 상세하게는 반도체 제조공정 중 웨이퍼의 단면에 부착되어 칩과 기판 또는 칩과 칩의 접착에 사용되며, 특히, 고온 접착시 흐름성이 증가함으로써 요철 및 금속배선과 같은 구조물에 대한 매립성이 우수하고, 지지부재와의 계면접착성이 향상되어 고온/고습조건에서도 반도체 소자의 신뢰성 확보가 가능한 접착제 조성물 및 이를 포함하는 접착시트에 관한 것이다.
웨이퍼의 회로식각 공정 이후의 반도체 제조공정은 웨이퍼를 칩으로 절단하기 위한 다이싱 공정, 절단된 칩을 개개의 칩으로 개편하기 위한 확장 및 픽업(pick-up)공정, 픽업공정에 의해서 개편화된 칩을 기판에 실장하기 위한 본딩 공정, 칩과 기판의 전기적 연결을 위한 금속 와이어링 공정 및 칩의 보호를 위한 에폭시 몰딩 공정으로 이루어진다. 상기와 같은 공정 중에서 웨이퍼의 절단 및 칩의 부착공정을 용이하게 하기 위하여 웨이퍼 보호를 위한 보호용 점착시트와 칩을 부착할 수 있는 접착제 혹은 접착시트를 사용한다.
완성된 칩을 기판에 부착하기 위한 기존의 수단으로는 액상 에폭시 수지 조성물을 준비된 리드프레임이나 플렉서블 프린티드서킷보드(FPCB) 위에 일정 형상으로 도포하고, 웨이퍼 보호용 점착시트를 이용하여 미리 가공된 개편화된 칩을 실장하는 방식이 사용되어 왔다. 그러나 액상 에폭시 수지 조성물을 도포하는 공정은 도포두께의 균일도를 제어하기 어렵고, 칩 부착공정시 부착되는 압력에 의해 액상 조성물이 삐져나오기 쉽다. 액상 접착제 조성물의 요변지수를 조절하여 그 흐름성을 제어할 수는 있으나, 다층 칩의 제조에는 여전히 적용이 어려워 단일 칩의 제조에만 국한되고 있다.
상기 액상 접착제로부터 수반되는 문제를 해결하기 위하여 액상 접착제를 적절한 수지 조성물로 개질하여 시트상으로 제공하는 방법이 제안되어 왔다. 시트상 접착제는 칩과 유사한 크기의 릴(rill) 형태로 제조된 후, 이 접착시트를 칩 크기로 절단하고 본딩할 수 있는 특정장비를 사용하여 절단하고 기판에 부착시킨 후 개편화된 칩을 부착하는 방식으로 사용된다. 그러나 이러한 공정은 접착시트를 절단하고 부착하기 위한 특정장비와 추가 공정을 필요로 하는 문제가 있어 그 활용이 줄어들고 있다.
현재의 반도체 칩 부착 공정에서는, 접착시트를 웨이퍼 이면에 미리 부착하여 다이싱 공정을 진행함으로써 칩과 접착시트가 일체화된 구조로 각각의 칩을 얻는 방법을 주로 사용하고 있다. 이와 같은 접착시트는 통상 점착제와 부착된 상태의 일체형으로 제공될 수 있으며, 이러한 경우에는 점착시트가 웨이퍼의 이면에 부착되어 다이싱되는 공정과는 다르게 접착시트 이면에 점착시트가 적층되어 일체형으로 구비된 상태에서 웨이퍼에 부착되고, 이후 일련의 공정을 수행한다.
이렇게 접착시트를 점착시트와 일체형으로 제조하여 반도체 제조공정 중 웨이퍼의 이면에 부착함으로써 웨이퍼의 절단부터 다이 부착공정까지의 공정을 간소화하는 방법은 예컨대 대한민국 공개특허공보 제10-2006-0021337호, 대한민국 등록특허 제10-0826420호, 대한민국 등록특허 제10-0646069호, 대한민국 등록특허 제10-0845092호 등에 개시되어 있다.
최근의 일반적인 반도체 제조공정을 살펴보면 반도체 패키지의 집적도를 높이기 위한 방안으로 한 공간에 반도체 칩을 수직으로 여러 층 쌓아 올리는 적층(Stack)방법이 사용되고 있다. 반도체 소자의 적층 기술과 이를 만족하는 접착소재를 활용함으로써 리드프레임 또는 플렉서블 서킷보드로 구성되는 패키지에 칩을 2층 이상 적층하여 집적도를 향상시킬 수 있으며, 범프를 전기접속부로 이용한 CSP(Chip Scale Package)에서는 솔더 범프를 가진 기판 위에 칩을 수직 적층하여 집적도를 높이는 기술이 사용되고 있다. 또한, 복수의 칩을 다단 적층하여 집적도를 향상시키고자 할 때 칩의 공간을 효율적으로 사용하기 위한 방안으로 동일 면적의 칩과 칩을 수직 적층하는 방식이 주요하게 사용된다. 동일한 크기의 칩을 다단 적층하기 위해서는 칩을 리드프레임 혹은 보드에 부착한 후 칩과 기판의 전기접속을 위한 금속배선작업을 하거나 칩의 배면에 미리 실장된 금속 범프를 사용하여 기판에 부착함으로써 소자의 전기접속을 완성하고, 상기 칩의 상단에 동일한 크기로 준비된 칩을 계속하여 다단 적층하는 기술이 사용된다. 이러한 일련의 공정에서 사용되는 접착시트는, 반도체 소자의 신뢰성 확보를 위하여 칩의 부착공정시 충분한 흐름성을 가짐으로써 칩과 칩 또는 칩과 기판 사이에 존재하는 금속배선이나 범프와 같은 구조물에 기포가 발생되거나 구조물이 손상되지 않게 매립해야 하며, 부착 이후 경화공정을 통하여 높은 계면접착력을 나타내어야 한다.
종래의 반도체용 접착시트는 상온에서 취급이 가능한 시트상의 접착제 제조를 위하여 내열접착성이 우수한 고상 에폭시 수지 조성물에 유연성을 확보하기 위하여 열가소성 고무 성분을 배합하고 적절한 혼합용 용제로 희석하여 도공공정을 수행 함으로써 시트상으로 제조되고, 일반적인 칩 부착 공정에 사용된다.
그러나 이러한 종래의 접착시트는 동일크기의 칩을 부착하는 공정에서 금속배선 및 금속 범프를 충분히 매립할 수 있는 유동성이 부족하여 접착시 기포를 발생시키거나, 부착면에 배열되는 배선들이 손상되어 불량을 발생시키는 문제점이 있다. 또한, 열가소성 고무 성분과 에폭시 수지 조성물 간의 상용성이 좋지 않아 미세한 상분리가 발생하고, 고온/고습 조건에 장기간 노출시 고무성분의 노화로 인하여 접착력이 저감되는 문제도 있다. 특히, 칩의 접착 대상 면에는, 반도체 소자의 특성을 부여하기 위하여 생성되는 리드프레임, 배선, 범프 등을 구성하는 금속성분외에 회로가 심어진 보드 및 칩을 보호하기 위하여 생성되는 솔더레지스트(Solder Resist), 패시베이션(Passivation) 등의 다양한 유기소재들이 동시에 노출되어 있는데, 이들은 통상적으로 금속보다 낮은 표면에너지를 가지므로 접착시트를 사용한 칩의 부착시 접착력이 저해될 수 있다.
본 발명은 상기한 바와 같은 종래기술의 문제점을 해결하고자 한 것으로, 반도체 소자의 접착 대상면에 노출되어있는 요철 및 금속배선과 같은 구조물에 대한 매립성이 우수하고, 반도체 지지부재와의 계면접착성이 향상되어 고온/고습조건에서도 반도체 소자의 신뢰성 확보가 가능한 접착제 조성물 및 이를 포함하는 접착시트를 제공하는 것을 기술적 과제로 한다.
상기한 기술적 과제를 달성하고자, 본 발명은 (A) 하나 이상의 반응성 그룹을 포함하는 공중합 아크릴레이트 화합물, (B) 열경화성 에폭시 혼합물, (C) 경화제, (D) 필러 및 (E) 경화촉진제를 포함하며, 상기 성분 (A) : (B) 의 중량비는 95 : 5 내지 65 : 35이고, 상기 성분 (B)에는 150℃에서 용융점도가 0.1 Pa?s 이하인 에폭시 수지가 하나 이상 포함되며, 상기 성분 (D)의 양은 상기 성분 (A)+(B)+(C)의 합계량 100 중량부에 대하여 10 내지 80 중량부이고, 상기 성분 (E)의 양은 상기 성분 (A)+(B)+(C)의 합계량 100 중량부에 대하여 0.1 내지 1.4 중량부인, 접착제 조성물을 제공한다.
본 발명의 다른 측면에 따르면, 본 발명의 접착제 조성물의 코팅층을 포함하는 것을 특징으로 하는 반도체 제조용 접착시트가 제공된다.
본 발명의 접착제 조성물 및 접착필름을 반도체 제조공정 중에 사용하면, 접착대상들과의 계면접착성이 향상되어 고온/고습조건에서도 접착특성이 유지되어 신뢰성이 우수하고, 고온 흐름성에 의하여 반도체 소자의 접착 대상면에 노출될 수 있는 구조물에 대하여 우수한 매립특성을 얻을 수 있다.
이하에서 본 발명을 구성요소 별로 상세히 설명한다.
(A) 하나 이상의 반응성 그룹을 포함하는 공중합 아크릴레이트 화합물
본 발명의 접착제 조성물에 포함되는 공중합 아크릴레이트 화합물은 하나 이상의 반응성 그룹(예컨대, 극성 그룹)을 포함하며, 이로 인해 그 표면에너지가 적절히 조절되어 다른 화합물과의 분자간 가교 또는 자체 분자내 가교가 가능하여 조성물의 접착성능이 향상되고, 반도체 지지부재 중 표면에너지가 낮은 유기소재와의 계면접착성이 향상된다. 공중합 아크릴레이트 화합물 성분 (A)의 물과의 접촉각 측정시 바람직한 표면에너지는 40dyne/cm 내지 50dyne/cm이고, 바람직한 중량평균분자량은 300,000 내지 150,000이며, 바람직한 유리전이온도는 -20℃ 내지 50℃이다.
공중합 아크릴레이트 화합물 성분 (A)에 포함가능한 반응성 그룹의 바람직한 예로는 아크릴로니트릴기, 에폭시기, 히드록시기 및 카르복실기 중에서 하나 이상 선택된다.
구체적으로, 공중합 아크릴레이트 화합물 중 분자내에 에폭시기와 히드록시기를 포함하는 수지로는 나가세 켐텍스社 SG-PT115(에폭시가 0.21eq/kg, 히드록시가 20mgKOH/g, Mw 80,000), SG-PT134(에폭시가 0.21eq/kg, 히드록시가 30mgKOH/g, Mw 80,000), SG-PT135(에폭시가 0.21eq/kg, 히드록시가 400mgKOH/g, Mw 80,000) 등을 들 수 있고, 분자내에 카르복실기와 아크릴로니트릴기를 함유하는 공중합 아크릴레이트 화합물로는 제온社 Nipol®DN631(아크릴로니트릴 33.5%, 비중0.99) 및 제온社 Nipol®NBR N34(아크릴로니트릴 27%, 비중0.98) 를 들 수 있으며, 분자내에 아크릴로니트릴기를 함유하는 공중합 아크릴레이트 화합물로는 현대석유화학®SEETEC 시리즈 등을 들 수 있으나, 이에 제한되는 것은 아니다.
본 발명의 접착제 조성물에 있어서, 상기 공중합 아크릴레이트 화합물 성분 (A) : 후술하는 에폭시 혼합물 성분 (B) 의 중량비는 95 : 5 내지 65 : 35이고, 보다 바람직하게는 (A) : (B) 의 중량비가 90 : 10 내지 70 : 30 이다. 성분 (A) 의 중량비가 상기한 수준 보다 부족하게 사용되면 접착제 조성물이 지나치게 단단하게 되어 접착시트의 도공 또는 절단 공정시 부스러지기 쉽고, 반대로 상기한 수준을 초과하여 사용되면 접착시트의 부착 및 경화 이후에 충분한 접착력이 보장되지 않아 신뢰성에 문제가 될 수 있다.
(B) 열경화성 에폭시 혼합물
본 발명의 접착제 조성물에 포함되는 에폭시 혼합물로는, 예컨대, 비스페놀A형 에폭시 수지, 비스페놀F형 에폭시 수지, 비스페놀S형 에폭시 수지, 지환식 에폭시 수지, 지방족 쇄상 에폭시 수지, 페놀노볼락형 에폭시 수지, 크레졸노볼락형 에폭시 수지, 비스페놀A 노볼락형 에폭시 수지, 비페놀의 디글리시딜에테르화물, 나프탈렌디올의 디글리시딜에테르화물, 페놀류의 디글리시딜에테르화물, 알코올류의 디글리시딜에테르화물 및 이들의 알킬 치환체, 할로겐화물 또는 수소첨가물, 다관능 에폭시 수지, 복소환 함유 에폭시 수지 등을 포함하여 일반적으로 알려져 있는 것들 중 하나 이상과, 후술하는 150℃에서 용융점도가 0.1 Paㆍs 이하(예컨대, 0.001 내지 0. 1 Paㆍs)인 에폭시 수지 하나 이상과의 혼합물이 사용가능하다.
보다 구체적으로는, 예컨대 시판의 것으로, 에피코트807, 에피코트815, 에피코트825, 에피코트827, 에피코트828, 에피코트834, 에피코트1001, 에피코트1002, 에피코트1003, 에피코트1055, 에피코트1004, 에피코트1004AF, 에피코트1007, 에피코트1009, 에피코트1003F, 에피코트1004F(이상, 재팬에폭시레진주식회사제, 상품명), YD011, YD-012, YD-013K, YD-014, YD-017, YD-112, YD-113, YD-114, YD-115, YD-127, YD-128(이상, 국도화학주식회사제, 상품명), SE-187, SE-187P (이상, 신화T&C사제, 상품명) 등의 비스페놀A형 에폭시 수지, YDF-161,YDF-162, YDF-170 (국도화학주식회사제, 상품명), SE-187, SE-187P (이상, 신화T&C사제, 상품명) 등의 비스페놀F형 에폭시 수지, EPPN-201, EPPN-501, EPPN-501HY, EPPN-502(이상, 니뽄화약주식회사제, 상품명), YDPN-631, YDPN-636, YDPN-638 (이상, 국도화학주식회사제, 상품명) 등의 페놀노볼락형 에폭시 수지, YDCN-500-1P, YDCN-500-4P, YDCN-500-5P, YDCN-500-7P, YDCN-500-10P, YDCN-500-80P (이상, 국도화학주식회사제, 상품명), EOCN-102S, EOCN-103S, EOCN-104S, EOCN-1012, EOCN-1020, EOCN-1025, EOCN-1027(이상, 니뽄화약주식회사제, 상품명)등의 크레졸 노볼락형 에폭시 수지 등이 사용가능하다.
에폭시 혼합물 성분 (B)에는 150℃에서 용융점도가 0.1 Paㆍs 이하(예컨대, 0.001 내지 0. 1 Paㆍs)인 에폭시 수지가 하나 이상 포함된다. 이러한 에폭시 수지의 예로는, 동도화성社 YDC-1312(에폭시당량 180g/eq, 150℃점도 0.01 Paㆍs), YSLV-80XY(에폭시 당량 195g/eq, 150℃점도 0.01 Paㆍs), YSLV-120TE(에폭시 당량 245g/eq, 150℃점도 0.1 Paㆍs), 유카셀社 YX-4000(에폭시 당량 192g/eq, 150℃점도 0.005 Paㆍs), 니뽄화약社 XD-1000-2L(에폭시 당량 240g/eq, 150℃점도 0.05Paㆍs), CER-3000-L(에폭시 당량 233g/eq, 150℃점도 0.03 Paㆍs) 등을 들 수 있으나, 이들로 제한되는 것은 아니다.
에폭시 혼합물 성분 (B)에 포함되는, 150℃에서 용융점도가 0.1 Paㆍs 이하인 에폭시 수지의 양에는 특별한 제한이 없으며, 에폭시 혼합물 성분 (B) 100중량%에 대하여 5 내지 50중량%인 것이 바람직하나, 이에 제한되는 것은 아니다.
본 발명의 바람직한 구체예에 따르면, 본 발명의 접착제 조성물을 포함하는 접착시트에 있어서 레오메터(A&D社, Rheovibron®RPT-3000W)에 의한 고온유동성 측정시 80℃와 120℃에서 각각 측정된 댐핑비(Log. Damping ratio)값의 비율이 3.0 내지 5.0이고, 120℃에서 댐핑비(Log. damping ratio)가 0.01내지 0.1이 되도록 하는 양으로, 150℃에서 용융점도가 0.1 Paㆍs 이하인 에폭시 수지가 에폭시 혼합물 성분 (B)에 포함될 수 있다.
본 발명의 접착제 조성물을 포함하는 접착시트에 있어서 80℃/120℃의 댐핑비가 3.0 미만이면 고온에서의 흐름성이 너무 높아져 칩과 기판 또는 칩과 칩 부착시 상하부 간극을 일정하게 유지하며 부착하기가 어려워질 수 있고, 120℃에서의 댐핑비가 0.1을 초과하면 반도체 지지부재와의 부착시 충분한 흐름성을 가지지 못하여 접착면에 노출되어 있는 요철이나 금속배선에 대한 충분한 매립성을 갖지 못할 수 있다. 레오메터®RPT-3000W에 의하여 특징지워지는 접착시트 물성범위의 의미는 이후 접착시트 평가법에서 설명한다.
본 발명의 접착제 조성물에 있어서, 상기 공중합 아크릴레이트 화합물 성분 (A) : 에폭시 혼합물 성분 (B) 의 중량비는 95 : 5 내지 65 : 35이고, 보다 바람직하게는 (A) : (B) 의 중량비가 90 : 10 내지 80 : 20 이다. 성분 (B) 의 중량비가 상기한 수준을 초과하여 사용되면 접착제 조성물이 지나치게 단단하게 되어 접착시트의 도공 또는 절단 공정시 부스러지기 쉽고, 반대로 상기한 수준에 못 미치게 사용되면 접착시트의 부착 및 경화 이후에 충분한 접착력이 보장되지 않아 신뢰성에 문제가 될 수 있다.
(C) 경화제
본 발명의 접착제 조성물에는 에폭시 수지의 경화를 위하여 경화제가 사용된다.
이러한 경화제로는 종래에 공지되어 있는 것을 사용할 수 있으며, 예컨대 페놀계 화합물, 아민 화합물, 산 무수물을 포함하는 공지의 에폭시 수지용 경화제 화합물 중에서 선택될 수 있다. 바람직하게는 2개 이상의 히드록시기를 가지고 히드록시 당량이 100g/eq내지 300g/eq인 페놀수지, 예컨대 페놀노볼락 수지가 특별한 제한 없이 사용된다.
본 발명의 접착제 조성물에 있어서 경화제는 상기 에폭시 혼합물 (B)와의 당량비가 0.8내지 1.3이 되도록 사용하는 것이 바람직하며, 0.9내지 1.1이 되도록 사용하는 것이 보다 바람직하다. 경화제의 사용량이 이러한 범위를 지나치게 벗어나면 미반응 에폭시 수지나 경화제 수지가 잔류하게 되어 고온에서 열화 되어 신뢰성이 저하될 수 있다.
(D) 필러
본 발명의 접착제 조성물에는 접착시트의 내열성, 고온 흐름성, 공정 취급성 등의 조정을 위하여 충진제가 포함된다.
본 발명의 접착제 조성물에 사용가능한 필러에는 특별한 제한이 없으며, 예컨대 실리카, 알루미나, 실버, 골드코팅비드, 실리콘비드, 카본블랙, 수산화알루미늄, 수산화 마크네슘, 질화붕소, 이산화티타늄, 세라믹등의 입자로서 평균 입자 크기가 10 나노미터 내지 10 마이크로미터이며 구상 형태인 입자를 사용할 수 있다. 바람직하게는 접착제 조성물 내에서의 분산성이 양호하고, 고온에서의 흐름성 부여에 유리한 구상 실리카를 사용하는 것이 좋다.
본 발명의 접착제 조성물에 포함되는 필러 (D)의 양은 상기 성분 (A)+(B)+(C)의 합계량 100 중량부에 대하여 10 내지 80 중량부이고, 보다 바람직하게는 20 내지 60 중량부이다. 필러의 사용량이 성분 (A)+(B)+(C)의 합계량 100 중량부에 대하여 10 중량부 미만일 경우 접착시트의 강도가 저하되어 고온에서의 열응력에 의한 변형이 발생하기 쉽고, 80 중량부를 초과할 경우 접착시트의 취성이 강하여 공정중 부러지기가 쉽고, 또한 점착필름과의 밀착력이 떨어져 공정 작업성이 떨어지는 문제점이 있다.
(E) 경화촉진제
본 발명의 접착제 조성물에는 경화속도를 향상시키기 위하여 경화촉진제가 사용된다.
본 발명의 접착제 조성물에 사용가능한 필러에는 특별한 제한이 없으며, 경화조건의 온도에서 접착제 조성물의 경화시간을 단축시킬 수 있는 것이라면 사용 가능하다. 바람직하게는 접착시트의 제조온도조건에서는 반응성이 낮고, 120℃ 내지 180℃의 경화온도 범위에서는 반응성이 높은 화합물을 사용하는 것이 좋다. 예컨대, 현재 시판되고 있는 제품으로 사국화성社의 2MZ-A, C11Z-A, 2MA-OK, 2PHZ, 2P4MHZ 등이 있고, 호코케미칼社의 TPP, TBP, TBP, TPP-K, TPP-MK, TPPO, DPPE, DPPB 등이 있다.
본 발명의 접착제 조성물에 포함되는 경화촉진제 (E)의 양은 상기 성분 (A)+(B)+(C)의 합계량 100 중량부에 대하여 0.1 내지 1.4 중량부이고, 보다 바람직하게는 0.2 내지 1.0 중량부이다. 경화촉진제의 사용량이 성분 (A)+(B)+(C)의 합계량 100 중량부에 대하여 0.1 중량부 미만일 경우 칩 적층 이후 경화공정에서 충분한 경화도를 얻을 수 없어 이후의 칩 적층시 열과 하중에 의하여 하부 칩의 흔들림이 발생하여 불량을 초래 할 수 있고, 1.4 중량부를 초과할 경우 접착시트 제조공정 중 발생되는 열에 의해 일부 부반응이 발생될 수 있고 또한 제품의 상온보관시 장기 저장성이 저해될 가능성이 있다.
본 발명의 접착제 조성물은 상기한 성분들 이외에 반도체 공정용 접착제 조성물에 통상적으로 사용되는 성분들, 예컨대, 예컨대, 아세톤, 메틸에틸케톤, 톨루엔, 에틸아세테이트 등의 용제, 점착증진제, 커플링제, 대전방지제, 속경화제, 열경화보조제, 밀착력증진제, 젖음성 향상제, 레벨링증진제 등이 적절한 양으로 추가로 포함될 수 있다. 본 발명의 바람직한 일 구체예에서는, 수지 혼합물 및 부착면과의 양쪽 결합이 가능한 관능기를 가짐으로써 탄성율과 내열성 향상에 도움이 되는 커플링제를 조성물 총 100중량부에 대해 3.0 중량부 이내로 사용할 수 있다.
본 발명의 접착제 조성물 제조방법에는 특별한 제한이 없으며, 통상의 접착제 조성물 제조용 장비를 사용하여 통상의 공정으로 제조할 수 있다. 본 발명의 일 구체예에 따르면, 상기 설명한 성분들을 비드밀 등의 혼합장비를 사용하여 실온 내지 적절히 승온된 온도에서 분산 및 혼합함으로써 본 발명의 접착제 조성물을 제조할 수 있다.
본 발명의 다른 측면에 따르면, 상기 설명한 바와 같은 본 발명의 접착제 조성물의 코팅층을 포함하는 것을 특징으로 하는 반도체 제조용 접착시트가 제공된다.
본 발명에 따른 반도체 제조용 접착시트는 상기 본 발명의 접착제 조성물의 코팅층을 포함하는 것을 특징으로 하며, 그 외에 필름구성상 필요에 따라 하나 이상의 기재(필름)층［이형(필름)층 또는 보호(필름)층이라고도 함］ 및 점착(필름)층을 더 포함할 수 있다. 본 발명의 일 구체예에 따른 반도체 제조용 접착시트는 기재층 + 접착제 조성물 층; 기재층 + 접착제 조성물 층 + 기재층; 기재층 + 점착제층 + 접착제 조성물 층; 기재층 + 점착제층 + 접착제 조성물 층 + 기재층 등과 같은 층 구성을 가질 수 있으나, 이에 제한되는 것은 아니다.
본 발명의 반도체 제조용 접착시트에 포함가능한 기재층 재질에는 특별한 제한이 없으며, 폴리에틸렌 테레프탈레이트, 폴리올레핀계 또는 폴리비닐클로라이드계 물질과 같이 반도체 제조용 접착시트의 기재필름으로서 통상 사용가능한 것들을 활용할 수 있다. 또한 점착층으로는, 광반응성 올리고머를 포함하는 아크릴계 물질과 같이 반도체 제조용 접착시트에 통상 사용되는 점착성 물질이 사용될 수 있다.
본 발명의 반도체 제조용 접착시트에 있어서, 상기 접착제 조성물의 코팅층 건조두께에는 특별한 제한이 없으며, 바람직하게는 10내지 200㎛ 두께이다. 접착제 조성물의 코팅층 건조두께가 10㎛ 미만이면 접착효과가 충분하지 않을 수 있고, 200㎛를 초과하면 도막건조 과정에서 잔류휘발분에 의한 코팅과정이 용이하지 못하고, 접착공정 적용시에도 높은 단차로 인하여 고온 부착시 접착제가 옆면으로 흘러나오는 불량이 발생할 수 있다. 접착제 조성물은 바람직하게는 125℃, 60분 이내에 50% 이상의 경화도를 나타내며, 접착제 조성물의 코팅층 내의 잔류휘발분은 1 중량% 이하인 것이 바람직하다.
본 발명의 접착시트 제조방법에는 특별한 제한이 없으며, 통상의 다층접착시트 제조용 장비를 사용하여 통상의 공정으로 제조할 수 있다. 본 발명의 일 구체예에 따르면, 본 발명의 접착제 조성물을, 필요에 따라 희석이 가능한 유기용제로 희석하여 도막제조가 용이한 적정농도로 믹싱한 후 폴리에틸렌 테레프탈레이트 등의 기재필름에 도포, 건조하는 방식으로 접착시트를 제조할 수 있다. 상기 도포, 건조 방식으로는 바 코팅, 그라비아 코팅, 콤마 코팅, 롤 리버스 코팅, 롤 나이퍼 코팅, 다이 코팅, 립 코팅 등 도막을 형성시킬 수 있는 방법이면 어떤 방식이든 제한 없이 사용가능하다.
상기 설명한 바와 같은 본 발명의 반도체 제조용 접착시트는 고온 흐름성이 우수하여 접착면에 노출되어 있는 요철 및 금속배선과 같은 구조물에 대한 매립성이 우수하고, 반도체 지지부재와의 계면접착성이 향상되어 고온/고습조건에서도 반도체 소자의 신뢰성 확보가 가능하다.
이하 실시예를 통해 본 발명을 보다 구체적으로 설명한다. 그러나 이들 실시예는 본 발명의 이해를 돕기 위한 것일 뿐 어떤 의미로든 본 발명의 범위가 이들 실시예로 한정되는 것은 아니다.
실시예 1
반응성 공중합 아크릴레이트 화합물(A1) 280.5g에, 에폭시 혼합물로서 크레졸노볼락형 에폭시 수지(B1) 37.4g과 비스페놀 F형 에폭시 수지(B2) 14.0g의 혼합물을 가하고 혼합하였다. 여기에 경화제(C)로서 상기 에폭시 혼합물과의 당량비가 1.0이 되도록 페놀노볼락수지 25.7g을 추가로 투입하였다.
상기와 같이 하여 준비된 결과 혼합물 100 중량부에 대하여, 필러로서 구상 실리카(D1) 45 중량부, 경화촉진제(E) 0.3 중량부 및 커플링제(F) 1.5 중량부를 차례대로 투입하면서 충분히 교반하였다. 교반시에는 조성물의 적정한 점성과 용해도를 위하여 조성물내 고형분 총중량이 30%내지 35%가 되도록 하는 양의 메틸에틸케톤 유기용제를 추가 투입하였다. 예비교반이 완료된 조성물을 다시 비드밀을 사용하여 충분히 분산한 다음, 단면 이형처리된 38㎛ 폴리에틸렌 테레프탈레이트 이형필름에 건조 두께 60㎛로 코팅하여 접착시트를 제조하였다.
하기 평가방법 중 레오바이브론 평가를 위한 시편은 제조된 접착시트를 60℃에서 적층하여 200㎛ 두께가 되도록 하여 준비하였다.
실시예 2~7
표 1에 나타낸 조성에 따라, 실시예 1과 동일한 방법으로 접착제 조성물 및 접착시트를 제조하였다.
표 1
Figure PCTKR2010007841-appb-T000001
A1: SG-PT115 (나가세 켐텍스社, 에폭시가 0.21eq/kg, 히드록시가 20mgKOH/g)
A2: SG-PT134 (나가세 켐텍스社, 에폭시가 0.21eq/kg, 히드록시가 30mgKOH/g)
A3: SG-PT135 (나가세 켐텍스社, 에폭시가 0.21eq/kg, 히드록시가 40mgKOH/g)
B1: YDCN-500-4P (국도화학社, 에폭시당량 200g/eq, 연화점 62℃)
B2: YSLV-80XY(동도화성社, 에폭시 당량 195g/eq, 150℃점도 0.01 Paㆍs)
B3: YX-4000(유카셀社, 에폭시 당량 192g/eq, 150℃점도 0.005 Paㆍs)
C: HF-1M (메이화社, 히드록시 당량 106g/eq 연화점 84℃)
D1: SO-31R (다쯔모리社, 평균입도 1.24㎛, S.S.A 4.68m2/g)
D2: FB-3SDX (덴까社, 평균입도 3.3㎛, S.S.A 3.9 m2/g)
E: 2MAOK-PW (사국화성社, 평균입도 2㎛, 융점 260℃)
F: KBM-303 (신에츠社, 에폭시 당량 222g/eq, 비중 1.06)
(A계열: 반응성 공중합 아크릴레이트 화합물, B계열: 에폭시 수지, D계열: 필러)
비교예 1~9
표 2에 나타낸 조성에 따라, 실시예 1과 동일한 방법으로 비교예의 접착제 조성물 및 접착시트를 제조하였다.
표 2
Figure PCTKR2010007841-appb-T000002
R1: KNB 40M (금호석유화학社, 아크릴로니트릴-부타디엔 고무, 아크릴로니트릴 41%, 무우니점도(ML+4,100℃)60)
R2: KNB 20LM (금호석유화학社, 아크릴로니트릴-부타디엔 고무, 아크릴로니트릴 28%, 무우니점도(ML+4,100℃)50)
상기 제조된 실시예 및 비교예의 접착시트의 물성평가는 하기 평가방법으로 수행하였다.
표면에너지
실시예에서 사용된 반응성 공중합 아크릴레이트 화합물 및 비교예에서 사용된 아크릴로니트릴-부타디엔 고무의 표면에너지 평가를 위하여, 제조된 접착제 조성물 각각을 편평하고 단단한 지지판 위에 균일한 도막두께를 가지도록 코팅하여 준비하고, 접촉각 측정기(서페이스일렉트로옵틱스社, SEO300A)를 사용하여 물과의 표면에너지를 측정하였다.
접착강도
접착력 측정은 JIS Z 0237 규격 및 KSA 1107 규격(점착 테이프 및 점착 시트의 시험방법)에 의거하여 만능시험기를 사용한 90°박리력 시험으로 수행하였다. 접착강도 측정을 위한 시편의 준비는 접착시트의 양면을 두께 1mil 폴리이미드 필름(에스케이씨社, IN70)으로 65℃에서 가열 압착한 후 시편폭 10mm, 길이 150mm로 준비하였고, 시험속도 50mm/min의 조건으로 평가하였다.
라미네이트성
실시예 및 비교예에서 제조된 접착시트를 테이프마운팅설비 (다이나테크社, DT-MWM 1230A)를 이용하여 65℃에서 고무롤러를 사용하여 1회 왕복 압착하여 패턴이 형성된 8인치 웨이퍼와 라미네이트하였다. 라미네이트 공정이 완료된 시편은 웨이퍼와 접착시트 사이의 기포 발생 유무를 관찰하여 기포발생이 전체면적의 5% 이상인 것은 X, 5% 미만인 것은 ○ 기호로 구분하여 나타내었다.
고온흐름성 및 경화특성
실시예 및 비교예에서 제조된 접착시트를 고분자수지의 유변성 측정장비인 레오바이브론(AND社, RPT-3000W)을 사용하여 25℃부터 150℃까지의 승온조건에서 유체흐름성에 따른 댐핑비(Damping ratio)를 측정함으로써 고온흐름성을 평가하였고, 경화특성은 125℃, 60분 등온조건에서 접착시트의 상전이에 따른 오실레이션 주기(Oscillation Period)를 측정하여 확인하였다.
구체적으로는, 도막두께 200㎛로 준비된 접착시트를 레오바이브론의 가열 평판 위에 올려놓고, 파이프(RBP020) 혹은 나이프(RBE130) 형태의 프로브를 접착시트에 함침시켰다. 이후 상기의 측정조건 하에서 일정한 힘으로 프로브를 진자 운동시켜, 접착층 내부의 유체특성이 변함에 따라 진자 운동이 영향을 받고 그로 인해 변화되는 진자의 주기, 진폭, 파수의 특성으로 고온흐름성 및 경화특성을 정하였다. 상기 평가조건에서의 경화특성은 진자 주기의 초기값과 나중값의 변화율(%)로 산출되고, 고온흐름성은 하기 수학식1로 표현되는 댐핑비(Damping ratio)로부터 계산되었다. 각각 제조된 접착시트의 120℃ 로그댐핑비가 0.1 이하이고 80℃/120℃ 댐핑비율이 3.0 이상인 경우 ○, 120℃ 로그댐핑비가 0.1 이하이나 80℃/120℃ 댐핑비율이 2.0 이하인 경우 △, 그 외의 것들은 X로 구분하였다.
수학식 1
Figure PCTKR2010007841-appb-I000001
상기식에서 A1은 싸인파 중 첫번째 진폭값, A2는 두번째 진폭값, An은 n번째 진폭값이고, n은 총 파수(Wave number)이다.
전단강도
실시예 및 비교예에서 제조된 점착시트를 패턴 및 패시베이션 형성이 완료된 8인치 200㎛ 웨이퍼의 이면에 부착한 후, 다이싱 장치(디스코社, DFD6361)를 사용하여 칩 크기 2mm * 2mm로 절단한 후 다이어태치 장비(세크론社, SDB-30US)를 사용하여 부착조건 120℃, 0.3MPa, 3초의 조건으로 2단 적층을 하고, 175℃에서 2시간 경화하여 전단강도 측정용 샘플을 제조하였다. 또한 제조된 샘플의 일부를 85℃, 85%상대습도의 항온조에서 24시간 별도로 저장하여 고온/고습에 노출된 샘플을 마련하였다. 상기와 같이 제조된 샘플은 본딩테스터기(DAG社의 DAGE-4000PXY)를 사용하여 전단강도를 측정하고 그 값을 비교하였다.
또한, 상기의 조건으로 전단강도 10회 평가시 전단 파괴된 면에서 접착층이 갈라지는 응집파괴 거동을 보이는 시료의 개수를 확인하여 %로 나타내었다.
금속배선 매립성
반도체 칩과 기판간의 금속배선으로 칩의 상부에서 높이가 50㎛가 되도록 골드와이어가 배선된 반도체 칩 위에 접착시트가 부착된 제 2층의 칩을 다이어태치 장비(세크론社, SDB-30US)를 사용하여 130℃, 0.5MPa, 1초의 조건으로 가열 접착하고, 170℃에서 2시간 경화하여 적층칩을 제조하였다. 제조된 적층칩의 단면을 연마하여 와이어의 손상유무 및 주변에 직경 5㎛ 이상의 기포 발생여부를 관찰하였다. 측정결과는 와이어 손상발생시 X, 기포발생시 △, 양호할 경우 ○ 기호로 구분하여 표시하였다.
내열수축성
건조 두께 60㎛, 가로, 세로 100mm x 100mm로 준비된 실시예 및 비교예 각각의 접착시트를 단면 이형 처리된 폴리에틸렌테레프탈레이트 필름위에 안착하여 175℃ 경화조건에서 2시간 방치한 후, 열이력에 의하여 수축 변형시 뒤틀려 올라간 높이를 바닥 면부터 측정하여 기록하였다.
내습성
실시예 및 비교예에서 제조된 접착시트를 사용하여 접합된 2단 칩을 121℃, 100%상대습도, 2기압의 분위기(PCT : Pressure Cooker Test)에서 72시간 유지한 후 접착면의 박리 유무를 확인하여, 양호한 것을 ○, 박리가 발생된 것을 X로 표시하였다.
상기와 같은 평가방법으로 얻어진 결과 중 표면에너지 및 접착강도는 [표 3]에 정리하였고, 실시예 및 비교예로 제조된 접착시트의 평가결과는 [표 4]와 [표 5]에 각각 정리하였다.
표 3
Figure PCTKR2010007841-appb-T000003
표 4
Figure PCTKR2010007841-appb-T000004
전단강도 1) 175℃, 2시간 경화하여 제조된 시편 사용
전단강도 2) 175℃, 2시간 경화 후 85℃/85%상대습도에서 24시간 유지하여 제조된 시편 사용
표 5
Figure PCTKR2010007841-appb-T000005
표 3의 결과로부터 알 수 있듯이, 실시예에서 사용된 반응성 공중합 아크릴레이트 화합물은 비교예에서 사용된 고무성분 대비 높은 표면에너지 및 접착강도를 나타내었으며, 따라서 이를 사용한 접착시트에 있어서 약 60℃ 부근의 마운팅 조건에서 반도체 지지부재를 이루고 있는 유-무기소재들과의 초기 부착력이 향상되었다.
표 4와 표 5의 실시예 및 비교예 시험결과로부터 알 수 있듯이, 본원 실시예의 모든 접착시트는 모든 평가 항목에서 우수한 물성을 나타내었던 반면, 비교예들은 그렇지 못하였다.

Claims (6)

  1. (A) 하나 이상의 반응성 그룹을 포함하는 공중합 아크릴레이트 화합물,
    (B) 열경화성 에폭시 혼합물,
    (C) 경화제,
    (D) 필러 및
    (E) 경화촉진제를 포함하며,
    상기 성분 (A) : (B) 의 중량비는 95 : 5 내지 65 : 35이고,
    상기 성분 (B)에는 150℃에서 용융점도가 0.1 Paㆍs 이하인 에폭시 수지가 하나 이상 포함되며,
    상기 성분 (D)의 양은 상기 성분 (A)+(B)+(C)의 합계량 100 중량부에 대하여 10 내지 80 중량부이고,
    상기 성분 (E)의 양은 상기 성분 (A)+(B)+(C)의 합계량 100 중량부에 대하여 0.1 내지 1.4 중량부인,
    접착제 조성물.
  2. 제1항에 있어서, 공중합 아크릴레이트 화합물 성분 (A)의 물과의 접촉각 측정시 표면에너지가 40dyne/cm 내지 50dyne/cm인 것을 특징으로 하는 접착제 조성물.
  3. 제1항에 있어서, 공중합 아크릴레이트 화합물 성분 (A)에 포함되는 반응성 그룹이 아크릴로니트릴기, 에폭시기, 히드록시기 및 카르복실기 중에서 하나 이상 선택되는 것을 특징으로 하는 접착제 조성물.
  4. 제1항에 있어서, 에폭시 혼합물 성분 (B)에 포함되는, 150℃에서 용융점도가 0.1 Paㆍs 이하인 에폭시 수지의 양이 에폭시 혼합물 성분 (B) 100중량%에 대하여 5 내지 50중량%인 것을 특징으로 하는 접착제 조성물.
  5. 제1항에 있어서, 경화제 성분(C)와 에폭시 혼합물 성분 (B)와의 당량비가 0.8내지 1.3 인 것을 특징으로 하는 접착제 조성물.
  6. 제1항 내지 제5항 중 어느 한 항에 따른 접착제 조성물의 코팅층을 포함하는 것을 특징으로 하는 반도체 제조용 접착시트.
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