Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
  • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
  • H01G9/004—Details
  • H01G9/04—Electrodes or formation of dielectric layers thereon
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
  • H01G11/00—Hybrid capacitors, i.e. capacitors having different positive and negative electrodes; Electric double-layer [EDL] capacitors; Processes for the manufacture thereof or of parts thereof
  • H01G11/22—Electrodes
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
  • H01G11/00—Hybrid capacitors, i.e. capacitors having different positive and negative electrodes; Electric double-layer [EDL] capacitors; Processes for the manufacture thereof or of parts thereof
  • H01G11/22—Electrodes
  • H01G11/24—Electrodes characterised by structural features of the materials making up or comprised in the electrodes, e.g. form, surface area or porosity; characterised by the structural features of powders or particles used therefor
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
  • H01G11/00—Hybrid capacitors, i.e. capacitors having different positive and negative electrodes; Electric double-layer [EDL] capacitors; Processes for the manufacture thereof or of parts thereof
  • H01G11/22—Electrodes
  • H01G11/26—Electrodes characterised by their structure, e.g. multi-layered, porosity or surface features
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
  • H01G11/00—Hybrid capacitors, i.e. capacitors having different positive and negative electrodes; Electric double-layer [EDL] capacitors; Processes for the manufacture thereof or of parts thereof
  • H01G11/22—Electrodes
  • H01G11/30—Electrodes characterised by their material
  • H01G11/32—Carbon-based
  • H01G11/36—Nanostructures, e.g. nanofibres, nanotubes or fullerenes
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
  • H01G11/00—Hybrid capacitors, i.e. capacitors having different positive and negative electrodes; Electric double-layer [EDL] capacitors; Processes for the manufacture thereof or of parts thereof
  • H01G11/22—Electrodes
  • H01G11/30—Electrodes characterised by their material
  • H01G11/46—Metal oxides
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
  • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
  • Y02E60/13—Energy storage using capacitors
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
  • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
  • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

• the present disclosure relates to an energy storage device, and particularly to an energy storage device including at least one nanostructure electrode having a large surface area of a pseudocapacitive material for pseudocapacitive energy storage, and methods of manufacturing the same.
• Ultracapacitors or electrochemical double layer capacitors provide the highest energy density among commercially available devices employing capacitive energy storage. Although such EDLC's are capable of operation at considerably higher power than a battery, the energy density of even high performance EDLC's is lower than the energy density of high performance batteries by a factor of 10 ⁇ 20.
• a traditional ultracapacitor consists of two electrodes that are fabricated from highly porous activated carbon sheets that provide very large surface area, which is typically on the order of 1000 square meters/gram of material. These porous activated carbon-based electrodes are immersed in an electrolyte.
• Pseudocapacitive energy storage refers to the method of energy storage employing the phenomenon of pseudocapacitance.
• pseudocapacitor must be constructed of lightweight, low cost, non-toxic materials in order to be commercially viable. So far, all known methods for creating a PC electrode involve coating of a PC material onto an inactive substrate, which only adds mass without contributing to energy storage and reduces the stored energy density.
• U.S. Patent No. 7,084,002 to Kim et al. describes a similar templating method employing sputtering of a metal onto the anodized aluminum oxide template, a method that will not work for the ultrahigh aspect ratios of the nanoscale pores required for the electrode to work properly and to its highest energy storage potential due to the directional nature of the deposition process and shadowing effect of a deposited material upon any structure underneath.
• U.S. Patent No. 7,084,002 requires electrochemical deposition of appropriate metal oxides, which cannot not occur on insulating aluminum oxide templates.
• U.S. Patent No. 7,713,660 to Kim et al. describes wet chemical processes that cannot achieve the wall thickness control or arrayed attachment to a conductive substrate. Further, capillary and surface tension effects limit the tube diameters to dimensions greater than hundreds of nanometers under this method. BRIEF SUMMARY
• a nanoporous templating substrate which is an anodically oxidized alumina (AAO) substrate, is employed to form a pseudocapacitor having high stored energy density.
• a pseudocapacitive material is deposited conformally along the sidewalls of the AAO substrate by atomic layer deposition, chemical vapor deposition, and/or electrochemical deposition employing a nucleation layer. The thickness of the pseudocapacitive material on the walls can be precisely controlled in the deposition process.
• the AAO is etched to form an array of nanotubes of the PC material that are cylindrical and structurally robust with cavities therein. Because the AAO substrate that acts as scaffolding is removed, only the active PC material is left behind, thereby maximizing the energy per mass.
• nanotubes may be de-anchored from a substrate so that free-standing nanotubes having randomized orientations may be deposited on a conductive substrate to form an electrode of a pseudocapacitor.
• an energy storage device includes an electrode, which has a plurality of pseudocapacitive nanocylinders located on a conductive substrate.
• Each pseudocapacitive nanocylinder includes a pseudocapacitive material and has a cavity therein.
• a method of manufacturing a plurality of pseudocapacitive nanocylinders includes: depositing a pseudocapacitive material layer on an anodized aluminum oxide substrate having a plurality of holes therein; exposing surfaces of the anodized aluminum oxide substrate; and removing the anodized aluminum oxide substrate.
• a plurality of pseudocapacitive nanocylinders is formed from remaining portions of the pseudocapacitive material layer.
• FIG. 1 is a top-down scanning electron micrograph (SEM) of the surface of an anodized aluminum oxide (AAO) substrate, coated with TaN via atomic layer deposition, having a regular hexagonal array of ⁇ 30 lim diameter pores.
• SEM scanning electron micrograph
• FIG. 2 is a scanning electron micrograph (SEM) showing a cross-sectional view of a broken piece of AAO substrate that has a coating of TaN grown via ALD.
• FIG. 3 is a bird's eye view of a stack of an AAO substrate and a conductive substrate, in which the AAO substrate includes an array of cylindrical holes, according to a first embodiment of the present disclosure
• FIG. 4 is a vertical cross-sectional view of the stack of the AAO substrate and the conductive substrate of FIG. 3 along the plane Z.
• FIG. 5 is a vertical cross-sectional view of the stack of the AAO substrate and the conductive substrate after deposition of a pseudocapacitive material layer according to the first embodiment of the present disclosure.
• FIG. 6 is a vertical cross-sectional view of the stack of the AAO substrate and the conductive substrate after removal of top portions of the pseudocapacitive material layer according to the first embodiment of the present disclosure.
• FIG. 7 is a vertical cross-sectional view of the conductive substrate and an array of pseudocapacitive nanocylinders after removal of the AAO substrate according to the first embodiment of the present disclosure.
• FIG. 8 is a bird's eye view of the conductive substrate and the an-ay of pseudocapacitive nanocylinders of FIG. 7.
• FIG. 9 is a stack of an AAO substrate and a disposable substrate, in which the AAO substrate includes an array of cylindrical holes, according to a second embodiment of the present disclosure.
• FIG. 10 is a vertical cross-sectional view of the stack of the AAO substrate and the disposable substrate after deposition of a pseudocapacitive material layer according to the second embodiment of the present disclosure.
• FIG. 11 is a vertical cross-sectional view of the AAO substrate and pseudocapacitive material layer after removal of a disposable substrate according to the second embodiment of the present disclosure.
• FIG. 12 is a bird's eye view of the AAO substrate and pseudocapacitive material layer of FIG. 1 1.
• FIG. 13 is a vertical cross-sectional view of the AAO substrate and pseudocapacitive material layer after flipping over and placement on a conductive substrate according to the second embodiment of the present disclosure.
• the pseudocapacitive material layer may, or may not, be attached to the conductive substrate at this step.
• FIG. 14 is a bird's eye view of the AAO substrate and pseudocapacitive material layer and the conductive substrate of FIG. 13.
• FIG. 15 is a vertical cross-sectional view of the conductive substrate and an array of pseudocapacitive nanocylinders after removal of the AAO substrate according to the second embodiment of the present disclosure.
• FIG. 16 is a bird's eye view of the conductive substrate and the array of pseudocapacitive nanocylinders of FIG. 15. All pseudocapacitive nanocylinders are connected to one another through a sheet of a planar- pseudocapacitive material layer.
• FIG. 17 is a vertical cross-sectional view of pseudocapacitive nanocylinders and the AAO substrate after removal of the top portions of the pseudocapacitive material layer of FIG. 11 according to a third embodiment of the present disclosure.
• FIG. 18 is a bird's eye view of the conductive substrate and the array of pseudocapacitive nanocylinders of FIG. 17.
• FIG. 19 is a bird's eye view of a random stack of pseudocapacitive nanocylinders on a conductive substrate that are obtained by removing the AAO substrate of FIG. 18 and letting pseudocapacitive nanocylinders fall on a conductive substrate.
• FIG. 20 is a schematic view of an energy storage device employing pseudocapacitive nanocylinders.
• the present disclosure relates to an energy storage device including at least one nanostructure electrode having a large surface area of a pseudocapacitive material for pseudocapacitive energy storage, and methods of manufacturing the same, which are now described in detail with accompanying figures. It is noted that like reference numerals refer to like elements across different embodiments.
• a top-down scanning electron micrograph (SEM) of the surface of an anodized aluminum oxide (AAO) substrate shows a regular hexagonal array of ⁇ 60 nm diameter pores.
• SEM scanning electron micrograph
• acidic anodizing solutions produce pores in an anodized coating of aluminum.
• acids that can be employed to anodize aluminum include, but are not limited to, phosphoric acid and sulfuric acid.
• the pore size and the pitch depend on the type of anodizing carried out, the anodization temperature, and the forming voltage.
• the pores can be about 10 nm to 200 nm in diameter, and the wall thickness (the distance between adjacent pores) can be between 10 nm and 200 nm, although lesser and greater diameters and wall thicknesses may be obtainable under suitable anodization conditions.
• the pore length can be orders of magnitude longer than the pore diameter, and can be as much as about 25,000 times the diameter.
• a scanning electron micrograph shows a cross-sectional view of a broken piece of AAO substrate that has a coating of TaN layer grown by atomic layer deposition (ALD).
• ALD atomic layer deposition
• the TaN layer prevents charge accumulation and/or arcing on the insulating material of the AAO substrate.
• the vertical cylindrical pores extend through the entire cross- section of the AAO substrate, and the aspect ratio, i.e., the ratio of the length of the pore to the diameter of the pore, can be up to 25,000 or more as discussed above.
• FIGS. 3 and 4 a first exemplary structure according to a first embodiment of the present disclosure is shown in a bird's eye view in FIG. 3 and in a vertical cross-sectional view in FIG. 4.
• the Z plane of FIG. 3 is the vertical cross-sectional plane of FIG. 4.
• the first exemplary structure includes a stack of a conductive substrate 10 and an anodized aluminum oxide (AAO) substrate 20.
• the AAO substrate 20 is a sheet of aluminum foil that is anodically oxidized to be converted into aluminum oxide layer that includes a self- assembled array of vertical pores therein.
• An AAO substrate 20 can be formed employing methods known in the ait.
• the AAO substrate 20 includes an array of "nanopores" 21, which refers to pores having a diameter less than 1 micron. The diameter of individual nanopores 21 and the pitch of the array of nanopores 21 can be controlled by altering anodization parameters.
• each nanopore 21 is from 10 nm to 200 nm, although lesser and greater diameters may be practicable depending on optimization of process conditions in the future.
• the thickness of the AAO substrate 20 is at least 50 times the diameter of the nanopores 21 , and can be up to, or exceed, 25,000 times the diameter of the nanopores 21.
• the thickness of the AAO substrate 20 is from 10 microns to 5 mm, although lesser and greater thicknesses can also be employed.
• Each nanopore 21 is a cylindrical hole extending from the topmost planar surface of the AAO substrate 20 to the bottommost surface of the AAO substrate 20 that contacts a planar topmost surface of the conductive substrate 10.
• the AAO substrate 20 includes a plurality of holes therein, which are a plurality of nanopores 21 therein. The plurality of holes may form a two-dimensional periodic array such as a hexagonal array.
• the AAO substrate 20 is placed on a conductive substrate 10, which includes a conductive material such as elemental metal, an intermetallic alloy of at least two elemental metals, a conductive oxide of a metal, a conductive nitride of a metal, a heavily doped
• the conductive substrate 10 is a thin lightweight substrate in order to maximize stored energy density per total mass of an energy storage device.
• a pseudocapacitive material layer 30L is conformally deposited on the stack of the AAO substrate and the conductive substrate after deposition of according to the first embodiment of the present disclosure.
• a "pseudocapacitive material” refers to a material that can store energy through a reversible reduction/oxidation reaction on a surface thereof. Pseudocapacitive materials include some metals and some metal oxides.
• Pseudocapacitance The phenomenon of a pseudocapacitive material storing and releasing energy through the reversible reduction/oxidation reaction is referred to as "pseudocapacitance.”
• Pseudocapacitive materials include, but are not limited to, manganese oxide (M11O2), ruthenium oxide (Ru0 2 ), nickel oxide (NiO), and a combination thereof.
• the extremely high aspect ratio of the nanopores 21 necessitates the use of atomic layer deposition (ALD) in order to produce a conformal coating of a pseudocapacitive material on the sidewalls of the nanopores 21 in the AAO substrate 10.
• AAO substrate 20 functions as a template for deposition of the pseudocapacitive material layer 30L.
• a monolayer of a first material is deposited in a self-limiting reaction that saturates upon formation of the monolayer of the first material by flowing a first reactant into a deposition chamber.
• a monolayer of a second material is deposited in another self-limiting reaction that saturates upon formation of the monolayer of the second material by flowing a second reactant into the deposition chamber.
• the first reactant and the second reactant are flowed into the same deposition chamber alternately with a pumping period between each round of deposition of a monolayer.
• a metal precursor is deposited in a self- limiting reaction that saturates upon formation of the monolayer of metal atoms by flowing metal-containing reactant into a deposition chamber.
• a monolayer of oxygen is deposited in a self-limiting reaction that saturates upon formation of the monolayer of oxygen atoms by flowing oxygen gas into the deposition chamber. The oxygen is then pumped out from the deposition chamber.
• the steps of flowing the metal- containing reactant, pumping of the metal-containing reactant, flowing oxygen gas, and pumping the oxygen gas are repeatedly cycled to deposit a metal oxide layer exhibiting the characteristics of pseudocapacitance, i.e., a "pseudocapacitive" metal oxide layer.
• the pseudocapacitive material layer 30L is deposited on the exposed surfaces of the conductive substrate 10 at the bottom of each nanopore 21. [0040]
• the thickness of the pseudocapacitive material layer 30L can be precisely controlled with atomic level accuracy. Further, the thickness of the pseudocapacitive material layer 30L is identical throughout the entirety of the pseudocapacitive material layer 30L with atomic precision due to the self-limiting nature of the reactions in the ALD process.
• the thickness of the pseudocapacitive material layer 30L is selected to be less than one half of the diameter of the nanopores 21 so that a cavity 2 ⁇ having a lesser diameter than the diameter of the nanopores 21 is present within each recessed portion of the pseudocapacitive material layer 30L.
• the entirety of the pseudocapacitive material layer 30L is contiguous at this step. As such the inner diameter of the nanotube can be extremelyly controlled down to, and below, 1 nanometer where substantial increases in capacitance have been reported. See, for example, J. Climiola, G. Yushin, Y.
• atomic layer deposition is required to achieve the required high level of conformity and overall geometrical control in order to form a contiguous pseudocapacitive material layer 30L that extends to the bottom portions of the nanopores 21.
• Attempts to employ electroplating faces two problems.
• the first problem is that the AAO substrate 20 cannot be employed as an electrode for electroplating because the AAO substrate 20 is an insulator.
• the exposed surfaces of the AAO substrate 20 must be converted to a conductor surface by first forming a uniform coating of a conductive material.
• atomic layer deposition is required anyway even to form a conductive seed layer for the purpose of employing electroplating.
• the second problem is that the diameters of the nanopores 21 are too small and the aspect ratio of the nanopores 21 is too high to employ electroplating even if a conductive seed layer were to be successfully provided.
• the plating liquids and the electric fields cannot penetrate to the lower portion of the nanopores 21 because of the small diameters of the nanopores 21 and the high aspect ratio (at least 10, and typically greater than 50) of the nanopores 21, thereby rendering electroplating impracticable.
• Chemical vapor deposition is a generic gas phase process in which cracking of the precursor occurs on a heated surface. While the method of chemical vapor deposition could in principle work, chemical vapor deposition does not possess the tiny thickness control that atomic layer deposition provides.
• atomic layer deposition is currently the only viable method of forming a conformal layer of a pseudocapacitive material that contacts the bottommost portions of the nanopores 21.
• the use of atomic layer deposition provides the capability to coat the sidewalls of the nanopores 21 and to form a single contiguous
• pseudocapacitive material layer 30L given the length, diameter, and pitch of the array of the nanopores 21.
• the thickness of the pseudocapacitive material layer 30L can be from 1 nm to 75 nm, and typically from 3 nm to 30 nm, although lesser and greater thicknesses can also be employed.
• the top surfaces of the AAO substrate 20 are exposed by removing distal planar portions of the pseudocapacitive material layer 21.
• the distal portions of the pseudocapacitive material layer 21 refer to the contiguous planar portions of the
• pseudocapacitive material layer 21 located on and above the topmost surfaces of the AAO substrate 20.
• the distal portions of the pseudocapacitive material layer 30L can be removed, for example, by chemical mechanical planarization or by an anisotropic etch such as a reactive ion etch. If chemical mechanical planarization is employed, the distal portions of the
• pseudocapacitive material layer 30L can be removed by polishing, in which chemical slurry is employed as needed. If an anisotropic etch is employed, the etchants in a gas phase impinges on the distal portions of the pseudocapacitive material layer 30L with directionality, i.e., along the vertical direction. Typically, the etchants do not etch the bottommost portions of the
• a plurality of pseudocapacitive “nanocylinders” 40 is formed by removing the AAO substrate 20.
• a “nanocylinder” refers to a structure including a cylindrical tube having an outer diameter that does not exceed 1 micron. Typically, the outer diameter of a nanocylinders is from 10 nm to 200 nm, although lesser and greater outer diameters (less than 1 micron) can also be employed.
• the alumina, i.e., the aluminum oxide, in the AAO substrate can be etched away, for example, by utilizing standard wet etching methods such as immersion in aqueous chromic acid.
• the result is the plurality of pseudocapacitive nanocylinders 40 is formed as an array of pseudocapacitive nanocylinders 40, which are nanotubes of the pseudocapacitive materials that are structurally robust.
• the plurality of pseudocapacitive nanocylinders 40 is formed from remaining portions of the pseudocapacitive material layer 30L after removal of the AAO substrate 20.
• the AAO substrate 20 Prior to removal, the AAO substrate 20 functions as scaffolding for the two-dimensional periodic array of pseudocapacitive nanocylinders 40.
• the array of pseudocapacitive nanocylinders 40, and an outer pseudocapacitive wall 42 is left.
• the advantage of removal of the AAO substrate 20 is manifold.
• the removal of the AAO substrate 20 forms a two-dimensional ordered array of pseudocapacitive nanocylinders 40 that can be employed as parts of an electrode having an exceptionally high specific area.
• a "specific area” refers to a surface area per unit mass.
• a two-dimensional ordered array of pseudocapacitive nanocylinders 40 can have an areal density up to 10 16 /m 2 and a specific area about 500 m 2 /g.
• the specific area could be two to tliree times higher depending on the specific morphology of the sidewalls of the pseudocapacitive nanocylinders 40, e.g., if the surfaces of the pseudocapacitive nanocylinders 40 is roughened or textured.
• the removal of the AAO substrate 20 reduces the total mass of the first exemplary structure by reducing the parasitic mass, i.e., the total mass of materials that do not contribute to charge storage.
• the energy to mass ratio of the first exemplary structure is enhanced by completely removing all materials, i.e., the alumina in the AAO substrate 20, that do not contribute to the storage of energy.
• the reduced mass of the assembly (10, 40, 42) which includes all remaining portions of first exemplaiy structure at this step, can be subsequently advantageously employed to provide a lightweight electrode including the assembly of the conductive substrate 10 and the array of pseudocapacitive nanocylinders 40.
• the removal of the AAO substrate 20 more than doubles the total surface area of the pseudocapacitive material, thereby doubling the specific capacitance, i.e. the capacitance per unit mass. Because the exposed outer sidewall surfaces of the cylinder portions of the pseudocapacitive nanocylinders 40 add to the total surface area, the total capacitance of the assembly (10, 40, 42) increases correspondingly.
• the assembly (10, 40, 42) functions as an electrode
• the upper portion (40, 42) of the electrode is fully optimized to store electrical charges via Faradaic processes, i.e., via charge transfer processes that employ oxidation and reduction.
• the conductive substrate 10 functions as a portion of the electrode upon which the array of pseudocapacitive nanocylinders 40 is structurally affixed.
• the electrode can employ a plurality of pseudocapacitive nanocylinders 40 located on a conductive substrate 10.
• Each pseudocapacitive nanocylinder 40 includes a
• each pseudocapacitive material has a cavity 2 ⁇ therein.
• the cavity 2 ⁇ in each pseudocapacitive nanocylinder 40 is not encapsulated by that pseudocapacitive nanocylinder 40, but each pseudocapacitive nanocylinder 40 has an opening at one end thereof. The opening at one end is contiguously connected to the cavity 21 ' in each pseudocapacitive nanocylinder 40.
• Each pseudocapacitive nanocylinder 40 includes an end cap portion 40E that does not include a hole therein at an opposite end of the opening contiguously connected to the cavity 2 ⁇ .
• the entirety of each pseudocapacitive nanocylinders 40 has a uniform (same) thickness throughout including the end cap portion 40E that includes an outer end surface.
• the outer end surface of each pseudocapacitive nanocylinder 40 is contiguously connected to an entire periphery of sidewalls of that pseudocapacitive nanocylinder 40. Further, the entirety of the end surface of each pseudocapacitive nanocylinder 40 contacts, and is attached to, the conductive substrate 10.
• the plurality of pseudocapacitive nanocylinders 40 is formed as an array of
• pseudocapacitive nanocylinders 40 having sidewalls that are perpendicular to the top surface of the conductive substrate 10. Each pseudocapacitive nanocylinder 40 does not contact any other pseudocapacitive nanocylinder 40, i.e., is disjoined from other pseudocapacitive nanocylinders 40. Thus, each pseudocapacitive nanocylinder 40 is laterally spaced from any other of the plurality of capacitive nanocylinders 40.
• functional molecular groups may be coated on the outer sidewalls and/or inner sidewalls of the plurality of pseudocapacitive nanocylinders 40.
• the functional groups include an additional pseudocapacitive material that can add to the charge storage of the plurality of pseudocapacitive nanocylinders 40.
• Exemplaiy functional groups include, but are not limited to, polyaniline which is a conducting polymer.
• the coating of the functional groups can be effected in at least another atomic layer deposition process or processes that utilize vapor deposition or wet chemical deposition.
• the coatings on the inner sidewalls and the outer sidewalls may be performed at the same processing step or at different processing steps. For example, the coating of the inner and outer sidewalls may be performed after removal of the AAO substrate 20.
• the inner sidewalls of the plurality of pseudocapacitive nanocylinders 40 can be coated prior to removal of the AAO substrate 20, and the coating of the outer sidewalls of the nanocylinders 40 can be coated after removal of the AAO substrate 20.
• the coating materials and the coating processes known in the ait can be employed to coat the outer sidewalls and/or inner sidewalls of the plurality of pseudocapacitive nanocylinders 40. See, for example, Stewart, M. P.; Maya, F.; Kosynkin, D. V.; Dirk, S. M.; Stapleton, J. J.;
• a second exemplary structure according to a second embodiment of the present disclosure includes a stack of an AAO substrate 20 and a disposable substrate 99.
• the AAO substrate 20 can be the same as in the first embodiment.
• the disposable substrate 99 can include a conductive material, a semiconducting material, an insulating material, or a combination thereof.
• the material of the disposable substrate 99 is selected for easy removal thereof selective to the material of the AAO substrate 20, i.e., without removing the material of the AAO substrate 20, by a method to be subsequently employed.
• the method of removal of the disposable substrate 99 can be a mechanical removal method, a chemical mechanical removal method, or a chemical removal method.
• the thickness of the disposable substrate 99 can be from 10 microns to 500 microns, although lesser and greater thicknesses can also be employed.
• a pseudocapacitive material layer 30L is deposited on the stack of the AAO substrate 20 and the disposable substrate 99.
• the deposition of the pseudocapacitive material layer 30L can be effected employing the same method, i.e., atomic layer deposition, as in the first embodiment. Portions of the pseudocapacitive material layer 30L at the bottom of each cavity 21 ' contacts the top surface of the disposable substrate 99.
• the disposable substrate 99 is removed and the bottom portions of the pseudocapacitive material layer 30L are removed to form an assembly of the AAO substrate 20 and the remaining portions of the pseudocapacitive material layer 30L.
• the removal of the disposable substrate 99 selective to the assembly of the AAO substrate 20 and the pseudocapacitive material layer 30L can be effected, for example, by a mechanical removal method such as grinding, a chemical mechanical removal method such as chemical mechanical planarization, a chemical removal method such as a wet etch or a dry etch, or a combination thereof.
• the bottommost surfaces of the pseudocapacitive material layer 30L which are the same as the outer end surfaces of the end cap portions 40E in FIG.
• each cavity 21 ' extends from the topmost surface of the assembly (20, 30L) of the AAO substrate 20 and the pseudocapacitive material layer 30L to the bottommost surface of the assembly (20, 30L) with an opening at the top and another opening at the bottom.
• a portion of the pseudocapacitive material layer 30L around each cavity 21 ' constitutes a prototypical pseudocapacitive nanocylinder 40P.
• the entirety of the pseudocapacitive material layer 30L is contiguous because each prototypical pseudocapacitive nanocylinder 40P is contiguously connected all other prototypical
• pseudocapacitive material layer 30L located between each neighboring pair of prototypical pseudocapacitive nanocylinders 40P.
• the assembly (20, 30L) of the AAO substrate 20 and the pseudocapacitive material layer 30L is flipped over.
• the assembly (20, 30L) can be placed on a conductive substrate 10, which can have the same composition and thickness as the conductive substrate 10 of the first embodiment.
• the pseudocapacitive material layer 30L may, or may not, be attached to the conductive substrate 10 at this step.
• the bottom surfaces of the pseudocapacitive material layer 30L are permanently attached, for example, employing a conductive adhesive material (not shown).
• the assembly 20, 30L) of the AAO substrate 20 and the pseudocapacitive material layer 30L is placed without attachment or with temporary attachment to the conductive substrate 10 to enable subsequent detachment of the pseudocapacitive material layer 30L.
• the AAO substrate 20 is removed employing the same removal process of the first embodiment corresponding to FIGS. 7 and 8. If a conductive substrate 10 is employed, the planar pseudocapacitive material layer 3 OP contacts the top surface of the conductive substrate 10. The outer side walls of the prototypical pseudocapacitive nanocylinders 40P become exposed as the AAO substrate 20 is removed, and a plurality of prototypical pseudocapacitive nanocylinders 40P become a plurality of pseudocapacitive nanocylinders 40'. All pseudocapacitive nanocylinders 40' are connected to one another through a sheet of a planar pseudocapacitive material layer 3 OP.
• the remaining portions of the pseudocapacitive material layer 3 OP include the plurality of pseudocapacitive nanocylinders 40' and the planar pseudocapacitive material layer 30P, which are of integral construction and have the same thicloiess and composition tliroughout.
• each of the plurality of capacitive nanocylinders 40' is contiguously connected to one another through the planar pseudocapacitive material layer 3 OP at a bottom end of each capacitive nanocylinder 40'.
• the planar pseudocapacitive material layer 3 OP has at least as many number of holes therein as the total number of pseudocapacitive nanocylinders 40' among the plurality of
• pseudocapacitive nanocylinders 40' The plurality of pseudocapacitive nanocylinders 40' is formed as an array of pseudocapacitive nanocylinders having the same two-dimensional periodicity as the nanopores in the AAO substrate 20 (which is no longer present at this step; see FIG. 9). If a conductive substrate 10 is present, the array of pseudocapacitive nanocylinders 40' has vertical sidewalls that are perpendicular to the top surface of the conductive substrate 10.
• Each pseudocapacitive nanocylinder 40' includes a pseudocapacitive material and has a cavity 21 ' therein.
• the cavity 21 ' in each pseudocapacitive nanocylinder 40' is not encapsulated by that pseudocapacitive nanocylinder 40'.
• Each pseudocapacitive nanocylinder 40' has two end surfaces each including a hole therein.
• Each pseudocapacitive nanocylinder 40' has two openings that are located at end portions of that pseudocapacitive nanocylinder 40'.
• each pseudocapacitive nanocylinder 40' has an opening at a top end, i.e., a top opening, and another opening at a bottom end, i.e., a bottom opening. Each of the top opening and the bottom opening is contiguously connected to the cavity 21.
• the top opening contiguously extends to the ambient.
• the bottom opening can also contiguously extend to the ambient if a conductive plate 10 is not employed, or can be blocked by the top surface of a conductive plate 10 if the conductive plate 10 is employed. If a conductive plate 10 is present, the sidewalls of the plurality of pseudocapacitive nanocylinders 40' are perpendicular to the top surface of the conductive substrate 10.
• the second exemplary structure can be employed as an electrode of an energy storage device.
• the electrode includes a plurality of pseudocapacitive nanocylinders 40', a planar pseudocapacitive material layer 3 OP, and a conductive substrate 10.
• the electrode includes a plurality of pseudocapacitive nanocylinders 40' and a planar pseudocapacitive material layer 30P, but does not include a conductive substrate 10.
• a third exemplary structure according to a third embodiment of the present disclosure can be derived from the second exemplary structure of FIGS. 11 and 12 by removing the topmost planar portion of the pseudocapacitive material layer 30L to expose the surfaces of the A AO substrate 20.
• the third exemplary structure can be derived from the second exemplary structure of FIG. 10 by first removing the topmost planar portion of the pseudocapacitive material layer 30L to expose the surfaces of the AAO substrate 20 and then removing the disposable substrate 99 and the bottom portions of the pseudocapacitive material layer 30L.
• An assembly (20, 40') of the AAO substrate 20 and a plurality of pseudocapacitive nanocylinders 40" is formed.
• Each pseudocapacitive nanocylinder 40" is a cylindrical tube that is topologically homeomoiphic to a torus, and has an exposed inner vertical sidewall, an exposed top end surface with a hole therein, and an exposed bottom end surface with a hole therein.
• the outer vertical sidewall of each pseudocapacitive nanocylinder 40" contacts the AAO substrate 20, which holds the plurality of pseudocapacitive nanocylinders 40" in place at this step.
• the surfaces of the AAO substrate 10 are exposed at the top and at the bottom.
• the assembly (20, 40') of the AAO substrate 20 and a plurality of pseudocapacitive nanocylinders 40" is placed on a conductive substrate 10 or a temporary substrate (not shown), and the AAO substrate 20 is removed employing the same removal process of the first embodiment corresponding to FIGS. 7 and 8. All pseudocapacitive nanocylmders 40" are detached from one another as the AAO substrate 20 is etched away, and fall down on the conductive substrate 10 or on the temporary substrate.
• pseudocapacitive nanocylinders 40" become "randomized,” i.e., the orientations become
• random orientations or randomized orientations refer to a lack of alignment among elements, and includes geometries that include a short range order or an accidental long range trend.
• orientations of the pseudocapacitive nanocylinders 40" are considered “random” even if a particular orientation has a higher probability of occurrence, for example, due to tilting of the conductive substrate 10 or the temporary substrate during the etch process to induce a fall in a preferred orientation because the process of falling inlierently introduces uncertainty in the final orientation of each pseudocapacitive nanocylinders 40".
• the plurality of pseudocapacitive nanocylinders 40" may be affixed to the conductive substrate 10, for example, employing a thin layer of conductive adhesive. If a temporary substrate is employed, the plurality of pseudocapacitive nanocylinders 40" can be poured onto a conductive substrate 10 coated with a thin layer of conductive adhesive so that the plurality of pseudocapacitive nanocylinders 40" is affixed to the conductive substrate. The orientations the plurality of pseudocapacitive nanocylinders 40" are randomized upon placement on the conductive substrate 10 either by directly falling onto the conductive substrate 10 or by falling on a temporary substrate and subsequently being poured onto the conductive substrate 10.
• Each pseudocapacitive nanocylinder 40" includes a pseudocapacitive material and has a cavity 21 ' therein.
• Each pseudocapacitive nanocylinder 40" has two openings that are located at end portions of that pseudocapacitive nanocylinder 40'. Each opening is within an end surface of a pseudocapacitive nanocylinder 40". Each opening is contiguously com ected to the cavity 2 . Thus, the cavity 21 ' in each pseudocapacitive nanocylinder 40" is not encapsulated by that pseudocapacitive nanocylinder 40".
• the third exemplary structure can be employed as an electrode of an energy storage device.
• the electrode is a "randomized nanocylinder electrode" in which the orientations of the pseudocapacitive nanocylinder 40" are randomized in a two-dimensional plane parallel to the local portion of the conductive substrate 10.
• the electrode can be bent as needed along with the pseudocapacitive nanocylinder 40" therein.
• appropriate functional groups can be coated employing the same methods as in the first and second embodiments.
• the exemplary energy storage device includes a first electrode that employs one of the first, second, and third exemplary structures described above.
• the exemplary energy storage device includes a second electrode that does not contact the first electrode.
• the second electrode includes an electrically conductive material such as porous activated carbon or a nanostructured material that is not a pseudocapacitive material.
• the exemplary energy storage device further includes a separator, which is a membrane that is ionically conductive but is a barrier to electrons. To reiterate, ions move through the separator under applied electrical bias across the first electrode and the second electrode. However, the separator prevents movement of electrons therethrough.
• a robust paper may be used for the separator.
• the robust paper is an electron insulator, but becomes ionically conductive when saturated with electrolyte.
• An electrolyte solution is provided between the first and second electrodes such that the separator is embedded in the electrolyte solution.
• the unique structures and processes described above can be employed to provide an ultracapacitor electrode that could double or triple the energy density presently achievable, and replace lead-acid battery technology in a host of applications such as automotive batteries and backup batteries in telecommunications.
• the disclosed electrodes employing pseudocapacitive nanocylinders can achieve similar energy densities as, but also enables charge/discharge cycling life that is 100 - 1000 times that of a typical battery.

Landscapes

• Engineering & Computer Science (AREA)
• Power Engineering (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Chemical & Material Sciences (AREA)
• Materials Engineering (AREA)
• Crystallography & Structural Chemistry (AREA)
• Nanotechnology (AREA)
• Electric Double-Layer Capacitors Or The Like (AREA)
• Battery Electrode And Active Subsutance (AREA)
• Secondary Cells (AREA)
• Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Priority Applications (5)

Applications Claiming Priority (2)

Publications (1)

Family

ID=45770566

Family Applications (1)

Country Status (8)

Cited By (2)

Families Citing this family (12)

Citations (4)

Family Cites Families (21)

• 2010
  • 2010-09-07 US US12/876,441 patent/US8599533B2/en active Active
• 2011
  • 2011-07-20 GB GB1304363.3A patent/GB2497040B/en not_active Expired - Fee Related
  • 2011-07-20 CN CN201180042946.9A patent/CN103098160B/zh not_active Expired - Fee Related
  • 2011-07-20 JP JP2013527076A patent/JP5629381B2/ja not_active Expired - Fee Related
  • 2011-07-20 WO PCT/US2011/044643 patent/WO2012033570A1/en not_active Ceased
  • 2011-07-20 DE DE112011102970T patent/DE112011102970T5/de active Pending
  • 2011-07-20 RU RU2012106418/07A patent/RU2521083C2/ru not_active IP Right Cessation
  • 2011-09-07 TW TW100132203A patent/TWI497547B/zh not_active IP Right Cessation

Patent Citations (4)

Also Published As

Similar Documents

Legal Events