WO2012029381A1 - Light emitting element and production method for same, production method for light-emitting device, illumination device, backlight, display device, and diode - Google Patents

Light emitting element and production method for same, production method for light-emitting device, illumination device, backlight, display device, and diode Download PDF

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Publication number
WO2012029381A1
WO2012029381A1 PCT/JP2011/064231 JP2011064231W WO2012029381A1 WO 2012029381 A1 WO2012029381 A1 WO 2012029381A1 JP 2011064231 W JP2011064231 W JP 2011064231W WO 2012029381 A1 WO2012029381 A1 WO 2012029381A1
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Prior art keywords
light emitting
semiconductor
semiconductor layer
substrate
diode
Prior art date
Application number
PCT/JP2011/064231
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French (fr)
Japanese (ja)
Inventor
柴田　晃秀
哲 根岸
健治 小宮
善史 矢追
竹史 塩見
岩田　浩
高橋　明
Original Assignee
シャープ株式会社
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Publication date
Priority claimed from JP2010208023A external-priority patent/JP2012064772A/en
Priority claimed from JP2011122176A external-priority patent/JP4927223B2/en
Application filed by シャープ株式会社 filed Critical シャープ株式会社
Priority to KR1020137007755A priority Critical patent/KR20130093115A/en
Priority to CN201180052596.4A priority patent/CN103190004B/en
Priority to KR1020157021465A priority patent/KR20150098246A/en
Priority to US13/820,081 priority patent/US9190590B2/en
Publication of WO2012029381A1 publication Critical patent/WO2012029381A1/en

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    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G02F1/1336—Illuminating devices
    • G02F1/133602—Direct backlight
    • G02F1/133603—Direct backlight with LEDs
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Definitions

  • the present invention relates to a light emitting element having a protruding semiconductor such as a rod or plate, a method for manufacturing the same, a method for manufacturing a light emitting device including the light emitting element, and an illumination device, a backlight, and a display device including the light emitting device. And a diode constituting a light emitting diode or a photoelectric conversion element.
  • Patent Document 1 Japanese Patent Laid-Open No. 2006-332650.
  • a first polar layer 910 is formed on a substrate 900, and a plurality of rods 920 made of an active layer that emits light is formed on the first polar layer 910.
  • the rod 920 is further encapsulated in a second polar layer 930, and the plurality of rods 920 and the second polar layer 930 made of the active layer constitute a rod-type light emitting element.
  • each rod 920 emits light to the entire surface, the light emitting area is increased and the amount of light by the light emitting element is increased.
  • the rod 920 is formed of an active layer, and the active layer has a role of exclusively confining carriers to increase the light emission efficiency, and generally has a high resistance.
  • the active layer having a high resistance becomes longer, and a sufficient current can flow to the tip. There was a problem that the tip end portion became dark without being able to be obtained and sufficient light emission intensity could not be obtained.
  • Non-Patent Document 1 a core 3001 made of n-type GaN and an InGaN layer 3002, an i-GaN layer 3003, a p-AlGaN layer 3004, and a p-GaN layer 3005 are sequentially shelled so as to cover the periphery of the core 3001. It is formed in a shape.
  • the InGaN layer 3002 and the i-GaN layer 3003 constitute an active layer.
  • the n-type core 3001 is used as an n-type electrode, and the material is selected with priority given to the function of the n-type electrode. Is limited. For this reason, it is difficult to freely select the material of the core 3001 to give the core desired characteristics, and this causes an increase in manufacturing cost and a decrease in manufacturing yield for giving the core desired characteristics. It was.
  • an object of the present invention is to provide a light emitting element that can obtain a sufficient light emission intensity with low resistance.
  • the present invention further provides a method for manufacturing such a light-emitting element, a method for manufacturing a light-emitting device using such a light-emitting element, a lighting device including such a light-emitting device, a backlight, and a display device. There is.
  • Another object of the present invention is to provide a diode that can have desired characteristics in the core without causing an increase in manufacturing cost or a decrease in manufacturing yield.
  • a light emitting device of the present invention includes a first conductivity type semiconductor base, A plurality of first-conductivity-type protruding semiconductors formed on the first-conductivity-type semiconductor base; And a semiconductor layer of a second conductivity type covering the protruding semiconductor.
  • the second conductive type semiconductor layer is formed so as to cover the first conductive type protruding semiconductor, almost all side surfaces of the protruding semiconductor can be made to emit light. It becomes. Therefore, according to the light emitting device of the present invention, the light emission amount per unit area of the first conductivity type semiconductor base can be increased as compared with a light emitting diode chip having a planar light emitting layer.
  • the protruding semiconductor is made of a first conductivity type semiconductor
  • the resistance can be easily reduced by increasing the amount of impurities that give the first conductivity type to the protruding semiconductor. Therefore, even if the length of the protruding semiconductor is increased, an increase in the resistance of the protruding semiconductor is suppressed, and light can be emitted uniformly from the root portion to the tip portion of the protruding semiconductor. Therefore, it is possible to further increase the light emission amount per unit area of the first conductivity type semiconductor base.
  • the first conductive type protruding semiconductor is a first conductive type rod-shaped semiconductor.
  • a planar light emitting layer is provided. Compared with the light emitting diode chip, the light emission amount per unit area of the semiconductor base of the first conductivity type can be increased.
  • the length of the first conductivity type rod-shaped semiconductor is 10 times or more the thickness of the first conductivity type rod-shaped semiconductor.
  • the light emission amount per unit area of the semiconductor base can be remarkably increased.
  • the rod-shaped semiconductor is made of an active layer as in the prior art, it is difficult to emit light at the tip if the length of the rod-shaped semiconductor is 10 times or more the thickness. Therefore, when the length of the rod-shaped semiconductor is 10 times or more of the thickness, the advantage of the present invention that the light emission intensity is high with low resistance becomes particularly remarkable.
  • the first conductive type protruding semiconductor is a first conductive type semiconductor plate.
  • the projecting semiconductor is a plate semiconductor
  • the widest light emission surface of the plate semiconductor is a nonpolar surface, so that the overall light emission efficiency can be increased.
  • an active layer is formed between the first conductive type protruding semiconductor and the second conductive type semiconductor layer.
  • the luminous efficiency can be increased. Further, since the active layer is formed to be relatively thin between the first conductive type protruding semiconductor and the second conductive type semiconductor layer, the luminous efficiency is high. This is because the active layer is for confining bipolar carriers (holes and electrons) in a narrow range to increase the recombination probability. On the other hand, when all of the first conductive type rod-shaped semiconductor portion is made of an active layer as in the prior art, the light emission efficiency is not high because of insufficient carrier confinement.
  • a transparent electrode layer is formed on the second conductivity type semiconductor layer.
  • a transparent member made of a material having higher transparency than the transparent electrode layer in a facing gap where the transparent electrode layer is opposed between the plurality of first conductive type protruding semiconductors. Is filled.
  • the method for manufacturing a light-emitting element includes a step of patterning a mask layer on the surface of a first conductivity type semiconductor layer forming part or all of the first substrate; Forming a plurality of first-conductivity-type protruding semiconductors by anisotropically etching the semiconductor layer using the mask layer as a mask; A semiconductor shell forming step of forming a second conductivity type semiconductor layer so as to cover the surface of the first conductivity type protruding semiconductor.
  • the manufacturing method of the present invention in the manufactured light emitting element, since the second conductive type semiconductor layer is formed so as to cover the first conductive type protruding semiconductor, almost all side surfaces of the protruding semiconductor are formed. Can be emitted. Therefore, according to the light emitting element, it is possible to increase the light emission amount per unit area of the first substrate as compared with a light emitting diode chip having a planar light emitting layer. Further, according to this manufacturing method, since the protruding semiconductor is made of a first conductivity type semiconductor, the resistance can be easily reduced by increasing the amount of impurities that give the first conductivity type to the protruding semiconductor.
  • the protruding semiconductor can be formed by anisotropic etching with the photolithography process, a protruding semiconductor having a favorable shape can be obtained and the yield can be improved. Can do.
  • the method of manufacturing a light emitting device includes a crystal defect recovery step of annealing the first conductive type protruding semiconductor after the semiconductor core formation step and before the semiconductor shell formation step. Do.
  • the crystal defect density of the protruding semiconductor can be reduced and the crystallinity can be improved by the crystal defect recovery step by the annealing. Accordingly, in the subsequent semiconductor shell formation step, the crystallinity of the second conductivity type semiconductor layer is also improved, so that the light emission efficiency of the light emitting element can be improved.
  • a part of the first conductive type protruding semiconductor is etched by wet etching.
  • a crystal defect removal step is performed.
  • the crystal defect density of the protruding semiconductor can be reduced and the crystallinity can be improved by the crystal defect removal step by the etching. Accordingly, in the subsequent semiconductor shell formation step, the crystallinity of the second conductivity type semiconductor layer is also improved, so that the light emission efficiency of the light emitting element can be improved.
  • a part of the first conductive type protruding semiconductor is etched by wet etching.
  • a crystal defect removal step After the semiconductor core formation step and before the semiconductor shell formation step, the crystal defect recovery step of annealing the first conductive type protruding semiconductor is the crystal defect removal step, the crystal defect recovery step In order.
  • the crystallinity of the protruding semiconductor can be more effectively improved. Can do.
  • the method for manufacturing a light-emitting element includes a step of patterning a mask layer on the surface of a first conductivity type semiconductor layer forming part or all of the first substrate; Forming a plurality of first-conductivity-type protruding semiconductors by anisotropically etching the semiconductor layer using the mask layer as a mask; A semiconductor shell forming step of forming a second conductive type semiconductor layer so as to cover the surface of the first conductive type protruding semiconductor; A light emitting element separating step of separating the first conductive type protruding semiconductor covered with the second conductive type semiconductor layer from the first substrate.
  • the protruding light emitting elements formed by the protruding semiconductor formed by processing the semiconductor layer of the first conductivity type in the step of separating the light emitting elements are finally independent of each other. It becomes the light emitting element which became. Therefore, the use method of the projection-like light emitting elements can be diversified and the utility value can be increased in that each light emitting element can be used individually. For example, a desired number of separated light emitting elements can be arranged at a desired density. In this case, for example, a surface light-emitting device can be configured by rearranging a large number of fine light-emitting elements on a large-area substrate. In addition, the heat generation density can be lowered to achieve high reliability and long life.
  • the second conductive type semiconductor layer is formed so as to cover the first conductive type protruding semiconductor by this manufacturing method, almost all side surfaces of the protruding semiconductor can be made to emit light. . Therefore, a large number of light emitting elements having a large total light emission amount can be obtained from the substrate (first substrate). Further, according to this manufacturing method, since the protruding semiconductor is made of a first conductivity type semiconductor, the resistance can be easily reduced by increasing the amount of impurities that give the first conductivity type to the protruding semiconductor.
  • the protruding semiconductor can be formed by anisotropic etching with a photolithography process, a protruding semiconductor having a good shape as intended can be obtained, and consequently desired good Since a light-emitting element having a shape can be obtained, the yield of the light-emitting elements can be improved.
  • an active layer is formed between the semiconductor core formation step and the semiconductor shell formation step so as to cover the surface of the first conductive type protruding semiconductor.
  • the luminous efficiency can be increased in the active layer.
  • a transparent electrode layer is formed so as to cover the semiconductor layer of the second conductivity type after the semiconductor shell forming step.
  • the transparent electrode layer can prevent the voltage drop in the second conductive type semiconductor layer while transmitting the light emitted from the protruding semiconductor. Therefore, light can be emitted uniformly over the entire protruding semiconductor.
  • a desired number of light emitting elements separated in the light emitting element separating step can be arranged on the second substrate with a desired density. Therefore, for example, a surface light-emitting device can be configured by rearranging a large number of fine light-emitting elements on a large-area substrate. In addition, the heat generation density can be lowered to achieve high reliability and long life.
  • the illuminating device of one Embodiment was equipped with the light-emitting device manufactured by the manufacturing method of the said light-emitting device.
  • the lighting device of this embodiment since the light emitting device manufactured by the method for manufacturing a light emitting device of the present invention is provided, a lighting device with high luminous efficiency and high reliability can be obtained.
  • the liquid crystal backlight of one embodiment includes a light emitting device manufactured by the method for manufacturing a light emitting device.
  • liquid crystal backlight of this embodiment since the light emitting device manufactured by the method for manufacturing a light emitting device of the present invention is provided, a backlight with high heat dissipation efficiency can be obtained.
  • a method for manufacturing a display device comprising: patterning a mask layer on a surface of a first conductivity type semiconductor layer that forms part or all of a first substrate; Forming a plurality of first-conductivity-type protruding semiconductors by anisotropically etching the semiconductor layer using the mask layer as a mask; A semiconductor shell forming step of forming a second conductive type semiconductor layer so as to cover the surface of the first conductive type protruding semiconductor; A light emitting element separating step of separating the first conductive type protruding semiconductor covered with the second conductive type semiconductor layer from the first substrate to obtain a light emitting element; A light emitting element arranging step of arranging the light emitting element corresponding to a pixel position on the second substrate; And a light emitting element wiring step for performing wiring for energizing the light emitting elements arranged corresponding to the pixel positions on the second substrate.
  • the second conductive type semiconductor layer is formed so as to cover the surface of the first conductive type protruding semiconductor, the first conductive material as the protruding semiconductor material is formed.
  • the light emission area per unit area of the substrate can be greatly increased. That is, it is possible to greatly reduce the manufacturing cost of the first conductive type protruding semiconductor covered with the second conductive type semiconductor layer functioning as a light emitting element.
  • the protruding semiconductor of the first conductivity type covered with the semiconductor layer of the second conductivity type is separated from the first substrate and disposed on the second substrate serving as a panel of the display device.
  • the display device is manufactured by wiring.
  • the manufacturing cost of the display device can be reduced by manufacturing the display device by this manufacturing method.
  • the display device of one embodiment is manufactured by the above-described manufacturing method of the display device.
  • a low-cost display device is provided.
  • the diode of the present invention includes a core portion, A first conductivity type semiconductor layer formed so as to cover the core portion; A second conductivity type semiconductor layer covering the first conductivity type semiconductor layer, The material of the core part and the material of the semiconductor layer of the first conductivity type are different from each other.
  • the diode of the present invention since the first conductive type semiconductor layer and the second conductive type semiconductor layer play a role of the two poles of the diode, a desired material can be selected as the material of the core portion. . Therefore, it is possible to give the core part desired properties (refractive index, thermal conductivity, electrical conductivity, etc.) without increasing the manufacturing cost and reducing the manufacturing yield.
  • the refractive index of the core portion is larger than the refractive index of the first conductive type semiconductor layer, and the light emitting diode is provided.
  • the generated light can be guided to the core part, and the core part can emit light strongly.
  • the refractive index of the core portion is larger than the refractive index of the first conductive type semiconductor layer and has a photoelectric effect.
  • the light capturing effect can be enhanced, and the photoelectric effect can be enhanced.
  • the refractive index of the core portion is smaller than the refractive index of the first conductive type semiconductor layer, and the light emitting diode.
  • the generated light is difficult to enter the core part and is easily reflected on the surface of the core part. Therefore, the light is externally transmitted from the first conductive type semiconductor layer to the second conductive type semiconductor layer. Can be taken out.
  • the thermal conductivity of the core portion is larger than that of the first conductive type semiconductor layer, and the light emitting diode.
  • the thermal conductivity of the core portion is larger than the thermal conductivity of the first conductive type semiconductor layer and has a photoelectric effect.
  • the electrical conductivity of the core is greater than the electrical conductivity of the first conductivity type semiconductor layer, and the LED is a light emitting diode.
  • the electric resistance of the core portion is reduced and current can easily flow from the core portion to the first conductivity type semiconductor layer, loss can be suppressed and light can be emitted efficiently.
  • the electric conductivity of the core portion is larger than the electric conductivity of the first conductive type semiconductor layer and has a photoelectric effect.
  • the electric resistance of the core portion is reduced and a current is easily passed from the first conductive type semiconductor layer to the core portion, loss can be suppressed and power can be generated efficiently.
  • the core part is made of silicon.
  • the core, the first conductivity type semiconductor layer, and the second conductivity type semiconductor layer are formed on the substrate, and then the core portion and the first conductivity are formed from the substrate. It was produced by separating the semiconductor layer of the mold and the semiconductor layer of the second conductivity type.
  • the diode of this embodiment since it is separated from the substrate, it can be easily mounted on another substrate.
  • the core portion is formed on the substrate, Forming a first conductivity type semiconductor layer so as to cover the core portion; Forming a second conductivity type semiconductor layer so as to cover the first conductivity type semiconductor layer;
  • the material of the core part and the material of the first conductivity type semiconductor layer are different from each other.
  • the first conductive type semiconductor layer and the second conductive type semiconductor layer play a role of two poles of the diode, and a desired material for the core portion is obtained.
  • a diode can be manufactured in which the material can be selected and the core portion can have desired characteristics.
  • the lighting device of one embodiment includes the light emitting diode of the above embodiment.
  • the characteristics (refractive index, thermal conductivity, electrical conductivity) of the core portion of the light emitting diode can be set as desired without causing an increase in manufacturing cost and a decrease in manufacturing yield. Advantages such as easy setting of the directivity of illumination and improvement of illumination efficiency can be obtained.
  • the backlight according to one embodiment includes the light emitting diode according to the above embodiment.
  • the characteristics (refractive index, thermal conductivity, electrical conductivity) of the core portion of the light emitting diode can be set as desired, and the directivity of the backlight can be easily set. The merit that improvement of efficiency can be achieved is obtained.
  • the display device of one embodiment includes the light emitting diode of the above embodiment.
  • the characteristics (refractive index, thermal conductivity, electrical conductivity) of the core portion of the light emitting diode can be set as desired, and the directivity of the display device can be easily set. The merit that improvement of efficiency can be achieved is obtained.
  • the photodetector of one embodiment includes the diode having the photoelectric effect of the above embodiment.
  • desired characteristics (refractive index, thermal conductivity, electrical conductivity) of the core portion of the diode having the photoelectric effect can be obtained without causing an increase in manufacturing cost or a decrease in manufacturing yield. Can be set. Therefore, it is possible to improve the light capturing effect, improve the heat dissipation, suppress the loss, etc., increase the photoelectric conversion efficiency, and improve the light detection performance.
  • the solar cell of one embodiment includes the diode having the photoelectric effect of the above embodiment.
  • the characteristics (refractive index, thermal conductivity, electric conductivity) of the diode core having the photoelectric effect are desired without causing an increase in manufacturing cost or a decrease in manufacturing yield. Can be set. Therefore, it is possible to improve the light capturing effect, improve the heat dissipation, suppress the loss, and generate power efficiently.
  • the protruding semiconductor is made of the first conductivity type semiconductor, the resistance of the protruding semiconductor can be easily reduced by increasing the amount of impurities that give the first conductivity type to the protruding semiconductor. it can. Therefore, even if the length of the protruding semiconductor is increased, an increase in the resistance of the protruding semiconductor is suppressed, and light can be emitted uniformly from the root portion to the tip portion of the protruding semiconductor. Therefore, it is possible to further increase the light emission amount per unit area of the first conductivity type semiconductor base.
  • the diode of the present invention since the first conductive type semiconductor layer and the second conductive type semiconductor layer play the role of the two poles of the diode, a desired material can be selected as the material of the core portion. Therefore, it is possible to give the core part desired properties (refractive index, thermal conductivity, electrical conductivity, etc.) without increasing the manufacturing cost and reducing the manufacturing yield.
  • FIG. 33B is a cross-sectional view illustrating a state where the separated light emitting diode of FIG. 33A is mounted on the mounting substrate in a laid state. It is process sectional drawing of the manufacturing method of the diode as 11th Embodiment of this invention. It is process sectional drawing of the said 11th Embodiment. It is process sectional drawing of the said 11th Embodiment.
  • FIG. 1A is a cross-sectional view of the light emitting device of the first embodiment
  • FIG. 1B is a view of the light emitting device of the first embodiment as viewed from above, and is a diagram exclusively showing the position of the rod-shaped semiconductor
  • 2 to 6 are views for explaining a method of manufacturing the light emitting device according to the first embodiment.
  • the light emitting device 100 includes an n-type semiconductor layer 113 as a first conductivity type semiconductor base, a plurality of n-type rod-shaped semiconductors 121 formed on the n-type semiconductor layer 113, and And a p-type semiconductor layer 123 as a second conductivity type semiconductor layer covering the rod-shaped (projection-shaped) semiconductor 121.
  • a p-type semiconductor layer may be provided instead of the n-type semiconductor layer 113.
  • an n-type semiconductor layer is provided instead of the p-type semiconductor layer 123 as the second conductivity type semiconductor layer.
  • the semiconductor layer 123 forming the second conductivity type semiconductor layer is n-type and the semiconductor layer 113 is n-type.
  • the semiconductor layer 123 is p-type.
  • the semiconductor layer 113 as the first conductivity type semiconductor base and the first conductivity type rod-shaped semiconductor 121 are n-type and the second conductivity type semiconductor layer 123 is p-type will be described.
  • the n-type and the p-type are interchanged so that the semiconductor layer 113 as the first conductive type semiconductor base and the first conductive type rod-shaped semiconductor 121 are set as the p-type and the second conductive type. This can be an explanation of an example in which the n-type semiconductor layer 123 is used.
  • an n-type semiconductor layer 113 serving as a first conductivity type semiconductor base is formed on a substrate 111, and this n-type semiconductor is formed.
  • a plurality of n-type rod-shaped semiconductors 121 as first-conductivity-type rod-shaped semiconductors are formed on the layer 113 at intervals from each other.
  • the entire surfaces of the n-type rod-shaped semiconductor 121 and the n-type semiconductor layer 113 are covered with an active layer 122.
  • a p-type semiconductor layer 123 is formed on the entire surface of the active layer 122. Further, the entire surface of the p-type semiconductor layer 123 is covered with a transparent electrode layer 124.
  • a transparent electrode layer 124 covering the active layer 122 covering the rod-shaped semiconductor 121 is opposed to the gap between the plurality of n-type rod-shaped semiconductors 121 with a gap therebetween.
  • the gap facing the transparent electrode layer 124 is filled with a transparent member 131 having a higher transparency than the transparent electrode layer 124.
  • the transparent electrode layer 124 is not covered with the transparent member 131, but is covered with the upper electrode 141 above the rod-shaped semiconductor 121. That is, as shown in FIG. 1A, the upper electrode 141 is formed on the transparent member 131 that fills the gap where the transparent electrode layer 124 faces and the transparent electrode layer 124 that covers the upper portion of the rod-shaped semiconductor 121. Yes. Thereby, the transparent electrode layer 124 is electrically connected to the upper electrode 141.
  • the substrate 111 may be made of an insulator such as sapphire, a semiconductor such as silicon, but is not limited thereto.
  • the n-type semiconductor layer 113, the n-type rod-shaped semiconductor 121, and the p-type semiconductor layer 123 are formed using a semiconductor whose base material is GaN, GaAs, AlGaAs, GaAsP, InGaN, AlGaN, GaP, ZnSe, AlGaInP, or the like. Also good.
  • the active layer 122 for example, when GaN is selected as the n-type semiconductor layer 113, the n-type rod-shaped semiconductor 121, and the p-type semiconductor layer 123, InGaN can be used.
  • the transparent electrode layer 124 for example, ITO, ZnO, SnO or the like can be used.
  • the transparent member 131 can be made of, for example, a silicon oxide film or a transparent resin.
  • a metal such as gold, silver, copper, aluminum, or tungsten, or a transparent electrode such as ITO, ZnO, or SnO can be used.
  • a substrate such as a silicon substrate that does not transmit light is used as the substrate 111, it is necessary to select a transparent electrode that transmits light as the upper electrode 141.
  • each portion is, for example, that the thickness of the n-type semiconductor layer 113 as the semiconductor base is 5 ⁇ m, the thickness D of the n-type semiconductor rod 121 is 1 ⁇ m, the length L is 20 ⁇ m, and the n-type semiconductor rod
  • the spacing P between 121 may be 3 ⁇ m, the thickness of the active layer 122 may be 10 nm, the thickness of the p-type semiconductor layer 123 may be 150 nm, and the thickness of the transparent electrode layer 124 may be 150 nm.
  • the substrate 111 is a silicon substrate, the n-type semiconductor layer 113, the n-type rod-shaped semiconductor 121 and the p-type semiconductor layer 123 is GaN, the active layer 122 is InGaN, and is transparent.
  • ITO is used as the electrode layer 124, a silicon oxide film is used as the transparent member 131, and ITO is used as the upper electrode 141.
  • said example is used for the film thickness of each part.
  • the first conductivity type is n-type and the second conductivity type is p-type.
  • the first conductivity type may be p-type and the second conductivity type may be n-type.
  • the n-type semiconductor layer 113 forms a lower electrode (cathode), and a current is passed between the lower electrode (cathode) and the upper electrode (anode) 141, whereby the light emitting device (light emission). Diode).
  • the light emitting device of this embodiment since the p-type semiconductor layer 123 is formed so as to cover the n-type rod-shaped semiconductor 121, almost all side surfaces of the rod-shaped semiconductor 121 emit light. Therefore, the light emission amount per area of the substrate 111 can be increased as compared with a light emitting diode chip having a planar light emitting layer.
  • the light emission amount per unit area of the substrate 111 can be increased as the length L of the rod-shaped semiconductor 121 is increased.
  • the rod-shaped semiconductor 121 is made of an n-type semiconductor, and the resistance of the rod-shaped semiconductor 121 can be easily reduced by increasing the amount of impurities that give the rod-shaped semiconductor 121 n-type. Therefore, even if the length L of the rod-shaped semiconductor 121 is increased, light can be emitted uniformly from the root portion to the tip portion of the rod-shaped semiconductor 121. Therefore, it is possible to further increase the light emission amount per area of the substrate 111.
  • the value (L / D) obtained by dividing the length L by the thickness D is 10 or more, that is, the length L is 10 times or more the thickness D. It is preferable that This is because the light emission amount per unit area of the substrate 111 can be remarkably increased.
  • the rod-shaped semiconductor is made of an active layer as in the prior art, if the value (L / D) obtained by dividing the length L of the rod-shaped semiconductor by the thickness D is 10 or more, the tip of the rod-shaped semiconductor It becomes difficult to cause the part to emit light.
  • the light emitting area (the total area of the active layer 122 in this embodiment) is preferably set to be three times or more the area of the n-type semiconductor layer 113 as the semiconductor base.
  • the area of the n-type semiconductor layer 113 refers to the n-type rod-shaped semiconductor 121 and structures on the n-type rod-shaped semiconductor 121 (the active layer 122, the p-type semiconductor layer 123, the transparent electrode layer 124, the transparent member 131). Etc.) is taken as the area of the flat semiconductor layer 113. In such a case, the amount of light emission per unit area of the substrate 111 is large, and a cost reduction effect can be sufficiently obtained.
  • the active layer 122 is formed between the n-type rod-shaped semiconductor 121 and the p-type semiconductor layer 123, but this is not essential. However, it is preferable to provide the active layer 122, which can increase luminous efficiency. Further, since the active layer 122 is formed between the n-type rod-shaped semiconductor 121 and the p-type semiconductor layer 123 to a thickness of, for example, 10 nm, the luminous efficiency is good. This is because the active layer is provided to increase the recombination probability by confining bipolar carriers (holes and electrons) in a narrow range. As in the prior art, when all of the rod-shaped semiconductor portion is made of an active layer, the light emission efficiency is not high due to insufficient carrier confinement.
  • a transparent electrode layer 124 is formed on the p-type semiconductor layer 123, but this is not essential. However, it is preferable to provide the transparent electrode layer 124, and the presence of the transparent electrode layer 124 causes the voltage drop in the p-type semiconductor layer 123 while the transparent electrode layer 124 transmits light emitted from the active layer 122. Can be prevented. Therefore, light can be emitted uniformly over the entire rod-shaped semiconductor 121.
  • the transparent electrode layer 124 is formed on the p-type semiconductor layer 123, all the gaps between the plurality of n-type rod-shaped semiconductors 121 may not be filled with the transparent electrode layer 124.
  • the opposing gap in which the transparent electrode layer 124 is opposed to the gap between the plurality of n-type rod-shaped semiconductors 121 is formed as described above. It is preferable to fill with a transparent member 131 made of a material having higher transparency than the transparent electrode layer 124. This is because the transparent electrode layer 124 generally has carriers for flowing current, and thus the transparency is poor. Therefore, by filling the gaps between the plurality of n-type rod-shaped semiconductors 121 with the transparent member 131 made of a silicon oxide film or a transparent resin, the light emission efficiency of the light emitting element can be improved.
  • the active layer 122, the p-type semiconductor layer 123, and the transparent electrode layer 124 cover the entire surfaces of the n-type rod-shaped semiconductor 121 and the n-type semiconductor layer 113. It is not always necessary to cover the entire surface. That is, the active layer 122, the p-type semiconductor layer 123, and the transparent electrode layer 124 only need to cover at least the n-type rod-shaped semiconductor 121. This is because the active layer 122, the p-type semiconductor layer 123, and the transparent electrode layer 124 cover the n-type rod-shaped semiconductor 121, thereby increasing the light emission amount per area of the substrate 111.
  • FIG. 1 a method for manufacturing the light emitting device 100 according to the first embodiment will be described with reference to FIGS. 2, 3A, 3B, and 4 to 6.
  • FIG. 2 a method for manufacturing the light emitting device 100 according to the first embodiment will be described with reference to FIGS. 2, 3A, 3B, and 4 to 6.
  • FIG. 2 a method for manufacturing the light emitting device 100 according to the first embodiment will be described with reference to FIGS. 2, 3A, 3B, and 4 to 6.
  • a semiconductor layer 112 made of n-type GaN is formed as a first conductive type semiconductor layer on a substrate 111 made of silicon to a thickness of 25 ⁇ m by MOCVD.
  • the substrate 111 made of silicon and the semiconductor layer 112 made of n-type GaN are integrated to form the first substrate 110.
  • the semiconductor layer 112 made of n-type GaN forms part of the first substrate 110.
  • a single layer substrate made of n-type GaN may be prepared.
  • the first conductivity type semiconductor layer made of n-type GaN is the first substrate. It can be said that it does everything.
  • a photoresist is formed on the semiconductor layer 112 made of n-type GaN as the first conductivity type semiconductor layer by a photolithography process. 151 is patterned. At this time, for example, a silicon oxide film may be formed on the entire surface of the semiconductor layer 112 made of n-type GaN as the first conductivity type semiconductor layer, and the silicon oxide film may be patterned by a photolithography process and an etching process. Good.
  • the semiconductor layer 112 made of n-type GaN as the first conductivity type semiconductor layer is anisotropically dry-etched to perform n-type etching.
  • a rod-like (projection-like) semiconductor 121 made of GaN is formed (semiconductor core forming step).
  • etching is performed so that the semiconductor layer 112 made of n-type GaN remains with a thickness of about 5 ⁇ m, and the remaining portion becomes the semiconductor layer 113 made of n-type GaN.
  • the length L of the first conductivity type rod-shaped semiconductor 121 made of n-type GaN is 20 ⁇ m.
  • a plurality of the rod-shaped semiconductors 121 are formed on the n-type GaN semiconductor layer 113 in a standing state with a space therebetween.
  • the substrate 111 on which the rod-shaped semiconductor 121 is formed is annealed in a nitrogen atmosphere.
  • Crystal defect recovery step Thereby, the rod-shaped semiconductor 121 is annealed.
  • the annealing temperature can be 600 ° C. to 1200 ° C.
  • a more preferable annealing temperature when the rod-shaped semiconductor 121 is made of n-type GaN is 700 ° C. to 900 ° C. at which crystal defect recovery of GaN is remarkable and GaN does not decompose.
  • the substrate 111 on which the rod-shaped semiconductor 121 is formed is wet-etched, and a layer containing crystal defects generated in the rod-shaped semiconductor 121 at a high density Are selectively removed (crystal defect removal step).
  • crystal defect removal step For example, when the rod-shaped semiconductor 121 is n-type GaN, hot phosphoric acid heated to 120 ° C. to 150 ° C. may be used as the etchant.
  • the crystal defect density of the rod-shaped semiconductor 121 can be reduced and the crystallinity can be improved. Accordingly, in the subsequent semiconductor shell formation step, the crystallinity of the active layer (light emitting layer) 122 and the second conductivity type semiconductor layer 123 is also improved, so that the light emission efficiency of the light emitting element can be improved.
  • the crystal defect removal step (wet etching step) and the crystal defect recovery step (annealing step) are both performed in the order of the wet etching step and the annealing step (that is, after performing the wet etching step, By performing the annealing step), the crystallinity of the rod-shaped semiconductor 121 can be more effectively improved.
  • the entire surface of the semiconductor layer 113 made of n-type GaN as the first conductivity type semiconductor base and the rod-shaped semiconductor 121 made of n-type GaN as the first conductivity type rod-shaped semiconductor is formed.
  • an active layer 122 made of InGaN having a thickness of 10 nm is formed.
  • a second conductivity type semiconductor layer 123 made of p-type GaN having a thickness of 150 nm is formed on the active layer 122 made of InGaN (semiconductor shell formation step).
  • a transparent electrode layer 124 made of 150 nm ITO is formed on the second conductivity type semiconductor layer 123 made of p-type GaN.
  • the active layer 122 made of InGaN and the second conductivity type semiconductor layer 123 made of p-type GaN are formed by MOCVD.
  • the transparent electrode layer 124 made of ITO is formed by sputtering, mist CVD, or plating.
  • a gap between the conductive rod-shaped semiconductors 121 is filled with a transparent member 131 made of a silicon oxide film.
  • the silicon oxide film can be formed by applying SOG (Spin-On Glass). After applying the SOG, the upper portion of the transparent electrode layer 124 is exposed by wet etching, and the upper electrode 141 made of ITO is formed by sputtering to complete the light emitting device 100.
  • the method for manufacturing the light emitting device 100 includes a step of patterning a mask layer made of a photoresist 151 on the surface of the n-type GaN semiconductor layer 112 constituting a part or all of the first substrate 110, and the mask layer as a mask.
  • the p-type semiconductor layer 123 is formed so as to cover the rod-shaped semiconductor 121 made of n-type GaN, almost all side surfaces of the rod-shaped semiconductor 121 emit light. Therefore, the light emission amount per area of the substrate 111 can be increased as compared with a light emitting diode chip having a planar light emitting layer. Further, according to this manufacturing method, the rod-shaped semiconductor 121 is made of an n-type semiconductor, and the resistance can be easily reduced by increasing the amount of impurities giving the n-type. Therefore, even if the length L of the rod-shaped semiconductor 121 is increased, light can be emitted uniformly from the root portion to the tip portion of the rod-shaped semiconductor 121.
  • the rod-shaped semiconductor 121 is formed by anisotropic etching with the photolithography process, the rod-shaped semiconductor 121 having a good shape as intended can be obtained and the yield can be improved. be able to.
  • the length L of the n-type rod-shaped semiconductor 121 is 10 times or more the thickness D. This is because the light emission amount per area of the substrate 111 can be remarkably increased.
  • the rod-shaped semiconductor is made of an active layer as in the prior art, if the value (L / D) obtained by dividing the length L of the rod-shaped semiconductor by the thickness D is 10 or more, It becomes difficult to cause the tip portion to emit light. Therefore, when the value (L / D) obtained by dividing the length L of the rod-shaped semiconductor 121 by the thickness D is 10 or more, the advantage of the low resistance and high emission intensity of this embodiment is particularly remarkable.
  • the light emitting area (the total area of the active layer 122 in this embodiment) is preferably three times or more than the area of the n-type semiconductor layer 113 as the semiconductor base.
  • the area of the n-type semiconductor layer (semiconductor base) 113 refers to the n-type GaN rod-shaped semiconductor 121 and structures thereon (active layer 122, p-type GaN semiconductor layer 123, transparent electrode layer 124, etc.).
  • the area of the flat semiconductor layer 113 in a state where is removed. In such a case, the amount of emitted light per substrate 111 is large, and a sufficient cost reduction effect can be obtained.
  • the active layer 122 made of InGaN is formed so as to cover the surface of the rod-shaped semiconductor 121 made of n-type GaN between the semiconductor core forming step and the semiconductor shell forming step. Thereby, luminous efficiency can be raised. Note that the active layer 122 may not be formed.
  • the transparent electrode layer 124 is formed so as to cover the p-type GaN semiconductor layer 123 after the semiconductor shell formation step.
  • the transparent electrode layer 124 can prevent the voltage drop in the p-type GaN semiconductor layer 123 while transmitting the light emitted from the active layer 122. Therefore, light can be emitted uniformly over the entire rod-shaped semiconductor 121.
  • the transparent electrode layer 124 is formed on the p-type GaN semiconductor layer 123. However, not all the gaps between the plurality of n-type rod-shaped semiconductors 121 are filled with the transparent electrode layer 124.
  • the transparent electrode layer 124 is thinly formed on the type GaN semiconductor layer 123, and the remaining gap (opposing gap where the transparent electrode layers 124 face each other) is filled with the transparent member 131. This is because the transparent electrode generally has poor transparency because of the presence of carriers for flowing current. Therefore, the luminous efficiency of the light emitting element can be improved by filling the gap formed by the first conductivity type rod-shaped semiconductor 121 with a silicon oxide film, a transparent resin, or the like.
  • FIG. 7A is a cross-sectional view of the light emitting device of the second embodiment
  • FIG. 7B is a plan view of the light emitting device of the second embodiment as viewed from above, and is a diagram exclusively showing the position of the plate-like semiconductor.
  • FIG. 7C is a plan view for explaining the method for manufacturing the light emitting element of the second embodiment.
  • a plate-shaped semiconductor 1121 is used instead of the plurality of first conductivity type (n-type) rod-shaped (projecting) semiconductors 121 in the light emitting device 100 of the first embodiment.
  • the point provided is different from the first embodiment. Therefore, in the second embodiment, the details of the parts common to the first embodiment are not described.
  • 1100 is a light emitting element
  • 1111 is a substrate
  • 1113 is an n-type semiconductor layer
  • 1121 is a plate (projection) semiconductor
  • 1122 is an active layer
  • 1123 is a p-type semiconductor layer
  • 1124 is transparent.
  • the substrate 1111, the n-type semiconductor layer 1113, the plate-like semiconductor 1121, the active layer 1122, the p-type semiconductor layer 1123, the transparent electrode layer 1124, the transparent member 1131, and the upper electrode 1141 are each in the first embodiment described above.
  • the substrate 111, the n-type semiconductor layer 113, the rod-shaped semiconductor 121, the active layer 122, the p-type semiconductor layer 123, the transparent electrode layer 124, the transparent member 131, and the upper electrode 141 described in the embodiment are manufactured using the same materials.
  • each part is, for example, that the thickness of the n-type semiconductor layer 1113 as the semiconductor base is 5 ⁇ m, the thickness D1 of the n-type semiconductor semiconductor 1121 is 1 ⁇ m, the width D2 is 5 ⁇ m, and the height L Is 20 ⁇ m, the distance P1 between the n-type plate semiconductors 1121, the distance P2 (see FIG. 7B) is 3 ⁇ m, the thickness of the active layer 1122 is 10 nm, the thickness of the p-type semiconductor layer 1123 is 150 nm, and the transparent electrode layer 1124
  • an n-type semiconductor layer 1113 forms a lower electrode (cathode), and a current is passed between the lower electrode (cathode) and the upper electrode (anode) 1141, whereby the light emitting device (light emitting device). Diode).
  • the p-type semiconductor layer 1123 is formed so as to cover the n-type plate-like semiconductor 1121, almost all side surfaces of the plate-like semiconductor 1121 emit light. Therefore, the light emission amount per area of the substrate 1111 can be increased as compared with a light emitting diode chip having a planar light emitting layer.
  • the light emission amount per unit area of the substrate 1111 can be increased as the height L of the plate-like semiconductor 1121 is increased.
  • the plate-like semiconductor 1121 is made of an n-type semiconductor, and the resistance of the plate-like semiconductor 1121 can be easily reduced by increasing the amount of impurities that give the plate-like semiconductor 1121 n-type. Therefore, even if the height L of the plate-like semiconductor 1121 is increased, light can be emitted uniformly from the root portion to the tip portion of the plate-like semiconductor 1121. Therefore, it is possible to further increase the light emission amount per area of the substrate 1111.
  • the plate-like semiconductor 1121 is used, but the advantage of being plate-like is explained as follows.
  • the light emission efficiency of a light emitting element depends on the plane orientation of the light emitting layer.
  • a nonpolar plane a-plane or m-plane
  • the main surface the surface having the width of D2 in FIG. 7B
  • the overall light emission efficiency can be increased.
  • the active layer 1122 is formed between the n-type plate-like semiconductor 1121 and the p-type semiconductor layer 1123, but this is not essential. However, it is preferable to provide the active layer 1122, which can increase the light emission efficiency. Further, since the active layer 1122 is formed between the n-type plate semiconductor 1121 and the p-type semiconductor layer 1123 to a thickness of, for example, 10 nm, the light emission efficiency is good. This is because the active layer is provided to increase the recombination probability by confining bipolar carriers (holes and electrons) in a narrow range.
  • a transparent electrode layer 1124 is formed on the p-type semiconductor layer 1123, but this is not essential. However, it is preferable to provide the transparent electrode layer 1124, and the presence of the transparent electrode layer 1124 causes the transparent electrode layer 1124 to transmit light emitted from the active layer 1122 while causing a voltage drop in the p-type semiconductor layer 1123. Can be prevented. Therefore, light can be emitted uniformly over the entire plate-like semiconductor 1121.
  • the transparent electrode layer 1124 is formed on the p-type semiconductor layer 1123, all the gaps between the plurality of n-type plate-like semiconductors 1121 are not filled with the transparent electrode layer 1124. Is preferred. That is, after forming the thin transparent electrode layer 1124 on the p-type semiconductor layer 1123, a gap between the transparent electrode layers 1124 facing each other is formed in a gap remaining between the plurality of n-type plate-like semiconductors 1121. It is preferable to fill with a transparent member 1131 made of a material having higher transparency than the transparent electrode layer 1124. The reason for this is that the transparent electrode layer 1124 generally has poor transparency due to the presence of carriers for flowing current. Therefore, the light emitting efficiency of the light emitting element can be improved by filling the gaps between the plurality of n-type plate-like semiconductors 1121 with the transparent member 1131 made of a silicon oxide film or a transparent resin.
  • the active layer 1122, the p-type semiconductor layer 1123, and the transparent electrode layer 1124 cover the entire surfaces of the n-type plate semiconductor 1121 and the n-type semiconductor layer 1113. It is not always necessary to cover the entire surface. That is, the active layer 1122, the p-type semiconductor layer 1123, and the transparent electrode layer 1124 only need to cover at least the n-type plate-like semiconductor 1121. This is because the active layer 1122, the p-type semiconductor layer 1123, and the transparent electrode layer 1124 cover the n-type plate semiconductor 1121, so that the light emission amount per area of the substrate 1111 can be increased.
  • the manufacturing method of the light emitting device 1100 according to the second embodiment is almost the same as the manufacturing method of the light emitting device 100 described with reference to FIGS. 2 to 6 in the first embodiment.
  • the only difference between the method of manufacturing the light emitting device 1100 of the second embodiment and the method of manufacturing the light emitting device 100 is that, instead of the process described in FIG. 3A in the first embodiment, as shown in FIG.
  • the photoresist 1151 is patterned on the semiconductor layer 1112 made of n-type GaN by a photolithography process, the pattern of the photoresist 1151 is only made rectangular.
  • the p-type semiconductor layer 1123 is formed so as to cover the plate-like semiconductor 1121 made of n-type GaN by the manufacturing method in the second embodiment, almost all side surfaces of the plate-like semiconductor 1121 emit light. Therefore, the light emission amount per area of the substrate 1111 can be increased as compared with a light emitting diode chip having a planar light emitting layer. Further, according to this manufacturing method, the plate-like semiconductor 1121 is made of an n-type semiconductor, and the resistance can be easily reduced by increasing the amount of impurities that give the n-type. Therefore, even if the height L of the plate-like semiconductor 1121 is increased, light can be emitted uniformly from the root portion to the tip portion of the plate-like semiconductor 1121.
  • the plate-like semiconductor 1121 is formed by anisotropic etching with the photolithography process, the plate-like semiconductor 1121 having a good shape as intended can be obtained and the yield can be increased. Can be improved.
  • the active layer 122 made of InGaN is formed so as to cover the surface of the plate-like semiconductor 1121 made of n-type GaN between the semiconductor core forming step and the semiconductor shell forming step. Thereby, luminous efficiency can be raised. Note that the active layer 1122 may not be formed.
  • the transparent electrode layer 1124 is formed so as to cover the p-type GaN semiconductor layer 1123 after the semiconductor shell formation step.
  • the transparent electrode layer 1124 can prevent a voltage drop in the p-type GaN semiconductor layer 1123 while transmitting light emitted from the active layer 1122. Therefore, light can be emitted uniformly over the entire plate-like semiconductor 1121.
  • the transparent electrode layer 1124 is formed on the p-type GaN semiconductor layer 1123.
  • the transparent electrode layer 1124 is thinly formed on the p-type GaN semiconductor layer 1123, and the remaining gap (opposing gap where the transparent electrode layers 1124 face each other) is filled with the transparent member 1131.
  • the transparent electrode generally has poor transparency because of the presence of carriers for flowing current. Therefore, the light emitting efficiency of the light emitting element can be improved by filling the gap formed by the first conductive type plate-like semiconductor 1121 with a silicon oxide film or a transparent resin.
  • the rod-shaped semiconductor 121 and the plate-shaped semiconductor 1121 are used, but the shape of these semiconductors is not limited to this. It is essential that a first conductive type protruding semiconductor is formed on a first conductive type semiconductor layer serving as a semiconductor base, and that the first conductive type protruding semiconductor is covered with the second conductive type. Important. Therefore, the protruding semiconductor of the first conductivity type is not limited to the rod shape or the plate shape, but may be a bent plate shape or an annular shape (tubular shape) in which the plate semiconductor is closed.
  • the plate-shaped semiconductors arranged in two directions may be connected to each other at the intersection to form one lattice-shaped protruding semiconductor. It may be a shape, a polygonal column shape, a cone shape, a polygonal pyramid shape, a hemispherical shape, a spherical shape, or the like.
  • FIGS. 8 to 17 are views showing steps of forming a light emitting element and a light emitting device in the third embodiment.
  • the first half of the process is the same as the manufacturing process described with reference to FIGS. 2 to 5 in the first embodiment. Therefore, here, the manufacturing process from FIG. 2 to FIG. 5 described above will be described following the process from FIG. 2 to FIG.
  • the first half of the manufacturing method according to the third embodiment is the same as the process described with reference to FIG. 3A in the steps of FIGS. 2 to 5 of the first embodiment, and FIG. 7C in the second embodiment.
  • the first conductive type protruding semiconductor may be a plate semiconductor.
  • the active layer 122 made of InGaN, the second conductive type semiconductor layer 123 made of p-type GaN, and the transparent electrode made of ITO are sequentially formed on the surface of the n-type GaN rod-shaped semiconductor 121.
  • Layer 124 is deposited. Thereafter, anisotropic dry etching is performed. By this anisotropic dry etching, as shown in FIG. 8, the transparent electrode layer 124 made of ITO, the second conductive type semiconductor layer 123 made of p-type GaN, the active layer 122 made of InGaN, and the first layer made of GaN.
  • each of the one-conductivity-type rod-shaped semiconductor 121 and the first-conductivity-type semiconductor layer 113 made of n-type GaN is removed to expose part of the substrate 111 made of silicon.
  • the InGaN active layer 122, the p-type GaN semiconductor layer 123, and the ITO transparent electrode layer 124 are left on the side wall of the remaining portion of the rod-shaped semiconductor 121 made of n-type GaN.
  • the semiconductor layer 113 made of n-type GaN becomes a plurality of n-type GaN semiconductor layers 125 spaced from each other on the silicon substrate 111.
  • one n-type GaN rod-shaped semiconductor 121 is erected on each n-type GaN semiconductor layer 125, and this n-type GaN semiconductor layer 125, n-type GaN rod-shaped semiconductor 121, InGaN active layer 122, p-type GaN.
  • a plurality of portions Z each including the semiconductor layer 123 and the ITO transparent electrode layer 124 are erected on the silicon substrate 111 at intervals.
  • the n-type GaN semiconductor layer 112 forming a part of the first substrate 110 has an upper structure (n-type GaN rod-shaped semiconductor 121, n-type GaN semiconductor layer 125). Used for formation. Therefore, the silicon substrate 111 is synonymous with the first substrate 110.
  • each of the separated portions Z becomes a light emitting element 200.
  • the n-type GaN semiconductor layer 125 is exposed on the side of the light emitting element 200 that is in contact with the silicon substrate 111, and the side that is separated from the silicon substrate 111 is in electrical contact with the p-type GaN semiconductor layer 123.
  • the transparent electrode layer 124 made of ITO is exposed.
  • the n-type GaN semiconductor layer 125 becomes the cathode electrode K, and the transparent electrode layer 124 becomes the anode electrode A.
  • the rod-shaped portion Z is cut from the silicon substrate 111 by irradiating ultrasonic waves in the solution to vibrate the rod-shaped portion Z.
  • the light-emitting element separated in this way is also plate-like.
  • the following steps are the same for the plate-like light emitting element, the following description will be made assuming that the light emitting element is rod-shaped exclusively.
  • the mask layer is patterned with the photoresist 151 on the surface of the n-type semiconductor layer 112 forming a part of the first substrate 110 described with reference to FIGS.
  • the manufacturing method of the third embodiment is a light emitting device that separates the n-type rod-shaped semiconductor 121 covered with the p-type semiconductor layer 123 from the first substrate 110, as described in FIGS. A separation process is provided. According to these steps, the rod-like light emitting element 200 formed by processing the n-type GaN semiconductor layer 112 finally becomes an independent light emitting element.
  • each light emitting element 200 can be used individually and freely.
  • a desired number of separated light emitting elements 200 can be arranged at a desired density.
  • a surface light-emitting device can be configured by rearranging a large number of fine light-emitting elements 200 on a large-area substrate.
  • the heat generation density can be lowered to achieve high reliability and long life.
  • the p-type semiconductor layer 123 is formed so as to cover the n-type rod-shaped semiconductor 121 by this manufacturing method, almost all side surfaces of the rod-shaped semiconductor 121 emit light.
  • the rod-shaped semiconductor 121 is made of an n-type semiconductor, and the resistance can be easily reduced by increasing the amount of impurities giving the n-type.
  • the rod-shaped semiconductor 121 is formed by anisotropic etching with the photolithography process, a desired-shaped rod-shaped semiconductor 121 is obtained as intended, and thus desired good A light-emitting element 200 having a simple shape can be obtained. Therefore, the yield of the light emitting element 200 can be improved.
  • the active layer 122 is formed so as to cover the surface of the n-type rod-shaped semiconductor 121 between the semiconductor core forming step and the semiconductor shell forming step, the luminous efficiency can be increased. Note that the active layer 122 may not be formed.
  • the transparent electrode layer 124 is formed so as to cover the p-type semiconductor layer 123 after the semiconductor shell forming step, the p-type semiconductor is transmitted while transmitting the light emitted from the active layer 122. It is possible to prevent a voltage drop from occurring in the layer 123. Therefore, light can be emitted uniformly over the entire rod-shaped semiconductor 121.
  • a second substrate 210 having a surface on which a first electrode 211 and a second electrode 212 are formed is prepared.
  • the second substrate 210 is an insulating substrate, and the first and second electrodes 211 and 212 are metal electrodes.
  • a metal electrode having a desired electrode shape can be formed on the surface of the second substrate 210 as the first and second electrodes 211 and 212 using a printing technique.
  • a metal film and a photoreceptor film are uniformly deposited on the surface of the second substrate 210, the photoreceptor film is exposed and developed to a desired electrode pattern, and the metal film is formed using the patterned photoreceptor film as a mask.
  • the first and second electrodes 211 and 212 can be formed by etching.
  • the second substrate 210 is an insulating material such as glass, ceramic, alumina, or resin, or a silicon oxide film formed on a semiconductor surface such as silicon, and the surface is insulative.
  • a base insulating film such as a silicon oxide film or a silicon nitride film is preferably formed on the surface.
  • the surfaces of the first and second electrodes 211 and 212 may be covered with an insulating film (not shown).
  • an insulating film (not shown). In this case, the following effects are produced.
  • a voltage is applied between the first electrode 211 and the second electrode 212 in a state where the liquid is introduced onto the second substrate 210. Current can be prevented from flowing. Such a current can cause a voltage drop in the electrode and cause alignment failure, or can cause the electrode to dissolve due to electrochemical effects.
  • a silicon oxide film or a silicon nitride film can be used as the insulating film covering the first and second electrodes 211 and 212.
  • the first and second electrodes 211 and 212 and the light emitting element 200 can be easily electrically connected, so that the first and second electrodes 211 and 212 are used as wirings. Easy to use.
  • the place where the light emitting element 200 is arranged is defined by the place S where the facing portion 211A of the first electrode 211 and the facing portion 212A of the second electrode 212 face each other. That is, in the light emitting element disposition process described later, the light emitting element 200 is disposed at a location S where the first and second electrodes 211 and 212 face each other so as to bridge the first and second electrodes 211 and 212. . For this reason, the distance between the first electrode 211 and the second electrode 212 in the place S where the facing portions 211A and 212A of the first and second electrodes 211 and 212 face each other is slightly shorter than the length of the light emitting element 200. Is desirable.
  • the distance between the facing portion 211A of the first electrode 211 and the facing portion 212A of the second electrode 212 is It is desirable that the thickness is 12 ⁇ m to 18 ⁇ m. That is, the distance is preferably about 60 to 90% of the length of the light emitting element 200, more preferably about 80 to 90% of the length of the light emitting element 200.
  • FIG. 11 shows a cross section of the second substrate 210 taken along line VV of FIG.
  • the fluid 221 may be a liquid such as IPA (isopropyl alcohol), ethanol, methanol, ethylene glycol, propylene glycol, acetone, water, or a mixture thereof, but is not limited thereto.
  • IPA isopropyl alcohol
  • ethanol methanol
  • ethylene glycol propylene glycol
  • acetone water
  • water or a mixture thereof
  • the viscosity is low so as not to disturb the arrangement of the light-emitting elements
  • the ion concentration is not extremely high
  • the substrate is volatile so that the substrate can be dried after the arrangement of the light-emitting elements. It is.
  • a liquid having a remarkably high ion concentration is used, when a voltage is applied to the first and second electrodes 211 and 212, an electric double layer is quickly formed on the electrodes and the electric field penetrates into the liquid. Therefore, the arrangement of the light emitting elements is hindered.
  • a cover on the second substrate 210 so as to face the second substrate 210.
  • the cover is installed in parallel with the second substrate 210, and a uniform gap (for example, 500 ⁇ m) is provided between the second substrate 210 and the cover.
  • a fluid 221 including the light emitting element 200 is filled in the gap.
  • FIG. 14 is a sectional view taken along line VV in FIG.
  • the principle that the light emitting element 200 is arranged at a predetermined position on the second substrate 210 will be described as follows.
  • An alternating voltage as shown in FIG. 12 is applied between the first electrode 211 and the second electrode 212.
  • the reference potential V R shown in Figure 12 to the second electrode 212 is applied, the first electrode 211 applies an AC voltage of amplitude VPPL / 2.
  • an electric field is generated in the fluid 221.
  • polarization occurs in the light emitting element 220 or charges are induced, and charges are induced on the surface of the light emitting element 220.
  • the direction (polarity) of the light emitting element 200 is random as shown in FIG.
  • the direction (polarity) of the light emitting element 200 is the direction in which the anode A of the light emitting element 200 is on the right side of the cathode K and the anode A of the light emitting element 200 is on the left side of the cathode K in FIG. Say which direction it is.
  • an appropriate operation method of the light emitting device in which the directions of the plurality of light emitting elements 200 are randomly arranged will be described later.
  • the frequency of the AC voltage applied to the first electrode 211 is preferably 10 Hz to 1 MHz, and more preferably 50 Hz to 1 kHz because the arrangement is most stable.
  • the AC voltage applied between the first electrode 211 and the second electrode 212 is not limited to a sine wave, but may be any one that periodically varies, such as a rectangular wave, a triangular wave, and a sawtooth wave.
  • the VPPL which is twice the amplitude of the AC voltage applied to the first electrode 211, can be set to 0.1 to 10 V. However, when the voltage is 0.1 V or less, the arrangement of the light emitting elements 200 is deteriorated. Immediately fixed on the substrate 110, the yield of the arrangement deteriorates. Therefore, the above VPPL is preferably 1 to 5V, more preferably about 1V.
  • the AC voltage is applied between the first electrode 211 and the second electrode 212.
  • the liquid of the fluid 221 is evaporated and dried, and the light emitting element 200 is fixed onto the second substrate 210.
  • a sufficient high voltage (10 to 100 V) is applied to the first electrode 211 and the second electrode 212 so that the light-emitting element 200 is formed.
  • the second substrate 210 is dried after being fixed on the second substrate 210 and the application of the high voltage is stopped.
  • an interlayer insulating film 213 made of a silicon oxide film is deposited on the entire surface of the second substrate.
  • a contact hole 217 is formed in the interlayer insulating film 213 by applying a general photolithography process and a dry etching process, and further a metal is deposited by a metal deposition process, a photolithography process, and an etching process. Are patterned to form metal wirings 214 and 215 (light emitting element wiring step). Thereby, the anode A and the cathode K of the light emitting element 200 can be wired respectively. Thus, the light emitting device 250 is completed.
  • the photoresist 151 is formed on the surface of the n-type semiconductor layer 112 constituting part or all of the first substrate 110 described with reference to FIGS.
  • a step of patterning the mask layer a step of forming a semiconductor core in which the n-type semiconductor layer 112 is anisotropically etched using the mask layer as a mask to form a plurality of n-type rod-shaped semiconductors 121;
  • the light emitting element that separates the n-type rod-shaped semiconductor 121 covered with the p-type semiconductor layer 123 from the first substrate 110 described with reference to FIGS.
  • a separation process is provided.
  • a light emitting element arrangement step of arranging an n-type rod-shaped semiconductor 121 covered with a p-type semiconductor layer 123 separated from the silicon substrate 111 of the first substrate 110 on the second substrate 210;
  • a desired number of the separated light emitting elements 200 can be arranged on the second substrate 210 with a desired density. Therefore, for example, a surface light emitting device can be configured by rearranging a number of fine light emitting elements 200 on the second substrate 210 having a large area. In addition, the heat generation density can be lowered to achieve high reliability and long life.
  • the direction of the light emitting element 200 (that is, the anode A is located on the right side or the left side of the cathode K in FIG. 13).
  • a DC voltage may be applied between the two metal wirings 214 and 215.
  • a reverse voltage is applied to about half of the light emitting elements 200 and no light is emitted. Therefore, it is preferable to apply an AC voltage between the two metal wirings 214 and 215. In this way, all the light emitting elements 200 can emit light.
  • FIG. 18 is a side view of an LED bulb 300 that is the illumination device of the fourth embodiment.
  • This LED bulb 300 has a base 301 as a power supply connection part that is fitted in an external socket and connected to a commercial power supply, and a conical heat dissipation part that has one end connected to the base 301 and the other end gradually expanding in diameter. 302 and a translucent part 303 that covers the other end of the heat dissipating part 302.
  • a light emitting unit 304 is disposed in the heat radiating unit 302.
  • the light emitting unit 304 is mounted with a light emitting device 306 in which a large number of light emitting elements are arranged on a square heat sink 305.
  • the light emitting device 306 includes a substrate 310, a first electrode 311 and a second electrode 312 formed on the substrate 310, and a large number of light emitting elements 320.
  • the method described in the third embodiment described above may be used as a method for arranging a fine light emitting element (light emitting diode) 320 on the substrate 310 and a method for wiring. That is, the light emitting device 306 is manufactured by the method described in the third embodiment.
  • the size of one light emitting element 320 is 20 ⁇ m in length and 1 ⁇ m in diameter as exemplified in the second embodiment, and the luminous flux emitted from one light emitting element 320 is 5 millimeters.
  • Thousand light-emitting elements 320 can be arranged on the substrate 310 to form a light-emitting substrate that emits a total of 250 lumens.
  • the light emitting device 306 in which a large number of light emitting elements 320 are arranged on the substrate 310 the following effects can be obtained as compared with the case of using a light emitting device in which one or several light emitting elements are arranged.
  • the heat generation density associated with light emission is small and uniform.
  • a normal light emitting element light emitting diode
  • the heat generation density associated with light emission is large, and the light emitting layer becomes hot, affecting the light emission efficiency and reliability. Is given.
  • the third embodiment by arranging a large number of fine light emitting elements 320 on the substrate 310 of the light emitting device 306, the light emission efficiency can be improved and the reliability can be improved.
  • FIG. 22 is a plan view showing a backlight as a fifth embodiment of the present invention.
  • the fifth embodiment includes a light emitting device manufactured by the method for manufacturing a light emitting device of the present invention as described in the above third embodiment.
  • a plurality of light emitting devices 402 are mounted in a grid pattern at predetermined intervals on a rectangular support substrate 401 as an example of a heat sink.
  • the light emitting device 402 is a light emitting device manufactured using the method for manufacturing a light emitting device of the second embodiment described above.
  • 100 or more light emitting elements are arranged on a substrate (not shown).
  • the backlight having the above-described configuration, by using the light emitting device 402, it is possible to realize a backlight that has little variation in brightness and can achieve a long lifetime and high efficiency. Further, by attaching the light emitting device 402 on the support substrate 401, the heat dissipation effect is further improved.
  • the sixth embodiment relates to a display device manufactured using a method similar to the method for manufacturing a light emitting device of the present invention.
  • FIG. 23 shows a circuit of one pixel of the LED display as the sixth embodiment.
  • This LED display is manufactured using the manufacturing method of the light emitting element or the light emitting device of the present invention.
  • the light emitting element included in the LED display the light emitting element 200 described in the third embodiment can be used.
  • This LED display is an active matrix address system, a selection voltage pulse is supplied to the row address line X1, and a data signal is sent to the column address line Y1.
  • the selection voltage pulse is input to the gate of the transistor T1 and the transistor T1 is turned on, the data signal is transmitted from the source to the drain of the transistor T1, and the data signal is stored as a voltage in the capacitor C.
  • the transistor T2 is for driving the pixel LED 520, and the light emitting element 200 described in the third embodiment can be used for the pixel LED 20.
  • the pixel LED 520 is connected to the power source Vs through the transistor T2. Therefore, when the transistor T2 is turned on by the data signal from the transistor T1, the pixel LED 520 is driven by the power source Vs.
  • one pixel shown in FIG. 23 is arranged in a matrix.
  • a pixel LED 520 and transistors T1 and T2 of each pixel arranged in a matrix are formed on the substrate.
  • the following steps may be performed.
  • the light emitting device 200 is formed by the semiconductor core forming step, the semiconductor shell forming step, and the light emitting device separating step described with reference to FIGS. 2 to 5, 8, and 9 in the manufacturing method of the third embodiment.
  • the transistors T1 and T2 are formed on a substrate such as glass using a normal TFT forming method.
  • a first electrode and a second electrode for arranging minute light-emitting elements to be the pixel LEDs 520 are formed on the substrate on which the TFT is formed.
  • a minute light emitting element 200 is disposed at a predetermined position on the substrate (light emitting element disposing step). Thereafter, an upper wiring process is performed to connect the minute light emitting element 200 to the drain of the transistor T2 and the ground line (light emitting element wiring process).
  • the manufacturing process is performed on the surface of the n-type semiconductor layer 112 constituting a part or the whole of the first substrate 110 as described with reference to FIGS. 2 to 5 in the third embodiment.
  • the n-type rod-shaped semiconductor 121 covered with the p-type semiconductor layer 123 described in the third embodiment with reference to FIGS. 8 and 9 is separated from the first substrate 110.
  • the n-type rod-shaped semiconductor 121 covered with the p-type semiconductor layer 123 separated from the silicon substrate 111 of the first substrate 110 is placed at the pixel position on the second substrate.
  • the p-type semiconductor layer 123 is formed so as to cover the surface of the n-type rod-shaped semiconductor 121, the light emission area per unit area of the first substrate 110 is very large. , And 10 times that in the case of planar epitaxial growth. In order to obtain the same light emission amount, the number of substrates can be reduced to, for example, 1/10, and the manufacturing cost can be greatly reduced. That is, the manufacturing cost of the n-type rod-shaped semiconductor 121 covered with the p-type semiconductor layer 123 functioning as a light-emitting element can be greatly reduced.
  • the n-type rod-shaped semiconductor 121 covered with the p-type semiconductor layer 123 is separated from the silicon substrate 111 of the first substrate 110, and is disposed on the second substrate that becomes the panel of the display device of this embodiment. Further, the display device is manufactured by wiring. Since the number of pixels of the display device of this embodiment is about 6 million, for example, when a light emitting element is used for each pixel, the cost of the light emitting element is extremely important. Therefore, manufacturing the display device through the above steps can reduce the manufacturing cost of the display device.
  • the orientation of the anode and cathode of the pixel LED 520 is random. Is AC driven.
  • the semiconductor layer 113 as the first conductivity type semiconductor base and the first conductivity type rod-shaped semiconductor 121 are n-type and the second conductivity type semiconductor layer 123 is p-type.
  • the semiconductor layer 113 as the first conductivity type semiconductor base and the first conductivity type rod-shaped semiconductor 121 may be p-type
  • the second conductivity type semiconductor layer 123 may be n-type.
  • FIG. 24A is a perspective view of a light emitting diode 2005 as a seventh embodiment of the diode of the present invention
  • FIG. 24B is a cross-sectional view of the light emitting diode 2005.
  • the light-emitting diode 2005 includes a cylindrical rod-shaped core 2001 as a core portion, a cylindrical first shell 2002 as a first conductive type semiconductor layer covering the cylindrical rod-shaped core 2001, and the above-described structure.
  • a cylindrical second shell 2003 is provided as a semiconductor layer of the second conductivity type that covers the cylindrical first shell 2002. End faces of both end portions 2001A and 2001B of the rod-shaped core 2001 are exposed from the first and second shells 2002 and 2003.
  • the first shell 2002 has a flange-shaped one end portion 2002A, and the one end portion 2002A is exposed from the second shell 2003.
  • the rod-shaped core 2001 is made of SiC
  • the first shell 2002 is made of n-type GaN
  • the second shell 2003 is made of p-type GaN.
  • the rod-shaped core 2001 made of SiC has a refractive index of 3 to 3.5
  • the first shell 2002 made of n-type GaN has a refractive index of 2.5.
  • the rod-shaped core 2001 made of SiC has a thermal conductivity of 450 (W / (m ⁇ K))
  • the first shell 2002 made of n-type GaN has a thermal conductivity of 210 (W / (m ⁇ K)).
  • the light emitting diode 2005 of the seventh embodiment is suitable for a directional light emitting device.
  • the thermal conductivity (210 of the first shell 2002 in which the thermal conductivity (450 (W / (m ⁇ K))) of the rod-shaped core 2001 is made of the n-type GaN is used. (W / (m ⁇ K)))
  • the heat generated at the pn junction surfaces of the first and second shells 2002 and 2003 causes the first shell 2002 to move as shown by the arrow X1 in FIG.
  • the heat is easily diffused through the rod-shaped core 2001 to the entire diode. For this reason, it becomes easy to radiate the heat generated by the light emission of the rod-shaped light emitting diode 2005.
  • heat is diffused through the rod-shaped core 2001, the temperature on the entire surface of the rod-shaped light emitting diode 2005 can be made uniform, and a decrease in luminous efficiency due to high temperature concentration can be prevented.
  • the bar-shaped core 2001 extends. Strong light emission can be obtained from both end portions 2001A and 2001B in the extending direction (long axis direction).
  • the both ends 2001A and 2001B in the direction in which the rod-shaped core 2001 extends from the both ends 2001A and 2001B to the GaN substrate 2007. Intense light emission can be obtained in the extending direction (long axis direction). In the light emitting diode 2005 of FIG.
  • a part of the circumferential direction of one end of the second shell 2003 is removed, and a part of the circumferential direction of one end of the first shell 2002 is exposed.
  • a contact electrode 2009 is formed on the exposed portion of the first shell 2002, and a contact electrode 2008 is formed on the second shell 2002.
  • a SiC rod-shaped core 2011, an n-type GaN first shell 2012 covering the SiC rod-shaped core 2011, and the n-type GaN A plurality of light emitting diodes 2015 configured with the p-type GaN second shell 2013 covering the first shell 2012 may be formed on the SiC substrate 2006 with a certain interval.
  • the end 11A of the SiC rod-shaped core 2011 is covered with the first shell 12 of the n-type GaN and the second shell 13 of the p-type GaN.
  • the light emitting diode 2015 can emit strong light in the long axis direction so as to penetrate the SiC substrate 2006 from the end portion 2011B of the rod-shaped core 2011.
  • the light emitting diode 2035 may include the third shell 2031 that covers the circumferential surface of the shell 2003.
  • the light emitting diode 2035 is formed outside the second shell 2003, and the third shell 2031 having a refractive index n4 lower than the refractive index n3 of the second shell 2003 functions as a reflective film. That is, as shown in FIG. 26B, if the incident angle ⁇ to the interface between the second shell 2003 and the third shell 2031 is not less than sin ⁇ 1 (n4 / n3), total reflection is performed at the interface. Wake up. Therefore, light generated at the pn junction surfaces of the first and second shells 2002 and 2003 is difficult to escape to the outside of the diode, light can be emitted from the end portions 2001A and 2001B of the rod-shaped core 2001, and more directivity can be obtained. Rise.
  • the light emitting diode 2005 has been described in the seventh embodiment, a columnar rod-shaped core 2001, a cylindrical first shell 2002, and a cylindrical second shell 2003 having the same configuration as the light emitting diode 2005 are described.
  • You may comprise a photodetector with the diode which has the photoelectric effect provided.
  • this photodetector since the refractive index n1 of the rod-shaped core 2001 is larger than the refractive index n2 of the first shell 2002, it becomes difficult for light to escape to the outside of the diode, and the light capturing effect can be enhanced.
  • the photoelectric effect can be enhanced.
  • the thermal conductivity of the rod-shaped core 2001 is larger than the thermal conductivity of the first shell 2002, the heat dissipation can be improved and the temperature can be made uniform. A decrease in conversion efficiency can be avoided. Therefore, according to this photodetector, the light detection performance can be improved.
  • the light emitting diode 2005 has been described.
  • the columnar rod-shaped core 2001, the cylindrical first shell 2002, and the cylindrical second shell 2003 having the same configuration as the light emitting diode 2005 are described.
  • the thermal conductivity of the rod-shaped core 2001 is larger than the thermal conductivity of the first shell 2002, the heat dissipation can be improved and the temperature can be made uniform, and photoelectric conversion due to high temperature concentration. Reduced efficiency can be avoided. Therefore, according to this solar cell, the power generation performance can be improved.
  • a diode 2045 having a photoelectric effect similar to that of the light-emitting diode 2005 constituting the photodetector or solar cell is erected on the SiC substrate 2046 at a certain interval.
  • heat is diffused to the entire diode through the rod-shaped core 2001, and heat can be diffused from the base end portion 2001B of the rod-shaped core 2001 to the substrate 2046, and at the end portion 2001A of the tip end of the rod-shaped core 2001. Can also dissipate heat. Therefore, since heat dissipation can be improved and the temperature can be made uniform, a decrease in photoelectric conversion efficiency due to high temperature concentration can be avoided, and a photodetector with good detection performance and a solar cell with good power generation efficiency can be provided.
  • a part of the circumferential direction of one end portion of the first shell 2002 is exposed by removing a part of the circumferential direction of one end portion of the second shell 2003.
  • a contact electrode 2009 is formed on the exposed portion of one shell 2002, and a contact electrode 2008 is formed on the second shell 2003.
  • a SiC rod-like core 2051, an n-type GaN first shell 2052 covering the SiC rod-like core 2051, and the n-type GaN A plurality of diodes 2055 having a photoelectric effect constituted by the second shell 2053 of p-type GaN covering the first shell 2052 are formed on the SiC substrate 2056 at a certain interval in a standing state. Also good. In the diode 2055 having the photoelectric effect, an end portion 2051A of the SiC rod-shaped core 2051 is covered with the first shell 2052 of n-type GaN and the second shell 2053 of p-type GaN.
  • heat is diffused to the entire diode through the rod-shaped core 2051, and heat can be diffused from the base end portion 2051 ⁇ / b> B of the rod-shaped core 2051 to the SiC substrate 2056. Therefore, since heat dissipation can be improved and the temperature can be made uniform, a decrease in photoelectric conversion efficiency due to high temperature concentration can be avoided, and a photodetector with good detection performance and a solar cell with good power generation efficiency can be provided.
  • the first shells 2002 and 2052 are n-type GaN and the second shells 2003 and 2053 are p-type GaN.
  • the first shells 2002 and 2052 are p-type.
  • the second shells 2003 and 2053 may be n-type GaN.
  • FIG. 28A is a perspective view of a light emitting diode 2065 as an eighth embodiment of the diode of the present invention
  • FIG. 28B is a cross-sectional view of the light emitting diode 2065.
  • the light emitting diode 2065 of the eighth embodiment is made of SiO 2 instead of the cylindrical rod-shaped core 2001 made of SiC as the core portion of the light emitting diode 2005 of the seventh embodiment shown in FIGS. 24A and 24B.
  • Only the light-emitting diode 2005 of the seventh embodiment described above is different from the light-emitting diode 2005 of the seventh embodiment described above only in that the cylindrical rod-shaped core 2061 is provided. Therefore, in the eighth embodiment, the same reference numerals are given to the same parts as those in the seventh embodiment, and the parts different from those in the seventh embodiment will be mainly described.
  • the rod-shaped core 2061 made of SiO 2 has a refractive index of 1.45
  • the first shell 2002 made of n-type GaN has a refractive index of 2.5.
  • both end faces 2065A of each rod-like light emitting diode 2065 are formed.
  • 2065B and the side surface 2065C can emit light in all directions.
  • the both ends 2065A and 2065B and the side surface 2065C in the direction in which the rod-shaped core 2061 extends are exposed. Light can be emitted in all directions. Note that the diode 2065 in FIG.
  • 29C has a circumferential portion of one end of the second shell 2003 removed, and a circumferential portion of one end of the first shell 2002 is exposed.
  • a contact electrode 2009 is formed on the exposed portion of one shell 2002, and a contact electrode 2008 is formed on the second shell 2003.
  • a rod core 2061 of SiO 2 As a modification of the light emitting diode 2065, as shown in FIG. 29A, a rod core 2061 of SiO 2, the first shell 2062 of n-type GaN covering the rod-shaped core 2061 of the SiO 2, the n-type A plurality of light emitting diodes 2075 composed of a p-type GaN second shell 2063 covering the GaN first shell 2062 are formed on the SiO 2 substrate 2067 in a state of being erected at a certain interval. Also good.
  • the end portion 2061A of the SiO 2 rod-shaped core 2061 is covered with the first shell 2062 of n-type GaN and the second shell 2063 of p-type GaN. Also in this case, light can be emitted in all directions from both end portions 2075A and 2075B and the entire side surface 2075C of the rod-like light emitting diode 2075.
  • the first shells 2002 and 2062 are n-type GaN and the second shells 2003 and 2063 are p-type GaN.
  • the first shells 2002 and 2062 are p-type GaN.
  • the second shells 2003 and 2063 may be n-type GaN.
  • FIG. 30A is a perspective view of a light emitting diode 2085 as a ninth embodiment of the diode of the present invention
  • FIG. 30B is a cross-sectional view of the light emitting diode 2085.
  • the light emitting diode 2085 of the ninth embodiment includes a cylindrical rod-shaped core 2081 serving as a core portion, a cylindrical first shell 2082 serving as a first conductivity type semiconductor layer covering the columnar rod-shaped core 2081, and the above.
  • a cylindrical second shell 2083 is provided as a second conductive type semiconductor layer covering the cylindrical first shell 2082.
  • the end surfaces of both end portions 2081A and 2081B of the rod-shaped core 2081 are exposed from the first and second shells 2082 and 2083.
  • the first shell 2082 has a flange-shaped one end 2082 A, and the one end 2082 A is exposed from the second shell 2083.
  • the rod-shaped core 2081 is made of n-type Si
  • the first shell 2082 is made of n-type GaN
  • the second shell 2083 is made of p-type GaN.
  • the rod-shaped core 2081 made of the n-type Si has an electric conductivity of 1.0 ⁇ 10 5 (/ ⁇ m)
  • the first shell 2082 made of the n-type GaN has an electric conductivity of 1.0. ⁇ 10 4 (/ ⁇ m).
  • the electric conductivity (1.0 ⁇ 10 5 (/ ⁇ m)) of the rod-shaped core 2081 is the same as that of the first shell 2082 (1.0 ⁇ 10 4). (/ ⁇ m)). Therefore, as indicated by arrows E1, E2, and E3 in FIG. 30B, compared to the first shell 2082, the current flows more easily through the rod-shaped core 2081, and the first shell 2082 passes through the rod-shaped core 2081. It becomes easy for current to flow through the entire area. For this reason, loss can be suppressed and light can be emitted efficiently.
  • FIG. 30C Also in this case, as indicated by arrows F1, F2, and F3 in FIG. 30C, current flows more easily through the rod-shaped core 2081 compared to the first shell 2082, and the first core 2081 passes through the rod-shaped core 2081. It becomes easier for current to flow through the entire area of the shell 2082. For this reason, loss can be suppressed and improvement in light detection performance and improvement in power generation efficiency can be achieved.
  • a plurality of light emitting diodes 2095 shown in FIG. 31A as a modification of the light emitting diode 2085 may be formed on the n-type Si substrate 2090 in a state of being erected at a certain interval.
  • the light emitting diode 2095 includes a rod-shaped core 2091 made of n-type Si, an n-type GaN first shell 2092 covering the rod-shaped core 2091 made of n-type Si, and a first shell of the n-type GaN. And p-type GaN second shell 2093 covering 2092.
  • the end 2091A of the n-type Si rod-shaped core 2091 is covered with the n-type GaN first shell 2092 and the p-type GaN second shell 2093.
  • the n-type GaN first shell 2092 is connected to an n-type GaN extension 2092Z formed on the substrate 2090
  • the p-type GaN second shell 2093 is connected to the n-type GaN.
  • a p-type GaN extension 2093Z formed on the GaN extension 2092Z is connected.
  • a contact electrode 2096 is formed on the p-type GaN extension 2093Z
  • a contact electrode 2097 is formed on the n-type Si substrate 2090.
  • the contact electrode 2097 may be formed on the n-type Si substrate 2090.
  • the contact electrode can be easily formed.
  • a light emitting diode 2105 shown in FIG. 31B as another modification of the light emitting diode 2085 may be disposed on the GaN substrate 2100 in a lying state.
  • a part of one end of the n-type Si rod-shaped core 2101 in the circumferential direction is exposed from the first and second shells 2102 and 2103.
  • the first shell 2102 is made of n-type GaN
  • the second shell 2103 is made of p-type GaN.
  • a contact electrode 2106 is formed on the outer peripheral surface of the second shell 2103, and a contact electrode 2107 is formed on one end of the exposed n-type Si rod-shaped core 2101.
  • the light-emitting diode 2105 shown in FIG. 31B is, for example, one that is separated from the state of being erected on the Si substrate 2090 shown in FIG. 31A and placed on a GaN substrate 2100 as another substrate in a laid state. is there.
  • a contact electrode 2106 is formed on the second shell 2103 of p-type GaN, and a rod-shaped core made of n-type Si. Since the contact electrode 2107 may be formed on 2101, the contact electrode can be easily formed.
  • the light-emitting diodes 2095 and 2105 have been described.
  • a photoelectric conversion element photodetector or solar cell
  • the first shells 2082, 2092, 2102 are n-type GaN and the second shells 2083, 2093, 2103 are p-type GaN, but the first shells 2082, 2092, 2102 are used. May be p-type GaN, and the second shells 2083, 2093, and 2103 may be n-type GaN.
  • FIG. 32A is a perspective view of a light emitting diode 2115 as a tenth embodiment of the diode of the present invention
  • FIG. 32B shows a plurality of the light emitting diodes 2115 standing on the Si substrate 2110 with a certain interval. It is sectional drawing which shows a mode that it is.
  • the light emitting diode 2115 includes a core 2111 made of silicon, a first shell 2112 made of n-type GaN as a first conductivity type semiconductor layer formed so as to cover the core 2111, and the first And a second shell 2113 made of p-type GaN as a second conductivity type semiconductor layer formed so as to cover the shell 2112.
  • the core 2111 is made of silicon, a process for forming the core 2111 is established. Therefore, a desired good shape light emitting diode 2115 is obtained. Further, as compared with the case where the core is entirely made of the first conductivity type semiconductor, the amount of use of the first conductivity type semiconductor can be reduced, and the cost can be reduced.
  • a plurality of light emitting diodes 2115 formed on a Si substrate 2110 as a manufacturing substrate and spaced apart from each other are formed by etching or the like as shown in FIG. 33A.
  • the light emitting diode 2117 separated from the substrate 2110 as shown in FIG. 33B, the light emitting diode 2117 can be mounted on a GaN substrate 2118 as a mounting substrate in a lying state. That is, according to the light emitting diode 2117 separated from the substrate, the light emitting diode 2117 can be easily mounted on a desired mounting substrate different from the manufacturing substrate.
  • the first and second shells 2112 and 2113 of the light emitting diode 2115 formed in a standing state on the Si substrate 2110 are etched by RIE (reactive ion etching), and the Si substrate 2110 is dry etched by CF 4 or the like. Further, the light emitting diode 2115 can be separated from the Si substrate 2110 by applying ultrasonic waves in a solution such as IPA (isopropyl alcohol).
  • the first shell 2112 is n-type GaN and the second shell 2113 is p-type GaN.
  • the first shell 2112 is p-type GaN and the second shell 2113 is a p-type GaN. May be n-type GaN.
  • FIGS. 34A to 34I are cross-sectional views illustrating each manufacturing process in this manufacturing method.
  • an n-type Si substrate 2201 is prepared, and several SiO 2 films (not shown) such as TEOS (tetra-ethyl-ortho-silicate) are formed on the surface 2201A of the n-type Si substrate 2201.
  • a film is formed to a thickness of ⁇ m.
  • the thickness of the SiO 2 film is preferably 1 ⁇ m or more.
  • etching such as RIE (reactive ion etching) is performed on the SiO 2 film (not shown) to partially expose the n-type Si substrate 2201 from the SiO 2 film.
  • RIE reactive ion etching
  • the surface of the n-type Si substrate 2201 on which the plurality of cores 2202 made of n-type Si is formed.
  • a thermal oxide film is formed. Thereafter, the thermal oxide film is peeled off with HF (hydrofluoric acid) to obtain a Si surface free from defects and dust.
  • the n-type Si substrate 2201 on which the plurality of cores 2202 are formed is set in a MOCVD (metal organic chemical vapor deposition) apparatus, and thermal cleaning is performed in a hydrogen atmosphere at 1200 ° C. for several tens of minutes, and natural oxidation is performed. The film is removed and the Si surface is hydrogen terminated. Thereafter, the substrate temperature is lowered to 1100 ° C., and an AlN layer (not shown) and an Al X Ga 1-X N (0 ⁇ x ⁇ 1) layer (not shown) are grown. Note that the AlN layer and the Al X Ga 1-X N (0 ⁇ x ⁇ 1) layer are not necessarily formed.
  • MOCVD metal organic chemical vapor deposition
  • n-type GaN is grown by MOCVD (metal organic chemical vapor deposition) to form a first shell 2203 of the first conductivity type.
  • MOCVD metal organic chemical vapor deposition
  • FIG. 34D several to several tens of Ga 1 -Y In Y N / Ga 1 -Z In ZN (0 ⁇ Y, Z ⁇ 1) multiple quantum wells (MQW) are formed by MOCVD.
  • a quantum well layer (active layer) 2204 having a structure is grown.
  • a p-Al n Ga 1-n N (0 ⁇ n ⁇ 1) layer (not shown) is grown on the quantum well layer (active layer) 2204. Further, as shown in FIG.
  • p-type GaN is grown to form the second conductivity type second shell 2205 covering the quantum well layer 2204.
  • the quantum well layer 2204 and the p-Al n Ga 1-n N (0 ⁇ n ⁇ 1) layer (not shown) on the quantum well layer 2204 are not necessarily formed.
  • ITO in-added indium oxide
  • CVD chemical vapor deposition
  • sputtering sputtering
  • plating to form an ITO conductive film 2206.
  • annealing may be performed at 650 ° C. for 10 minutes in a mixed atmosphere of nitrogen and oxygen to form a p-type translucent electrode.
  • a ZnO conductive film or an FTO (fluorine-added tin oxide) conductive film may be employed instead of the ITO conductive film 2206.
  • the ITO conductive film 2206, the p-type GaN second shell 2205, the quantum well layer 2204, and the n-type GaN first shell 2203 are etched by RIE using an etching gas such as Cl 2 .
  • an etching gas such as Cl 2 .
  • etching gas such as CF 4 .
  • the tip of the n-type Si core 2202 is etched, and the n-type Si substrate 2201 is left so that an n-type Si portion 2201B immediately below the n-type Si core 2202 remains. Is etched from the surface.
  • the n-type Si core 2202 is attached to the n-type Si substrate 2201 as shown in FIG. Separate from part 2201B. Thereby, a plurality of light emitting diodes 2207 separated from the n-type Si substrate 2201 are obtained.
  • the substrate 2201 is an n-type Si substrate and the core 2202 is an n-type Si core has been described.
  • a third modification is shown in the following (1), (2), and (3). Note that the formation of the first shell 2203, the quantum well layer 2204, the second shell 2205, and the ITO conductive film 2206 is the same as in the above embodiment.
  • the substrate 2201 is an SiC substrate, and the core 2202 is SiC.
  • the core made of SiC is formed by RIE (reactive ion etching) using the SiO 2 film as a mask.
  • the substrate 2201 is an SiO 2 substrate, and the core 2202 is SiO 2 .
  • a known lithography method and dry etching method used in a normal semiconductor process can be used for the formation of the core by SiO 2 .
  • the substrate 2201 is an n-type Si substrate, and the core 2202 is n-type Si.
  • the core 2202 made of n-type Si can be formed by VLS (Vapor-Liqid-Solid) growth.
  • the first conductivity type first shell 2203 is formed as n-type GaN by MOCVD.
  • CVD, plating, sputtering, etc. may be performed according to the material of the first conductivity type first shell 2203.
  • the substrate 2201, the core 2202, and the first shell 2203 are n-type
  • the second shell 2205 is p-type.
  • the substrate 2201, the core 2202, and the first shell 2203 are p-type.
  • the second shell 2205 may be n-type.
  • a photoelectric conversion element photodetector or solar cell
  • the light emitting diode 2300 according to the twelfth embodiment uses a light emitting diode manufactured up to the step shown in FIG. 34F of the eleventh embodiment of the method for manufacturing a light emitting diode.
  • the light emitting diode 2300 of the twelfth embodiment is formed along the surface of the n-type Si substrate 2201 among the conductive film 2206, the p-type GaN second shell 2205, and the quantum well layer 2204.
  • the extending end portion is removed by etching such as RIE to expose the end portion 2203B of the first shell 2203 of n-type GaN.
  • a contact electrode 2307 was formed on the exposed end portion 2203B of the first shell 2203, and a contact electrode 2301 was formed on the end portion 2206B of the conductive film 2206.
  • a plurality of n-type Si rod-like cores 2202 formed on an n-type Si substrate 2201 in a standing state with an interval are provided as a first shell 2203 and a quantum well layer 2204 of n-type GaN. , and sequentially covered with a second shell 2205 of p-type GaN. Therefore, according to the light emitting diode 2300, the light emitting area can be increased as compared with the case where a flat laminated film without the rod-shaped core 2202 is provided, and thus the amount of emitted light can be increased at a low cost.
  • the light-emitting elements 2305 shown in FIG. 35B on which the light-emitting diodes 2300 are mounted can be mounted in a grid pattern on the support substrate 2306 with a space therebetween as shown in FIG. 35C, whereby the lighting device 2307 can be obtained.
  • the lighting device 2307 can be a backlight or a display device.
  • the light-emitting diode 2300 manufactured up to the step shown in FIG. 34F of the eleventh embodiment is used.
  • the light-emitting diode 2300 manufactured up to the step shown in FIG. 34F is a modification of the eleventh embodiment. May be used.
  • the substrate 2201, the core 2202, and the first shell 2203 are n-type
  • the second shell 2205 is p-type.
  • the substrate 2201, the core 2202, and the first shell 2203 are p-type.
  • the second shell 2205 may be n-type.
  • the light emitting diode 2400 of the thirteenth embodiment uses the light emitting diode 2207 manufactured up to the step shown in FIG. 34I of the eleventh embodiment of the method for manufacturing a light emitting diode described above.
  • the light emitting diode 2400 of the thirteenth embodiment includes the conductive film 2206 of the light emitting diode 2207 fabricated in the above eleventh embodiment, the second shell 2205 of p-type GaN, and the quantum well layer 2204.
  • a part 2203C on the tip side of the n-type GaN first shell 2203 is exposed by removing a part on the tip side by etching.
  • a contact electrode 2403 is formed on a portion 2203C of the first shell 2203, and a contact electrode 2402 is formed on the conductive film 2206.
  • the light emitting diode 2400 is disposed on the substrate 2401 in a lying state.
  • the substrate 2401 can be, for example, a flexible substrate or a glass substrate, but the substrate 2401 may be an insulating substrate of another material.
  • a plurality of the light emitting diodes 2400 may be arranged on the substrate 2401 to form the light emitting element 2410.
  • wirings 2405 and 2406 are connected to contact electrodes 2402 and 2403 of each light emitting diode 2400 in each column.
  • a plurality of the light emitting elements 2410 can be mounted on the support substrate 2411 in a lattice pattern with a space therebetween, whereby a lighting device 2412 can be obtained.
  • the lighting device 2412 may be a backlight or a display device.
  • the light emitting diode 2400 the one manufactured in the eleventh embodiment is used.
  • the light emitting diode 2400 manufactured in a modification of the eleventh embodiment may be used.
  • the photoelectric conversion element of the fourteenth embodiment can be a photodetector or a solar cell.
  • the photoelectric conversion element of the fourteenth embodiment is a process that omits the step of forming the quantum well layer 2204 shown in FIG. 34D out of the steps up to the process shown in FIG. 34F of the eleventh embodiment of the method for manufacturing a light-emitting diode described above. The produced one is used.
  • the n-type Si rod-shaped cores 2202 formed on the n-type Si substrate 2201 at intervals are used as the n-type GaN first shell 2203 and the p-type GaN second shell.
  • the shell 2205 and the ITO conductive film 2206 are sequentially covered.
  • the n-type Si substrate 2201 is disposed on the insulating substrate 2501. Further, in the photoelectric conversion element 2500 of this embodiment, as shown in FIG. 37A, the conductive film 2206 and the p-type GaN second shell 2205 extend along the surface of the n-type Si substrate 2201.
  • the end portions of the portions 2206B and 2205B are removed by etching such as RIE to expose the end portion 2203B of the first shell 2203 of n-type GaN. Then, a contact electrode 2503 was formed on the exposed end portion 2203B of the first shell 2203, and a contact electrode 2502 was formed on the end portion 2205B of the second shell 2205 or the end portion 2206B of the conductive film 2206.
  • a plurality of n-type Si rod-shaped cores 2202 formed on an n-type Si substrate 2201 in a standing state with a space therebetween are formed as a first shell 2203 of n-type GaN and p-type GaN.
  • the second shell 2205 is sequentially covered. Therefore, according to this photoelectric conversion element 2500, the PN junction area per unit area of the substrate 2201 can be increased as compared with the case where a flat laminated film without the rod-shaped core 2202 is formed. Therefore, the cost per unit area of the PN junction area can be reduced. Further, since light enters the gaps between the n-type Si rod-like cores 2202 and a light confinement effect can be obtained, the efficiency of photoelectric conversion per unit area can be increased.
  • the step of forming the quantum well layer 2204 shown in FIG. 34D out of the steps shown in FIG. 34I of the eleventh embodiment is omitted.
  • a photoelectric conversion element 2520 illustrated in FIG. 37B was obtained using the manufactured diode.
  • the diode 2517 included in the photoelectric conversion element 2520 according to this modification is formed by removing a portion of the conductive film 2206 and a portion of the tip side of the p-type GaN second shell 2205 in the circumferential direction by etching. A part in the circumferential direction of the portion on the tip side of one shell 2203 is exposed. A contact electrode 2518 is formed on the exposed n-type GaN first shell 2203, and a contact electrode 2519 is formed on the conductive film 2206 on the opposite side of the n-type Si rod-shaped core 2202 from the contact electrode 2518. Formed.
  • the diode 2517 is disposed on the substrate 2521 in a lying state so that the contact electrode 2519 is positioned on the substrate 2521 side.
  • a flexible substrate or a conductive substrate can be used as the substrate 2521.
  • the step of forming the quantum well layer 2204 shown in FIG. 34D out of the steps shown in FIG. 34I of the eleventh embodiment is omitted.
  • a photoelectric conversion element 2530 shown in FIG. 37C was obtained using the diode manufactured through the above-described process.
  • a diode 2527 included in the photoelectric conversion element 2530 of this modification is formed by removing a part of the conductive film 2206 and a portion of the tip side of the second shell 2205 of the p-type GaN in the circumferential direction by etching, thereby removing the n-type GaN first. A part in the circumferential direction of the portion on the tip side of one shell 2203 is exposed. A contact electrode 2528 was formed on the exposed portion of the exposed n-type GaN first shell 2203, and a contact electrode 2529 was formed on the conductive film 2206 on the same side of the contact electrode 2528.
  • the diode 2527 has the ITO conductive film 2206 in contact with the back surface 2531B of the light incident surface 2531A of the substrate 2531 and the contact electrodes 2528 and 2529 with respect to the substrate 2531. It is arranged in a lying state so that it is located on the opposite side. Note that a glass substrate or a light-transmitting substrate can be used as the substrate 2531.
  • the diode fabricated in the eleventh embodiment is used, but the diode fabricated in the modified example of the eleventh embodiment may be used.
  • the rod-shaped core as the core portion has a cylindrical shape, but may have a polygonal column shape or an elliptical column shape, and may have a conical shape, an elliptical cone shape, a polygonal pyramid shape, or the like.
  • the first and second shells have a cylindrical shape.
  • a polygonal cylindrical shape, an elliptical cylindrical shape, a conical shape, an elliptical cone shape, a polygonal pyramid shape, etc. corresponding to the shape of the core portion. Also good.

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Abstract

This light-emitting element (100) comprises: an n-type GaN semiconductor base (113); a plurality of n-type GaN rod-shaped semiconductors (121) formed on top of the n-type GaN semiconductor base (113) in a vertical state and mutually separated at intervals; and a p-type GaN semiconductor layer (123) that covers the n-type GaN rod-shaped semiconductors (121). The resistance of the n-type GaN rod-shaped semiconductors (121) can be readily lowered by increasing the amount of impurities that provide the n-shape to the rod-shaped semiconductors (121). Therefore, the increase in resistance of the n-type GaN rod-shaped semiconductors (121) is suppressed and the semiconductors can be made to emit light uniformly from the base of the n-type GaN rod-shaped semiconductor to the tip thereof, even if the length of the n-type GaN rod-shaped semiconductors (121) is increased.

Description

発光素子およびその製造方法、発光装置の製造方法、照明装置、バックライト、表示装置、並びにダイオードLIGHT EMITTING ELEMENT AND ITS MANUFACTURING METHOD, LIGHT EMITTING DEVICE MANUFACTURING METHOD, LIGHTING DEVICE, BACKLIGHT, DISPLAY DEVICE, AND DIODE
　この発明は、棒状または板状などの突起状半導体を有する発光素子およびその製造方法、上記発光素子を備えた発光装置の製造方法、および、上記発光装置を備えた照明装置，バックライト並びに表示装置、及び発光ダイオードや光電変換素子を構成するダイオードに関する。 The present invention relates to a light emitting element having a protruding semiconductor such as a rod or plate, a method for manufacturing the same, a method for manufacturing a light emitting device including the light emitting element, and an illumination device, a backlight, and a display device including the light emitting device. And a diode constituting a light emitting diode or a photoelectric conversion element.
　従来、平面型の発光素子に比べて発光面積を増大させたロッド型発光素子が、特許文献１(特開２００６－３３２６５０号公報)に開示されている。 Conventionally, a rod-type light-emitting element having a light-emitting area increased as compared with a planar light-emitting element is disclosed in Patent Document 1 (Japanese Patent Laid-Open No. 2006-332650).
　このロッド型発光素子は、図３８に示すように、基板９００上に第１極性層９１０が形成され、この第１極性層９１０上に光を放出する活性層からなる複数個のロッド９２０が形成されている。このロッド９２０はさらに第２極性層９３０に包まれており、上記活性層からなる複数個のロッド９２０および第２極性層９３０がロッド型発光素子を構成している。 As shown in FIG. 38, in this rod type light emitting device, a first polar layer 910 is formed on a substrate 900, and a plurality of rods 920 made of an active layer that emits light is formed on the first polar layer 910. Has been. The rod 920 is further encapsulated in a second polar layer 930, and the plurality of rods 920 and the second polar layer 930 made of the active layer constitute a rod-type light emitting element.
　上記従来技術によれば、それぞれのロッド９２０は全体の面に光を放出するため、発光面積が増加し、発光素子による光量が増加する。 According to the above prior art, since each rod 920 emits light to the entire surface, the light emitting area is increased and the amount of light by the light emitting element is increased.
　しかしながら、上記従来技術では、ロッド９２０は活性層からなるが、活性層は専らキャリアを閉じ込めて発光効率を上げる役割を持つものであり、一般的に高抵抗である。上記従来技術では、発光面積を増やすためにはロッドの長さを長くする必要があるが、ロッドの長さを長くするほど高抵抗な活性層も長くなり、先端まで十分な電流を流すことができずに先端部が暗くなり、十分な発光強度が得られないという問題があった。 However, in the above prior art, the rod 920 is formed of an active layer, and the active layer has a role of exclusively confining carriers to increase the light emission efficiency, and generally has a high resistance. In the above prior art, in order to increase the light emitting area, it is necessary to increase the length of the rod. However, as the length of the rod is increased, the active layer having a high resistance becomes longer, and a sufficient current can flow to the tip. There was a problem that the tip end portion became dark without being able to be obtained and sufficient light emission intensity could not be obtained.
　また、従来、発光ダイオードとしては、図３９に断面を示すものが提案されている(非特許文献１参照)。この発光ダイオードは、ｎ型ＧａＮで作製されたコア３００１と、このコア３００１の周囲を被覆するようにＩｎＧａＮ層３００２,ｉ-ＧａＮ層３００３,ｐ-ＡlＧａＮ層３００４,ｐ-ＧａＮ層３００５が順次シェル状に形成されている。上記ＩｎＧａＮ層３００２,ｉ-ＧａＮ層３００３が活性層を構成している。 Conventionally, as a light emitting diode, one having a cross section shown in FIG. 39 has been proposed (see Non-Patent Document 1). In this light emitting diode, a core 3001 made of n-type GaN and an InGaN layer 3002, an i-GaN layer 3003, a p-AlGaN layer 3004, and a p-GaN layer 3005 are sequentially shelled so as to cover the periphery of the core 3001. It is formed in a shape. The InGaN layer 3002 and the i-GaN layer 3003 constitute an active layer.
　ところで、上記従来の発光ダイオードでは、上記ｎ型のコア３００１がｎ型の電極として使用され、ｎ型の電極の機能を持つことを優先して材質が選択されているため、コア３００１の材質選択が制限されている。このため、コア３００１の材質を自由に選択してコアに所望の特性を持たせることが困難であり、上記コアに所望の特性を持たせるための製造コストの増加や製造歩留まりの低下を招いていた。 By the way, in the conventional light emitting diode, the n-type core 3001 is used as an n-type electrode, and the material is selected with priority given to the function of the n-type electrode. Is limited. For this reason, it is difficult to freely select the material of the core 3001 to give the core desired characteristics, and this causes an increase in manufacturing cost and a decrease in manufacturing yield for giving the core desired characteristics. It was.
特開２００６－３３２６５０号公報JP 2006-332650 A
　そこで、この発明の課題は、低抵抗で十分な発光強度が得られる発光素子を提供することにある。また、この発明のさらなる課題は、そのような発光素子の製造方法、そのような発光素子による発光装置の製造方法、そのような発光装置を備えた照明装置、バックライト並びに表示装置をも提供することにある。 Therefore, an object of the present invention is to provide a light emitting element that can obtain a sufficient light emission intensity with low resistance. The present invention further provides a method for manufacturing such a light-emitting element, a method for manufacturing a light-emitting device using such a light-emitting element, a lighting device including such a light-emitting device, a backlight, and a display device. There is.
　また、この発明のもう１つの課題は、製造コストの増加や製造歩留まりの低下を招くことなく、コアに所望の特性を持たせることができるダイオードを提供することにある。 Another object of the present invention is to provide a diode that can have desired characteristics in the core without causing an increase in manufacturing cost or a decrease in manufacturing yield.
　上記課題を解決するため、この発明の発光素子は、第１導電型の半導体基部と、
　上記第１導電型の半導体基部上に形成された複数の第１導電型の突起状半導体と、
　上記突起状半導体を覆う第２導電型の半導体層と
を備えたことを特徴としている。 In order to solve the above problems, a light emitting device of the present invention includes a first conductivity type semiconductor base,
A plurality of first-conductivity-type protruding semiconductors formed on the first-conductivity-type semiconductor base;
And a semiconductor layer of a second conductivity type covering the protruding semiconductor.
　この発明の発光素子によれば、上記第１導電型の突起状半導体を覆うように第２導電型の半導体層が形成されているので、上記突起状半導体のほぼ全側面を発光させることが可能となる。それゆえ、この発明の発光素子によれば、平面状の発光層を持つ発光ダイオードチップに比べて、上記第１導電型の半導体基部の単位面積当たりの発光量を増大させることができる。 According to the light emitting device of the present invention, since the second conductive type semiconductor layer is formed so as to cover the first conductive type protruding semiconductor, almost all side surfaces of the protruding semiconductor can be made to emit light. It becomes. Therefore, according to the light emitting device of the present invention, the light emission amount per unit area of the first conductivity type semiconductor base can be increased as compared with a light emitting diode chip having a planar light emitting layer.
　また、この発明によれば、上記突起状半導体は第１導電型の半導体からなるから、上記突起状半導体に第１導電型を与える不純物量を増やすことにより容易に低抵抗化できる。それゆえ、上記突起状半導体の長さを長くしても、上記突起状半導体の抵抗の増大が抑えられ、上記突起状半導体の根元部から先端部にわたって一様に発光させることができる。したがって、上記第１導電型の半導体基部の単位面積当たりの発光量をさらに増やすことが可能となる。 Further, according to the present invention, since the protruding semiconductor is made of a first conductivity type semiconductor, the resistance can be easily reduced by increasing the amount of impurities that give the first conductivity type to the protruding semiconductor. Therefore, even if the length of the protruding semiconductor is increased, an increase in the resistance of the protruding semiconductor is suppressed, and light can be emitted uniformly from the root portion to the tip portion of the protruding semiconductor. Therefore, it is possible to further increase the light emission amount per unit area of the first conductivity type semiconductor base.
　また、一実施形態では、上記第１導電型の突起状半導体は第１導電型の棒状半導体である。 In one embodiment, the first conductive type protruding semiconductor is a first conductive type rod-shaped semiconductor.
　この実施形態によれば、上記棒状半導体の根元部から先端部にわたって一様に発光させることができ、上記棒状半導体のほぼ全側面を発光させることが可能となるので、平面状の発光層を持つ発光ダイオードチップに比べて、上記第１導電型の半導体基部の単位面積当たりの発光量を増大させることができる。 According to this embodiment, since light can be emitted uniformly from the root portion to the tip portion of the rod-shaped semiconductor, and almost all side surfaces of the rod-shaped semiconductor can be light-emitted, a planar light emitting layer is provided. Compared with the light emitting diode chip, the light emission amount per unit area of the semiconductor base of the first conductivity type can be increased.
　また、一実施形態では、上記第１導電型の棒状半導体の長さが上記第１導電型の棒状半導体の太さの１０倍以上である。 In one embodiment, the length of the first conductivity type rod-shaped semiconductor is 10 times or more the thickness of the first conductivity type rod-shaped semiconductor.
　この実施形態では、上記半導体基部の単位面積当たりの発光量を著しく増大させることができる。これに対して、従来技術のように棒状半導体が活性層からなる場合は棒状半導体の長さを太さの１０倍以上にすると先端部を発光させることが困難になる。したがって、棒状半導体の長さが太さの１０倍以上にすることによって、低抵抗で発光強度が高いという本発明の利点が特に顕著となる。 In this embodiment, the light emission amount per unit area of the semiconductor base can be remarkably increased. On the other hand, when the rod-shaped semiconductor is made of an active layer as in the prior art, it is difficult to emit light at the tip if the length of the rod-shaped semiconductor is 10 times or more the thickness. Therefore, when the length of the rod-shaped semiconductor is 10 times or more of the thickness, the advantage of the present invention that the light emission intensity is high with low resistance becomes particularly remarkable.
　また、一実施形態では、上記第１導電型の突起状半導体は第１導電型の板状半導体である。 In one embodiment, the first conductive type protruding semiconductor is a first conductive type semiconductor plate.
　この実施形態によれば、上記突起状半導体を板状半導体としたことで、その板状半導体の最も広い発光面を無極性面とすることで、全体としての発光効率を高めることができる。 According to this embodiment, since the projecting semiconductor is a plate semiconductor, the widest light emission surface of the plate semiconductor is a nonpolar surface, so that the overall light emission efficiency can be increased.
　また、一実施形態では、上記第１導電型の突起状半導体と第２導電型の半導体層との間に活性層が形成されている。 In one embodiment, an active layer is formed between the first conductive type protruding semiconductor and the second conductive type semiconductor layer.
　この実施形態では、発光効率を上げることができる。また、上記活性層は、あくまで上記第１導電型の突起状半導体と上記第２導電型の半導体層との間に、相対的に薄く形成されるものであるので、発光効率が良い。上記活性層は、両極のキャリア(正孔と電子)を狭い範囲に閉じ込めて再結合確率を上げるためのものであるからである。これに対し、従来技術の様に、第１導電型の棒状半導体の部分まで全て活性層からなる場合、キャリアの閉じ込めが不十分なため発光効率が高くない。 In this embodiment, the luminous efficiency can be increased. Further, since the active layer is formed to be relatively thin between the first conductive type protruding semiconductor and the second conductive type semiconductor layer, the luminous efficiency is high. This is because the active layer is for confining bipolar carriers (holes and electrons) in a narrow range to increase the recombination probability. On the other hand, when all of the first conductive type rod-shaped semiconductor portion is made of an active layer as in the prior art, the light emission efficiency is not high because of insufficient carrier confinement.
　また、一実施形態では、上記第２導電型の半導体層上に透明電極層が形成されている。 In one embodiment, a transparent electrode layer is formed on the second conductivity type semiconductor layer.
　この実施形態では、上記透明電極層が上記棒状半導体から放射された光を透過しつつ、上記第２導電型の半導体層で電圧降下を起こすことを防ぐことができる。したがって、上記棒状半導体の全体にわたって一様に発光させることができる。 In this embodiment, it is possible to prevent a voltage drop in the second conductivity type semiconductor layer while the transparent electrode layer transmits light emitted from the rod-shaped semiconductor. Therefore, light can be emitted uniformly over the entire rod-shaped semiconductor.
　また、一実施形態では、上記複数の第１導電型の突起状半導体の間で上記透明電極層が対向している対向間隙に上記透明電極層よりも透明性が高い材料で作製された透明部材が充填されている。 In one embodiment, a transparent member made of a material having higher transparency than the transparent electrode layer in a facing gap where the transparent electrode layer is opposed between the plurality of first conductive type protruding semiconductors. Is filled.
　この実施形態では、上記複数の第１導電型の突起状半導体の間の隙間を一般的に透明性の低い透明電極層で埋めてしまわずに、上記透明電極層よりも透明性が高い透明部材を上記対向隙間に充填しているので、発光素子の発光効率を向上させることができる。 In this embodiment, a transparent member having higher transparency than the transparent electrode layer without filling the gaps between the plurality of first conductive type protruding semiconductors with a transparent electrode layer having generally low transparency. Is filled in the facing gap, so that the light emission efficiency of the light emitting element can be improved.
　また、この発明の発光素子の製造方法は、第１の基板の一部または全部をなす第１導電型の半導体層の表面にマスク層をパターニングする工程と、
　上記マスク層をマスクとして上記半導体層を非等方的にエッチングして複数の第１導電型の突起状半導体を形成する半導体コア形成工程と、
　上記第１導電型の突起状半導体の表面を覆うように第２導電型の半導体層を形成する半導体シェル形成工程と
を備えた。 Further, the method for manufacturing a light-emitting element according to the present invention includes a step of patterning a mask layer on the surface of a first conductivity type semiconductor layer forming part or all of the first substrate;
Forming a plurality of first-conductivity-type protruding semiconductors by anisotropically etching the semiconductor layer using the mask layer as a mask;
A semiconductor shell forming step of forming a second conductivity type semiconductor layer so as to cover the surface of the first conductivity type protruding semiconductor.
　この発明の製造方法によれば、製造した発光素子は、上記第１導電型の突起状半導体を覆うように上記第２導電型の半導体層が形成されるので、上記突起状半導体のほぼ全側面を発光させることが可能になる。それゆえ、上記発光素子によれば、平面状の発光層を持つ発光ダイオードチップに比べて、上記第１の基板の単位面積当たりの発光量を増大することができる。また、この製造方法によれば、上記突起状半導体は第１導電型の半導体からなるから、上記突起状半導体に第１導電型を与える不純物量を増やすことにより容易に低抵抗化できる。それゆえ、上記突起状半導体の長さを長くしても、上記突起状半導体の抵抗の増大が抑えられ、上記突起状半導体の根元部から先端部にわたって一様に発光させることができる。したがって、上記第１の基板の単位面積当たりの発光量をさらに増やすことが可能となる。さらに、この製造方法によれば、上記突起状半導体をフォトリソグラフィ工程と非等方的なエッチングにより形成できるので、狙い通りの良好な形状の突起状半導体を得ることができて歩留まりを向上させることができる。 According to the manufacturing method of the present invention, in the manufactured light emitting element, since the second conductive type semiconductor layer is formed so as to cover the first conductive type protruding semiconductor, almost all side surfaces of the protruding semiconductor are formed. Can be emitted. Therefore, according to the light emitting element, it is possible to increase the light emission amount per unit area of the first substrate as compared with a light emitting diode chip having a planar light emitting layer. Further, according to this manufacturing method, since the protruding semiconductor is made of a first conductivity type semiconductor, the resistance can be easily reduced by increasing the amount of impurities that give the first conductivity type to the protruding semiconductor. Therefore, even if the length of the protruding semiconductor is increased, an increase in the resistance of the protruding semiconductor is suppressed, and light can be emitted uniformly from the root portion to the tip portion of the protruding semiconductor. Therefore, it is possible to further increase the light emission amount per unit area of the first substrate. Furthermore, according to this manufacturing method, since the protruding semiconductor can be formed by anisotropic etching with the photolithography process, a protruding semiconductor having a favorable shape can be obtained and the yield can be improved. Can do.
　また、一実施形態の発光素子の製造方法は、上記半導体コア形成工程の後であって、上記半導体シェル形成工程の前に、上記第１導電型の突起状半導体をアニールする結晶欠陥回復工程を行う。 The method of manufacturing a light emitting device according to an embodiment includes a crystal defect recovery step of annealing the first conductive type protruding semiconductor after the semiconductor core formation step and before the semiconductor shell formation step. Do.
　この実施形態によれば、上記アニールによる結晶欠陥回復工程によって、上記突起状半導体の結晶欠陥密度を減らして結晶性を向上することができる。したがって、その後に行われる半導体シェル形成工程において、第２導電型の半導体層の結晶性も向上するため、発光素子の発光効率を向上することができる。 According to this embodiment, the crystal defect density of the protruding semiconductor can be reduced and the crystallinity can be improved by the crystal defect recovery step by the annealing. Accordingly, in the subsequent semiconductor shell formation step, the crystallinity of the second conductivity type semiconductor layer is also improved, so that the light emission efficiency of the light emitting element can be improved.
　また、一実施形態の発光素子の製造方法は、上記半導体コア形成工程の後であって、上記シェル形成工程の前に、ウェットエッチングにより上記第１導電型の突起状半導体の一部をエッチングする結晶欠陥除去工程を行う。 Also, in one embodiment of the method for manufacturing a light emitting device, after the semiconductor core formation step and before the shell formation step, a part of the first conductive type protruding semiconductor is etched by wet etching. A crystal defect removal step is performed.
　この実施形態によれば、上記エッチングによる結晶欠陥除去工程によって、上記突起状半導体の結晶欠陥密度を減らして結晶性を向上することができる。したがって、その後に行われる半導体シェル形成工程において、第２導電型の半導体層の結晶性も向上するため、発光素子の発光効率を向上することができる。 According to the present embodiment, the crystal defect density of the protruding semiconductor can be reduced and the crystallinity can be improved by the crystal defect removal step by the etching. Accordingly, in the subsequent semiconductor shell formation step, the crystallinity of the second conductivity type semiconductor layer is also improved, so that the light emission efficiency of the light emitting element can be improved.
　また、一実施形態の発光素子の製造方法は、上記半導体コア形成工程の後であって、上記シェル形成工程の前に、ウェットエッチングにより上記第１導電型の突起状半導体の一部をエッチングする結晶欠陥除去工程と、
　上記半導体コア形成工程の後であって、上記半導体シェル形成工程の前に、上記第１導電型の突起状半導体をアニールする結晶欠陥回復工程と
を、上記結晶欠陥除去工程、上記結晶欠陥回復工程の順に行なう。 Also, in one embodiment of the method for manufacturing a light emitting device, after the semiconductor core formation step and before the shell formation step, a part of the first conductive type protruding semiconductor is etched by wet etching. A crystal defect removal step;
After the semiconductor core formation step and before the semiconductor shell formation step, the crystal defect recovery step of annealing the first conductive type protruding semiconductor is the crystal defect removal step, the crystal defect recovery step In order.
　この実施形態によれば、上記ウェットエッチングによる結晶欠陥除去工程と、上記アニールによる結晶欠陥回復工程の両方を、この順で行なうことにより、より効果的に上記突起状半導体の結晶性を向上させることができる。 According to this embodiment, by performing both the crystal defect removal step by wet etching and the crystal defect recovery step by annealing in this order, the crystallinity of the protruding semiconductor can be more effectively improved. Can do.
　また、この発明の発光素子の製造方法は、第１の基板の一部または全部をなす第１導電型の半導体層の表面にマスク層をパターニングする工程と、
　上記マスク層をマスクとして上記半導体層を非等方的にエッチングして複数の第１導電型の突起状半導体を形成する半導体コア形成工程と、
　上記第１導電型の突起状半導体の表面を覆うように第２導電型の半導体層を形成する半導体シェル形成工程と、
　上記第２導電型の半導体層で覆われた上記第１導電型の突起状半導体を上記第１の基板から切り離す発光素子切り離し工程と
を備えた。 Further, the method for manufacturing a light-emitting element according to the present invention includes a step of patterning a mask layer on the surface of a first conductivity type semiconductor layer forming part or all of the first substrate;
Forming a plurality of first-conductivity-type protruding semiconductors by anisotropically etching the semiconductor layer using the mask layer as a mask;
A semiconductor shell forming step of forming a second conductive type semiconductor layer so as to cover the surface of the first conductive type protruding semiconductor;
A light emitting element separating step of separating the first conductive type protruding semiconductor covered with the second conductive type semiconductor layer from the first substrate.
　この発明の製造方法によれば、上記発光素子切り離し工程でもって、上記第１導電型の半導体層を加工して形成された突起状半導体による突起状の発光素子は、最終的にはそれぞれが独立した発光素子となる。したがって、それぞれの発光素子を個別自在に利用可能という点で、上記突起状の発光素子の利用方法を多様化し、利用価値を高めることができる。例えば、切り離した発光素子を所望の密度で所望の個数配置することができる。この場合、例えば、微細な発光素子を大面積の基板上に多数再配列して面発光装置を構成することができる。また、熱の発生密度を低くして高い信頼性や長寿命を実現することもできる。また、この製造方法により、上記第１導電型の突起状半導体を覆うように上記第２導電型の半導体層が形成されるので、上記突起状半導体のほぼ全側面を発光させることが可能となる。それゆえ、基板(第１の基板)から総発光量が大きな多数の発光素子を得ることができる。また、この製造方法によれば、上記突起状半導体は第１導電型の半導体からなるから、上記突起状半導体に第１導電型を与える不純物量を増やすことにより容易に低抵抗化できる。それゆえ、突起状半導体の長さを長くしても、上記突起状半導体の抵抗の増大が抑えられ、上記突起状半導体の根元部から先端部にわたって一様に発光させることができる。さらに、この製造方法によれば、上記突起状半導体をフォトリソグラフィ工程と非等方的なエッチングにより形成できるので、狙い通りの良好な形状の突起状半導体を得ることができ、ひいては所望の良好な形状の発光素子を得ることができるので、発光素子の歩留まりを向上させることができる。 According to the manufacturing method of the present invention, the protruding light emitting elements formed by the protruding semiconductor formed by processing the semiconductor layer of the first conductivity type in the step of separating the light emitting elements are finally independent of each other. It becomes the light emitting element which became. Therefore, the use method of the projection-like light emitting elements can be diversified and the utility value can be increased in that each light emitting element can be used individually. For example, a desired number of separated light emitting elements can be arranged at a desired density. In this case, for example, a surface light-emitting device can be configured by rearranging a large number of fine light-emitting elements on a large-area substrate. In addition, the heat generation density can be lowered to achieve high reliability and long life. In addition, since the second conductive type semiconductor layer is formed so as to cover the first conductive type protruding semiconductor by this manufacturing method, almost all side surfaces of the protruding semiconductor can be made to emit light. . Therefore, a large number of light emitting elements having a large total light emission amount can be obtained from the substrate (first substrate). Further, according to this manufacturing method, since the protruding semiconductor is made of a first conductivity type semiconductor, the resistance can be easily reduced by increasing the amount of impurities that give the first conductivity type to the protruding semiconductor. Therefore, even if the length of the protruding semiconductor is increased, an increase in the resistance of the protruding semiconductor is suppressed, and light can be emitted uniformly from the root portion to the tip portion of the protruding semiconductor. Furthermore, according to this manufacturing method, since the protruding semiconductor can be formed by anisotropic etching with a photolithography process, a protruding semiconductor having a good shape as intended can be obtained, and consequently desired good Since a light-emitting element having a shape can be obtained, the yield of the light-emitting elements can be improved.
　また、一実施形態の発光素子の製造方法では、上記半導体コア形成工程と上記半導体シェル形成工程との間で、上記第１導電型の突起状半導体の表面を覆うように活性層を形成する。 In the light emitting device manufacturing method according to an embodiment, an active layer is formed between the semiconductor core formation step and the semiconductor shell formation step so as to cover the surface of the first conductive type protruding semiconductor.
　この実施形態によれば、活性層で発光効率を上げることができる。 According to this embodiment, the luminous efficiency can be increased in the active layer.
　また、一実施形態の発光素子の製造方法では、上記半導体シェル形成工程の後に、上記第２導電型の半導体層を覆うように透明電極層を形成する。 In the light emitting device manufacturing method of one embodiment, a transparent electrode layer is formed so as to cover the semiconductor layer of the second conductivity type after the semiconductor shell forming step.
　この実施形態によれば、上記透明電極層は上記突起状半導体から放射された光を透過しつつ、上記第２導電型の半導体層で電圧降下を起こすことを防ぐことができる。したがって、上記突起状半導体の全体にわたって一様に発光させることができる。 According to this embodiment, the transparent electrode layer can prevent the voltage drop in the second conductive type semiconductor layer while transmitting the light emitted from the protruding semiconductor. Therefore, light can be emitted uniformly over the entire protruding semiconductor.
　また、この発明の発光装置の製造方法では、第１の基板の一部または全部をなす第１導電型の半導体層の表面にマスク層をパターニングする工程と、
　上記マスク層をマスクとして上記半導体層を非等方的にエッチングして複数の第１導電型の突起状半導体を形成する半導体コア形成工程と、
　上記第１導電型の突起状半導体の表面を覆うように第２導電型の半導体層を形成する半導体シェル形成工程と、
　上記第２導電型の半導体層で覆われた上記第１導電型の突起状半導体を上記第１の基板から切り離して発光素子を得る発光素子切り離し工程と、
　上記発光素子を第２の基板上に配置する発光素子配置工程と、
　上記第２の基板上に配置された発光素子に通電するための配線を行なう発光素子配線工程とを備えた。 Further, in the method for manufacturing a light emitting device of the present invention, a step of patterning a mask layer on the surface of the first conductivity type semiconductor layer forming part or all of the first substrate;
Forming a plurality of first-conductivity-type protruding semiconductors by anisotropically etching the semiconductor layer using the mask layer as a mask;
A semiconductor shell forming step of forming a second conductive type semiconductor layer so as to cover the surface of the first conductive type protruding semiconductor;
A light emitting element separating step of separating the first conductive type protruding semiconductor covered with the second conductive type semiconductor layer from the first substrate to obtain a light emitting element;
A light emitting element disposing step of disposing the light emitting element on the second substrate;
And a light emitting element wiring step of performing wiring for energizing the light emitting elements disposed on the second substrate.
　この発明の製造方法によれば、上記発光素子切り離し工程で切り離した発光素子を上記第２の基板上に所望の密度で所望の個数配置することができる。したがって、例えば、微細な発光素子を大面積の基板上に多数再配列して面発光装置を構成することができる。また、熱の発生密度を低くして高い信頼性や長寿命を実現することもできる。 According to the manufacturing method of the present invention, a desired number of light emitting elements separated in the light emitting element separating step can be arranged on the second substrate with a desired density. Therefore, for example, a surface light-emitting device can be configured by rearranging a large number of fine light-emitting elements on a large-area substrate. In addition, the heat generation density can be lowered to achieve high reliability and long life.
　また、一実施形態の照明装置は、上記発光装置の製造方法により製造された発光装置を備えた。 Moreover, the illuminating device of one Embodiment was equipped with the light-emitting device manufactured by the manufacturing method of the said light-emitting device.
　この実施形態の照明装置によれば、本発明の発光装置の製造方法により製造された発光装置を備えているので、発光効率が良く信頼性の高い照明装置が得られる。 According to the lighting device of this embodiment, since the light emitting device manufactured by the method for manufacturing a light emitting device of the present invention is provided, a lighting device with high luminous efficiency and high reliability can be obtained.
　また、一実施形態の液晶バックライトは、上記発光装置の製造方法により製造された発光装置を備えた。 In addition, the liquid crystal backlight of one embodiment includes a light emitting device manufactured by the method for manufacturing a light emitting device.
　この実施形態の液晶バックライトによれば、本発明の発光装置の製造方法により製造された発光装置を備えているので、放熱効率の高いバックライトが得られる。 According to the liquid crystal backlight of this embodiment, since the light emitting device manufactured by the method for manufacturing a light emitting device of the present invention is provided, a backlight with high heat dissipation efficiency can be obtained.
　また、この発明の表示装置の製造方法は、第１の基板の一部または全部をなす第１導電型の半導体層の表面にマスク層をパターニングする工程と、
　上記マスク層をマスクとして上記半導体層を非等方的にエッチングして複数の第１導電型の突起状半導体を形成する半導体コア形成工程と、
　上記第１導電型の突起状半導体の表面を覆うように第２導電型の半導体層を形成する半導体シェル形成工程と、
　上記第２導電型の半導体層で覆われた上記第１導電型の突起状半導体を上記第１の基板から切り離して発光素子を得る発光素子切り離し工程と、
　上記発光素子を第２の基板上の画素位置に対応して配置する発光素子配置工程と、
　上記第２の基板上の画素位置に対応して配置された発光素子に通電するための配線を行なう発光素子配線工程とを備えた。 According to another aspect of the present invention, there is provided a method for manufacturing a display device, comprising: patterning a mask layer on a surface of a first conductivity type semiconductor layer that forms part or all of a first substrate;
Forming a plurality of first-conductivity-type protruding semiconductors by anisotropically etching the semiconductor layer using the mask layer as a mask;
A semiconductor shell forming step of forming a second conductive type semiconductor layer so as to cover the surface of the first conductive type protruding semiconductor;
A light emitting element separating step of separating the first conductive type protruding semiconductor covered with the second conductive type semiconductor layer from the first substrate to obtain a light emitting element;
A light emitting element arranging step of arranging the light emitting element corresponding to a pixel position on the second substrate;
And a light emitting element wiring step for performing wiring for energizing the light emitting elements arranged corresponding to the pixel positions on the second substrate.
　この発明の表示装置の製造方法によれば、上記第１導電型の突起状半導体の表面を覆うように第２導電型の半導体層が形成するので、上記突起状半導体の材料としての上記第１の基板の単位面積当たりの発光面積を非常に大きくすることができる。すなわち、発光素子として機能する上記第２導電型の半導体層で覆われた上記第１導電型の突起状半導体の製造コストを大きく低減することができる。そして、上記第２導電型の半導体層で覆われた上記第１導電型の突起状半導体は上記第１の基板から切り離され、表示装置のパネルとなる上記第２の基板上に配置され、さらに配線されて表示装置が製造される。この表示装置の画素数は、例えば約６００万となるので、その画素毎に発光素子を使用する場合は、発光素子のコストは極めて重要である。したがって、この製造方法によって表示装置を製造することにより、表示装置の製造コストを低減できる。 According to the method for manufacturing a display device of the present invention, since the second conductive type semiconductor layer is formed so as to cover the surface of the first conductive type protruding semiconductor, the first conductive material as the protruding semiconductor material is formed. The light emission area per unit area of the substrate can be greatly increased. That is, it is possible to greatly reduce the manufacturing cost of the first conductive type protruding semiconductor covered with the second conductive type semiconductor layer functioning as a light emitting element. The protruding semiconductor of the first conductivity type covered with the semiconductor layer of the second conductivity type is separated from the first substrate and disposed on the second substrate serving as a panel of the display device. The display device is manufactured by wiring. Since the number of pixels of this display device is about 6 million, for example, when a light emitting element is used for each pixel, the cost of the light emitting element is extremely important. Therefore, the manufacturing cost of the display device can be reduced by manufacturing the display device by this manufacturing method.
　また、一実施形態の表示装置は、上記表示装置の製造方法により製造された。 Further, the display device of one embodiment is manufactured by the above-described manufacturing method of the display device.
　この実施形態の表示装置によれば、低コストの表示装置が提供される。 According to the display device of this embodiment, a low-cost display device is provided.
　また、この発明のダイオードは、コア部と、
　上記コア部を覆うように形成された第１導電型の半導体層と、
　上記第１導電型の半導体層を覆う第２導電型の半導体層と
を備え、
　上記コア部の材質と上記第１導電型の半導体層の材質とが互いに異なっていることを特徴としている。 The diode of the present invention includes a core portion,
A first conductivity type semiconductor layer formed so as to cover the core portion;
A second conductivity type semiconductor layer covering the first conductivity type semiconductor layer,
The material of the core part and the material of the semiconductor layer of the first conductivity type are different from each other.
　この発明のダイオードによれば、ダイオードの２極の役割は、上記第１導電型の半導体層と上記第２導電型の半導体層とが担うので、上記コア部の材質として所望の材質を選択できる。したがって、製造コストの増加や製造歩留まりの低下を招くことなく、上記コア部に所望の特性(屈折率,熱伝導率,電気伝導率等)を持たせることが可能になる。 According to the diode of the present invention, since the first conductive type semiconductor layer and the second conductive type semiconductor layer play a role of the two poles of the diode, a desired material can be selected as the material of the core portion. . Therefore, it is possible to give the core part desired properties (refractive index, thermal conductivity, electrical conductivity, etc.) without increasing the manufacturing cost and reducing the manufacturing yield.
　また、一実施形態では、上記コア部の屈折率が上記第１導電型の半導体層の屈折率よりも大きいと共に発光ダイオードである。 In one embodiment, the refractive index of the core portion is larger than the refractive index of the first conductive type semiconductor layer, and the light emitting diode is provided.
　この実施形態によれば、発生した光を上記コア部へ導波して上記コア部で強く発光させることができる。 According to this embodiment, the generated light can be guided to the core part, and the core part can emit light strongly.
　また、一実施形態では、上記コア部の屈折率が上記第１導電型の半導体層の屈折率よりも大きいと共に光電効果を有する。 In one embodiment, the refractive index of the core portion is larger than the refractive index of the first conductive type semiconductor layer and has a photoelectric effect.
　この実施形態によれば、光をダイオード外部に逃がしにくく、光の取り込み効果を高めることができ、光電効果を高めることができる。 According to this embodiment, it is difficult for light to escape to the outside of the diode, the light capturing effect can be enhanced, and the photoelectric effect can be enhanced.
　また、一実施形態のダイオードでは、上記コア部の屈折率が上記第１導電型の半導体層の屈折率よりも小さいと共に発光ダイオードである。 Further, in the diode of one embodiment, the refractive index of the core portion is smaller than the refractive index of the first conductive type semiconductor layer, and the light emitting diode.
　この実施形態によれば、発生した光が上記コア部内に入りにくく上記コア部表面で反射し易いので、上記第１導電型の半導体層から上記第２導電型の半導体層に向かって光を外部へ取り出すことができる。 According to this embodiment, the generated light is difficult to enter the core part and is easily reflected on the surface of the core part. Therefore, the light is externally transmitted from the first conductive type semiconductor layer to the second conductive type semiconductor layer. Can be taken out.
　また、一実施形態のダイオードでは、上記コア部の熱伝導率が上記第１導電型の半導体層の熱伝導率よりも大きいと共に発光ダイオードである。 Further, in the diode according to an embodiment, the thermal conductivity of the core portion is larger than that of the first conductive type semiconductor layer, and the light emitting diode.
　この実施形態によれば、上記第１導電型の半導体層から上記コア部へ熱が拡散するから、放熱が容易になり、高温による発光効率の低下を回避できる。 According to this embodiment, since heat diffuses from the first conductive type semiconductor layer to the core portion, heat dissipation is facilitated, and a decrease in luminous efficiency due to high temperature can be avoided.
　また、一実施形態のダイオードでは、上記コア部の熱伝導率が上記第１導電型の半導体層の熱伝導率よりも大きいと共に光電効果を有する。 Also, in the diode of one embodiment, the thermal conductivity of the core portion is larger than the thermal conductivity of the first conductive type semiconductor layer and has a photoelectric effect.
　この実施形態によれば、上記第１導電型の半導体層から上記コア部へ熱が拡散するから、放熱が容易になり、高温による光電変換効率の低下を回避できる。 According to this embodiment, since heat is diffused from the first conductive type semiconductor layer to the core portion, heat dissipation is facilitated, and a decrease in photoelectric conversion efficiency due to high temperature can be avoided.
　また、一実施形態では、上記コア部の電気伝導率が上記第１導電型の半導体層の電気伝導率よりも大きいと共に発光ダイオードである。 In one embodiment, the electrical conductivity of the core is greater than the electrical conductivity of the first conductivity type semiconductor layer, and the LED is a light emitting diode.
　この実施形態によれば、上記コア部の電気抵抗を小さくして上記コア部から上記第１導電型の半導体層へ電流を流し易くなるので、損失を抑制できて、効率良く発光できる。 According to this embodiment, since the electric resistance of the core portion is reduced and current can easily flow from the core portion to the first conductivity type semiconductor layer, loss can be suppressed and light can be emitted efficiently.
　また、一実施形態では、上記コア部の電気伝導率が上記第１導電型の半導体層の電気伝導率よりも大きいと共に光電効果を有する。 In one embodiment, the electric conductivity of the core portion is larger than the electric conductivity of the first conductive type semiconductor layer and has a photoelectric effect.
　この実施形態によれば、上記コア部の電気抵抗を小さくして上記第１導電型の半導体層から上記コア部へ電流を流し易くなるので、損失を抑制できて、効率良く発電できる。 According to this embodiment, since the electric resistance of the core portion is reduced and a current is easily passed from the first conductive type semiconductor layer to the core portion, loss can be suppressed and power can be generated efficiently.
　また、一実施形態のダイオードでは、上記コア部がシリコンで作製されている。 In the diode of one embodiment, the core part is made of silicon.
　この実施形態によれば、シリコン製のコア部は形成プロセスが確立されているので、所望の良形状の素子が得られる。 According to this embodiment, since the formation process of the silicon core is established, an element having a desired good shape can be obtained.
　また、一実施形態のダイオードでは、基板上に上記コア部,上記第１導電型の半導体層および上記第２導電型の半導体層を形成してから、上記基板から上記コア部,上記第１導電型の半導体層および上記第２導電型の半導体層を切り離すことで作製された。 In one embodiment, the core, the first conductivity type semiconductor layer, and the second conductivity type semiconductor layer are formed on the substrate, and then the core portion and the first conductivity are formed from the substrate. It was produced by separating the semiconductor layer of the mold and the semiconductor layer of the second conductivity type.
　この実施形態のダイオードによれば、上記基板から切り離されているので、他の基板への実装が容易になる。 According to the diode of this embodiment, since it is separated from the substrate, it can be easily mounted on another substrate.
　また、一実施形態のダイオードの製造方法では、基板上にコア部を形成し、
　上記コア部を覆うように第１導電型の半導体層を形成し、
　上記第１導電型の半導体層を覆うように第２導電型の半導体層を形成し、
　上記コア部の材質と上記第１導電型の半導体層の材質とが互いに異なっている。 In one embodiment of the diode manufacturing method, the core portion is formed on the substrate,
Forming a first conductivity type semiconductor layer so as to cover the core portion;
Forming a second conductivity type semiconductor layer so as to cover the first conductivity type semiconductor layer;
The material of the core part and the material of the first conductivity type semiconductor layer are different from each other.
　この実施形態のダイオードの製造方法によれば、上記第１導電型の半導体層と上記第２導電型の半導体層とがダイオードの２極の役割を担わせて、上記コア部の材質として所望の材質を選択でき、上記コア部に所望の特性を持たせることが可能なダイオードを製造できる。 According to the manufacturing method of the diode of this embodiment, the first conductive type semiconductor layer and the second conductive type semiconductor layer play a role of two poles of the diode, and a desired material for the core portion is obtained. A diode can be manufactured in which the material can be selected and the core portion can have desired characteristics.
　また、一実施形態の照明装置では、上記実施形態の発光ダイオードを備えた。 In addition, the lighting device of one embodiment includes the light emitting diode of the above embodiment.
　この実施形態の照明装置によれば、製造コストの増加や製造歩留まりの低下を招くことなく、上記発光ダイオードのコア部の特性(屈折率,熱伝導率,電気伝導率)を所望に設定でき、照明の指向性の設定が容易になる、照明の効率向上を図れるといったメリットが得られる。 According to the lighting device of this embodiment, the characteristics (refractive index, thermal conductivity, electrical conductivity) of the core portion of the light emitting diode can be set as desired without causing an increase in manufacturing cost and a decrease in manufacturing yield. Advantages such as easy setting of the directivity of illumination and improvement of illumination efficiency can be obtained.
　また、一実施形態のバックライトでは、上記実施形態の発光ダイオードを備えた。 Moreover, the backlight according to one embodiment includes the light emitting diode according to the above embodiment.
　この実施形態のバックライトによれば、上記発光ダイオードのコア部の特性(屈折率,熱伝導率,電気伝導率)を所望に設定でき、バックライトの指向性の設定が容易になる、バックライトの効率向上を図れるといったメリットが得られる。 According to the backlight of this embodiment, the characteristics (refractive index, thermal conductivity, electrical conductivity) of the core portion of the light emitting diode can be set as desired, and the directivity of the backlight can be easily set. The merit that improvement of efficiency can be achieved is obtained.
　また、一実施形態の表示装置では、上記実施形態の発光ダイオードを備えた。 In addition, the display device of one embodiment includes the light emitting diode of the above embodiment.
　この実施形態の表示装置によれば、上記発光ダイオードのコア部の特性(屈折率,熱伝導率,電気伝導率)を所望に設定でき、表示装置の指向性の設定が容易になる、表示装置の効率向上を図れるといったメリットが得られる。 According to the display device of this embodiment, the characteristics (refractive index, thermal conductivity, electrical conductivity) of the core portion of the light emitting diode can be set as desired, and the directivity of the display device can be easily set. The merit that improvement of efficiency can be achieved is obtained.
　また、一実施形態の光検出器では、上記実施形態の光電効果を有するダイオードを備えた。 Also, the photodetector of one embodiment includes the diode having the photoelectric effect of the above embodiment.
　この実施形態の光検出器によれば、製造コストの増加や製造歩留まりの低下を招くことなく、上記光電効果を有するダイオードのコア部の特性(屈折率,熱伝導率,電気伝導率)を所望に設定できる。したがって、光の取り込み効果の向上、放熱性の向上、損失の抑制などが可能になり、光電変換効率を高めて、光検出性能を向上できる。 According to the photodetector of this embodiment, desired characteristics (refractive index, thermal conductivity, electrical conductivity) of the core portion of the diode having the photoelectric effect can be obtained without causing an increase in manufacturing cost or a decrease in manufacturing yield. Can be set. Therefore, it is possible to improve the light capturing effect, improve the heat dissipation, suppress the loss, etc., increase the photoelectric conversion efficiency, and improve the light detection performance.
　また、一実施形態の太陽電池では、上記実施形態の光電効果を有するダイオードを備えた。 In addition, the solar cell of one embodiment includes the diode having the photoelectric effect of the above embodiment.
　この実施形態の太陽電池によれば、製造コストの増加や製造歩留まりの低下を招くことなく、上記光電効果を有するダイオードのコア部の特性(屈折率,熱伝導率,電気伝導率)を所望に設定できる。したがって、光の取り込み効果の向上、放熱性の向上、損失の抑制などが可能になり、効率良く発電できる。 According to the solar cell of this embodiment, the characteristics (refractive index, thermal conductivity, electric conductivity) of the diode core having the photoelectric effect are desired without causing an increase in manufacturing cost or a decrease in manufacturing yield. Can be set. Therefore, it is possible to improve the light capturing effect, improve the heat dissipation, suppress the loss, and generate power efficiently.
　この発明の発光素子によれば、突起状半導体が第１導電型の半導体からなるから、上記突起状半導体に第１導電型を与える不純物量を増やすことにより上記突起状半導体を容易に低抵抗化できる。それゆえ、上記突起状半導体の長さを長くしても、上記突起状半導体の抵抗の増大が抑えられ、上記突起状半導体の根元部から先端部にわたって一様に発光させることができる。したがって、上記第１導電型の半導体基部の単位面積当たりの発光量をさらに増やすことが可能となる。 According to the light emitting device of the present invention, since the protruding semiconductor is made of the first conductivity type semiconductor, the resistance of the protruding semiconductor can be easily reduced by increasing the amount of impurities that give the first conductivity type to the protruding semiconductor. it can. Therefore, even if the length of the protruding semiconductor is increased, an increase in the resistance of the protruding semiconductor is suppressed, and light can be emitted uniformly from the root portion to the tip portion of the protruding semiconductor. Therefore, it is possible to further increase the light emission amount per unit area of the first conductivity type semiconductor base.
　また、この発明のダイオードによれば、ダイオードの２極の役割は、第１導電型の半導体層と第２導電型の半導体層とが担うので、コア部の材質として所望の材質を選択できる。したがって、製造コストの増加や製造歩留まりの低下を招くことなく、上記コア部に所望の特性(屈折率,熱伝導率,電気伝導率等)を持たせることが可能になる。 Further, according to the diode of the present invention, since the first conductive type semiconductor layer and the second conductive type semiconductor layer play the role of the two poles of the diode, a desired material can be selected as the material of the core portion. Therefore, it is possible to give the core part desired properties (refractive index, thermal conductivity, electrical conductivity, etc.) without increasing the manufacturing cost and reducing the manufacturing yield.
この発明の発光素子の第１実施形態の断面図である。It is sectional drawing of 1st Embodiment of the light emitting element of this invention. 上記第１実施形態の模式的な平面図である。It is a schematic plan view of the first embodiment. 上記第１実施形態の発光素子の製造方法を説明する図である。It is a figure explaining the manufacturing method of the light emitting element of the said 1st Embodiment. 上記第１実施形態の発光素子の製造方法を説明する図である。It is a figure explaining the manufacturing method of the light emitting element of the said 1st Embodiment. 上記第１実施形態の発光素子の製造方法を説明する平面図である。It is a top view explaining the manufacturing method of the light emitting element of the said 1st Embodiment. 上記第１実施形態の発光素子の製造方法を説明する図である。It is a figure explaining the manufacturing method of the light emitting element of the said 1st Embodiment. 上記第１実施形態の発光素子の製造方法を説明する図である。It is a figure explaining the manufacturing method of the light emitting element of the said 1st Embodiment. 上記第１実施形態の発光素子の製造方法を説明する図である。It is a figure explaining the manufacturing method of the light emitting element of the said 1st Embodiment. この発明の発光素子の第２実施形態の断面図である。It is sectional drawing of 2nd Embodiment of the light emitting element of this invention. 上記第２実施形態の発光素子を上から見た概略平面図である。It is the schematic plan view which looked at the light emitting element of the said 2nd Embodiment from the top. 上記第２実施形態の発光素子の製造方法を説明する概略平面図である。It is a schematic plan view explaining the manufacturing method of the light emitting element of the said 2nd Embodiment. この発明の第３実施形態の発光素子,発光装置の製造方法を説明する図である。It is a figure explaining the manufacturing method of the light emitting element of 3rd Embodiment of this invention, and a light-emitting device. 上記第３実施形態の製造方法を説明する図である。It is a figure explaining the manufacturing method of the said 3rd Embodiment. 上記第３実施形態の製造方法を説明する図である。It is a figure explaining the manufacturing method of the said 3rd Embodiment. 上記第３実施形態の製造方法を説明する図である。It is a figure explaining the manufacturing method of the said 3rd Embodiment. 上記第３実施形態の製造方法において電極間に印加する電圧波形を示す波形図である。It is a wave form diagram which shows the voltage waveform applied between electrodes in the manufacturing method of the said 3rd Embodiment. 上記第３実施形態の製造方法を説明する図である。It is a figure explaining the manufacturing method of the said 3rd Embodiment. 上記第３実施形態の製造方法を説明する図である。It is a figure explaining the manufacturing method of the said 3rd Embodiment. 上記第３実施形態の製造方法を説明する図である。It is a figure explaining the manufacturing method of the said 3rd Embodiment. 上記第３実施形態の製造方法を説明する図である。It is a figure explaining the manufacturing method of the said 3rd Embodiment. 上記第３実施形態の製造方法を説明する図である。It is a figure explaining the manufacturing method of the said 3rd Embodiment. この発明の第４実施形態としての照明装置の側面図である。It is a side view of the illuminating device as 4th Embodiment of this invention. 上記照明装置の発光部の側面図である。It is a side view of the light emission part of the said illuminating device. 上記照明装置の発光部の上面図である。It is a top view of the light emission part of the said illuminating device. 上記発光部の発光装置の平面図である。It is a top view of the light-emitting device of the said light emission part. この発明の第５実施形態としてのバックライトを示す平面図である。It is a top view which shows the backlight as 5th Embodiment of this invention. この発明の第６実施形態としてのＬＥＤディスプレイの１画素の回路を示す回路図である。It is a circuit diagram which shows the circuit of 1 pixel of the LED display as 6th Embodiment of this invention. この発明のダイオードの第７実施形態としての発光ダイオードの斜視図である。It is a perspective view of the light emitting diode as 7th Embodiment of the diode of this invention. 上記第７実施形態の発光ダイオードの断面図である。It is sectional drawing of the light emitting diode of the said 7th Embodiment. 上記第７実施形態の発光ダイオードにおいて熱が伝わる様子を模式的に示す断面図である。It is sectional drawing which shows typically a mode that heat | fever is transmitted in the light emitting diode of the said 7th Embodiment. 上記第７実施形態の変形例の発光ダイオードを基板上に立設状態で複数形成した様子を示す断面図である。It is sectional drawing which shows a mode that the light emitting diode of the modification of the said 7th Embodiment was formed in multiple numbers in the standing state on the board | substrate. 上記第７実施形態の発光ダイオードを基板上に立設状態で複数形成した様子を示す断面図である。It is sectional drawing which shows a mode that multiple light emitting diodes of the said 7th Embodiment were formed in the standing state on the board | substrate. 上記第７実施形態の発光ダイオードを基板上に横倒し状態で配置した様子を示す断面図である。It is sectional drawing which shows a mode that the light emitting diode of the said 7th Embodiment was arrange | positioned in the state where it laid down on the board | substrate. 上記第７実施形態のもう１つの変形例の発光ダイオードの斜視図である。It is a perspective view of the light emitting diode of another modification of the said 7th Embodiment. 上記もう１つの変形例の発光ダイオードの断面図である。It is sectional drawing of the light emitting diode of the said another modification. 光検出器や太陽電池をなすと共に上記第７実施形態の変形例の発光ダイオードと同様の構成であるダイオードを基板上に立設状態で複数形成した様子を示す断面図である。It is sectional drawing which shows a mode that two or more diodes which comprise a photodetector and a solar cell and are the structure similar to the light emitting diode of the modification of the said 7th Embodiment were formed in the standing state on the board | substrate. 光検出器や太陽電池をなすと共に上記第７実施形態の発光ダイオードと同様の構成であるダイオードを基板上に立設状態で複数形成した様子を示す断面図である。It is sectional drawing which shows a mode that the diode which is the structure similar to the light emitting diode of the said 7th Embodiment while forming a photodetector and a solar cell was formed in multiple numbers on the board | substrate. 光検出器や太陽電池をなすと共に上記第７実施形態の発光ダイオードと同様の構成であるダイオードを基板上に横倒し状態で配置した様子を示す断面図である。It is sectional drawing which shows a mode that the diode which is the structure similar to the light emitting diode of the said 7th Embodiment while making a photodetector and a solar cell was arrange | positioned on the board | substrate sideways. この発明のダイオードの第８実施形態としての発光ダイオードの斜視図である。It is a perspective view of the light emitting diode as 8th Embodiment of the diode of this invention. 上記第８実施形態の発光ダイオードの断面図である。It is sectional drawing of the light emitting diode of the said 8th Embodiment. 上記第８実施形態の変形例の発光ダイオードを基板上に立設状態で複数形成した様子を示す断面図である。It is sectional drawing which shows a mode that multiple light emitting diodes of the modification of the said 8th Embodiment were formed in the standing state on the board | substrate. 上記第８実施形態の発光ダイオードを基板上に立設状態で複数形成した様子を示す断面図である。It is sectional drawing which shows a mode that multiple light emitting diodes of the said 8th Embodiment were formed in the standing state on the board | substrate. 上記第８実施形態の発光ダイオードを基板上に横倒し状態で配置した様子を示す断面図である。It is sectional drawing which shows a mode that the light emitting diode of the said 8th Embodiment was arrange | positioned in the state lying down on the board | substrate. この発明のダイオードの第９実施形態としての発光ダイオードの斜視図である。It is a perspective view of the light emitting diode as 9th Embodiment of the diode of this invention. 上記第９実施形態の発光ダイオードの電流経路を矢印で示す断面図である。It is sectional drawing which shows the current pathway of the light emitting diode of the said 9th Embodiment with the arrow. 上記第９実施形態の発光ダイオードと同様の構造で光電変換素子(光検出器や太陽電池)を構成した場合の電流経路を矢印で示す断面図である。It is sectional drawing which shows the electric current path | route at the time of comprising a photoelectric conversion element (a photodetector or a solar cell) with the structure similar to the light emitting diode of the said 9th Embodiment with an arrow. 上記第９実施形態の変形例の発光ダイオードを基板上に立設状態で複数形成した様子を示す断面図である。It is sectional drawing which shows a mode that the light emitting diode of the modification of the said 9th Embodiment was formed in multiple numbers in the standing state on the board | substrate. 上記第９実施形態のもう１つの変形例の発光ダイオードを基板上に横倒し状態で配置した様子を示す断面図である。It is sectional drawing which shows a mode that the light emitting diode of another modification of the said 9th Embodiment was arrange | positioned in the state where it laid down on the board | substrate. この発明のダイオードの第１０実施形態としての発光ダイオードの斜視図である。It is a perspective view of the light emitting diode as 10th Embodiment of the diode of this invention. 上記第１０実施形態の発光ダイオードが基板上に立設状態で複数形成されている様子を示す断面図である。It is sectional drawing which shows a mode that the light emitting diode of the said 10th Embodiment is multiply formed in the standing state on the board | substrate. 上記第１０実施形態の変形例としての作製用基板から切り離された発光ダイオードを示す断面図である。It is sectional drawing which shows the light emitting diode cut | disconnected from the board | substrate for preparation as a modification of the said 10th Embodiment. 図３３Ａの切り離された発光ダイオードを実装用基板上に横倒し状態で実装された様子を示す断面図である。FIG. 33B is a cross-sectional view illustrating a state where the separated light emitting diode of FIG. 33A is mounted on the mounting substrate in a laid state. この発明の第１１実施形態としてのダイオードの製造方法の工程断面図である。It is process sectional drawing of the manufacturing method of the diode as 11th Embodiment of this invention. 上記第１１実施形態の工程断面図である。It is process sectional drawing of the said 11th Embodiment. 上記第１１実施形態の工程断面図である。It is process sectional drawing of the said 11th Embodiment. 上記第１１実施形態の工程断面図である。It is process sectional drawing of the said 11th Embodiment. 上記第１１実施形態の工程断面図である。It is process sectional drawing of the said 11th Embodiment. 上記第１１実施形態の工程断面図である。It is process sectional drawing of the said 11th Embodiment. 上記第１１実施形態の工程断面図である。It is process sectional drawing of the said 11th Embodiment. 上記第１１実施形態の工程断面図である。It is process sectional drawing of the said 11th Embodiment. 上記第１１実施形態の工程断面図である。It is process sectional drawing of the said 11th Embodiment. この発明の第１２実施形態の発光ダイオードの断面図である。It is sectional drawing of the light emitting diode of 12th Embodiment of this invention. 上記第１２実施形態の発光ダイオードを実装した発光素子を示す図である。It is a figure which shows the light emitting element which mounted the light emitting diode of the said 12th Embodiment. 図３５Ｂの発光素子を基板上に複数実装した照明装置の平面図である。It is a top view of the illuminating device which mounted the light emitting element of FIG. 35B on the board | substrate in multiple numbers. この発明の第１３実施形態の発光ダイオードの断面図である。It is sectional drawing of the light emitting diode of 13th Embodiment of this invention. 上記第１３実施形態の発光ダイオードを基板上に複数配列した発光素子の模式図である。It is a schematic diagram of the light emitting element which arranged the light emitting diode of the said 13th Embodiment in multiple numbers on the board | substrate. 図３６Ｂの発光素子を支持基板上に複数実装した照明装置の平面図である。It is a top view of the illuminating device which mounted the light emitting element of FIG. 36B on the support substrate in multiple numbers. この発明のダイオードの第１４実施形態としての光電変換素子の断面図である。It is sectional drawing of the photoelectric conversion element as 14th Embodiment of the diode of this invention. 上記第１４実施形態の変形例の断面図である。It is sectional drawing of the modification of the said 14th Embodiment. 上記第１４実施形態のもう１つの変形例の断面図である。It is sectional drawing of another modification of the said 14th Embodiment. 従来の発光素子を示す図である。It is a figure which shows the conventional light emitting element. 従来の発光ダイオードを示す図である。It is a figure which shows the conventional light emitting diode.
　以下、この発明を図示の実施の形態により詳細に説明する。 Hereinafter, the present invention will be described in detail with reference to the illustrated embodiments.
　　　(第１の実施の形態)
　この発明の発光素子の第１実施形態を、図１Ａ,図１Ｂおよび図２～図６を用いて説明する。図１Ａは、この第１実施形態の発光素子の断面図であり、図１Ｂは、この第１実施形態の発光素子を上から見た図であって専ら棒状半導体の位置を示す図であり、図２～図６は、この第１実施形態の発光素子の製造方法を説明する図である。この第１実施形態の発光素子１００は、第１導電型の半導体基部としてのｎ型の半導体層１１３と、このｎ型の半導体層１１３上に形成された複数のｎ型の棒状半導体１２１とこの棒状(突起状)半導体１２１を覆う第２導電型の半導体層としてのｐ型の半導体層１２３とを備えるものである。尚、上記第１導電型の半導体基部として、上記ｎ型の半導体層１１３に替えてｐ型の半導体層を備えてもよい。この場合、上記第２導電型の半導体層として、上記ｐ型の半導体層１２３に替えて、ｎ型の半導体層を備えることとする。すなわち、上記第１導電型の半導体基部をなす半導体層１１３をｐ型とした場合は、上記第２導電型の半導体層をなす半導体層１２３をｎ型とし、半導体層１１３をｎ型とした場合は、半導体層１２３をｐ型とする。以下では、一例として、第１導電型の半導体基部としての半導体層１１３と第１導電型の棒状半導体１２１をｎ型とし、第２導電型の半導体層１２３をｐ型とした場合を説明する。ただし、以下の説明において、ｎ型とｐ型を入れ替えた説明とすることで、第１導電型の半導体基部としての半導体層１１３と第１導電型の棒状半導体１２１をｐ型とし、第２導電型の半導体層１２３をｎ型とした例の説明とすることができる。 (First embodiment)
A first embodiment of the light emitting device of the present invention will be described with reference to FIGS. 1A, 1B and FIGS. FIG. 1A is a cross-sectional view of the light emitting device of the first embodiment, and FIG. 1B is a view of the light emitting device of the first embodiment as viewed from above, and is a diagram exclusively showing the position of the rod-shaped semiconductor, 2 to 6 are views for explaining a method of manufacturing the light emitting device according to the first embodiment. The light emitting device 100 according to the first embodiment includes an n-type semiconductor layer 113 as a first conductivity type semiconductor base, a plurality of n-type rod-shaped semiconductors 121 formed on the n-type semiconductor layer 113, and And a p-type semiconductor layer 123 as a second conductivity type semiconductor layer covering the rod-shaped (projection-shaped) semiconductor 121. As the first conductivity type semiconductor base, a p-type semiconductor layer may be provided instead of the n-type semiconductor layer 113. In this case, an n-type semiconductor layer is provided instead of the p-type semiconductor layer 123 as the second conductivity type semiconductor layer. That is, when the semiconductor layer 113 forming the first conductivity type semiconductor base is p-type, the semiconductor layer 123 forming the second conductivity type semiconductor layer is n-type and the semiconductor layer 113 is n-type. The semiconductor layer 123 is p-type. Hereinafter, as an example, a case where the semiconductor layer 113 as the first conductivity type semiconductor base and the first conductivity type rod-shaped semiconductor 121 are n-type and the second conductivity type semiconductor layer 123 is p-type will be described. However, in the following description, the n-type and the p-type are interchanged so that the semiconductor layer 113 as the first conductive type semiconductor base and the first conductive type rod-shaped semiconductor 121 are set as the p-type and the second conductive type. This can be an explanation of an example in which the n-type semiconductor layer 123 is used.
　この第１実施形態の発光素子１００は、図１Ａおよび図１Ｂに示すように、基板１１１上に第１導電型の半導体基部となるｎ型の半導体層１１３が形成されおり、このｎ型の半導体層１１３上に第１導電型の棒状半導体としてのｎ型の棒状半導体１２１が立設状態で互いに間隔を隔てて複数形成されている。上記ｎ型の棒状半導体１２１およびｎ型の半導体層１１３の表面全面は、活性層１２２で覆われている。また、上記活性層１２２の表面全面はｐ型の半導体層１２３が形成されている。さらには、上記ｐ型の半導体層１２３の表面全面は透明電極層１２４で覆われている。そして、上記複数のｎ型の棒状半導体１２１の間の間隙において上記棒状半導体１２１を覆う活性層１２２を覆う透明電極層１２４が間隙を隔てて対向している。この透明電極層１２４が対向している間隙を、上記透明電極層１２４よりも透明度が高い透明部材１３１で埋めている。 In the light emitting device 100 of the first embodiment, as shown in FIGS. 1A and 1B, an n-type semiconductor layer 113 serving as a first conductivity type semiconductor base is formed on a substrate 111, and this n-type semiconductor is formed. A plurality of n-type rod-shaped semiconductors 121 as first-conductivity-type rod-shaped semiconductors are formed on the layer 113 at intervals from each other. The entire surfaces of the n-type rod-shaped semiconductor 121 and the n-type semiconductor layer 113 are covered with an active layer 122. A p-type semiconductor layer 123 is formed on the entire surface of the active layer 122. Further, the entire surface of the p-type semiconductor layer 123 is covered with a transparent electrode layer 124. A transparent electrode layer 124 covering the active layer 122 covering the rod-shaped semiconductor 121 is opposed to the gap between the plurality of n-type rod-shaped semiconductors 121 with a gap therebetween. The gap facing the transparent electrode layer 124 is filled with a transparent member 131 having a higher transparency than the transparent electrode layer 124.
　この透明部材１３１は、上記棒状半導体１２１の上部では上記透明電極層１２４は上記透明部材１３１で覆われていなく、上部電極１４１で覆われている。すなわち、図１Ａに示すように、上部電極１４１は、透明電極層１２４が対向している間隙を埋める透明部材１３１上と、上記棒状半導体１２１の上部を覆う透明電極層１２４上とに形成されている。これにより、透明電極層１２４は、上部電極１４１に電気的に接続されている。 In the transparent member 131, the transparent electrode layer 124 is not covered with the transparent member 131, but is covered with the upper electrode 141 above the rod-shaped semiconductor 121. That is, as shown in FIG. 1A, the upper electrode 141 is formed on the transparent member 131 that fills the gap where the transparent electrode layer 124 faces and the transparent electrode layer 124 that covers the upper portion of the rod-shaped semiconductor 121. Yes. Thereby, the transparent electrode layer 124 is electrically connected to the upper electrode 141.
　上記基板１１１は、サファイア等の絶縁体、シリコン等の半導体などを用いることができるが、この限りではない。上記ｎ型の半導体層１１３、ｎ型の棒状半導体１２１およびｐ型の半導体層１２３は、ＧａＮ、ＧａＡｓ、ＡlＧａＡｓ、ＧａＡｓＰ、ＩｎＧａＮ、ＡlＧａＮ、ＧａＰ、ＺｎＳｅ、ＡlＧａＩｎＰなどを母材とする半導体を用いてもよい。また、活性層１２２としは、例えば、上記ｎ型の半導体層１１３、ｎ型の棒状半導体１２１およびｐ型の半導体層１２３としてＧａＮを選択したときは、ＩｎＧａＮを用いることができる。また、上記透明電極層１２４としては、例えば、ＩＴＯ、ＺｎＯ、ＳｎＯ等を用いることができる。また、上記透明部材１３１は、例えば、シリコン酸化膜、透明樹脂を用いることができる。また、上部電極１４１としては、金、銀、銅、アルミニウム、タングステン等の金属、またはＩＴＯ、ＺｎＯ、ＳｎＯ等の透明電極を用いることができる。ただし、基板１１１にシリコン基板等の光を透過しないものを用いた場合は、上部電極１４１は光を透過する透明電極等を選択する必要がある。 The substrate 111 may be made of an insulator such as sapphire, a semiconductor such as silicon, but is not limited thereto. The n-type semiconductor layer 113, the n-type rod-shaped semiconductor 121, and the p-type semiconductor layer 123 are formed using a semiconductor whose base material is GaN, GaAs, AlGaAs, GaAsP, InGaN, AlGaN, GaP, ZnSe, AlGaInP, or the like. Also good. As the active layer 122, for example, when GaN is selected as the n-type semiconductor layer 113, the n-type rod-shaped semiconductor 121, and the p-type semiconductor layer 123, InGaN can be used. Further, as the transparent electrode layer 124, for example, ITO, ZnO, SnO or the like can be used. The transparent member 131 can be made of, for example, a silicon oxide film or a transparent resin. As the upper electrode 141, a metal such as gold, silver, copper, aluminum, or tungsten, or a transparent electrode such as ITO, ZnO, or SnO can be used. However, when a substrate such as a silicon substrate that does not transmit light is used as the substrate 111, it is necessary to select a transparent electrode that transmits light as the upper electrode 141.
　各部分の膜厚等は、例えば、半導体基部としてのｎ型の半導体層１１３の膜厚が５μｍ、ｎ型の棒状半導体１２１の太さＤが１μｍ、長さＬが２０μｍ、ｎ型の棒状半導体１２１間の間隔Ｐが３μｍ、活性層１２２の厚さが１０ｎｍ、ｐ型の半導体層１２３の厚さが１５０ｎｍ、透明電極層１２４の厚さが１５０ｎｍとすることができるが、この限りではない。 The thickness of each portion is, for example, that the thickness of the n-type semiconductor layer 113 as the semiconductor base is 5 μm, the thickness D of the n-type semiconductor rod 121 is 1 μm, the length L is 20 μm, and the n-type semiconductor rod The spacing P between 121 may be 3 μm, the thickness of the active layer 122 may be 10 nm, the thickness of the p-type semiconductor layer 123 may be 150 nm, and the thickness of the transparent electrode layer 124 may be 150 nm.
　この実施形態では、これ以降、特に断わりのない限り、基板１１１としてシリコン基板、ｎ型の半導体層１１３、ｎ型の棒状半導体１２１およびｐ型の半導体層１２３としてＧａＮ、活性層１２２としてＩｎＧａＮ、透明電極層１２４としてＩＴＯ、透明部材１３１としてシリコン酸化膜、上部電極１４１としてＩＴＯを用いる。また、各部分の膜厚は上記の例を用いる。また、上記説明では、第１導電型はｎ型、第２導電型はｐ型としたが、はじめに述べたように、第１導電型をｐ型、第２導電型をｎ型としてもよい。 In this embodiment, unless otherwise specified, the substrate 111 is a silicon substrate, the n-type semiconductor layer 113, the n-type rod-shaped semiconductor 121 and the p-type semiconductor layer 123 is GaN, the active layer 122 is InGaN, and is transparent. ITO is used as the electrode layer 124, a silicon oxide film is used as the transparent member 131, and ITO is used as the upper electrode 141. Moreover, said example is used for the film thickness of each part. In the above description, the first conductivity type is n-type and the second conductivity type is p-type. However, as described above, the first conductivity type may be p-type and the second conductivity type may be n-type.
　この実施形態の発光素子は、ｎ型の半導体層１１３が下部電極(カソード)をなしており、この下部電極(カソード)と上部電極(アノード)１４１間に電流を流すことにより、発光素子(発光ダイオード)を発光させることができる。 In the light emitting device of this embodiment, the n-type semiconductor layer 113 forms a lower electrode (cathode), and a current is passed between the lower electrode (cathode) and the upper electrode (anode) 141, whereby the light emitting device (light emission). Diode).
　この実施形態の発光素子は、また、ｎ型の棒状半導体１２１を覆うようにｐ型の半導体層１２３が形成されているので、棒状半導体１２１のほぼ全側面が発光する。それゆえ、平面状の発光層を持つ発光ダイオードチップに比べて、基板１１１の面積当たりの発光量を増大させることができる。 In the light emitting device of this embodiment, since the p-type semiconductor layer 123 is formed so as to cover the n-type rod-shaped semiconductor 121, almost all side surfaces of the rod-shaped semiconductor 121 emit light. Therefore, the light emission amount per area of the substrate 111 can be increased as compared with a light emitting diode chip having a planar light emitting layer.
　また、基板１１１の単位面積当たりの発光量は、棒状半導体１２１の長さＬを長くするほど増やすことができる。この実施形態の発光素子では、棒状半導体１２１はｎ型の半導体からなり、棒状半導体１２１にｎ型を与える不純物量を増やすことにより棒状半導体１２１を容易に低抵抗化できる。それゆえ、棒状半導体１２１の長さＬを長くしても、棒状半導体１２１の根元部から先端部にわたって一様に発光させることができる。したがって、基板１１１の面積当たりの発光量をさらに増やすことが可能となる。 Further, the light emission amount per unit area of the substrate 111 can be increased as the length L of the rod-shaped semiconductor 121 is increased. In the light emitting device of this embodiment, the rod-shaped semiconductor 121 is made of an n-type semiconductor, and the resistance of the rod-shaped semiconductor 121 can be easily reduced by increasing the amount of impurities that give the rod-shaped semiconductor 121 n-type. Therefore, even if the length L of the rod-shaped semiconductor 121 is increased, light can be emitted uniformly from the root portion to the tip portion of the rod-shaped semiconductor 121. Therefore, it is possible to further increase the light emission amount per area of the substrate 111.
　ｎ型の棒状半導体１２１の長さＬと太さＤに関し、上記長さＬを太さＤで除算した値(Ｌ／Ｄ)が１０以上、つまり、長さＬが太さＤの１０倍以上であることが好ましい。このようにすれば、基板１１１の単位面積当たりの発光量を著しく増大させることができるからである。これに対して、従来技術のように、棒状半導体が活性層からなる場合には、棒状半導体の長さＬを太さＤで除算した値(Ｌ／Ｄ)が１０以上では、棒状半導体の先端部を発光させることが困難になる。したがって、上記長さＬを太さＤで除算した値(Ｌ／Ｄ)が１０以上である場合に、本発明の低抵抗で発光強度が高いという利点が特に顕著となる。なお、上記値(Ｌ／Ｄ)は現在の技術では５０以上にするのは難しく、また第１導電型の棒状半導体１２１の抵抗も無視できなくなる。また、発光面積(本実施形態では活性層１２２の総面積)を、半導体基部としてのｎ型半導体層１１３の面積の３倍以上とすることが好ましい。ここで、ｎ型半導体層１１３の面積とは、ｎ型の棒状半導体１２１とそのｎ型の棒状半導体１２１上の構造物(活性層１２２,ｐ型半導体層１２３,透明電極層１２４,透明部材１３１等)を取り去った状態での平坦な半導体層１１３の面積とする。このような場合、基板１１１の単位面積当たりの発光量が多く、コストダウンの効果を十分に得ることができる。 Regarding the length L and thickness D of the n-type semiconductor rod 121, the value (L / D) obtained by dividing the length L by the thickness D is 10 or more, that is, the length L is 10 times or more the thickness D. It is preferable that This is because the light emission amount per unit area of the substrate 111 can be remarkably increased. On the other hand, when the rod-shaped semiconductor is made of an active layer as in the prior art, if the value (L / D) obtained by dividing the length L of the rod-shaped semiconductor by the thickness D is 10 or more, the tip of the rod-shaped semiconductor It becomes difficult to cause the part to emit light. Therefore, when the value (L / D) obtained by dividing the length L by the thickness D is 10 or more, the advantage of the low resistance and high emission intensity of the present invention is particularly remarkable. The value (L / D) is difficult to be 50 or more with the current technology, and the resistance of the first conductivity type rod-shaped semiconductor 121 cannot be ignored. In addition, the light emitting area (the total area of the active layer 122 in this embodiment) is preferably set to be three times or more the area of the n-type semiconductor layer 113 as the semiconductor base. Here, the area of the n-type semiconductor layer 113 refers to the n-type rod-shaped semiconductor 121 and structures on the n-type rod-shaped semiconductor 121 (the active layer 122, the p-type semiconductor layer 123, the transparent electrode layer 124, the transparent member 131). Etc.) is taken as the area of the flat semiconductor layer 113. In such a case, the amount of light emission per unit area of the substrate 111 is large, and a cost reduction effect can be sufficiently obtained.
　この実施形態では、ｎ型の棒状半導体１２１とｐ型の半導体層１２３との間に、活性層１２２が形成されているが、これは必須ではない。しかしながら、活性層１２２を設けるのが好ましく、これにより発光効率を上げることができる。また、活性層１２２は、あくまでｎ型の棒状半導体１２１とｐ型の半導体層１２３との間に、例えば１０ｎｍの厚さで形成されているので発光効率がよい。活性層は、両極のキャリア(正孔と電子)を狭い範囲に閉じ込めて再結合確率を上げるためにあるからである。従来技術のように、棒状半導体の部分まで全て活性層からなる場合、キャリアの閉じ込めが不十分なため発光効率が高くない。 In this embodiment, the active layer 122 is formed between the n-type rod-shaped semiconductor 121 and the p-type semiconductor layer 123, but this is not essential. However, it is preferable to provide the active layer 122, which can increase luminous efficiency. Further, since the active layer 122 is formed between the n-type rod-shaped semiconductor 121 and the p-type semiconductor layer 123 to a thickness of, for example, 10 nm, the luminous efficiency is good. This is because the active layer is provided to increase the recombination probability by confining bipolar carriers (holes and electrons) in a narrow range. As in the prior art, when all of the rod-shaped semiconductor portion is made of an active layer, the light emission efficiency is not high due to insufficient carrier confinement.
　また、ｐ型の半導体層１２３上には、透明電極層１２４が形成されているが、これは必須ではない。しかしながら、透明電極層１２４を設けるのが好ましく、この透明電極層１２４の存在により、透明電極層１２４が活性層１２２から放射された光を透過しつつ、ｐ型の半導体層１２３で電圧降下を起こすことを防ぐことができる。したがって、棒状半導体１２１の全体にわたって一様に発光させることができる。 Further, a transparent electrode layer 124 is formed on the p-type semiconductor layer 123, but this is not essential. However, it is preferable to provide the transparent electrode layer 124, and the presence of the transparent electrode layer 124 causes the voltage drop in the p-type semiconductor layer 123 while the transparent electrode layer 124 transmits light emitted from the active layer 122. Can be prevented. Therefore, light can be emitted uniformly over the entire rod-shaped semiconductor 121.
　さらには、ｐ型の半導体層１２３上に透明電極層１２４を形成する場合であっても、複数のｎ型の棒状半導体１２１の間の隙間の全てを透明電極層１２４で埋めてしまわないことが好ましい。すなわち、ｐ型の半導体層１２３上に透明電極層１２４を薄く形成した上で、複数のｎ型の棒状半導体１２１の間に残った隙間で上記透明電極層１２４が対向している対向間隙を上記透明電極層１２４よりも透明性の高い材料で作製された透明部材１３１で埋めることが好ましい。その理由は、一般的に透明電極層１２４には電流を流すためのキャリアが存在するので、透明性が悪いためである。したがって、複数のｎ型の棒状半導体１２１間の隙間にシリコン酸化膜や透明樹脂などで作製された透明部材１３１を充填することにより、発光素子の発光効率を向上できる。 Furthermore, even when the transparent electrode layer 124 is formed on the p-type semiconductor layer 123, all the gaps between the plurality of n-type rod-shaped semiconductors 121 may not be filled with the transparent electrode layer 124. preferable. That is, after forming the thin transparent electrode layer 124 on the p-type semiconductor layer 123, the opposing gap in which the transparent electrode layer 124 is opposed to the gap between the plurality of n-type rod-shaped semiconductors 121 is formed as described above. It is preferable to fill with a transparent member 131 made of a material having higher transparency than the transparent electrode layer 124. This is because the transparent electrode layer 124 generally has carriers for flowing current, and thus the transparency is poor. Therefore, by filling the gaps between the plurality of n-type rod-shaped semiconductors 121 with the transparent member 131 made of a silicon oxide film or a transparent resin, the light emission efficiency of the light emitting element can be improved.
　なお、この実施形態の発光素子１００では、活性層１２２、ｐ型の半導体層１２３および透明電極層１２４は、ｎ型の棒状半導体１２１とｎ型の半導体層１１３表面の全面を覆っているが、必ずしも全面を覆っていなくてもよい。すなわち、活性層１２２,ｐ型の半導体層１２３および透明電極層１２４は、少なくともｎ型の棒状半導体１２１を覆っていればよい。活性層１２２,ｐ型の半導体層１２３,透明電極層１２４がｎ型の棒状半導体１２１を覆うことにより、基板１１１の面積当たりの発光量を増やすことができるからである。 In the light emitting device 100 of this embodiment, the active layer 122, the p-type semiconductor layer 123, and the transparent electrode layer 124 cover the entire surfaces of the n-type rod-shaped semiconductor 121 and the n-type semiconductor layer 113. It is not always necessary to cover the entire surface. That is, the active layer 122, the p-type semiconductor layer 123, and the transparent electrode layer 124 only need to cover at least the n-type rod-shaped semiconductor 121. This is because the active layer 122, the p-type semiconductor layer 123, and the transparent electrode layer 124 cover the n-type rod-shaped semiconductor 121, thereby increasing the light emission amount per area of the substrate 111.
　次に、この第１実施形態の発光素子１００の製造方法を、図２,図３Ａ,図３Ｂ,図４～図６を用いて説明する。 Next, a method for manufacturing the light emitting device 100 according to the first embodiment will be described with reference to FIGS. 2, 3A, 3B, and 4 to 6. FIG.
　まず、図２に示すように、シリコンからなる基板１１１上に、第１導電型の半導体層としてｎ型のＧａＮからなる半導体層１１２をＭＯＣＶＤ法により２５μｍの厚さで成膜する。この時点で、シリコンからなる基板１１１とｎ型のＧａＮからなる半導体層１１２が一体となって第１の基板１１０を構成する。言い換えれば、ｎ型のＧａＮからなる半導体層１１２は、第１の基板１１０の一部をなしている。また、このような手順を行なう替わりに、ｎ型のＧａＮからなる単層の基板を用意してもよく、この場合は、ｎ型のＧａＮからなる第１導電型の半導体層が第１の基板の全部をなすと言うことができる。 First, as shown in FIG. 2, a semiconductor layer 112 made of n-type GaN is formed as a first conductive type semiconductor layer on a substrate 111 made of silicon to a thickness of 25 μm by MOCVD. At this point, the substrate 111 made of silicon and the semiconductor layer 112 made of n-type GaN are integrated to form the first substrate 110. In other words, the semiconductor layer 112 made of n-type GaN forms part of the first substrate 110. Further, instead of performing such a procedure, a single layer substrate made of n-type GaN may be prepared. In this case, the first conductivity type semiconductor layer made of n-type GaN is the first substrate. It can be said that it does everything.
　次に、図３Ａおよび図３Ｂ(図３Ａにおいて上から見た図)に示すように、第１導電型の半導体層としてのｎ型のＧａＮからなる半導体層１１２上に、フォトリソグラフィ工程によってフォトレジスト１５１をパターニングする。このとき、第１導電型の半導体層としてのｎ型のＧａＮからなる半導体層１１２上に、例えばシリコン酸化膜を一面に成膜し、フォトリソグラフィ工程とエッチング工程によりシリコン酸化膜をパターニングしてもよい。 Next, as shown in FIGS. 3A and 3B (viewed from above in FIG. 3A), a photoresist is formed on the semiconductor layer 112 made of n-type GaN as the first conductivity type semiconductor layer by a photolithography process. 151 is patterned. At this time, for example, a silicon oxide film may be formed on the entire surface of the semiconductor layer 112 made of n-type GaN as the first conductivity type semiconductor layer, and the silicon oxide film may be patterned by a photolithography process and an etching process. Good.
　次に、図４に示すように、パターニングされたフォトレジスト１５１をマスクとして、第１導電型の半導体層としてのｎ型のＧａＮからなる半導体層１１２を非等方的にドライエッチングしてｎ型のＧａＮからなる棒状(突起状)半導体１２１を形成する(半導体コア形成工程)。このとき、ｎ型のＧａＮからなる半導体層１１２が厚さ５μｍほど残るようにエッチングし、この残った部分がｎ型のＧａＮからなる半導体層１１３となる。ｎ型のＧａＮからなる第１導電型の棒状半導体１２１の長さＬは２０μｍとなる。上記棒状半導体１２１は、上記ｎ型ＧａＮ半導体層１１３上に立設状態で互いに間隔を隔てて複数形成される。 Next, as shown in FIG. 4, by using the patterned photoresist 151 as a mask, the semiconductor layer 112 made of n-type GaN as the first conductivity type semiconductor layer is anisotropically dry-etched to perform n-type etching. A rod-like (projection-like) semiconductor 121 made of GaN is formed (semiconductor core forming step). At this time, etching is performed so that the semiconductor layer 112 made of n-type GaN remains with a thickness of about 5 μm, and the remaining portion becomes the semiconductor layer 113 made of n-type GaN. The length L of the first conductivity type rod-shaped semiconductor 121 made of n-type GaN is 20 μm. A plurality of the rod-shaped semiconductors 121 are formed on the n-type GaN semiconductor layer 113 in a standing state with a space therebetween.
　ここで、上記ドライエッチングにより棒状半導体１２１に生じた結晶欠陥を回復または除去するために、以下の工程を行うことが好ましい。 Here, in order to recover or remove crystal defects generated in the rod-shaped semiconductor 121 by the dry etching, it is preferable to perform the following steps.
　　(アニール工程)
　上記半導体コア形成工程の後であって、後述の半導体シェル形成工程の前に、棒状半導体１２１に生じた結晶欠陥を回復するために、棒状半導体１２１が形成された基板１１１を窒素雰囲気中でアニールする(結晶欠陥回復工程)。これにより、上記棒状半導体１２１がアニールされる。このアニール温度は、例えば、棒状半導体１２１がｎ型ＧａＮからなる場合は、６００℃～１２００℃で行うことができる。棒状半導体１２１がｎ型ＧａＮからなる場合のより好ましいアニール温度は、ＧａＮの結晶欠陥回復が顕著で、かつＧａＮが分解しない、７００℃～９００℃である。 (Annealing process)
In order to recover crystal defects generated in the rod-shaped semiconductor 121 after the semiconductor core formation step and before the semiconductor shell formation step described later, the substrate 111 on which the rod-shaped semiconductor 121 is formed is annealed in a nitrogen atmosphere. (Crystal defect recovery step). Thereby, the rod-shaped semiconductor 121 is annealed. For example, when the rod-shaped semiconductor 121 is made of n-type GaN, the annealing temperature can be 600 ° C. to 1200 ° C. A more preferable annealing temperature when the rod-shaped semiconductor 121 is made of n-type GaN is 700 ° C. to 900 ° C. at which crystal defect recovery of GaN is remarkable and GaN does not decompose.
　　(ウェットエッチング工程)
　上記半導体コア形成工程の後であって、後述の半導体シェル形成工程の前に、棒状半導体１２１が形成された基板１１１をウェットエッチングして、棒状半導体１２１に生じた結晶欠陥を高密度に含む層を選択的に除去する(結晶欠陥除去工程)。エッチング液は、例えば、棒状半導体１２１がｎ型のＧａＮの場合は１２０℃～１５０℃に加熱した熱リン酸を用いればよい。 (Wet etching process)
After the semiconductor core formation step and before the semiconductor shell formation step, which will be described later, the substrate 111 on which the rod-shaped semiconductor 121 is formed is wet-etched, and a layer containing crystal defects generated in the rod-shaped semiconductor 121 at a high density Are selectively removed (crystal defect removal step). For example, when the rod-shaped semiconductor 121 is n-type GaN, hot phosphoric acid heated to 120 ° C. to 150 ° C. may be used as the etchant.
　上記結晶欠陥回復工程(アニール工程)または上記結晶欠陥除去工程(ウェットエッチング工程)を行うことにより、棒状半導体１２１の結晶欠陥密度を減らして結晶性を向上することができる。したがって、その後に行われる半導体シェル形成工程において、活性層(発光層)１２２および第２導電型の半導体層１２３の結晶性も向上するため、発光素子の発光効率を向上することができる。 By performing the crystal defect recovery step (annealing step) or the crystal defect removal step (wet etching step), the crystal defect density of the rod-shaped semiconductor 121 can be reduced and the crystallinity can be improved. Accordingly, in the subsequent semiconductor shell formation step, the crystallinity of the active layer (light emitting layer) 122 and the second conductivity type semiconductor layer 123 is also improved, so that the light emission efficiency of the light emitting element can be improved.
　なお、上記結晶欠陥除去工程(ウェットエッチング工程)と、上記結晶欠陥回復工程(アニール工程)の両方を、上記ウェットエッチング工程,アニール工程の順で行なう(つまり、上記ウェットエッチング工程を行なってから、上記アニール工程を行なう)ことにより、より効果的に棒状半導体１２１の結晶性を向上することができる。 The crystal defect removal step (wet etching step) and the crystal defect recovery step (annealing step) are both performed in the order of the wet etching step and the annealing step (that is, after performing the wet etching step, By performing the annealing step), the crystallinity of the rod-shaped semiconductor 121 can be more effectively improved.
　次に、図５に示すように、第１導電型の半導体基部としてのｎ型のＧａＮからなる半導体層１１３および第１導電型の棒状半導体としてのｎ型のＧａＮからなる棒状半導体１２１の表面全面に、厚さ１０ｎｍのＩｎＧａＮからなる活性層１２２を成膜する。続いて、ＩｎＧａＮからなる活性層１２２上に、１５０ｎｍのｐ型ＧａＮからなる第２導電型の半導体層１２３を成膜する(半導体シェル形成工程)。さらに、ｐ型ＧａＮからなる第２導電型の半導体層１２３上に、１５０ｎｍのＩＴＯからなる透明電極層１２４を成膜する。ＩｎＧａＮからなる活性層１２２およびｐ型ＧａＮからなる第２導電型の半導体層１２３はＭＯＣＶＤ法で形成する。また、ＩＴＯからなる透明電極層１２４はスパッタ法、ミストＣＶＤ法またはめっきにより形成する。 Next, as shown in FIG. 5, the entire surface of the semiconductor layer 113 made of n-type GaN as the first conductivity type semiconductor base and the rod-shaped semiconductor 121 made of n-type GaN as the first conductivity type rod-shaped semiconductor. Then, an active layer 122 made of InGaN having a thickness of 10 nm is formed. Subsequently, a second conductivity type semiconductor layer 123 made of p-type GaN having a thickness of 150 nm is formed on the active layer 122 made of InGaN (semiconductor shell formation step). Further, a transparent electrode layer 124 made of 150 nm ITO is formed on the second conductivity type semiconductor layer 123 made of p-type GaN. The active layer 122 made of InGaN and the second conductivity type semiconductor layer 123 made of p-type GaN are formed by MOCVD. The transparent electrode layer 124 made of ITO is formed by sputtering, mist CVD, or plating.
　次に、図６に示すように、ＩｎＧａＮからなる活性層１２２、ｐ型ＧａＮからなる第２導電型の半導体層１２３およびＩＴＯからなる透明電極層１２４に覆われたｎ型のＧａＮからなる第１導電型の棒状半導体１２１間の隙間を、シリコン酸化膜からなる透明部材１３１で充填する。シリコン酸化膜は、ＳＯＧ(Ｓpiｎ-Ｏｎ Ｇlａｓｓ)を塗布することにより形成することができる。ＳＯＧの塗布後、ウェットエッチングにより透明電極層１２４の上部を露出し、ＩＴＯからなる上部電極１４１をスパッタ法で成膜して発光素子１００が完成する。 Next, as shown in FIG. 6, a first n-type GaN layer covered with an active layer 122 made of InGaN, a second conductivity type semiconductor layer 123 made of p-type GaN, and a transparent electrode layer 124 made of ITO. A gap between the conductive rod-shaped semiconductors 121 is filled with a transparent member 131 made of a silicon oxide film. The silicon oxide film can be formed by applying SOG (Spin-On Glass). After applying the SOG, the upper portion of the transparent electrode layer 124 is exposed by wet etching, and the upper electrode 141 made of ITO is formed by sputtering to complete the light emitting device 100.
　上記発光素子１００の製造方法は、第１の基板１１０の一部または全部をなすｎ型のＧａＮ半導体層１１２の表面にフォトレジスト１５１によるマスク層をパターニングする工程と、このマスク層をマスクとして上記ｎ型ＧａＮ半導体層を非等方的にエッチングして複数のｎ型のＧａＮからなる棒状半導体１２１を形成する半導体コア形成工程と、このｎ型のＧａＮからなる棒状半導体１２１の表面を覆うようにｐ型のＧａＮ半導体層１２３を形成する半導体シェル形成工程とを備えている。 The method for manufacturing the light emitting device 100 includes a step of patterning a mask layer made of a photoresist 151 on the surface of the n-type GaN semiconductor layer 112 constituting a part or all of the first substrate 110, and the mask layer as a mask. A semiconductor core forming step of forming a plurality of n-type GaN rod-shaped semiconductors 121 by anisotropically etching the n-type GaN semiconductor layer, and covering the surface of the n-type GaN rod-shaped semiconductors 121 a semiconductor shell forming step of forming a p-type GaN semiconductor layer 123.
　この製造方法により、ｎ型のＧａＮからなる棒状半導体１２１を覆うようにｐ型の半導体層１２３が形成されるので、棒状半導体１２１のほぼ全側面が発光する。それゆえ、平面の発光層を持つ発光ダイオードチップに比べて、基板１１１の面積当たりの発光量を増大することができる。また、この製造方法によれば、棒状半導体１２１はｎ型の半導体からなり、ｎ型を与える不純物量を増やすことにより容易に低抵抗化できる。それゆえ、棒状半導体１２１の長さＬを長くしても、棒状半導体１２１の根元部から先端部にわたって一様に発光させることができる。したがって、基板１１１の面積当たりの発光量をさらに増やすことが可能となる。さらに、この製造方法によれば、棒状半導体１２１をフォトリソグラフィ工程と非等方的なエッチングにより形成しているので、狙い通りの良好な形状の棒状半導体１２１を得ることができて歩留まりを向上させることができる。 By this manufacturing method, since the p-type semiconductor layer 123 is formed so as to cover the rod-shaped semiconductor 121 made of n-type GaN, almost all side surfaces of the rod-shaped semiconductor 121 emit light. Therefore, the light emission amount per area of the substrate 111 can be increased as compared with a light emitting diode chip having a planar light emitting layer. Further, according to this manufacturing method, the rod-shaped semiconductor 121 is made of an n-type semiconductor, and the resistance can be easily reduced by increasing the amount of impurities giving the n-type. Therefore, even if the length L of the rod-shaped semiconductor 121 is increased, light can be emitted uniformly from the root portion to the tip portion of the rod-shaped semiconductor 121. Therefore, it is possible to further increase the light emission amount per area of the substrate 111. Furthermore, according to this manufacturing method, since the rod-shaped semiconductor 121 is formed by anisotropic etching with the photolithography process, the rod-shaped semiconductor 121 having a good shape as intended can be obtained and the yield can be improved. be able to.
　さらに、上記製造方法では、上記ｎ型の棒状半導体１２１の長さＬを太さＤの１０倍以上であるようにするのが好ましい。このようにすれば、基板１１１の面積当たりの発光量を著しく増大させることができるからである。これに対して、従来技術のように棒状半導体が活性層からなる場合は、上記棒状半導体の長さＬを太さＤで除算した値(Ｌ／Ｄ)を１０以上にすると、上記棒状半導体の先端部を発光させることが困難になる。したがって、棒状半導体１２１の長さＬを太さＤで除算した値(Ｌ／Ｄ)が１０以上である場合に、この実施形態の低抵抗で発光強度が高いという利点が特に顕著となる。なお、上記棒状半導体の長さＬを太さＤで除算した値(Ｌ／Ｄ)は、現在の技術では５０以上にするのは難しく、また第１導電型のｎ型の棒状半導体１２１の抵抗も無視できなくなる。また、発光面積(本実施形態では活性層１２２の総面積)を、半導体基部としてのｎ型の半導体層１１３の面積の３倍以上とすることが好ましい。ここで、上記ｎ型の半導体層(半導体基部)１１３の面積とは、ｎ型のＧａＮ棒状半導体１２１とその上の構造物(活性層１２２,ｐ型ＧａＮ半導体層１２３,透明電極層１２４等)を取り去った状態での平坦な半導体層１１３の面積とする。このような場合、基板１１１当たりの発光量が多く、コストダウンの効果を十分に得ることができる。 Furthermore, in the manufacturing method, it is preferable that the length L of the n-type rod-shaped semiconductor 121 is 10 times or more the thickness D. This is because the light emission amount per area of the substrate 111 can be remarkably increased. On the other hand, when the rod-shaped semiconductor is made of an active layer as in the prior art, if the value (L / D) obtained by dividing the length L of the rod-shaped semiconductor by the thickness D is 10 or more, It becomes difficult to cause the tip portion to emit light. Therefore, when the value (L / D) obtained by dividing the length L of the rod-shaped semiconductor 121 by the thickness D is 10 or more, the advantage of the low resistance and high emission intensity of this embodiment is particularly remarkable. The value obtained by dividing the length L of the rod-shaped semiconductor by the thickness D (L / D) is difficult to be 50 or more with the current technology, and the resistance of the n-type rod-shaped semiconductor 121 of the first conductivity type is difficult. Can no longer be ignored. In addition, the light emitting area (the total area of the active layer 122 in this embodiment) is preferably three times or more than the area of the n-type semiconductor layer 113 as the semiconductor base. Here, the area of the n-type semiconductor layer (semiconductor base) 113 refers to the n-type GaN rod-shaped semiconductor 121 and structures thereon (active layer 122, p-type GaN semiconductor layer 123, transparent electrode layer 124, etc.). The area of the flat semiconductor layer 113 in a state where is removed. In such a case, the amount of emitted light per substrate 111 is large, and a sufficient cost reduction effect can be obtained.
　さらに、上記製造方法では、上記半導体コア形成工程と上記半導体シェル形成工程の間にｎ型のＧａＮからなる棒状半導体１２１の表面を覆うようにＩｎＧａＮからなる活性層１２２を形成している。これにより発光効率を上げることができる。なお、この活性層１２２は形成しなくてもよい。 Further, in the manufacturing method, the active layer 122 made of InGaN is formed so as to cover the surface of the rod-shaped semiconductor 121 made of n-type GaN between the semiconductor core forming step and the semiconductor shell forming step. Thereby, luminous efficiency can be raised. Note that the active layer 122 may not be formed.
　さらに、上記製造方法では、上記半導体シェル形成工程の後にｐ型のＧａＮ半導体層１２３を覆うように透明電極層１２４を形成する。この透明電極層１２４により、活性層１２２から放射された光を透過しつつ、ｐ型のＧａＮ半導体層１２３で電圧降下を起こすことを防ぐことができる。したがって、棒状半導体１２１の全体にわたって一様に発光させることができる。 Furthermore, in the manufacturing method, the transparent electrode layer 124 is formed so as to cover the p-type GaN semiconductor layer 123 after the semiconductor shell formation step. The transparent electrode layer 124 can prevent the voltage drop in the p-type GaN semiconductor layer 123 while transmitting the light emitted from the active layer 122. Therefore, light can be emitted uniformly over the entire rod-shaped semiconductor 121.
　さらに、上記製造方法では、ｐ型のＧａＮ半導体層１２３上に透明電極層１２４を形成するが、複数のｎ型の棒状半導体１２１間の隙間の全てを透明電極層１２４で埋めるのではなく、ｐ型のＧａＮ半導体層１２３上に透明電極層１２４を薄く形成した上で、残った隙間(透明電極層１２４同士が対向する対向隙間)を透明部材１３１で埋めている。これは、一般的に透明電極は電流を流すためのキャリアが存在するために、透明度が悪いためである。したがって、第１導電型の棒状半導体１２１がなす隙間をシリコン酸化膜や透明樹脂などで充填することにより、発光素子の発光効率を向上することができる。 Further, in the above manufacturing method, the transparent electrode layer 124 is formed on the p-type GaN semiconductor layer 123. However, not all the gaps between the plurality of n-type rod-shaped semiconductors 121 are filled with the transparent electrode layer 124. The transparent electrode layer 124 is thinly formed on the type GaN semiconductor layer 123, and the remaining gap (opposing gap where the transparent electrode layers 124 face each other) is filled with the transparent member 131. This is because the transparent electrode generally has poor transparency because of the presence of carriers for flowing current. Therefore, the luminous efficiency of the light emitting element can be improved by filling the gap formed by the first conductivity type rod-shaped semiconductor 121 with a silicon oxide film, a transparent resin, or the like.
　　　(第２の実施の形態)
　次に、この発明の発光素子の第２実施形態を、図７Ａ～図７Ｃを用いて説明する。図７Ａは、この第２実施形態の発光素子の断面図であり、図７Ｂは、この第２実施形態の発光素子を上から見た平面図であって専ら板状半導体の位置を示す図であり、図７Ｃは、この第２実施形態の発光素子の製造方法を説明する平面図である。 (Second embodiment)
Next, a second embodiment of the light emitting device of the present invention will be described with reference to FIGS. 7A to 7C. FIG. 7A is a cross-sectional view of the light emitting device of the second embodiment, and FIG. 7B is a plan view of the light emitting device of the second embodiment as viewed from above, and is a diagram exclusively showing the position of the plate-like semiconductor. FIG. 7C is a plan view for explaining the method for manufacturing the light emitting element of the second embodiment.
　この第２実施形態の発光素子１１００は、前述の第１実施形態の発光素子１００における複数の第１導電型(ｎ型)の棒状(突起状)半導体１２１に替えて、板状の半導体１１２１を備えた点が前述の第１実施形態と異なる。したがって、この第２実施形態では前述の第１実施形態と共通する部分の詳細は説明は省略する。 In the light emitting device 1100 of the second embodiment, a plate-shaped semiconductor 1121 is used instead of the plurality of first conductivity type (n-type) rod-shaped (projecting) semiconductors 121 in the light emitting device 100 of the first embodiment. The point provided is different from the first embodiment. Therefore, in the second embodiment, the details of the parts common to the first embodiment are not described.
　図７Ａおよび図７Ｂにおいて、１１００は発光素子、１１１１は基板、１１１３はｎ型の半導体層、１１２１は板状(突起状)半導体、１１２２は活性層、１１２３はｐ型の半導体層、１１２４は透明電極層、１１３１は透明部材、１１４１は上部電極である。なお、上記基板１１１１,ｎ型の半導体層１１１３,板状半導体１１２１,活性層１１２２,ｐ型の半導体層１１２３,透明電極層１１２４,透明部材１１３１,上部電極１１４１は、それぞれ、前述の第１実施形態で述べた基板１１１,ｎ型の半導体層１１３,棒状半導体１２１,活性層１２２,ｐ型の半導体層１２３,透明電極層１２４,透明部材１３１,上部電極１４１と同様の材料で作製される。 7A and 7B, 1100 is a light emitting element, 1111 is a substrate, 1113 is an n-type semiconductor layer, 1121 is a plate (projection) semiconductor, 1122 is an active layer, 1123 is a p-type semiconductor layer, and 1124 is transparent. An electrode layer, 1311, a transparent member, and 1141, an upper electrode. The substrate 1111, the n-type semiconductor layer 1113, the plate-like semiconductor 1121, the active layer 1122, the p-type semiconductor layer 1123, the transparent electrode layer 1124, the transparent member 1131, and the upper electrode 1141 are each in the first embodiment described above. The substrate 111, the n-type semiconductor layer 113, the rod-shaped semiconductor 121, the active layer 122, the p-type semiconductor layer 123, the transparent electrode layer 124, the transparent member 131, and the upper electrode 141 described in the embodiment are manufactured using the same materials.
　また、各部分の膜厚等は、例えば、半導体基部としてのｎ型の半導体層１１１３の膜厚が５μｍ、ｎ型の板状半導体１１２１の厚さＤ１が１μｍ、幅Ｄ２が５μｍ、高さＬが２０μｍ、ｎ型の板状半導体１１２１間の距離Ｐ１、距離Ｐ２(図７Ｂ参照)を３μｍ、活性層１１２２の厚さが１０ｎｍ、ｐ型の半導体層１１２３の厚さが１５０ｎｍ、透明電極層１１２４の厚さが１５０ｎｍとすることができるが、この限りではない。 The thickness of each part is, for example, that the thickness of the n-type semiconductor layer 1113 as the semiconductor base is 5 μm, the thickness D1 of the n-type semiconductor semiconductor 1121 is 1 μm, the width D2 is 5 μm, and the height L Is 20 μm, the distance P1 between the n-type plate semiconductors 1121, the distance P2 (see FIG. 7B) is 3 μm, the thickness of the active layer 1122 is 10 nm, the thickness of the p-type semiconductor layer 1123 is 150 nm, and the transparent electrode layer 1124 However, this is not restrictive.
　この実施形態の発光素子は、ｎ型の半導体層１１１３が下部電極(カソード)をなしており、この下部電極(カソード)と上部電極(アノード)１１４１間に電流を流すことにより、発光素子(発光ダイオード)を発光させることができる。 In the light emitting device of this embodiment, an n-type semiconductor layer 1113 forms a lower electrode (cathode), and a current is passed between the lower electrode (cathode) and the upper electrode (anode) 1141, whereby the light emitting device (light emitting device). Diode).
　この実施形態の発光素子は、また、ｎ型の板状半導体１１２１を覆うようにｐ型の半導体層１１２３が形成されているので、板状半導体１１２１のほぼ全側面が発光する。それゆえ、平面状の発光層を持つ発光ダイオードチップに比べて、基板１１１１の面積当たりの発光量を増大させることができる。 In the light emitting device of this embodiment, since the p-type semiconductor layer 1123 is formed so as to cover the n-type plate-like semiconductor 1121, almost all side surfaces of the plate-like semiconductor 1121 emit light. Therefore, the light emission amount per area of the substrate 1111 can be increased as compared with a light emitting diode chip having a planar light emitting layer.
　また、基板１１１１の単位面積当たりの発光量は、板状半導体１１２１の高さＬを長くするほど増やすことができる。この実施形態の発光素子では、板状半導体１１２１はｎ型の半導体からなり、板状半導体１１２１にｎ型を与える不純物量を増やすことにより板状半導体１１２１を容易に低抵抗化できる。それゆえ、板状半導体１１２１の高さＬを長くしても、板状半導体１１２１の根元部から先端部にわたって一様に発光させることができる。したがって、基板１１１１の面積当たりの発光量をさらに増やすことが可能となる。 Further, the light emission amount per unit area of the substrate 1111 can be increased as the height L of the plate-like semiconductor 1121 is increased. In the light emitting element of this embodiment, the plate-like semiconductor 1121 is made of an n-type semiconductor, and the resistance of the plate-like semiconductor 1121 can be easily reduced by increasing the amount of impurities that give the plate-like semiconductor 1121 n-type. Therefore, even if the height L of the plate-like semiconductor 1121 is increased, light can be emitted uniformly from the root portion to the tip portion of the plate-like semiconductor 1121. Therefore, it is possible to further increase the light emission amount per area of the substrate 1111.
　本実施の形態では、板状半導体１１２１を用いているが、板状であることの利点は以下のように説明される。一般的に、発光素子の発光効率は発光層の面方位に依存する。例えば、ＧａＮ系の発光素子では、無極性面（ａ面またはｍ面）を発光面としても用いるのが好ましい。板状半導体とすることにより、その主面(図７Ｂにおいて、Ｄ２の幅を持つ面)を無極性面とすれば、全体としての発光効率を高めることができる。 In the present embodiment, the plate-like semiconductor 1121 is used, but the advantage of being plate-like is explained as follows. In general, the light emission efficiency of a light emitting element depends on the plane orientation of the light emitting layer. For example, in a GaN-based light emitting element, it is preferable to use a nonpolar plane (a-plane or m-plane) as a light-emitting surface. By using a plate-like semiconductor, if the main surface (the surface having the width of D2 in FIG. 7B) is a nonpolar surface, the overall light emission efficiency can be increased.
　この実施形態では、ｎ型の板状半導体１１２１とｐ型の半導体層１１２３との間に、活性層１１２２が形成されているが、これは必須ではない。しかしながら、活性層１１２２を設けるのが好ましく、これにより発光効率を上げることができる。また、活性層１１２２は、あくまでｎ型の板状半導体１１２１とｐ型の半導体層１１２３との間に、例えば１０ｎｍの厚さで形成されているので発光効率がよい。活性層は、両極のキャリア(正孔と電子)を狭い範囲に閉じ込めて再結合確率を上げるためにあるからである。 In this embodiment, the active layer 1122 is formed between the n-type plate-like semiconductor 1121 and the p-type semiconductor layer 1123, but this is not essential. However, it is preferable to provide the active layer 1122, which can increase the light emission efficiency. Further, since the active layer 1122 is formed between the n-type plate semiconductor 1121 and the p-type semiconductor layer 1123 to a thickness of, for example, 10 nm, the light emission efficiency is good. This is because the active layer is provided to increase the recombination probability by confining bipolar carriers (holes and electrons) in a narrow range.
　また、ｐ型の半導体層１１２３上には、透明電極層１１２４が形成されているが、これは必須ではない。しかしながら、透明電極層１１２４を設けるのが好ましく、この透明電極層１１２４の存在により、透明電極層１１２４が活性層１１２２から放射された光を透過しつつ、ｐ型の半導体層１１２３で電圧降下を起こすことを防ぐことができる。したがって、板状半導体１１２１の全体にわたって一様に発光させることができる。 Further, a transparent electrode layer 1124 is formed on the p-type semiconductor layer 1123, but this is not essential. However, it is preferable to provide the transparent electrode layer 1124, and the presence of the transparent electrode layer 1124 causes the transparent electrode layer 1124 to transmit light emitted from the active layer 1122 while causing a voltage drop in the p-type semiconductor layer 1123. Can be prevented. Therefore, light can be emitted uniformly over the entire plate-like semiconductor 1121.
　さらには、ｐ型の半導体層１１２３上に透明電極層１１２４を形成する場合であっても、複数のｎ型の板状半導体１１２１の間の隙間の全てを透明電極層１１２４で埋めてしまわないことが好ましい。すなわち、ｐ型の半導体層１１２３上に透明電極層１１２４を薄く形成した上で、複数のｎ型の板状半導体１１２１の間に残った隙間で上記透明電極層１１２４が対向している対向間隙を上記透明電極層１１２４よりも透明性の高い材料で作製された透明部材１１３１で埋めることが好ましい。その理由は、一般的に透明電極層１１２４には電流を流すためのキャリアが存在するので、透明性が悪いためである。したがって、複数のｎ型の板状半導体１１２１間の隙間にシリコン酸化膜や透明樹脂などで作製された透明部材１１３１を充填することにより、発光素子の発光効率を向上できる。 Furthermore, even when the transparent electrode layer 1124 is formed on the p-type semiconductor layer 1123, all the gaps between the plurality of n-type plate-like semiconductors 1121 are not filled with the transparent electrode layer 1124. Is preferred. That is, after forming the thin transparent electrode layer 1124 on the p-type semiconductor layer 1123, a gap between the transparent electrode layers 1124 facing each other is formed in a gap remaining between the plurality of n-type plate-like semiconductors 1121. It is preferable to fill with a transparent member 1131 made of a material having higher transparency than the transparent electrode layer 1124. The reason for this is that the transparent electrode layer 1124 generally has poor transparency due to the presence of carriers for flowing current. Therefore, the light emitting efficiency of the light emitting element can be improved by filling the gaps between the plurality of n-type plate-like semiconductors 1121 with the transparent member 1131 made of a silicon oxide film or a transparent resin.
　なお、この実施形態の発光素子１１００では、活性層１１２２、ｐ型の半導体層１１２３および透明電極層１１２４は、ｎ型の板状半導体１１２１とｎ型の半導体層１１１３表面の全面を覆っているが、必ずしも全面を覆っていなくてもよい。すなわち、活性層１１２２,ｐ型の半導体層１１２３および透明電極層１１２４は、少なくともｎ型の板状半導体１１２１を覆っていればよい。活性層１１２２,ｐ型の半導体層１１２３,透明電極層１１２４がｎ型の板状半導体１１２１を覆うことにより、基板１１１１の面積当たりの発光量を増やすことができるからである。 In the light emitting device 1100 of this embodiment, the active layer 1122, the p-type semiconductor layer 1123, and the transparent electrode layer 1124 cover the entire surfaces of the n-type plate semiconductor 1121 and the n-type semiconductor layer 1113. It is not always necessary to cover the entire surface. That is, the active layer 1122, the p-type semiconductor layer 1123, and the transparent electrode layer 1124 only need to cover at least the n-type plate-like semiconductor 1121. This is because the active layer 1122, the p-type semiconductor layer 1123, and the transparent electrode layer 1124 cover the n-type plate semiconductor 1121, so that the light emission amount per area of the substrate 1111 can be increased.
　次に、この第２実施形態の発光素子１１００の製造方法を、図７Ｃを用いて説明する。この第２実施形態の発光素子１１００の製造方法は、前述の第１実施形態で図２～図６を用いて説明した発光素子１００の製造方法とほぼ同じである。この第２実施形態の発光素子１１００の製造方法が発光素子１００の製造方法と異なる唯一の点は、前述の第１実施形態で図３Ａで説明した工程に替えて、図７Ｃに示すように、ｎ型のＧａＮからなる半導体層１１１２上に、フォトリソグラフィ工程によってフォトレジスト１１５１をパターニングする際、フォトレジスト１１５１のパターンを長方形にすることのみである。 Next, a method for manufacturing the light emitting device 1100 according to the second embodiment will be described with reference to FIG. 7C. The manufacturing method of the light emitting device 1100 according to the second embodiment is almost the same as the manufacturing method of the light emitting device 100 described with reference to FIGS. 2 to 6 in the first embodiment. The only difference between the method of manufacturing the light emitting device 1100 of the second embodiment and the method of manufacturing the light emitting device 100 is that, instead of the process described in FIG. 3A in the first embodiment, as shown in FIG. When the photoresist 1151 is patterned on the semiconductor layer 1112 made of n-type GaN by a photolithography process, the pattern of the photoresist 1151 is only made rectangular.
　この第２実施形態での製造方法により、ｎ型のＧａＮからなる板状半導体１１２１を覆うようにｐ型の半導体層１１２３が形成されるので、板状半導体１１２１のほぼ全側面が発光する。それゆえ、平面の発光層を持つ発光ダイオードチップに比べて、基板１１１１の面積当たりの発光量を増大することができる。また、この製造方法によれば、板状半導体１１２１はｎ型の半導体からなり、ｎ型を与える不純物量を増やすことにより容易に低抵抗化できる。それゆえ、板状半導体１１２１の高さＬを長くしても、板状半導体１１２１の根元部から先端部にわたって一様に発光させることができる。したがって、基板１１１１の面積当たりの発光量をさらに増やすことが可能となる。さらに、この製造方法によれば、板状半導体１１２１をフォトリソグラフィ工程と非等方的なエッチングにより形成しているので、狙い通りの良好な形状の板状半導体１１２１を得ることができて歩留まりを向上させることができる。 Since the p-type semiconductor layer 1123 is formed so as to cover the plate-like semiconductor 1121 made of n-type GaN by the manufacturing method in the second embodiment, almost all side surfaces of the plate-like semiconductor 1121 emit light. Therefore, the light emission amount per area of the substrate 1111 can be increased as compared with a light emitting diode chip having a planar light emitting layer. Further, according to this manufacturing method, the plate-like semiconductor 1121 is made of an n-type semiconductor, and the resistance can be easily reduced by increasing the amount of impurities that give the n-type. Therefore, even if the height L of the plate-like semiconductor 1121 is increased, light can be emitted uniformly from the root portion to the tip portion of the plate-like semiconductor 1121. Therefore, it is possible to further increase the light emission amount per area of the substrate 1111. Furthermore, according to this manufacturing method, since the plate-like semiconductor 1121 is formed by anisotropic etching with the photolithography process, the plate-like semiconductor 1121 having a good shape as intended can be obtained and the yield can be increased. Can be improved.
　さらに、上記製造方法では、上記半導体コア形成工程と上記半導体シェル形成工程の間にｎ型のＧａＮからなる板状半導体１１２１の表面を覆うようにＩｎＧａＮからなる活性層１２２を形成している。これにより発光効率を上げることができる。なお、この活性層１１２２は形成しなくてもよい。 Furthermore, in the manufacturing method, the active layer 122 made of InGaN is formed so as to cover the surface of the plate-like semiconductor 1121 made of n-type GaN between the semiconductor core forming step and the semiconductor shell forming step. Thereby, luminous efficiency can be raised. Note that the active layer 1122 may not be formed.
　さらに、上記製造方法では、上記半導体シェル形成工程の後にｐ型のＧａＮ半導体層１１２３を覆うように透明電極層１１２４を形成する。この透明電極層１１２４により、活性層１１２２から放射された光を透過しつつ、ｐ型のＧａＮ半導体層１１２３で電圧降下を起こすことを防ぐことができる。したがって、板状半導体１１２１の全体にわたって一様に発光させることができる。 Furthermore, in the manufacturing method, the transparent electrode layer 1124 is formed so as to cover the p-type GaN semiconductor layer 1123 after the semiconductor shell formation step. The transparent electrode layer 1124 can prevent a voltage drop in the p-type GaN semiconductor layer 1123 while transmitting light emitted from the active layer 1122. Therefore, light can be emitted uniformly over the entire plate-like semiconductor 1121.
　さらに、上記製造方法では、ｐ型のＧａＮ半導体層１１２３上に透明電極層１１２４を形成するが、複数のｎ型の板状半導体１１２１間の隙間の全てを透明電極層１１２４で埋めるのではなく、ｐ型のＧａＮ半導体層１１２３上に透明電極層１１２４を薄く形成した上で、残った隙間(透明電極層１１２４同士が対向する対向隙間)を透明部材１１３１で埋めている。これは、一般的に透明電極は電流を流すためのキャリアが存在するために、透明度が悪いためである。したがって、第１導電型の板状半導体１１２１がなす隙間をシリコン酸化膜や透明樹脂などで充填することにより、発光素子の発光効率を向上することができる。 Further, in the above manufacturing method, the transparent electrode layer 1124 is formed on the p-type GaN semiconductor layer 1123. Instead of filling all the gaps between the plurality of n-type plate-like semiconductors 1121 with the transparent electrode layer 1124, The transparent electrode layer 1124 is thinly formed on the p-type GaN semiconductor layer 1123, and the remaining gap (opposing gap where the transparent electrode layers 1124 face each other) is filled with the transparent member 1131. This is because the transparent electrode generally has poor transparency because of the presence of carriers for flowing current. Therefore, the light emitting efficiency of the light emitting element can be improved by filling the gap formed by the first conductive type plate-like semiconductor 1121 with a silicon oxide film or a transparent resin.
　この第２実施形態および前述の第１実施形態では、棒状半導体１２１や板状半導体１１２１を用いたが、これら半導体の形状はこの限りではない。半導体基部となる第１導電型の半導体層上に、第１導電型の突起状半導体が形成されており、この第１導電型の突起状半導体が第２導電型で覆われていることが本質的に重要である。したがって、この第１導電型の突起状半導体は、上記棒状、板状に限らず、曲がった板状でもよく、板状半導体が閉じた円環状(管状)でもよい。さらには、本発明の突起状半導体は、２方向に配列する板状半導体が互いに交差部分でつながって１つの格子状の突起状半導体を形成していてもよく、さらにまた、円柱形状,楕円柱形状,多角柱形状や円錐形状,多角錐形状,半球形状,球形状等でもよい。 In the second embodiment and the first embodiment described above, the rod-shaped semiconductor 121 and the plate-shaped semiconductor 1121 are used, but the shape of these semiconductors is not limited to this. It is essential that a first conductive type protruding semiconductor is formed on a first conductive type semiconductor layer serving as a semiconductor base, and that the first conductive type protruding semiconductor is covered with the second conductive type. Important. Therefore, the protruding semiconductor of the first conductivity type is not limited to the rod shape or the plate shape, but may be a bent plate shape or an annular shape (tubular shape) in which the plate semiconductor is closed. Further, in the protruding semiconductor of the present invention, the plate-shaped semiconductors arranged in two directions may be connected to each other at the intersection to form one lattice-shaped protruding semiconductor. It may be a shape, a polygonal column shape, a cone shape, a polygonal pyramid shape, a hemispherical shape, a spherical shape, or the like.
　　　(第３の実施の形態)
　次に、この発明の第３実施形態としての発光素子および発光装置の製造方法を、図８～図１７を用いて説明する。図８～図１７は、この第３実施形態で発光素子および発光装置を形成する工程を示す図である。 (Third embodiment)
Next, a method for manufacturing a light-emitting element and a light-emitting device as a third embodiment of the present invention will be described with reference to FIGS. 8 to 17 are views showing steps of forming a light emitting element and a light emitting device in the third embodiment.
　この第３実施形態の製造方法は、その前半の工程は、前述した第１実施形態で図２～図５を順に参照して説明した製造工程と同一である。したがって、ここでは、前述の図２から図５までの製造工程については、再度の説明を行わずに、図２から図５までの工程に引き続いて行なわれる工程を説明する。なお、この第３実施形態の製造方法の前半の工程は、上記第１実施形態の図２～図５の工程のうちの図３Ａで説明した工程を、前述の第２実施形態で図７Ｃを用いて説明した工程と置き換えて、第１導電型の突起状半導体を板状半導体としてもよい。 In the manufacturing method of the third embodiment, the first half of the process is the same as the manufacturing process described with reference to FIGS. 2 to 5 in the first embodiment. Therefore, here, the manufacturing process from FIG. 2 to FIG. 5 described above will be described following the process from FIG. 2 to FIG. The first half of the manufacturing method according to the third embodiment is the same as the process described with reference to FIG. 3A in the steps of FIGS. 2 to 5 of the first embodiment, and FIG. 7C in the second embodiment. Instead of the steps described above, the first conductive type protruding semiconductor may be a plate semiconductor.
　図５を参照して前述した工程でもって、ｎ型ＧａＮ棒状半導体１２１の表面に、順に、ＩｎＧａＮからなる活性層１２２、ｐ型ＧａＮからなる第２導電型の半導体層１２３およびＩＴＯからなる透明電極層１２４の成膜が行なわれる。その後、非等方性なドライエッチングを行う。この非等方性なドライエッチングにより、図８に示すように、ＩＴＯからなる透明電極層１２４、ｐ型ＧａＮからなる第２導電型の半導体層１２３、ＩｎＧａＮからなる活性層１２２、ＧａＮからなる第１導電型の棒状半導体１２１およびｎ型のＧａＮからなる第１導電型の半導体層１１３のそれぞれの一部を除去して、シリコンからなる基板１１１の一部を露出させる。これにより、ｎ型ＧａＮからなる棒状半導体１２１の残された部分の側壁には、ＩｎＧａＮ活性層１２２、ｐ型ＧａＮ半導体層１２３およびＩＴＯ透明電極層１２４が残される。また、ｎ型のＧａＮからなる半導体層１１３は、シリコン基板１１１上で互いに間隙を隔てた複数のｎ型ＧａＮ半導体層１２５となる。そして、各ｎ型ＧａＮ半導体層１２５上に１つのｎ型ＧａＮ棒状半導体１２１が立設された状態となり、このｎ型ＧａＮ半導体層１２５,ｎ型ＧａＮ棒状半導体１２１,ＩｎＧａＮ活性層１２２,ｐ型ＧａＮ半導体層１２３およびＩＴＯ透明電極層１２４からなる部分Ｚが、シリコン基板１１１上に間隔を隔てて複数立設された状態となる。 In the process described above with reference to FIG. 5, the active layer 122 made of InGaN, the second conductive type semiconductor layer 123 made of p-type GaN, and the transparent electrode made of ITO are sequentially formed on the surface of the n-type GaN rod-shaped semiconductor 121. Layer 124 is deposited. Thereafter, anisotropic dry etching is performed. By this anisotropic dry etching, as shown in FIG. 8, the transparent electrode layer 124 made of ITO, the second conductive type semiconductor layer 123 made of p-type GaN, the active layer 122 made of InGaN, and the first layer made of GaN. Part of each of the one-conductivity-type rod-shaped semiconductor 121 and the first-conductivity-type semiconductor layer 113 made of n-type GaN is removed to expose part of the substrate 111 made of silicon. As a result, the InGaN active layer 122, the p-type GaN semiconductor layer 123, and the ITO transparent electrode layer 124 are left on the side wall of the remaining portion of the rod-shaped semiconductor 121 made of n-type GaN. The semiconductor layer 113 made of n-type GaN becomes a plurality of n-type GaN semiconductor layers 125 spaced from each other on the silicon substrate 111. Then, one n-type GaN rod-shaped semiconductor 121 is erected on each n-type GaN semiconductor layer 125, and this n-type GaN semiconductor layer 125, n-type GaN rod-shaped semiconductor 121, InGaN active layer 122, p-type GaN. A plurality of portions Z each including the semiconductor layer 123 and the ITO transparent electrode layer 124 are erected on the silicon substrate 111 at intervals.
　次に、図９に示すように、シリコン基板１１１の表面上に突出した複数の部分Ｚを、シリコン基板１１１から切り離す(発光素子切り離し工程)。この時点では、前記した図２において、第１の基板１１０の一部をなしていたｎ型のＧａＮ半導体層１１２は、すべて上部構造(ｎ型ＧａＮ棒状半導体１２１,ｎ型ＧａＮ半導体層１２５)の形成に使われている。したがって、上記シリコン基板１１１は、第１の基板１１０と同義である。 Next, as shown in FIG. 9, the plurality of portions Z protruding on the surface of the silicon substrate 111 are separated from the silicon substrate 111 (light emitting element separating step). At this time, in FIG. 2, the n-type GaN semiconductor layer 112 forming a part of the first substrate 110 has an upper structure (n-type GaN rod-shaped semiconductor 121, n-type GaN semiconductor layer 125). Used for formation. Therefore, the silicon substrate 111 is synonymous with the first substrate 110.
　図９に示すように、切り離された複数の部分Ｚは、それぞれが発光素子２００となる。この発光素子２００のうちのシリコン基板１１１に接していた側ではｎ型ＧａＮ半導体層１２５が露出しており、シリコン基板１１１から離隔していた側では、ｐ型ＧａＮ半導体層１２３と電気的に接しているＩＴＯからなる透明電極層１２４が露出している。上記ｎ型ＧａＮ半導体層１２５がカソード電極Ｋとなり、上記透明電極層１２４がアノード電極Ａとなる。この切り離し工程では、例えば、溶液中で超音波を照射して棒状の部分Ｚを振動させることによって、棒状の部分Ｚをシリコン基板１１１から切断する。なお、第１導電型の突起状半導体を板状半導体とした場合は、このようにして切り離された発光素子も板状となる。しかしながら、板状の発光素子も以下の工程は同様であるため、以下では専ら発光素子は棒状であるとして説明を行う。 As shown in FIG. 9, each of the separated portions Z becomes a light emitting element 200. The n-type GaN semiconductor layer 125 is exposed on the side of the light emitting element 200 that is in contact with the silicon substrate 111, and the side that is separated from the silicon substrate 111 is in electrical contact with the p-type GaN semiconductor layer 123. The transparent electrode layer 124 made of ITO is exposed. The n-type GaN semiconductor layer 125 becomes the cathode electrode K, and the transparent electrode layer 124 becomes the anode electrode A. In this separation step, for example, the rod-shaped portion Z is cut from the silicon substrate 111 by irradiating ultrasonic waves in the solution to vibrate the rod-shaped portion Z. When the first conductive type protruding semiconductor is a plate-like semiconductor, the light-emitting element separated in this way is also plate-like. However, since the following steps are the same for the plate-like light emitting element, the following description will be made assuming that the light emitting element is rod-shaped exclusively.
　この第３実施形態の製造方法は、前述した図２～図５で説明した、第１の基板１１０の一部をなすｎ型の半導体層１１２の表面にフォトレジスト１５１でマスク層をパターニングする工程と、このマスク層をマスクとしてこのｎ型半導体層１１２を非等方的にエッチングして複数のｎ型の棒状半導体１２１を形成する半導体コア形成工程と、このｎ型の棒状半導体１２１の表面を覆うようにｐ型の半導体層１２３を形成する半導体シェル形成工程とを備える。なお、上記第１の基板１１０の全部をｎ型の半導体層１１２で構成してもよい。 In the manufacturing method of the third embodiment, the mask layer is patterned with the photoresist 151 on the surface of the n-type semiconductor layer 112 forming a part of the first substrate 110 described with reference to FIGS. A step of forming a semiconductor core by anisotropically etching the n-type semiconductor layer 112 using the mask layer as a mask to form a plurality of n-type rod-shaped semiconductors 121; and a surface of the n-type rod-shaped semiconductor 121 A semiconductor shell forming step of forming a p-type semiconductor layer 123 so as to cover it. Note that the entire first substrate 110 may be formed of the n-type semiconductor layer 112.
　これに加えて、この第３実施形態の製造方法は、図８,図９で説明した、ｐ型の半導体層１２３で覆われたｎ型の棒状半導体１２１を第１の基板１１０から切り離す発光素子切り離し工程を備える。これらの工程によれば、ｎ型のＧａＮ半導体層１１２を加工して形成された棒状の発光素子２００は、最終的にはそれぞれが独立した発光素子となる。 In addition to this, the manufacturing method of the third embodiment is a light emitting device that separates the n-type rod-shaped semiconductor 121 covered with the p-type semiconductor layer 123 from the first substrate 110, as described in FIGS. A separation process is provided. According to these steps, the rod-like light emitting element 200 formed by processing the n-type GaN semiconductor layer 112 finally becomes an independent light emitting element.
　したがって、それぞれの発光素子２００を個別自在に利用可能という点で、発光素子の利用方法を多様化し、利用価値を高めることができる。例えば、切り離した発光素子２００を所望の密度で所望の個数だけ配置することが可能となる。この場合、例えば、微細な発光素子２００を大面積の基板上に多数再配列して面発光装置を構成することができる。また、熱の発生密度を低くして高い信頼性や長寿命を実現することもできる。また、この製造方法によって、ｎ型の棒状半導体１２１を覆うようにｐ型の半導体層１２３が形成されるので、棒状半導体１２１のほぼ全側面が発光する。それゆえ、小面積の基板１１１(第１の基板１１０)から総発光量が大きな多数の発光素子２００を得ることができる。また、この製造方法によれば、棒状半導体１２１はｎ型の半導体からなり、ｎ型を与える不純物量を増やすことにより容易に低抵抗化できる。 Therefore, the use method of the light emitting elements can be diversified and the utility value can be increased in that each light emitting element 200 can be used individually and freely. For example, a desired number of separated light emitting elements 200 can be arranged at a desired density. In this case, for example, a surface light-emitting device can be configured by rearranging a large number of fine light-emitting elements 200 on a large-area substrate. In addition, the heat generation density can be lowered to achieve high reliability and long life. In addition, since the p-type semiconductor layer 123 is formed so as to cover the n-type rod-shaped semiconductor 121 by this manufacturing method, almost all side surfaces of the rod-shaped semiconductor 121 emit light. Therefore, a large number of light emitting elements 200 having a large total light emission amount can be obtained from the substrate 111 (first substrate 110) having a small area. Further, according to this manufacturing method, the rod-shaped semiconductor 121 is made of an n-type semiconductor, and the resistance can be easily reduced by increasing the amount of impurities giving the n-type.
　それゆえ、棒状半導体１２１の長さＬを長くしても、棒状半導体１２１の根元部から先端部にわたって一様に発光させることができる。さらに、この製造方法によれば、棒状半導体１２１をフォトリソグラフィ工程と非等方的なエッチングにより形成しているので、狙い通りの所望の良好な形状の棒状半導体１２１を得て、ひいては所望の良好な形状の発光素子２００を得ることができる。よって、発光素子２００の歩留まりを向上できる。 Therefore, even if the length L of the rod-shaped semiconductor 121 is increased, light can be emitted uniformly from the root portion to the tip portion of the rod-shaped semiconductor 121. Furthermore, according to this manufacturing method, since the rod-shaped semiconductor 121 is formed by anisotropic etching with the photolithography process, a desired-shaped rod-shaped semiconductor 121 is obtained as intended, and thus desired good A light-emitting element 200 having a simple shape can be obtained. Therefore, the yield of the light emitting element 200 can be improved.
　さらに、上記製造方法では、上記半導体コア形成工程と上記半導体シェル形成工程の間にｎ型の棒状半導体１２１の表面を覆うように活性層１２２を形成したので、発光効率を上げることができる。なお、この活性層１２２は形成しなくてもよい。 Furthermore, in the manufacturing method, since the active layer 122 is formed so as to cover the surface of the n-type rod-shaped semiconductor 121 between the semiconductor core forming step and the semiconductor shell forming step, the luminous efficiency can be increased. Note that the active layer 122 may not be formed.
　さらに、上記製造方法では、上記半導体シェル形成工程の後にｐ型の半導体層１２３を覆うように透明電極層１２４を形成したので、活性層１２２から放射された光を透過しつつ、ｐ型の半導体層１２３で電圧降下を起こすことを防ぐことができる。したがって、棒状半導体１２１の全体にわたって一様に発光させることができる。 Furthermore, in the manufacturing method, since the transparent electrode layer 124 is formed so as to cover the p-type semiconductor layer 123 after the semiconductor shell forming step, the p-type semiconductor is transmitted while transmitting the light emitted from the active layer 122. It is possible to prevent a voltage drop from occurring in the layer 123. Therefore, light can be emitted uniformly over the entire rod-shaped semiconductor 121.
　次に、図１０～図１７を順に参照して、シリコン基板１１１(第１の基板１１０)から切り離された発光素子２００を、第２の基板２１０上に配置し配線を行なう工程を説明する。 Next, with reference to FIG. 10 to FIG. 17 in sequence, a process of arranging and wiring the light emitting element 200 separated from the silicon substrate 111 (first substrate 110) on the second substrate 210 will be described.
　まず、図１０に示すような、表面に第１の電極２１１と第２の電極２１２が形成された第２の基板２１０を用意する。この第２の基板２１０は絶縁基板とし、第１、第２の電極２１１、２１２は、金属電極とする。一例として、印刷技術を利用して、第２の基板２１０の表面に所望の電極形状の金属電極を、上記第１，第２の電極２１１,２１２として形成することができる。また、第２の基板２１０の表面に金属膜および感光体膜を一様に堆積し、この感光体膜を所望の電極パターンに露光・現像し、パターニングされた感光体膜をマスクとして金属膜をエッチングして第１,第２の電極２１１,２１２を形成することができる。 First, as shown in FIG. 10, a second substrate 210 having a surface on which a first electrode 211 and a second electrode 212 are formed is prepared. The second substrate 210 is an insulating substrate, and the first and second electrodes 211 and 212 are metal electrodes. As an example, a metal electrode having a desired electrode shape can be formed on the surface of the second substrate 210 as the first and second electrodes 211 and 212 using a printing technique. Further, a metal film and a photoreceptor film are uniformly deposited on the surface of the second substrate 210, the photoreceptor film is exposed and developed to a desired electrode pattern, and the metal film is formed using the patterned photoreceptor film as a mask. The first and second electrodes 211 and 212 can be formed by etching.
　なお、上記第１,第２の電極２１１,２１２を作成する金属の材料としては、金、銀、銅、タングステン、アルミニウム、タンタルやそれらの合金などを用いることができる。また、第２の基板２１０は、ガラス、セラミック、アルミナ、樹脂のような絶縁体、またはシリコンのような半導体表面にシリコン酸化膜を形成し、表面が絶縁性を有するような基板である。第２の基板２１０としてガラス基板を用いる場合は、表面にシリコン酸化膜、シリコン窒化膜のような下地絶縁膜を形成するのが好ましい。 Note that gold, silver, copper, tungsten, aluminum, tantalum, and alloys thereof can be used as the metal material for forming the first and second electrodes 211 and 212. The second substrate 210 is an insulating material such as glass, ceramic, alumina, or resin, or a silicon oxide film formed on a semiconductor surface such as silicon, and the surface is insulative. In the case where a glass substrate is used as the second substrate 210, a base insulating film such as a silicon oxide film or a silicon nitride film is preferably formed on the surface.
　また、上記第１,第２の電極２１１,２１２の表面は、図示しない絶縁膜で覆われていてもよい。この場合、以下の効果を奏する。後の微細物体配置工程では、第２の基板２１０上に液体が導入された状態で第１の電極２１１と第２の電極２１２との間に電圧が印加されるが、このときに電極間に電流が流れるのを防ぐことができる。このような電流は、電極内で電圧降下を引き起こして配列不良の原因となることがあり、または電気化学的効果により電極が溶解する原因となりうる。第１,第２の電極２１１,２１２を覆う絶縁膜は、例えばシリコン酸化膜やシリコン窒化膜を用いることができる。一方、このような絶縁膜で覆わない場合、第１,第２の電極２１１,２１２と発光素子２００とを容易に電気的に接続できるので、第１,第２の電極２１１,２１２を配線として利用するのが容易になる。 Further, the surfaces of the first and second electrodes 211 and 212 may be covered with an insulating film (not shown). In this case, the following effects are produced. In the subsequent fine object arranging step, a voltage is applied between the first electrode 211 and the second electrode 212 in a state where the liquid is introduced onto the second substrate 210. Current can be prevented from flowing. Such a current can cause a voltage drop in the electrode and cause alignment failure, or can cause the electrode to dissolve due to electrochemical effects. As the insulating film covering the first and second electrodes 211 and 212, for example, a silicon oxide film or a silicon nitride film can be used. On the other hand, when not covered with such an insulating film, the first and second electrodes 211 and 212 and the light emitting element 200 can be easily electrically connected, so that the first and second electrodes 211 and 212 are used as wirings. Easy to use.
　第１の電極２１１の対向部分２１１Ａと第２の電極２１２の対向部分２１２Ａとが対向する場所Ｓにより、発光素子２００が配置される場所が規定される。すなわち、後に説明する発光素子配置工程において、発光素子２００は第１,第２の電極２１１,２１２が対向する場所Ｓに、第１,第２の電極２１１,２１２を架橋するように配置される。このため、第１,第２の電極２１１,２１２の対向部分２１１Ａ,２１２Ａが対向する場所Ｓにおける第１の電極２１１と第２の電極２１２の距離は、発光素子２００の長さよりもやや短いことが望ましい。一例として、発光素子２００が細長い短冊状であり、この発光素子２００の長さが２０μｍのとき、第１の電極２１１の対向部分２１１Ａと第２の電極２１２の対向部分２１２Ａとの間の距離は１２μｍ～１８μｍとすることが望ましい。すなわち、上記距離は、発光素子２００の長さの６０～９０％程度、より好ましくは上記発光素子２００の長さの８０～９０％程度とすることが望ましい。 The place where the light emitting element 200 is arranged is defined by the place S where the facing portion 211A of the first electrode 211 and the facing portion 212A of the second electrode 212 face each other. That is, in the light emitting element disposition process described later, the light emitting element 200 is disposed at a location S where the first and second electrodes 211 and 212 face each other so as to bridge the first and second electrodes 211 and 212. . For this reason, the distance between the first electrode 211 and the second electrode 212 in the place S where the facing portions 211A and 212A of the first and second electrodes 211 and 212 face each other is slightly shorter than the length of the light emitting element 200. Is desirable. As an example, when the light emitting element 200 has a long and narrow strip shape, and the length of the light emitting element 200 is 20 μm, the distance between the facing portion 211A of the first electrode 211 and the facing portion 212A of the second electrode 212 is It is desirable that the thickness is 12 μm to 18 μm. That is, the distance is preferably about 60 to 90% of the length of the light emitting element 200, more preferably about 80 to 90% of the length of the light emitting element 200.
　次に、図１１に示すように、複数の発光素子２００を含んだ流体２２１を、第２の基板２１０上に導入する。上記複数の発光素子２００は、流体２２１内に分散している。なお、図１１では、図９のＶ－Ｖ線からみた第２の基板２１０の断面を示している。 Next, as shown in FIG. 11, a fluid 221 including a plurality of light emitting elements 200 is introduced onto the second substrate 210. The plurality of light emitting elements 200 are dispersed in the fluid 221. Note that FIG. 11 shows a cross section of the second substrate 210 taken along line VV of FIG.
　上記流体２２１は、ＩＰＡ(イソプロピルアルコール)、エタノール、メタノール、エチレングリコール、プロピレングリコール、アセトン、水などの液体、またはそれらの混合物を用いることができるが、この限りではない。ただし、流体２２１が持つべき好ましい性質として、発光素子の配列を妨げないよう粘性が低いこと、イオン濃度が著しく高くないこと、発光素子の配列後に基板を乾燥できるようにするため揮発性を有することである。なお、イオン濃度が著しく高い液体を用いた場合、第１,第２の電極２１１,２１２に電圧を印加した際に電極上に速やかに電気二重層が形成されて電界が液体中に浸透するのを妨害するため、発光素子の配列を阻害することとなる。 The fluid 221 may be a liquid such as IPA (isopropyl alcohol), ethanol, methanol, ethylene glycol, propylene glycol, acetone, water, or a mixture thereof, but is not limited thereto. However, as preferable properties that the fluid 221 should have, the viscosity is low so as not to disturb the arrangement of the light-emitting elements, the ion concentration is not extremely high, and the substrate is volatile so that the substrate can be dried after the arrangement of the light-emitting elements. It is. When a liquid having a remarkably high ion concentration is used, when a voltage is applied to the first and second electrodes 211 and 212, an electric double layer is quickly formed on the electrodes and the electric field penetrates into the liquid. Therefore, the arrangement of the light emitting elements is hindered.
　なお、図示していないが、第２の基板２１０上に第２の基板２１０と対向してカバーを設けるのが好ましい。このカバーは、第２の基板２１０と平行に設置され、第２の基板２１０とカバーの間には一様な隙間(例えば５００μｍ)が設けられる。この隙間に発光素子２００を含んだ流体２２１を満たす。こうすることにより、次に述べる微細物体配置工程で、上記隙間によるチャネル中に一様な速度で流体を流すことが可能となり、第２の基板２１０上に複数の発光素子２００を一様に配置することが可能となる。また、次の微細物体配置工程で、流体２２１が蒸発して対流を引き起こし、発光素子２００の配置を乱すことを防ぐことができる。 Although not shown, it is preferable to provide a cover on the second substrate 210 so as to face the second substrate 210. The cover is installed in parallel with the second substrate 210, and a uniform gap (for example, 500 μm) is provided between the second substrate 210 and the cover. A fluid 221 including the light emitting element 200 is filled in the gap. By doing so, it becomes possible to flow a fluid at a uniform speed in the channel due to the gap in the fine object arranging step described below, and a plurality of light emitting elements 200 are arranged uniformly on the second substrate 210. It becomes possible to do. Further, it is possible to prevent the fluid 221 from evaporating and causing convection and disturbing the arrangement of the light emitting elements 200 in the next fine object arranging step.
　次に、第１の電極２１１と第２の電極２１２の間に、図１２に示すような波形の電圧を印加し、その結果として、図１３の平面図および図１４の断面図に示すように、発光素子２００が第２の基板２１０上の所定の位置に配置される(発光素子配置工程)。なお、図１４は、図１３のＶ－Ｖ線からみた断面図を示している。 Next, a voltage having a waveform as shown in FIG. 12 is applied between the first electrode 211 and the second electrode 212. As a result, as shown in the plan view of FIG. 13 and the cross-sectional view of FIG. The light emitting element 200 is arranged at a predetermined position on the second substrate 210 (light emitting element arrangement step). FIG. 14 is a sectional view taken along line VV in FIG.
　発光素子２００が第２の基板２１０上の所定の位置に配置される原理は、以下のように説明される。第１の電極２１１と第２の電極２１２の間に、図１２で示すような交流電圧を印加する。第２の電極２１２に図１２に示す基準電位ＶＲを印加し、第１の電極２１１には振幅ＶPPL／２の交流電圧を印加する。第１の電極２１１と第２の電極２１２との間に電圧が印加されると、流体２２１内に電界が発生する。この電界により、発光素子２２０に分極が発生し、または電荷が誘起され、発光素子２２０の表面には電荷が誘起される。この誘起された電荷により、第１,第２の電極２１１,２１２と発光素子２００との間に引力が働く。実際は、誘電泳動が起こるためには物体のまわりに電界勾配が存在する必要があり、無限に大きな平行平板中に存在する物体には誘電泳動は働かないが、図１１に示すような電極配置では電極に近いほど電界が強いから、誘電泳動が発生する。 The principle that the light emitting element 200 is arranged at a predetermined position on the second substrate 210 will be described as follows. An alternating voltage as shown in FIG. 12 is applied between the first electrode 211 and the second electrode 212. The reference potential V R shown in Figure 12 to the second electrode 212 is applied, the first electrode 211 applies an AC voltage of amplitude VPPL / 2. When a voltage is applied between the first electrode 211 and the second electrode 212, an electric field is generated in the fluid 221. By this electric field, polarization occurs in the light emitting element 220 or charges are induced, and charges are induced on the surface of the light emitting element 220. Due to the induced electric charge, an attractive force acts between the first and second electrodes 211 and 212 and the light emitting element 200. Actually, in order for dielectrophoresis to occur, an electric field gradient needs to exist around the object, and dielectrophoresis does not work on an object that exists in an infinitely large parallel plate, but with an electrode arrangement as shown in FIG. Since the electric field is stronger as it is closer to the electrode, dielectrophoresis occurs.
　なお、上記方法により発光素子配置工程を行なった場合には、図１３に示すように、発光素子２００の向き(極性)はランダムになることに注意すべきである。ここで、上記発光素子２００の向き(極性)とは、図１３において、上記発光素子２００のアノードＡがカソードＫの右側である向きと、上記発光素子２００のアノードＡがカソードＫの左側である向きとのいずれの向きであるのかを言う。また、このようにして、複数の発光素子２００の向きがランダムに配置された発光装置の適切な動作方法は後述する。 It should be noted that when the light emitting element arranging step is performed by the above method, the direction (polarity) of the light emitting element 200 is random as shown in FIG. Here, the direction (polarity) of the light emitting element 200 is the direction in which the anode A of the light emitting element 200 is on the right side of the cathode K and the anode A of the light emitting element 200 is on the left side of the cathode K in FIG. Say which direction it is. In addition, an appropriate operation method of the light emitting device in which the directions of the plurality of light emitting elements 200 are randomly arranged will be described later.
　上記流体２２１としてＩＰＡを用いた場合、第１の電極２１１に与える交流電圧の周波数は、１０Ｈｚ～１ＭＨｚとするのが好ましく、５０Ｈｚ～１ｋＨｚとするのが最も配列が安定し、より好ましい。さらに、第１の電極２１１と第２の電極２１２の間に印加するＡＣ電圧は、正弦波に限らず、矩形波、三角波、ノコギリ波など、周期的に変動するものであればよい。第１の電極２１１に与える交流電圧の振幅の２倍ＶPPLは、０．１～１０Ｖとすることができるが、０．１Ｖ以下では発光素子２００の配列が悪くなり、１０Ｖ以上では発光素子２００が直ちに基板１１０上に固着して配置の歩留りが悪化する。したがって、上記ＶPPLは、１～５Ｖが好ましく、さらには１Ｖ程度とするのが好ましかった。 When IPA is used as the fluid 221, the frequency of the AC voltage applied to the first electrode 211 is preferably 10 Hz to 1 MHz, and more preferably 50 Hz to 1 kHz because the arrangement is most stable. Furthermore, the AC voltage applied between the first electrode 211 and the second electrode 212 is not limited to a sine wave, but may be any one that periodically varies, such as a rectangular wave, a triangular wave, and a sawtooth wave. The VPPL, which is twice the amplitude of the AC voltage applied to the first electrode 211, can be set to 0.1 to 10 V. However, when the voltage is 0.1 V or less, the arrangement of the light emitting elements 200 is deteriorated. Immediately fixed on the substrate 110, the yield of the arrangement deteriorates. Therefore, the above VPPL is preferably 1 to 5V, more preferably about 1V.
　次に、図１５に示すように、第２の基板２１０上への発光素子２００の配置が完了した後、上記交流電圧を上記第１の電極２１１と第２の電極２１２の間に印加したままで、第２の基板２１０を加熱することにより、上記流体２２１の液体を蒸発させて乾燥させ、発光素子２００を第２の基板２１０上に固着させる。もしくは、上記第２の基板２１０上への発光素子２００の配置が完了した後、第１の電極２１１および第２の電極２１２に十分な高電圧(１０～１００Ｖ)を印加して発光素子２００を第２の基板２１０上に固着させ、上記高電圧の印加を停止してから上記第２の基板２１０を乾燥させる。 Next, as shown in FIG. 15, after the arrangement of the light emitting element 200 on the second substrate 210 is completed, the AC voltage is applied between the first electrode 211 and the second electrode 212. Thus, by heating the second substrate 210, the liquid of the fluid 221 is evaporated and dried, and the light emitting element 200 is fixed onto the second substrate 210. Alternatively, after the arrangement of the light-emitting element 200 over the second substrate 210 is completed, a sufficient high voltage (10 to 100 V) is applied to the first electrode 211 and the second electrode 212 so that the light-emitting element 200 is formed. The second substrate 210 is dried after being fixed on the second substrate 210 and the application of the high voltage is stopped.
　次に、図１６に示すように、シリコン酸化膜からなる層間絶縁膜２１３を第２の基板全面に堆積する。 Next, as shown in FIG. 16, an interlayer insulating film 213 made of a silicon oxide film is deposited on the entire surface of the second substrate.
　次に、図１７に示すように、一般的なフォトリソグラフィ工程およびドライエッチング工程を適用することにより層間絶縁膜２１３にコンタクト孔２１７を形成し、さらにメタル堆積工程、フォトリソグラフィ工程、エッチング工程によりメタルをパターニングしてメタル配線２１４,２１５を形成する(発光素子配線工程)。これにより、発光素子２００のアノードＡとカソードＫをそれぞれ配線することができる。以上で発光装置２５０が完成した。 Next, as shown in FIG. 17, a contact hole 217 is formed in the interlayer insulating film 213 by applying a general photolithography process and a dry etching process, and further a metal is deposited by a metal deposition process, a photolithography process, and an etching process. Are patterned to form metal wirings 214 and 215 (light emitting element wiring step). Thereby, the anode A and the cathode K of the light emitting element 200 can be wired respectively. Thus, the light emitting device 250 is completed.
　このように、この第３実施形態の製造方法は、前述した図２～図５で説明した、第１の基板１１０の一部もしくは全部をなすｎ型の半導体層１１２の表面にフォトレジスト１５１でマスク層をパターニングする工程と、このマスク層をマスクとしてこのｎ型半導体層１１２を非等方的にエッチングして複数のｎ型の棒状半導体１２１を形成する半導体コア形成工程と、このｎ型の棒状半導体１２１の表面を覆うようにｐ型の半導体層１２３を形成する半導体シェル形成工程とを備える。さらに、この第３実施形態の製造方法は、図８,図９を参照して説明した、ｐ型の半導体層１２３で覆われたｎ型の棒状半導体１２１を第１の基板１１０から切り離す発光素子切り離し工程を備える。これに加えて、上記第１の基板１１０のシリコン基板１１１から切り離されたｐ型の半導体層１２３で覆われたｎ型の棒状半導体１２１を第２の基板２１０上に配置する発光素子配置工程と、上記第２の基板２１０上に配置されたｐ型の半導体層１２３で覆われたｎ型の棒状半導体１２１に通電するための配線２１４,２１５を行なう発光素子配線工程とを備える。 As described above, in the manufacturing method of the third embodiment, the photoresist 151 is formed on the surface of the n-type semiconductor layer 112 constituting part or all of the first substrate 110 described with reference to FIGS. A step of patterning the mask layer, a step of forming a semiconductor core in which the n-type semiconductor layer 112 is anisotropically etched using the mask layer as a mask to form a plurality of n-type rod-shaped semiconductors 121; A semiconductor shell forming step of forming a p-type semiconductor layer 123 so as to cover the surface of the rod-shaped semiconductor 121. Furthermore, in the manufacturing method of the third embodiment, the light emitting element that separates the n-type rod-shaped semiconductor 121 covered with the p-type semiconductor layer 123 from the first substrate 110 described with reference to FIGS. A separation process is provided. In addition to this, a light emitting element arrangement step of arranging an n-type rod-shaped semiconductor 121 covered with a p-type semiconductor layer 123 separated from the silicon substrate 111 of the first substrate 110 on the second substrate 210; And a light emitting element wiring step of performing wirings 214 and 215 for energizing the n-type rod-shaped semiconductor 121 covered with the p-type semiconductor layer 123 disposed on the second substrate 210.
　このような製造工程によれば、上記切り離した発光素子２００を、第２の基板２１０上に所望の密度で所望の個数配置することができる。したがって、例えば、微細な発光素子２００を大面積の第２の基板２１０上に多数再配列して面発光装置を構成することができる。また、熱の発生密度を低くして高い信頼性や長寿命を実現することもできる。 According to such a manufacturing process, a desired number of the separated light emitting elements 200 can be arranged on the second substrate 210 with a desired density. Therefore, for example, a surface light emitting device can be configured by rearranging a number of fine light emitting elements 200 on the second substrate 210 having a large area. In addition, the heat generation density can be lowered to achieve high reliability and long life.
　なお、前述したように、上記発光素子配置工程を行なった場合、図１３に示すように、発光素子２００の向き(つまり図１３においてアノードＡがカソードＫの右側に位置しているか左側に位置しているか)がランダムになっていた。このような場合、無論、２つのメタル配線２１４、２１５間に直流電圧を印加してもよいが、この場合、約半数の発光素子２００には逆方向電圧が印加されて発光しない。そこで、２つのメタル配線２１４,２１５間に交流電圧を印加するのが好ましい。このようにすれば、全ての発光素子２００を発光させることが可能となる。 As described above, when the light emitting element arranging step is performed, as shown in FIG. 13, the direction of the light emitting element 200 (that is, the anode A is located on the right side or the left side of the cathode K in FIG. 13). Was random). In such a case, of course, a DC voltage may be applied between the two metal wirings 214 and 215. In this case, however, a reverse voltage is applied to about half of the light emitting elements 200 and no light is emitted. Therefore, it is preferable to apply an AC voltage between the two metal wirings 214 and 215. In this way, all the light emitting elements 200 can emit light.
　　　(第４の実施の形態)
　次に、図１８～図２１を参照して、この発明の第３実施形態として、本発明の発光装置の製造方法を用いて形成した発光装置を備えた照明装置を説明する。 (Fourth embodiment)
Next, with reference to FIG. 18 to FIG. 21, as a third embodiment of the present invention, an illuminating device including a light emitting device formed by using the method for manufacturing a light emitting device of the present invention will be described.
　図１８は、この第４実施形態の照明装置であるＬＥＤ電球３００の側面図である。このＬＥＤ電球３００は、外部のソケットに嵌めて商用電源に接続するための電源接続部としての口金３０１と、その口金３０１に一端が接続され、他端が徐々に拡径する円錐形状の放熱部３０２と、放熱部３０２の他端側を覆う透光部３０３とを備えている。上記放熱部３０２内に、発光部３０４を配置している。 FIG. 18 is a side view of an LED bulb 300 that is the illumination device of the fourth embodiment. This LED bulb 300 has a base 301 as a power supply connection part that is fitted in an external socket and connected to a commercial power supply, and a conical heat dissipation part that has one end connected to the base 301 and the other end gradually expanding in diameter. 302 and a translucent part 303 that covers the other end of the heat dissipating part 302. A light emitting unit 304 is disposed in the heat radiating unit 302.
　発光部３０４は、図１９の側面図および図２０の上面図に示すように、正方形状の放熱板３０５上に、多数の発光素子が配置された発光装置３０６が実装されている。この発光装置３０６は、図２１に示すように、基板３１０と、基板３１０上に形成された第１の電極３１１および第２の電極３１２と、多数の発光素子３２０からなっている。基板３１０上に微細な発光素子(発光ダイオード)３２０を配置する方法および配線をする方法は、前述した第３実施形態に記載した方法を用いればよい。すなわち、発光装置３０６は、前述の第３実施形態に記載した方法で製造される。 As shown in the side view of FIG. 19 and the top view of FIG. 20, the light emitting unit 304 is mounted with a light emitting device 306 in which a large number of light emitting elements are arranged on a square heat sink 305. As shown in FIG. 21, the light emitting device 306 includes a substrate 310, a first electrode 311 and a second electrode 312 formed on the substrate 310, and a large number of light emitting elements 320. The method described in the third embodiment described above may be used as a method for arranging a fine light emitting element (light emitting diode) 320 on the substrate 310 and a method for wiring. That is, the light emitting device 306 is manufactured by the method described in the third embodiment.
　図２１では、２７個の発光素子３２０が描かれているが、より多数の発光素子を配置することができる。例えば、１つの発光素子３２０の大きさが、前述の第２実施形態で例示したように、長さが２０μｍで直径が１μｍとし、１つの発光素子３２０が発する光束を５ミリルーメンとし、５０，０００個の発光素子３２０を基板３１０上に配置して全体で２５０ルーメンの光束を発する発光基板とすることができる。 In FIG. 21, although 27 light emitting elements 320 are depicted, a larger number of light emitting elements can be arranged. For example, the size of one light emitting element 320 is 20 μm in length and 1 μm in diameter as exemplified in the second embodiment, and the luminous flux emitted from one light emitting element 320 is 5 millimeters. Thousand light-emitting elements 320 can be arranged on the substrate 310 to form a light-emitting substrate that emits a total of 250 lumens.
　このように、多数の発光素子３２０を基板３１０上に配置した発光装置３０６を用いれば、１つまたは数個の発光素子を配置した発光装置を用いる場合に比べて以下の効果を得ることができる。まず、１つ１つの発光素子３２０の発光面積が小さく、かつそれらが基板３１０上に分散しているので、発光に伴う熱の発生密度が小さく、かつ、均等にすることができる。一方、通常の発光素子(発光ダイオード)は発光面積が大きい(１ｍｍ２に達することもある)ので、発光に伴う熱の発生密度が大きく、発光層が高温となって発光効率や信頼性に影響を与えている。この第３実施形態のように、多数の微細な発光素子３２０を発光装置３０６の基板３１０上に配置することにより、発光効率を向上して信頼性を向上させることができる。 As described above, when the light emitting device 306 in which a large number of light emitting elements 320 are arranged on the substrate 310 is used, the following effects can be obtained as compared with the case of using a light emitting device in which one or several light emitting elements are arranged. . First, since the light emitting area of each light emitting element 320 is small and they are dispersed on the substrate 310, the heat generation density associated with light emission is small and uniform. On the other hand, since a normal light emitting element (light emitting diode) has a large light emitting area (may reach 1 mm 2 ), the heat generation density associated with light emission is large, and the light emitting layer becomes hot, affecting the light emission efficiency and reliability. Is given. As in the third embodiment, by arranging a large number of fine light emitting elements 320 on the substrate 310 of the light emitting device 306, the light emission efficiency can be improved and the reliability can be improved.
　　　(第５の実施の形態)
　図２２は、本発明の第５実施形態としてのバックライトを示す平面図である。この第５実施形態は、前述の第３実施形態で説明したような本発明の発光装置の製造方法で製造される発光装置を備える。 (Fifth embodiment)
FIG. 22 is a plan view showing a backlight as a fifth embodiment of the present invention. The fifth embodiment includes a light emitting device manufactured by the method for manufacturing a light emitting device of the present invention as described in the above third embodiment.
　この第５実施形態のバックライト４００は、図２２に示すように、放熱板の一例としての長方形状の支持基板４０１上に、複数の発光装置４０２が互いに所定の間隔をあけて格子状に実装されている。ここで、発光装置４０２は、前述の第２実施形態の発光装置の製造方法を用いて製造された発光装置である。この発光装置４０２では、基板(図示せず)上に１００個以上の発光素子が配置されている。 In the backlight 400 of the fifth embodiment, as shown in FIG. 22, a plurality of light emitting devices 402 are mounted in a grid pattern at predetermined intervals on a rectangular support substrate 401 as an example of a heat sink. Has been. Here, the light emitting device 402 is a light emitting device manufactured using the method for manufacturing a light emitting device of the second embodiment described above. In the light emitting device 402, 100 or more light emitting elements are arranged on a substrate (not shown).
　上記構成のバックライトによれば、発光装置４０２を用いることにより、明るさのばらつきが少なくかつ長寿命化と高効率化が図れるバックライトを実現することができる。また、上記発光装置４０２を支持基板４０１上に取り付けることによって、さらに放熱効果が向上する。 According to the backlight having the above-described configuration, by using the light emitting device 402, it is possible to realize a backlight that has little variation in brightness and can achieve a long lifetime and high efficiency. Further, by attaching the light emitting device 402 on the support substrate 401, the heat dissipation effect is further improved.
　　　(第６の実施の形態)
　次に、図２３を参照して、この発明の第６実施形態としてのＬＥＤディスプレイを説明する。この第６実施形態は、本発明の発光装置の製造方法と同様な方法を用いて製造される表示装置に関する。 (Sixth embodiment)
Next, with reference to FIG. 23, the LED display as 6th Embodiment of this invention is demonstrated. The sixth embodiment relates to a display device manufactured using a method similar to the method for manufacturing a light emitting device of the present invention.
　図２３は、この第６実施形態としてのＬＥＤディスプレイの１画素の回路を示している。このＬＥＤディスプレイは、本発明の発光素子または発光装置の製造方法を用いて製造されたものである。このＬＥＤディスプレイが備える発光素子としては、前述の第３実施形態で説明した発光素子２００を用いることができる。 FIG. 23 shows a circuit of one pixel of the LED display as the sixth embodiment. This LED display is manufactured using the manufacturing method of the light emitting element or the light emitting device of the present invention. As the light emitting element included in the LED display, the light emitting element 200 described in the third embodiment can be used.
　このＬＥＤディスプレイは、アクティブマトリックスアドレス方式であり、選択電圧パルスが行アドレス線Ｘ１に供給され、データ信号が列アドレス線Ｙ１に送られる。上記選択電圧パルスがトランジスタＴ１のゲートに入力されて、トランジスタＴ１がオンすると、上記データ信号は、トランジスタＴ１のソースからドレインに伝達され、データ信号はキャパシタＣに電圧として記憶される。トランジスタＴ２は画素ＬＥＤ５２０の駆動用であり、この画素ＬＥＤ２０は、前述の第３実施形態で説明した発光素子２００を用いることができる。 This LED display is an active matrix address system, a selection voltage pulse is supplied to the row address line X1, and a data signal is sent to the column address line Y1. When the selection voltage pulse is input to the gate of the transistor T1 and the transistor T1 is turned on, the data signal is transmitted from the source to the drain of the transistor T1, and the data signal is stored as a voltage in the capacitor C. The transistor T2 is for driving the pixel LED 520, and the light emitting element 200 described in the third embodiment can be used for the pixel LED 20.
　上記画素ＬＥＤ５２０は上記トランジスタＴ２を経て電源Ｖｓに接続されている。よって、トランジスタＴ１からのデータ信号でトランジスタＴ２がオンすることにより、画素ＬＥＤ５２０は上記電源Ｖｓによって駆動される。 The pixel LED 520 is connected to the power source Vs through the transistor T2. Therefore, when the transistor T2 is turned on by the data signal from the transistor T1, the pixel LED 520 is driven by the power source Vs.
　この実施形態のＬＥＤディスプレイは、図２３に示す１画素がマトリックス状に配列されている。このマトリックス状に配列された各画素の画素ＬＥＤ５２０とトランジスタＴ１,Ｔ２が基板上に形成されている。 In the LED display of this embodiment, one pixel shown in FIG. 23 is arranged in a matrix. A pixel LED 520 and transistors T1 and T2 of each pixel arranged in a matrix are formed on the substrate.
　この実施形態のＬＥＤディスプレイを作製するためには、例えば、以下のような工程を行なえばよい。 In order to produce the LED display of this embodiment, for example, the following steps may be performed.
　まず、前述の第３実施形態の製造方法で図２～図５、図８および図９を参照して説明した半導体コア形成工程、半導体シェル形成工程、発光素子切り離し工程によって、発光素子２００を形成する。次に、トランジスタＴ１、Ｔ２をガラス等の基板上に、通常のＴＦＴ形成方法を用いて形成する。次に、ＴＦＴを形成した基板上に、画素ＬＥＤ５２０となる微小な発光素子を配置するための、第１の電極および第２の電極を形成する。次に、前述の第３実施形態で図１０～図１６を参照して説明した方法を用いて、上記基板上の所定の位置に微小な発光素子２００を配置する(発光素子配置工程)。その後、上部配線工程を行ない、上記微小な発光素子２００をトランジスタＴ２のドレインとアース線とに接続する(発光素子配線工程)。 First, the light emitting device 200 is formed by the semiconductor core forming step, the semiconductor shell forming step, and the light emitting device separating step described with reference to FIGS. 2 to 5, 8, and 9 in the manufacturing method of the third embodiment. To do. Next, the transistors T1 and T2 are formed on a substrate such as glass using a normal TFT forming method. Next, a first electrode and a second electrode for arranging minute light-emitting elements to be the pixel LEDs 520 are formed on the substrate on which the TFT is formed. Next, using the method described with reference to FIGS. 10 to 16 in the third embodiment, a minute light emitting element 200 is disposed at a predetermined position on the substrate (light emitting element disposing step). Thereafter, an upper wiring process is performed to connect the minute light emitting element 200 to the drain of the transistor T2 and the ground line (light emitting element wiring process).
　すなわち、上記製造工程は、前述の第３実施形態で図２～図５を参照して説明したように、第１の基板１１０の一部もしくは全部をなすｎ型の半導体層１１２の表面にフォトレジスト１５１でマスク層をパターニングする工程と、このマスク層をマスクとしてこのｎ型半導体層１１２を非等方的にエッチングして複数のｎ型の棒状半導体１２１を形成する半導体コア形成工程と、このｎ型の棒状半導体１２１の表面を覆うようにｐ型の半導体層１２３を形成する半導体シェル形成工程とを備える。さらに、上記製造工程は、前述の第３実施形態で図８,図９を参照して説明した、ｐ型の半導体層１２３で覆われたｎ型の棒状半導体１２１を第１の基板１１０から切り離す発光素子切り離し工程を備える。これに加えて、上記製造工程は、上記第１の基板１１０のシリコン基板１１１から切り離されたｐ型の半導体層１２３で覆われたｎ型の棒状半導体１２１を第２の基板上の画素位置に対応して配置する発光素子配置工程と、上記第２の基板上の画素位置に対応して配置されたｐ型の半導体層１２３で覆われたｎ型の棒状半導体１２１に通電するための配線を行なう発光素子配線工程とを備える。 That is, the manufacturing process is performed on the surface of the n-type semiconductor layer 112 constituting a part or the whole of the first substrate 110 as described with reference to FIGS. 2 to 5 in the third embodiment. A step of patterning a mask layer with a resist 151; a step of forming a semiconductor core in which the n-type semiconductor layer 112 is anisotropically etched using the mask layer as a mask to form a plurality of n-type rod-shaped semiconductors 121; a semiconductor shell forming step of forming a p-type semiconductor layer 123 so as to cover the surface of the n-type rod-shaped semiconductor 121. Further, in the manufacturing process, the n-type rod-shaped semiconductor 121 covered with the p-type semiconductor layer 123 described in the third embodiment with reference to FIGS. 8 and 9 is separated from the first substrate 110. A light emitting element separating step; In addition, in the manufacturing process, the n-type rod-shaped semiconductor 121 covered with the p-type semiconductor layer 123 separated from the silicon substrate 111 of the first substrate 110 is placed at the pixel position on the second substrate. Corresponding light emitting element arranging steps and wiring for energizing the n-type rod-shaped semiconductor 121 covered with the p-type semiconductor layer 123 arranged corresponding to the pixel position on the second substrate. And a light emitting element wiring step to be performed.
　上記製造工程によれば、ｎ型の棒状半導体１２１の表面を覆うようにｐ型の半導体層１２３が形成されているので、第１の基板１１０の単位面積当たりの発光面積が非常に大きく、例えば、平面的なエピタキシャル成長の場合の１０倍とすることができる。同じ発光量を得るために基板の枚数を、例えば、１０分の１として、製造コストを大幅に低減することができる。すなわち、発光素子として機能するｐ型の半導体層１２３で覆われたｎ型の棒状半導体１２１の製造コストを大きく低減することができる。そして、ｐ型の半導体層１２３で覆われたｎ型の棒状半導体１２１は第１の基板１１０のシリコン基板１１１から切り離され、この実施形態の表示装置のパネルとなる第２の基板上に配置され、さらに配線されて表示装置が製造される。この実施形態の表示装置の画素数は、例えば約６００万となるので、その画素毎に発光素子を使用する場合は、発光素子のコストは極めて重要である。したがって、上記工程によって表示装置を製造することにより、表示装置の製造コストを低減できる。 According to the manufacturing process described above, since the p-type semiconductor layer 123 is formed so as to cover the surface of the n-type rod-shaped semiconductor 121, the light emission area per unit area of the first substrate 110 is very large. , And 10 times that in the case of planar epitaxial growth. In order to obtain the same light emission amount, the number of substrates can be reduced to, for example, 1/10, and the manufacturing cost can be greatly reduced. That is, the manufacturing cost of the n-type rod-shaped semiconductor 121 covered with the p-type semiconductor layer 123 functioning as a light-emitting element can be greatly reduced. Then, the n-type rod-shaped semiconductor 121 covered with the p-type semiconductor layer 123 is separated from the silicon substrate 111 of the first substrate 110, and is disposed on the second substrate that becomes the panel of the display device of this embodiment. Further, the display device is manufactured by wiring. Since the number of pixels of the display device of this embodiment is about 6 million, for example, when a light emitting element is used for each pixel, the cost of the light emitting element is extremely important. Therefore, manufacturing the display device through the above steps can reduce the manufacturing cost of the display device.
　なお、この実施形態における画素ＬＥＤ５２０としての発光素子２００の第２の基板上への配置方法(図１０～図１６参照)では、画素ＬＥＤ５２０のアノードとカソードの向きがランダムになるため、この画素ＬＥＤ５２０は交流駆動する。 In the method of arranging the light emitting element 200 as the pixel LED 520 in this embodiment on the second substrate (see FIGS. 10 to 16), the orientation of the anode and cathode of the pixel LED 520 is random. Is AC driven.
　また、上記説明では、一例として、第１導電型の半導体基部としての半導体層１１３と第１導電型の棒状半導体１２１をｎ型とし、第２導電型の半導体層１２３をｐ型とした場合を説明したが、第１導電型の半導体基部としての半導体層１１３と第１導電型の棒状半導体１２１をｐ型とし、第２導電型の半導体層１２３をｎ型としてもよい。 In the above description, as an example, the case where the semiconductor layer 113 as the first conductivity type semiconductor base and the first conductivity type rod-shaped semiconductor 121 are n-type and the second conductivity type semiconductor layer 123 is p-type. As described above, the semiconductor layer 113 as the first conductivity type semiconductor base and the first conductivity type rod-shaped semiconductor 121 may be p-type, and the second conductivity type semiconductor layer 123 may be n-type.
　　　(第７の実施の形態)
　図２４Ａは、この発明のダイオードの第７実施形態としての発光ダイオード２００５の斜視図であり、図２４Ｂは上記発光ダイオード２００５の断面図である。 (Seventh embodiment)
24A is a perspective view of a light emitting diode 2005 as a seventh embodiment of the diode of the present invention, and FIG. 24B is a cross-sectional view of the light emitting diode 2005. FIG.
　この第７実施形態の発光ダイオード２００５は、コア部としての円柱形状の棒状コア２００１とこの円柱形状の棒状コア２００１を覆う第１導電型の半導体層としての円筒形状の第１のシェル２００２と上記円筒形状の第１のシェル２００２を覆う第２導電型の半導体層としての円筒形状の第２のシェル２００３を備える。上記棒状コア２００１の両端部２００１Ａ,２００１Ｂの端面は、上記第１,第２のシェル２００２,２００３から露出している。また、上記第１のシェル２００２は、フランジ状の一端部２００２Ａを有し、この一端部２００２Ａは上記第２のシェル２００３から露出している。 The light-emitting diode 2005 according to the seventh embodiment includes a cylindrical rod-shaped core 2001 as a core portion, a cylindrical first shell 2002 as a first conductive type semiconductor layer covering the cylindrical rod-shaped core 2001, and the above-described structure. A cylindrical second shell 2003 is provided as a semiconductor layer of the second conductivity type that covers the cylindrical first shell 2002. End faces of both end portions 2001A and 2001B of the rod-shaped core 2001 are exposed from the first and second shells 2002 and 2003. The first shell 2002 has a flange-shaped one end portion 2002A, and the one end portion 2002A is exposed from the second shell 2003.
　上記棒状コア２００１はＳｉＣで作製され、上記第１のシェル２００２はｎ型のＧａＮで作製され、上記第２のシェル２００３はｐ型のＧａＮで作製されている。上記ＳｉＣで作製された棒状コア２００１は屈折率が３～３.５であり、上記ｎ型ＧａＮで作製された第１のシェル２００２は屈折率が２.５である。また、上記ＳｉＣで作製された棒状コア２００１は熱伝導率が４５０(Ｗ/(ｍ・Ｋ))であり、上記ｎ型ＧａＮで作製された第１のシェル２００２は熱伝導率が２１０(Ｗ/(ｍ・Ｋ))である。 The rod-shaped core 2001 is made of SiC, the first shell 2002 is made of n-type GaN, and the second shell 2003 is made of p-type GaN. The rod-shaped core 2001 made of SiC has a refractive index of 3 to 3.5, and the first shell 2002 made of n-type GaN has a refractive index of 2.5. The rod-shaped core 2001 made of SiC has a thermal conductivity of 450 (W / (m · K)), and the first shell 2002 made of n-type GaN has a thermal conductivity of 210 (W / (m · K)).
　この実施形態の発光ダイオード２００５によれば、上記棒状コア２００１の屈折率ｎ１(＝３～３.５)が、上記第１のシェル２００２の屈折率ｎ２(＝２.５)よりも大きい。したがって、第１,第２のシェル２００２,２００３のｐｎ接合面で発生した光が第１のシェル２００２から棒状コア２００１内へ入射し易いと共に棒状コア２００１内へ入射した光は、棒状コア２００１と第１のシェル２００２との界面で全反射し易い。すなわち、図２４Ｂに示すように、棒状コア２００１と第１のシェル２００２との界面への入射角度θが、ｓｉｎ－１(ｎ２/ｎ１)以上(４５.６°～５６.４°以上)であれば上記界面で全反射を起こす。したがって、上記発生した光が上記ＳｉＣ製の棒状コア２００１内に閉じ込められ、導波管のように棒状コア２００１の端部２００１Ａ,２００１Ｂから光を出射させることができる。したがって、この第７実施形態の発光ダイオード２００５は、指向性発光デバイスに適している。 According to the light emitting diode 2005 of this embodiment, the refractive index n1 (= 3 to 3.5) of the rod-shaped core 2001 is larger than the refractive index n2 (= 2.5) of the first shell 2002. Therefore, the light generated at the pn junction surfaces of the first and second shells 2002 and 2003 easily enters the rod-shaped core 2001 from the first shell 2002, and the light incident on the rod-shaped core 2001 is separated from the rod-shaped core 2001. Total reflection is easy at the interface with the first shell 2002. That is, as shown in FIG. 24B, the incident angle θ to the interface between the rod-shaped core 2001 and the first shell 2002 is sin −1 (n2 / n1) or more (45.6 ° to 56.4 ° or more). If present, total reflection occurs at the interface. Therefore, the generated light is confined in the SiC rod-shaped core 2001, and light can be emitted from the end portions 2001A and 2001B of the rod-shaped core 2001 like a waveguide. Therefore, the light emitting diode 2005 of the seventh embodiment is suitable for a directional light emitting device.
　また、この実施形態の発光ダイオード２００５は、棒状コア２００１の熱伝導率(４５０(Ｗ/(ｍ・Ｋ)))が上記ｎ型ＧａＮで作製された第１のシェル２００２の熱伝導率(２１０(Ｗ/(ｍ・Ｋ)))よりも高いので、図２４Ｃに矢印Ｘ１で示すように、第１,第２のシェル２００２,２００３のｐｎ接合面で発生した熱が第１のシェル２００２を伝って拡散し難い一方、矢印Ｘ２で示すように、上記熱が棒状コア２００１を伝ってダイオード全体に拡散し易い。このため、棒状の発光ダイオード２００５の発光による熱を放熱し易くなる。また、上記棒状コア２００１を通じて熱が拡散し、棒状の発光ダイオード２００５の全面での温度を均一化でき、高温集中による発光効率の低下を防止できる。 Further, in the light emitting diode 2005 of this embodiment, the thermal conductivity (210 of the first shell 2002 in which the thermal conductivity (450 (W / (m · K))) of the rod-shaped core 2001 is made of the n-type GaN is used. (W / (m · K))), the heat generated at the pn junction surfaces of the first and second shells 2002 and 2003 causes the first shell 2002 to move as shown by the arrow X1 in FIG. On the other hand, it is difficult to propagate and diffuse, but as indicated by the arrow X2, the heat is easily diffused through the rod-shaped core 2001 to the entire diode. For this reason, it becomes easy to radiate the heat generated by the light emission of the rod-shaped light emitting diode 2005. Further, heat is diffused through the rod-shaped core 2001, the temperature on the entire surface of the rod-shaped light emitting diode 2005 can be made uniform, and a decrease in luminous efficiency due to high temperature concentration can be prevented.
　また、この発光ダイオード２００５を、図２５Ｂに示すように、ＳｉＣ基板２００６上に或る間隔を隔てて立設された状態で複数形成した場合には、棒状コア２００１が延在している方向の両端部２００１Ａ,２００１Ｂから上記延在方向(長軸方向)へ向けて強い発光が得られる。また、上記発光ダイオード２００５を、図２５Ｃに示すように、ＧａＮ基板２００７上に横倒し状態で配置した場合には、棒状コア２００１が延在している方向の両端部２００１Ａ,２００１ＢからＧａＮ基板２００７に沿って上記延在方向(長軸方向)へ向けて強い発光が得られる。なお、図２５Ｃの発光ダイオード２００５は、第２のシェル２００３の一端部の周方向の一部が取り除かれて、第１のシェル２００２の一端部の周方向の一部が露出していて、この第１のシェル２００２の露出した部分にコンタクト電極２００９が形成され、上記第２のシェル２００２にコンタクト電極２００８が形成されている。 In addition, as shown in FIG. 25B, when a plurality of the light emitting diodes 2005 are formed on the SiC substrate 2006 at a certain interval, the bar-shaped core 2001 extends. Strong light emission can be obtained from both end portions 2001A and 2001B in the extending direction (long axis direction). In addition, when the light emitting diode 2005 is arranged on the GaN substrate 2007 in a horizontally lying state as shown in FIG. 25C, the both ends 2001A and 2001B in the direction in which the rod-shaped core 2001 extends from the both ends 2001A and 2001B to the GaN substrate 2007. Intense light emission can be obtained in the extending direction (long axis direction). In the light emitting diode 2005 of FIG. 25C, a part of the circumferential direction of one end of the second shell 2003 is removed, and a part of the circumferential direction of one end of the first shell 2002 is exposed. A contact electrode 2009 is formed on the exposed portion of the first shell 2002, and a contact electrode 2008 is formed on the second shell 2002.
　また、上記発光ダイオード２００５の変形例として、図２５Ａに示すように、ＳｉＣの棒状コア２０１１と、このＳｉＣの棒状コア２０１１を被覆するｎ型ＧａＮの第１のシェル２０１２と、このｎ型ＧａＮの第１のシェル２０１２を被覆するｐ型ＧａＮの第２のシェル２０１３とで構成した発光ダイオード２０１５を、ＳｉＣ基板２００６上に或る間隔を隔てて立設された状態で複数形成してもよい。この発光ダイオード２０１５では、上記ＳｉＣの棒状コア２０１１の端部１１Ａが上記ｎ型ＧａＮの第１のシェル１２と上記ｐ型ＧａＮの第２のシェル１３とで覆われている。この発光ダイオード２０１５は、上記棒状コア２０１１の端部２０１１ＢからＳｉＣ基板２００６を貫くように上記長軸方向に強い発光が得られる。 As a modification of the light emitting diode 2005, as shown in FIG. 25A, a SiC rod-shaped core 2011, an n-type GaN first shell 2012 covering the SiC rod-shaped core 2011, and the n-type GaN A plurality of light emitting diodes 2015 configured with the p-type GaN second shell 2013 covering the first shell 2012 may be formed on the SiC substrate 2006 with a certain interval. In the light emitting diode 2015, the end 11A of the SiC rod-shaped core 2011 is covered with the first shell 12 of the n-type GaN and the second shell 13 of the p-type GaN. The light emitting diode 2015 can emit strong light in the long axis direction so as to penetrate the SiC substrate 2006 from the end portion 2011B of the rod-shaped core 2011.
　また、図２４Ａ,図２４Ｂで説明した第７実施形態の発光ダイオード２００５のもう１つの変形例として、図２６Ａ,図２６Ｂに示すように、上記ｐ型のＧａＮで作製された円筒形状の第２のシェル２００３の円周面を覆う第３のシェル２０３１を備えた発光ダイオード２０３５としてもよい。この第３のシェル２０３１は、上記ｐ型のＧａＮで作製された円筒形状の第２のシェル２００３よりも屈折率の低い材料(例えば、ＺｎＯ、屈折率ｎ４＝１.９５)で作製されている。この発光ダイオード２０３５は、上記第２のシェル２００３の外側に形成され、上記第２のシェル２００３の屈折率ｎ３よりも低い屈折率ｎ４である第３のシェル２０３１が反射膜として機能する。すなわち、図２６Ｂに示されるように、上記第２のシェル２００３と第３のシェル２０３１との界面への入射角度θが、ｓｉｎ－１(ｎ４/ｎ３)以上であれば上記界面で全反射を起こす。したがって、上記第１,第２のシェル２００２,２００３のｐｎ接合面で発生した光をダイオード外部に逃がしにくく、棒状コア２００１の端部２００１Ａ,２００１Ｂから光を出射させることができ、より指向性が高まる。 As another modification of the light emitting diode 2005 of the seventh embodiment described in FIGS. 24A and 24B, as shown in FIGS. 26A and 26B, a second cylindrical shape made of the p-type GaN is used. Alternatively, the light emitting diode 2035 may include the third shell 2031 that covers the circumferential surface of the shell 2003. The third shell 2031 is made of a material having a refractive index lower than that of the cylindrical second shell 2003 made of p-type GaN (for example, ZnO, refractive index n4 = 1.95). . The light emitting diode 2035 is formed outside the second shell 2003, and the third shell 2031 having a refractive index n4 lower than the refractive index n3 of the second shell 2003 functions as a reflective film. That is, as shown in FIG. 26B, if the incident angle θ to the interface between the second shell 2003 and the third shell 2031 is not less than sin −1 (n4 / n3), total reflection is performed at the interface. Wake up. Therefore, light generated at the pn junction surfaces of the first and second shells 2002 and 2003 is difficult to escape to the outside of the diode, light can be emitted from the end portions 2001A and 2001B of the rod-shaped core 2001, and more directivity can be obtained. Rise.
　尚、上記第７実施形態では、発光ダイオード２００５について説明したが、上記発光ダイオード２００５と同様の構成の円柱形状の棒状コア２００１と円筒形状の第１のシェル２００２と円筒形状の第２のシェル２００３を備えた光電効果を有するダイオードで光検出器を構成してもよい。この光検出器によれば、上記棒状コア２００１の屈折率ｎ１が上記第１のシェル２００２の屈折率ｎ２よりも大きいので、光をダイオード外部に逃がしにくくなり、光の取り込み効果を高めることができ、光電効果を高めることができる。また、この光検出器によれば、上記棒状コア２００１の熱伝導率が上記第１のシェル２００２の熱伝導率よりも大きいので、放熱性を向上できると共に温度を均一化でき、高温集中による光電変換効率の低下を回避できる。よって、この光検出器によれば、光検出性能を向上できる。 Although the light emitting diode 2005 has been described in the seventh embodiment, a columnar rod-shaped core 2001, a cylindrical first shell 2002, and a cylindrical second shell 2003 having the same configuration as the light emitting diode 2005 are described. You may comprise a photodetector with the diode which has the photoelectric effect provided. According to this photodetector, since the refractive index n1 of the rod-shaped core 2001 is larger than the refractive index n2 of the first shell 2002, it becomes difficult for light to escape to the outside of the diode, and the light capturing effect can be enhanced. The photoelectric effect can be enhanced. Further, according to this photodetector, since the thermal conductivity of the rod-shaped core 2001 is larger than the thermal conductivity of the first shell 2002, the heat dissipation can be improved and the temperature can be made uniform. A decrease in conversion efficiency can be avoided. Therefore, according to this photodetector, the light detection performance can be improved.
　また、上記第７実施形態では、発光ダイオード２００５について説明したが、上記発光ダイオード２００５と同様の構成の円柱形状の棒状コア２００１と円筒形状の第１のシェル２００２と円筒形状の第２のシェル２００３を備えた光電効果を有するダイオードで太陽電池を構成してもよい。この太陽電池によれば、上記棒状コア２００１の屈折率ｎ１が上記第１のシェル２００２の屈折率ｎ２よりも大きいので、光をダイオード外部に逃がしにくくなり、光の取り込み効果を高めることができ、発電効果を高めることができる。また、この太陽電池によれば、上記棒状コア２００１の熱伝導率が上記第１のシェル２００２の熱伝導率よりも大きいので、放熱性を向上できると共に温度を均一化でき、高温集中による光電変換効率の低下を回避できる。よって、この太陽電池によれば、発電性能を向上できる。 In the seventh embodiment, the light emitting diode 2005 has been described. However, the columnar rod-shaped core 2001, the cylindrical first shell 2002, and the cylindrical second shell 2003 having the same configuration as the light emitting diode 2005 are described. You may comprise a solar cell with the diode which has the photoelectric effect provided. According to this solar cell, since the refractive index n1 of the rod-shaped core 2001 is larger than the refractive index n2 of the first shell 2002, it is difficult for light to escape to the outside of the diode, and the light capturing effect can be enhanced. The power generation effect can be enhanced. Moreover, according to this solar cell, since the thermal conductivity of the rod-shaped core 2001 is larger than the thermal conductivity of the first shell 2002, the heat dissipation can be improved and the temperature can be made uniform, and photoelectric conversion due to high temperature concentration. Reduced efficiency can be avoided. Therefore, according to this solar cell, the power generation performance can be improved.
　また、上記光検出器や太陽電池をなす上記発光ダイオード２００５と同様の構成の光電効果を有するダイオード２０４５を、図２７Ｂに示すように、ＳｉＣ基板２０４６上に或る間隔を隔てて立設された状態で複数形成した場合には、熱が棒状コア２００１を通じてダイオード全体に拡散し、この棒状コア２００１の根元の端部２００１Ｂから基板２０４６に熱を拡散できると共に上記棒状コア２００１の先端の端部２００１Ａからも放熱できる。よって、放熱性を向上できると共に温度の均一化も図れるので、高温集中による光電変換効率の低下を回避でき、検出性能の良い光検出器や発電効率の良い太陽電池を提供できる。 In addition, as shown in FIG. 27B, a diode 2045 having a photoelectric effect similar to that of the light-emitting diode 2005 constituting the photodetector or solar cell is erected on the SiC substrate 2046 at a certain interval. When a plurality of the rod-shaped cores are formed, heat is diffused to the entire diode through the rod-shaped core 2001, and heat can be diffused from the base end portion 2001B of the rod-shaped core 2001 to the substrate 2046, and at the end portion 2001A of the tip end of the rod-shaped core 2001. Can also dissipate heat. Therefore, since heat dissipation can be improved and the temperature can be made uniform, a decrease in photoelectric conversion efficiency due to high temperature concentration can be avoided, and a photodetector with good detection performance and a solar cell with good power generation efficiency can be provided.
　また、上記ダイオード２０４５を、図２７Ｃに示すように、ＧａＮ基板２０４７上に横倒し状態で配置した場合には、熱が棒状コア２００１を通じてダイオード全体に拡散すると共に、棒状コア２００１の両端２００１Ａ,２００１Ｂからも放熱でき、さらに、ＧａＮ基板２０４７との接触面積が大きく基板２０４７に熱を逃がし易くなる。よって、放熱性を向上できると共に温度の均一化も図れるので、高温集中による光電変換効率の低下を回避でき、検出性能の良い光検出器や発電効率の良い太陽電池を提供できる。なお、図２７Ｃのダイオード２０４５は、第２のシェル２００３の一端部の周方向の一部が取り除かれて、第１のシェル２００２の一端部の周方向の一部が露出していて、この第１のシェル２００２の露出した部分にコンタクト電極２００９が形成され、上記第２のシェル２００３にコンタクト電極２００８が形成されている。 When the diode 2045 is disposed on the GaN substrate 2047 as shown in FIG. 27C, heat is diffused through the rod-shaped core 2001 to the entire diode, and from both ends 2001A and 2001B of the rod-shaped core 2001. In addition, the contact area with the GaN substrate 2047 is large, and heat can be easily released to the substrate 2047. Therefore, since heat dissipation can be improved and the temperature can be made uniform, a decrease in photoelectric conversion efficiency due to high temperature concentration can be avoided, and a photodetector with good detection performance and a solar cell with good power generation efficiency can be provided. In the diode 2045 of FIG. 27C, a part of the circumferential direction of one end portion of the first shell 2002 is exposed by removing a part of the circumferential direction of one end portion of the second shell 2003. A contact electrode 2009 is formed on the exposed portion of one shell 2002, and a contact electrode 2008 is formed on the second shell 2003.
　また、上記発光ダイオード２０４５の変形例として、図２７Ａに示すように、ＳｉＣの棒状コア２０５１と、このＳｉＣの棒状コア２０５１を被覆するｎ型ＧａＮの第１のシェル２０５２と、このｎ型ＧａＮの第１のシェル２０５２を被覆するｐ型ＧａＮの第２のシェル２０５３とで構成した光電効果を有するダイオード２０５５を、ＳｉＣ基板２０５６上に或る間隔を隔てて立設された状態で複数形成してもよい。この光電効果を有するダイオード２０５５では、上記ＳｉＣの棒状コア２０５１の端部２０５１Ａが上記ｎ型ＧａＮの第１のシェル２０５２と上記ｐ型ＧａＮの第２のシェル２０５３とで覆われている。この場合には、熱が棒状コア２０５１を通じてダイオード全体に拡散し、この棒状コア２０５１の根元の端部２０５１ＢからＳｉＣ基板２０５６に熱を拡散できる。よって、放熱性を向上できると共に温度の均一化も図れるので、高温集中による光電変換効率の低下を回避でき、検出性能の良い光検出器や発電効率の良い太陽電池を提供できる。 As a modification of the light emitting diode 2045, as shown in FIG. 27A, a SiC rod-like core 2051, an n-type GaN first shell 2052 covering the SiC rod-like core 2051, and the n-type GaN A plurality of diodes 2055 having a photoelectric effect constituted by the second shell 2053 of p-type GaN covering the first shell 2052 are formed on the SiC substrate 2056 at a certain interval in a standing state. Also good. In the diode 2055 having the photoelectric effect, an end portion 2051A of the SiC rod-shaped core 2051 is covered with the first shell 2052 of n-type GaN and the second shell 2053 of p-type GaN. In this case, heat is diffused to the entire diode through the rod-shaped core 2051, and heat can be diffused from the base end portion 2051 </ b> B of the rod-shaped core 2051 to the SiC substrate 2056. Therefore, since heat dissipation can be improved and the temperature can be made uniform, a decrease in photoelectric conversion efficiency due to high temperature concentration can be avoided, and a photodetector with good detection performance and a solar cell with good power generation efficiency can be provided.
　尚、上記実施形態,変形例では、第１のシェル２００２,２０５２をｎ型のＧａＮとし、第２のシェル２００３,２０５３をｐ型のＧａＮとしたが、第１のシェル２００２,２０５２をｐ型のＧａＮとし、第２のシェル２００３,２０５３をｎ型のＧａＮとしてもよい。 In the above-described embodiment and modification, the first shells 2002 and 2052 are n-type GaN and the second shells 2003 and 2053 are p-type GaN. However, the first shells 2002 and 2052 are p-type. The second shells 2003 and 2053 may be n-type GaN.
　　　(第８の実施の形態)
　図２８Ａは、この発明のダイオードの第８実施形態としての発光ダイオード２０６５の斜視図であり、図２８Ｂは上記発光ダイオード２０６５の断面図である。この第８実施形態の発光ダイオード２０６５は、図２４Ａ,図２４Ｂに示した第７実施形態の発光ダイオード２００５のコア部としてのＳｉＣで作製された円柱形状の棒状コア２００１に替えて、ＳｉＯ２で作製された円柱形状の棒状コア２０６１を備えた点だけが、前述の第７実施形態の発光ダイオード２００５と異なる。よって、この第８実施形態では、前述の第７実施形態と同様の部分には同様の符号を付して、前述の第７実施形態と異なる部分を主に説明する。 (Eighth embodiment)
FIG. 28A is a perspective view of a light emitting diode 2065 as an eighth embodiment of the diode of the present invention, and FIG. 28B is a cross-sectional view of the light emitting diode 2065. The light emitting diode 2065 of the eighth embodiment is made of SiO 2 instead of the cylindrical rod-shaped core 2001 made of SiC as the core portion of the light emitting diode 2005 of the seventh embodiment shown in FIGS. 24A and 24B. Only the light-emitting diode 2005 of the seventh embodiment described above is different from the light-emitting diode 2005 of the seventh embodiment described above only in that the cylindrical rod-shaped core 2061 is provided. Therefore, in the eighth embodiment, the same reference numerals are given to the same parts as those in the seventh embodiment, and the parts different from those in the seventh embodiment will be mainly described.
　上記ＳｉＯ２で作製された棒状コア２０６１は屈折率が１.４５であり、上記ｎ型ＧａＮで作製された第１のシェル２００２は屈折率が２.５である。この第８実施形態の発光ダイオード２０６５によれば、上記棒状コア２０６１の屈折率ｎ１(＝１.４５)が、上記第１のシェル２００２の屈折率ｎ２(＝２.５)よりも小さい。したがって、第１,第２のシェル２００２,２００３のｐｎ接合面で発生した光が棒状コア２０６１内へ入りにくいと共に、上記棒状コア２０６１内へ入射した光は棒状コア２０６１と第１のシェル２００２との界面で全反射が起こらない。よって、この棒状の発光ダイオード２０６５は、両端面２０６５Ａ,２０６５Ｂおよび側面２０６５Ｃ全面から光が出射されるので、面発光デバイスに適している。 The rod-shaped core 2061 made of SiO 2 has a refractive index of 1.45, and the first shell 2002 made of n-type GaN has a refractive index of 2.5. According to the light emitting diode 2065 of the eighth embodiment, the refractive index n1 (= 1.45) of the rod-shaped core 2061 is smaller than the refractive index n2 (= 2.5) of the first shell 2002. Therefore, the light generated at the pn junction surfaces of the first and second shells 2002 and 2003 is difficult to enter the rod-shaped core 2061, and the light incident on the rod-shaped core 2061 is transmitted between the rod-shaped core 2061 and the first shell 2002. Total reflection does not occur at the interface. Therefore, this light emitting diode 2065 is suitable for a surface light emitting device because light is emitted from both end faces 2065A and 2065B and the entire side face 2065C.
　また、この発光ダイオード２０６５を、図２９Ｂに示すように、ＳｉＯ２基板２０６７上に或る間隔を隔てて立設された状態で複数形成した場合には、各棒状の発光ダイオード２０６５の両端面２０６５Ａ,２０６５Ｂおよび側面２０６５Ｃ全面から全方向に光を出射することができる。また、上記発光ダイオード２０６５を、図２９Ｃに示すように、ＧａＮ基板２００７上に横倒し状態で配置した場合には、棒状コア２０６１が延在している方向の両端部２０６５Ａ,２０６５Ｂおよび側面２０６５Ｃ全面から全方向に光を出射することができる。なお、図２９Ｃのダイオード２０６５は、第２のシェル２００３の一端部の周方向の一部が取り除かれて、第１のシェル２００２の一端部の周方向の一部が露出していて、この第１のシェル２００２の露出した部分にコンタクト電極２００９が形成され、上記第２のシェル２００３にコンタクト電極２００８が形成されている。 In addition, as shown in FIG. 29B, when a plurality of the light emitting diodes 2065 are formed on the SiO 2 substrate 2067 at a certain interval, both end faces 2065A of each rod-like light emitting diode 2065 are formed. , 2065B and the side surface 2065C can emit light in all directions. In addition, when the light emitting diode 2065 is disposed on the GaN substrate 2007 in a horizontally lying state as shown in FIG. 29C, the both ends 2065A and 2065B and the side surface 2065C in the direction in which the rod-shaped core 2061 extends are exposed. Light can be emitted in all directions. Note that the diode 2065 in FIG. 29C has a circumferential portion of one end of the second shell 2003 removed, and a circumferential portion of one end of the first shell 2002 is exposed. A contact electrode 2009 is formed on the exposed portion of one shell 2002, and a contact electrode 2008 is formed on the second shell 2003.
　また、上記発光ダイオード２０６５の変形例として、図２９Ａに示すように、ＳｉＯ２の棒状コア２０６１と、このＳｉＯ２の棒状コア２０６１を被覆するｎ型ＧａＮの第１のシェル２０６２と、このｎ型ＧａＮの第１のシェル２０６２を被覆するｐ型ＧａＮの第２のシェル２０６３とで構成した発光ダイオード２０７５を、ＳｉＯ２基板２０６７上に或る間隔を隔てて立設された状態で複数形成してもよい。この発光ダイオード２０７５では、上記ＳｉＯ２の棒状コア２０６１の端部２０６１Ａが上記ｎ型ＧａＮの第１のシェル２０６２と上記ｐ型ＧａＮの第２のシェル２０６３とで覆われている。この場合にも、上記棒状の発光ダイオード２０７５の両端部２０７５Ａ,２０７５Ｂおよび側面２０７５Ｃ全面から全方向に光を出射することができる。 As a modification of the light emitting diode 2065, as shown in FIG. 29A, a rod core 2061 of SiO 2, the first shell 2062 of n-type GaN covering the rod-shaped core 2061 of the SiO 2, the n-type A plurality of light emitting diodes 2075 composed of a p-type GaN second shell 2063 covering the GaN first shell 2062 are formed on the SiO 2 substrate 2067 in a state of being erected at a certain interval. Also good. In the light emitting diode 2075, the end portion 2061A of the SiO 2 rod-shaped core 2061 is covered with the first shell 2062 of n-type GaN and the second shell 2063 of p-type GaN. Also in this case, light can be emitted in all directions from both end portions 2075A and 2075B and the entire side surface 2075C of the rod-like light emitting diode 2075.
　尚、上記実施形態では、第１のシェル２００２,２０６２をｎ型のＧａＮとし、第２のシェル２００３,２０６３をｐ型のＧａＮとしたが、第１のシェル２００２,２０６２をｐ型のＧａＮとし、第２のシェル２００３,２０６３をｎ型のＧａＮとしてもよい。 In the above embodiment, the first shells 2002 and 2062 are n-type GaN and the second shells 2003 and 2063 are p-type GaN. However, the first shells 2002 and 2062 are p-type GaN. The second shells 2003 and 2063 may be n-type GaN.
　　　(第９の実施の形態)
　図３０Ａは、この発明のダイオードの第９実施形態としての発光ダイオード２０８５の斜視図であり、図３０Ｂは上記発光ダイオード２０８５の断面図である。 (Ninth embodiment)
FIG. 30A is a perspective view of a light emitting diode 2085 as a ninth embodiment of the diode of the present invention, and FIG. 30B is a cross-sectional view of the light emitting diode 2085.
　この第９実施形態の発光ダイオード２０８５は、コア部としての円柱形状の棒状コア２０８１とこの円柱形状の棒状コア２０８１を覆う第１導電型の半導体層としての円筒形状の第１のシェル２０８２と上記円筒形状の第１のシェル２０８２を覆う第２導電型の半導体層としての円筒形状の第２のシェル２０８３を備える。図３０Ｂに示すように、上記棒状コア２０８１の両端部２０８１Ａ,２０８１Ｂの端面は、上記第１,第２のシェル２０８２,２０８３から露出している。また、上記第１のシェル２０８２は、フランジ状の一端部２０８２Ａを有し、この一端部２０８２Ａは上記第２のシェル２０８３から露出している。 The light emitting diode 2085 of the ninth embodiment includes a cylindrical rod-shaped core 2081 serving as a core portion, a cylindrical first shell 2082 serving as a first conductivity type semiconductor layer covering the columnar rod-shaped core 2081, and the above. A cylindrical second shell 2083 is provided as a second conductive type semiconductor layer covering the cylindrical first shell 2082. As shown in FIG. 30B, the end surfaces of both end portions 2081A and 2081B of the rod-shaped core 2081 are exposed from the first and second shells 2082 and 2083. The first shell 2082 has a flange-shaped one end 2082 A, and the one end 2082 A is exposed from the second shell 2083.
　上記棒状コア２０８１はｎ型Ｓｉで作製され、上記第１のシェル２０８２はｎ型のＧａＮで作製され、上記第２のシェル２０８３はｐ型のＧａＮで作製されている。上記ｎ型Ｓｉで作製された棒状コア２０８１は電気伝導率が１.０×１０５(/Ωｍ)であり、上記ｎ型ＧａＮで作製された第１のシェル２０８２は電気伝導率が１.０×１０４(/Ωｍ)である。 The rod-shaped core 2081 is made of n-type Si, the first shell 2082 is made of n-type GaN, and the second shell 2083 is made of p-type GaN. The rod-shaped core 2081 made of the n-type Si has an electric conductivity of 1.0 × 10 5 (/ Ωm), and the first shell 2082 made of the n-type GaN has an electric conductivity of 1.0. × 10 4 (/ Ωm).
　この実施形態の発光ダイオード２０８５によれば、上記棒状コア２０８１の電気伝導率(１.０×１０５(/Ωｍ))が、上記第１のシェル２０８２の電気伝導率(１.０×１０４(/Ωｍ))よりも高い。したがって、図３０Ｂに矢印Ｅ１,Ｅ２,Ｅ３で示すように、上記第１のシェル２０８２に比べて、上記棒状コア２０８１を伝わって電流が流れ易く、上記棒状コア２０８１を通じて、上記第１のシェル２０８２の全域に電流が流れ易くなる。このため、損失を抑制できて、効率良く発光できる。 According to the light emitting diode 2085 of this embodiment, the electric conductivity (1.0 × 10 5 (/ Ωm)) of the rod-shaped core 2081 is the same as that of the first shell 2082 (1.0 × 10 4). (/ Ωm)). Therefore, as indicated by arrows E1, E2, and E3 in FIG. 30B, compared to the first shell 2082, the current flows more easily through the rod-shaped core 2081, and the first shell 2082 passes through the rod-shaped core 2081. It becomes easy for current to flow through the entire area. For this reason, loss can be suppressed and light can be emitted efficiently.
　尚、上記実施形態では、発光ダイオード２０８５について説明したが、この発光ダイオード２０８５と同様の構造で光電変換素子(光検出器や太陽電池)を構成してもよい。この場合も、図３０Ｃに矢印Ｆ１,Ｆ２,Ｆ３で示すように、上記第１のシェル２０８２に比べて、上記棒状コア２０８１を伝わって電流が流れ易く、上記棒状コア２０８１を通じて、上記第１のシェル２０８２の全域に電流が流れ易くなる。このため、損失を抑制でき、光検出性能の向上や発電効率の向上を達成できる。 In addition, although the said embodiment demonstrated the light emitting diode 2085, you may comprise a photoelectric conversion element (a photodetector or a solar cell) by the structure similar to this light emitting diode 2085. FIG. Also in this case, as indicated by arrows F1, F2, and F3 in FIG. 30C, current flows more easily through the rod-shaped core 2081 compared to the first shell 2082, and the first core 2081 passes through the rod-shaped core 2081. It becomes easier for current to flow through the entire area of the shell 2082. For this reason, loss can be suppressed and improvement in light detection performance and improvement in power generation efficiency can be achieved.
　また、上記発光ダイオード２０８５の変形例としての図３１Ａに示す発光ダイオード２０９５を、ｎ型Ｓｉ基板２０９０上に或る間隔を隔てて立設された状態で複数形成してもよい。この発光ダイオード２０９５は、ｎ型Ｓｉで作製された棒状コア２０９１と、このｎ型Ｓｉ製の棒状コア２０９１を被覆するｎ型ＧａＮの第１のシェル２０９２と、このｎ型ＧａＮの第１のシェル２０９２を被覆するｐ型ＧａＮの第２のシェル２０９３とで構成している。この発光ダイオード２０９５では、上記ｎ型Ｓｉ製の棒状コア２０９１の端部２０９１Ａが上記ｎ型ＧａＮの第１のシェル２０９２と上記ｐ型ＧａＮの第２のシェル２０９３とで覆われている。図３１Ａに示すように、上記ｎ型ＧａＮの第１のシェル２０９２には基板２０９０上に形成されたｎ型ＧａＮ延長部２０９２Ｚが連なり、上記ｐ型ＧａＮの第２のシェル２０９３には上記ｎ型ＧａＮ延長部２０９２Ｚ上に形成されたｐ型ＧａＮ延長部２０９３Ｚが連なっている。そして、上記ｐ型ＧａＮ延長部２０９３Ｚ上にコンタクト電極２０９６が形成され、上記ｎ型Ｓｉ基板２０９０上にコンタクト電極２０９７が形成されている。図３１Ａに示す一例では、ｎ型Ｓｉ製の棒状コア２０９１やｎ型ＧａＮの第１のシェル２０９２にコンタクト電極を形成する必要がなく、ｎ型Ｓｉ基板２０９０にコンタクト電極２０９７を形成すればよいので、コンタクト電極の形成が容易になる。 Alternatively, a plurality of light emitting diodes 2095 shown in FIG. 31A as a modification of the light emitting diode 2085 may be formed on the n-type Si substrate 2090 in a state of being erected at a certain interval. The light emitting diode 2095 includes a rod-shaped core 2091 made of n-type Si, an n-type GaN first shell 2092 covering the rod-shaped core 2091 made of n-type Si, and a first shell of the n-type GaN. And p-type GaN second shell 2093 covering 2092. In the light emitting diode 2095, the end 2091A of the n-type Si rod-shaped core 2091 is covered with the n-type GaN first shell 2092 and the p-type GaN second shell 2093. As shown in FIG. 31A, the n-type GaN first shell 2092 is connected to an n-type GaN extension 2092Z formed on the substrate 2090, and the p-type GaN second shell 2093 is connected to the n-type GaN. A p-type GaN extension 2093Z formed on the GaN extension 2092Z is connected. A contact electrode 2096 is formed on the p-type GaN extension 2093Z, and a contact electrode 2097 is formed on the n-type Si substrate 2090. In the example shown in FIG. 31A, there is no need to form a contact electrode on the n-type Si rod-shaped core 2091 or the n-type GaN first shell 2092, and the contact electrode 2097 may be formed on the n-type Si substrate 2090. The contact electrode can be easily formed.
　また、上記発光ダイオード２０８５のもう１つの変形例としての図３１Ｂに示す発光ダイオード２１０５を、ＧａＮ基板２１００上に横倒し状態で配置してもよい。図３１Ｂに示す発光ダイオード２１０５は、ｎ型Ｓｉ製の棒状コア２１０１の一端部の周方向の一部が第１,第２のシェル２１０２,２１０３から露出している。第１のシェル２１０２はｎ型ＧａＮで作製され、第２のシェル２１０３はｐ型ＧａＮで作製されている。そして、上記第２のシェル２１０３の外周面にコンタクト電極２１０６が形成され、上記露出したｎ型Ｓｉ製の棒状コア２１０１の一端部にコンタクト電極２１０７が形成されている。この図３１Ｂに示す発光ダイオード２１０５は、例えば、図３１Ａに示されるＳｉ基板２０９０上に立設された状態から切り離されたものを、別基板としてのＧａＮ基板２１００上に横倒し状態で配置したものである。図３１Ｂに示す一例では、ｎ型ＧａＮの第１のシェル２１０２にコンタクト電極を形成する必要がなく、ｐ型ＧａＮの第２のシェル２１０３にコンタクト電極２１０６を形成し、ｎ型Ｓｉ製の棒状コア２１０１にコンタクト電極２１０７を形成すればよいので、コンタクト電極の形成が容易になる。 Alternatively, a light emitting diode 2105 shown in FIG. 31B as another modification of the light emitting diode 2085 may be disposed on the GaN substrate 2100 in a lying state. In the light emitting diode 2105 shown in FIG. 31B, a part of one end of the n-type Si rod-shaped core 2101 in the circumferential direction is exposed from the first and second shells 2102 and 2103. The first shell 2102 is made of n-type GaN, and the second shell 2103 is made of p-type GaN. A contact electrode 2106 is formed on the outer peripheral surface of the second shell 2103, and a contact electrode 2107 is formed on one end of the exposed n-type Si rod-shaped core 2101. The light-emitting diode 2105 shown in FIG. 31B is, for example, one that is separated from the state of being erected on the Si substrate 2090 shown in FIG. 31A and placed on a GaN substrate 2100 as another substrate in a laid state. is there. In the example shown in FIG. 31B, there is no need to form a contact electrode on the first shell 2102 of n-type GaN, but a contact electrode 2106 is formed on the second shell 2103 of p-type GaN, and a rod-shaped core made of n-type Si. Since the contact electrode 2107 may be formed on 2101, the contact electrode can be easily formed.
　尚、図３１Ａ,図３１Ｂでは、発光ダイオード２０９５,２１０５について説明したが、この発光ダイオード２０９５,２１０５と同様の構造で光電変換素子(光検出器や太陽電池)を構成してもよい。また、上記実施形態では、第１のシェル２０８２,２０９２,２１０２をｎ型のＧａＮとし、第２のシェル２０８３,２０９３,２１０３をｐ型のＧａＮとしたが、第１のシェル２０８２,２０９２,２１０２をｐ型のＧａＮとし、第２のシェル２０８３,２０９３,２１０３をｎ型のＧａＮとしてもよい。 31A and 31B, the light-emitting diodes 2095 and 2105 have been described. However, a photoelectric conversion element (photodetector or solar cell) may be configured with the same structure as the light-emitting diodes 2095 and 2105. In the above embodiment, the first shells 2082, 2092, 2102 are n-type GaN and the second shells 2083, 2093, 2103 are p-type GaN, but the first shells 2082, 2092, 2102 are used. May be p-type GaN, and the second shells 2083, 2093, and 2103 may be n-type GaN.
　　　(第１０の実施の形態)
　図３２Ａは、この発明のダイオードの第１０実施形態としての発光ダイオード２１１５の斜視図であり、図３２Ｂは上記発光ダイオード２１１５がＳｉ基板２１１０上に立設状態で或る間隔を隔てて複数形成されている様子を示す断面図である。 (Tenth embodiment)
FIG. 32A is a perspective view of a light emitting diode 2115 as a tenth embodiment of the diode of the present invention, and FIG. 32B shows a plurality of the light emitting diodes 2115 standing on the Si substrate 2110 with a certain interval. It is sectional drawing which shows a mode that it is.
　上記発光ダイオード２１１５は、シリコンで作製されたコア２１１１と、このコア２１１１を覆うように形成された第１導電型の半導体層としてのｎ型ＧａＮで作製した第１のシェル２１１２と、この第１のシェル２１１２を覆うように形成された第２導電型の半導体層としてのｐ型ＧａＮで作製した第２のシェル２１１３とを備える。 The light emitting diode 2115 includes a core 2111 made of silicon, a first shell 2112 made of n-type GaN as a first conductivity type semiconductor layer formed so as to cover the core 2111, and the first And a second shell 2113 made of p-type GaN as a second conductivity type semiconductor layer formed so as to cover the shell 2112.
　この実施形態の発光ダイオード２１１５によれば、上記コア２１１１がシリコン製であることから、コア２１１１の形成プロセスが確立されている。したがって、所望の良形状の発光ダイオード２１１５が得られる。また、コアが全て第１導電型の半導体で作製されている場合に比べて、第１導電型の半導体の使用量を削減でき、コスト低減を図れる。 According to the light emitting diode 2115 of this embodiment, since the core 2111 is made of silicon, a process for forming the core 2111 is established. Therefore, a desired good shape light emitting diode 2115 is obtained. Further, as compared with the case where the core is entirely made of the first conductivity type semiconductor, the amount of use of the first conductivity type semiconductor can be reduced, and the cost can be reduced.
　なお、図３２Ｂに示すように、作製用基板としてのＳｉ基板２１１０上に立設状態で互いに間隔を隔てて形成された複数の発光ダイオード２１１５を、エッチング等により、図３３Ａに示すように、Ｓｉ基板２１１０から切り離した発光ダイオード２１１７とすることで、図３３Ｂに示すように、実装用基板としてのＧａＮ基板２１１８上に横倒し状態で実装することができる。すなわち、基板から切り離した発光ダイオード２１１７によれば、作製用基板とは別の所望の実装用基板に発光ダイオード２１１７を容易に実装できる。 32B, a plurality of light emitting diodes 2115 formed on a Si substrate 2110 as a manufacturing substrate and spaced apart from each other are formed by etching or the like as shown in FIG. 33A. By using the light emitting diode 2117 separated from the substrate 2110, as shown in FIG. 33B, the light emitting diode 2117 can be mounted on a GaN substrate 2118 as a mounting substrate in a lying state. That is, according to the light emitting diode 2117 separated from the substrate, the light emitting diode 2117 can be easily mounted on a desired mounting substrate different from the manufacturing substrate.
　例えば、Ｓｉ基板２１１０上に立設状態で形成された発光ダイオード２１１５の第１,第２のシェル２１１２,２１１３をＲＩＥ(反応性イオンエッチング)でエッチングし、Ｓｉ基板２１１０をＣＦ４などでドライエッチングし、さらにＩＰＡ(イソプロピルアルコール)等の溶液中で超音波を印加することで、上記Ｓｉ基板２１１０から発光ダイオード２１１５を切り離すことができる。 For example, the first and second shells 2112 and 2113 of the light emitting diode 2115 formed in a standing state on the Si substrate 2110 are etched by RIE (reactive ion etching), and the Si substrate 2110 is dry etched by CF 4 or the like. Further, the light emitting diode 2115 can be separated from the Si substrate 2110 by applying ultrasonic waves in a solution such as IPA (isopropyl alcohol).
　尚、図３３Ｂの発光ダイオード２１１７は、第１,第２のシェル２１１２,２１１３の一端部の周方向の一部が取り除かれて、コア２１１１の一端部の周方向の一部が露出していて、このコア２１１１の一端部の露出した部分にコンタクト電極２１２２が形成され、上記第２のシェル２１１３にコンタクト電極２１２１が形成されている。また、上記発光ダイオード２１１５,２１７７と同様の構成の光電効果を有するダイオードでもって、光電変換素子である光検出器や太陽電池を構成してもよい。また、上記実施形態では、第１のシェル２１１２をｎ型のＧａＮとし、第２のシェル２１１３をｐ型のＧａＮとしたが、第１のシェル２１１２をｐ型のＧａＮとし、第２のシェル２１１３をｎ型のＧａＮとしてもよい。 In the light emitting diode 2117 in FIG. 33B, a part of the circumferential direction of one end of the core 2111 is exposed by removing a part of the circumferential direction of one end of the first and second shells 2112 and 2113. A contact electrode 2122 is formed on an exposed portion of one end of the core 2111, and a contact electrode 2121 is formed on the second shell 2113. Further, a photodetector or a solar cell which is a photoelectric conversion element may be configured by a diode having a photoelectric effect similar to that of the light emitting diodes 2115 and 2177. In the above embodiment, the first shell 2112 is n-type GaN and the second shell 2113 is p-type GaN. However, the first shell 2112 is p-type GaN and the second shell 2113 is a p-type GaN. May be n-type GaN.
　　　(第１１の実施の形態)
　次に、図３４Ａ～図３４Ｉを参照して、この発明の第１１実施形態としてのダイオードの製造方法を説明する。図３４Ａ～図３４Ｉは、この製造方法における各製造工程を説明する断面図である。 (Eleventh embodiment)
Next, with reference to FIGS. 34A to 34I, a method for manufacturing a diode as the eleventh embodiment of the present invention will be described. 34A to 34I are cross-sectional views illustrating each manufacturing process in this manufacturing method.
　まず、図３４Ａに示すように、ｎ型Ｓｉ基板２２０１を用意し、このｎ型Ｓｉ基板２２０１の表面２２０１ＡにＴＥＯＳ(テトラ・エチル・オルソ・シリケート)などのＳｉＯ２膜(図示せず)を数μｍの厚さに成膜する。このＳｉＯ２膜の膜厚は１μｍ以上が好ましい。 First, as shown in FIG. 34A, an n-type Si substrate 2201 is prepared, and several SiO 2 films (not shown) such as TEOS (tetra-ethyl-ortho-silicate) are formed on the surface 2201A of the n-type Si substrate 2201. A film is formed to a thickness of μm. The thickness of the SiO 2 film is preferably 1 μm or more.
　その後、フォトレジスト加工を施し、上記ＳｉＯ２膜(図示せず)にＲＩＥ(反応性イオンエッチング)のような異方性エッチングを行い、上記ＳｉＯ２膜からｎ型Ｓｉ基板２２０１を部分的に露出させる。さらに、上記ＳｉＯ２膜から部分的に露出した上記ｎ型Ｓｉ基板２２０１に対して上記ＳｉＯ２膜との選択比の高い異方性エッチングを行い、２５μｍの深さにエッチングする。この時、上記フォトレジストはエッチングされてしまうが、上記ＳｉＯ２膜がマスクとなり、ｎ型Ｓｉ基板２２０１に対するエッチングを継続することができる。こうして、図３４Ｂに示すように、ｎ型Ｓｉロッドによる複数のコア２２０２をｎ型Ｓｉ基板２２０１上に予め定められた間隔を隔てて立設状態で形成することができる。 Thereafter, photoresist processing is performed, and anisotropic etching such as RIE (reactive ion etching) is performed on the SiO 2 film (not shown) to partially expose the n-type Si substrate 2201 from the SiO 2 film. Let Moreover, subjected to high anisotropic etching selection ratio between the SiO 2 film with respect to the n-type Si substrate 2201 was partially exposed from the SiO 2 film is etched to a depth of 25 [mu] m. At this time, the photoresist is etched, but the SiO 2 film serves as a mask, and the etching of the n-type Si substrate 2201 can be continued. Thus, as shown in FIG. 34B, a plurality of cores 2202 made of n-type Si rods can be formed on the n-type Si substrate 2201 in a standing state at predetermined intervals.
　次に、上記ｎ型Ｓｉ製の複数のコア２２０２が形成されたｎ型Ｓｉ基板２２０１に対し、アッシングおよび洗浄を行なった後、上記複数のコア２２０２が形成されたｎ型Ｓｉ基板２２０１の表面に熱酸化膜を形成する。その後、ＨＦ(フッ酸)により上記熱酸化膜を剥離し、欠陥やダストの無いＳｉ表面を得る。 Next, after ashing and cleaning the n-type Si substrate 2201 on which the plurality of cores 2202 made of n-type Si are formed, the surface of the n-type Si substrate 2201 on which the plurality of cores 2202 is formed is formed. A thermal oxide film is formed. Thereafter, the thermal oxide film is peeled off with HF (hydrofluoric acid) to obtain a Si surface free from defects and dust.
　次に、上記複数のコア２２０２が形成されたｎ型Ｓｉ基板２２０１を、ＭＯＣＶＤ(有機金属気相成長)装置にセットし、１２００℃、水素雰囲気中で数十分間サーマルクリーニングを行ない、自然酸化膜を除去すると共にＳｉ表面を水素終端化させる。その後、基板温度を１１００℃に下げ、ＡｌＮ層(図示せず)とＡｌＸＧａ１－ＸＮ(０＜ｘ＜１)層(図示せず)を成長する。なお、このＡｌＮ層とＡｌＸＧａ１－ＸＮ(０＜ｘ＜１)層は必ずしも形成しなくてもよい。 Next, the n-type Si substrate 2201 on which the plurality of cores 2202 are formed is set in a MOCVD (metal organic chemical vapor deposition) apparatus, and thermal cleaning is performed in a hydrogen atmosphere at 1200 ° C. for several tens of minutes, and natural oxidation is performed. The film is removed and the Si surface is hydrogen terminated. Thereafter, the substrate temperature is lowered to 1100 ° C., and an AlN layer (not shown) and an Al X Ga 1-X N (0 <x <1) layer (not shown) are grown. Note that the AlN layer and the Al X Ga 1-X N (0 <x <1) layer are not necessarily formed.
　次いで、図３４Ｃに示すように、ＭＯＣＶＤ(有機金属気相成長)により、ｎ型ＧａＮを成長させて第１導電型の第１のシェル２２０３を形成する。次に、図３４Ｄに示すように、ＭＯＣＶＤにより、数層～数十層のＧａ１－ＹＩｎＹＮ/Ｇａ１－ＺＩｎＺＮ(０＜Ｙ,Ｚ＜１)多重量子井戸(ＭＱＷ)構造による量子井戸層(活性層)２２０４を成長させる。次に、上記量子井戸層(活性層)２２０４上にｐ‐ＡｌｎＧａ１－ｎＮ(０＜ｎ＜１)層(図示せず)を成長し、さらに、図３４Ｅに示すように、ＭＯＣＶＤにより、ｐ型ＧａＮを成長させて、上記量子井戸層２２０４を覆う第２導電型の第２のシェル２２０５を形成する。なお、上記量子井戸層２２０４とその上のｐ‐ＡｌｎＧａ１－ｎＮ(０＜ｎ＜１)層(図示せず)は必ずしも形成しなくてもよい。 Next, as shown in FIG. 34C, n-type GaN is grown by MOCVD (metal organic chemical vapor deposition) to form a first shell 2203 of the first conductivity type. Next, as shown in FIG. 34D, several to several tens of Ga 1 -Y In Y N / Ga 1 -Z In ZN (0 <Y, Z <1) multiple quantum wells (MQW) are formed by MOCVD. A quantum well layer (active layer) 2204 having a structure is grown. Next, a p-Al n Ga 1-n N (0 <n <1) layer (not shown) is grown on the quantum well layer (active layer) 2204. Further, as shown in FIG. Thus, p-type GaN is grown to form the second conductivity type second shell 2205 covering the quantum well layer 2204. Note that the quantum well layer 2204 and the p-Al n Ga 1-n N (0 <n <1) layer (not shown) on the quantum well layer 2204 are not necessarily formed.
　次に、図３４Ｆに示すように、上記ｐ型ＧａＮの第２のシェル２２０５上にＣＶＤ,スパッタ,またはメッキによりＩＴＯ(錫添加酸化インジウム)を形成してＩＴＯ導電膜２２０６を形成する。なお、上記ＩＴＯを形成した後、窒素と酸素の混合雰囲気中で６５０℃,１０分間のアニールを行ない、ｐ型半透明電極を形成してもよい。なお、ＩＴＯ導電膜２２０６に替えて、ＺｎＯ導電膜やＦＴＯ(フッ素添加酸化錫)導電膜を採用してもよい。 Next, as shown in FIG. 34F, ITO (tin-added indium oxide) is formed on the second shell 2205 of the p-type GaN by CVD, sputtering, or plating to form an ITO conductive film 2206. In addition, after forming the ITO, annealing may be performed at 650 ° C. for 10 minutes in a mixed atmosphere of nitrogen and oxygen to form a p-type translucent electrode. Note that instead of the ITO conductive film 2206, a ZnO conductive film or an FTO (fluorine-added tin oxide) conductive film may be employed.
　次に、上記ＩＴＯ導電膜２２０６,ｐ型ＧａＮの第２のシェル２２０５,量子井戸層２２０４,ｎ型ＧａＮの第１のシェル２２０３を、Ｃｌ２などのエッチングガスを用いてＲＩＥによりエッチングする。このエッチングにより、図３４Ｇに示すように、上記ｎ型Ｓｉの複数のコア２２０２の先端面が露出されると共にｎ型Ｓｉ基板２２０１の表面が部分的に露出される。 Next, the ITO conductive film 2206, the p-type GaN second shell 2205, the quantum well layer 2204, and the n-type GaN first shell 2203 are etched by RIE using an etching gas such as Cl 2 . By this etching, as shown in FIG. 34G, the tip surfaces of the n-type Si cores 2202 are exposed, and the surface of the n-type Si substrate 2201 is partially exposed.
　次に、ＣＦ４などのエッチングガスを用いて、Ｓｉを選択的にエッチングするドライエッチングを行なう。これにより、図３４Ｈに示すように、上記ｎ型Ｓｉのコア２２０２の先端部がエッチングされると共に、ｎ型Ｓｉのコア２２０２直下のｎ型Ｓｉ部分２２０１Ｂを残すように、上記ｎ型Ｓｉ基板２２０１が表面からエッチングされる。 Next, dry etching for selectively etching Si is performed using an etching gas such as CF 4 . Thus, as shown in FIG. 34H, the tip of the n-type Si core 2202 is etched, and the n-type Si substrate 2201 is left so that an n-type Si portion 2201B immediately below the n-type Si core 2202 remains. Is etched from the surface.
　次に、上記ｎ型Ｓｉ基板２２０１をＩＰＡ等の溶液中に浸漬して超音波を印加することで、図３４Ｉに示すように、上記ｎ型Ｓｉのコア２２０２を、上記ｎ型Ｓｉ基板２２０１の部分２２０１Ｂから切り離す。これにより、上記ｎ型Ｓｉ基板２２０１から切り離された複数の発光ダイオード２２０７が得られる。 Next, by immersing the n-type Si substrate 2201 in a solution such as IPA and applying ultrasonic waves, the n-type Si core 2202 is attached to the n-type Si substrate 2201 as shown in FIG. Separate from part 2201B. Thereby, a plurality of light emitting diodes 2207 separated from the n-type Si substrate 2201 are obtained.
　尚、上記第１１実施形態の製造方法において、図３４Ｆに示すＩＴＯ導電膜２２０６を形成してから、このＩＴＯ導電膜２２０６の表面に上記ＩＴＯ導電膜２２０６よりも屈折率の低い層(例えば、ＳｉＯ２、屈折率ｎ＝１．４５)を形成すれば、コア２２０２の長軸方向に光を導波することができ、一方向に強く発光する発光ダイオードを提供できる。 In the manufacturing method of the eleventh embodiment, after the ITO conductive film 2206 shown in FIG. 34F is formed, a layer having a lower refractive index than the ITO conductive film 2206 (for example, SiO 2) is formed on the surface of the ITO conductive film 2206. 2 and refractive index n = 1.45), light can be guided in the major axis direction of the core 2202, and a light emitting diode that emits light strongly in one direction can be provided.
　また、上記製造方法の実施形態の説明では、基板２２０１がｎ型Ｓｉ基板であり、コア２２０２がｎ型Ｓｉコアである場合を説明したが、基板とコアの材質を変更した場合の第１～第３変形例を、次の(1),(2),(3)に示す。なお、第１のシェル２２０３,量子井戸層２２０４,第２のシェル２２０５,ＩＴＯ導電膜２２０６の形成については上記実施形態と同様である。 In the description of the embodiment of the manufacturing method, the case where the substrate 2201 is an n-type Si substrate and the core 2202 is an n-type Si core has been described. A third modification is shown in the following (1), (2), and (3). Note that the formation of the first shell 2203, the quantum well layer 2204, the second shell 2205, and the ITO conductive film 2206 is the same as in the above embodiment.
　 (1) 第１変形例では、基板２２０１をＳｉＣ基板とし、コア２２０２をＳｉＣとする。この場合、このＳｉＣによるコアは、ＳｉＯ２膜をマスクとするＲＩＥ(反応性イオンエッチング)等により形成する。 (1) In the first modification, the substrate 2201 is an SiC substrate, and the core 2202 is SiC. In this case, the core made of SiC is formed by RIE (reactive ion etching) using the SiO 2 film as a mask.
　 (2) 第２変形例では、基板２２０１をＳｉＯ２基板とし、コア２２０２をＳｉＯ２とする。この場合、このＳｉＯ２によるコアの形成は、通常の半導体プロセスに使用する公知のリソグラフィー法とドライエッチング法が利用できる。 (2) In the second modification, the substrate 2201 is an SiO 2 substrate, and the core 2202 is SiO 2 . In this case, for the formation of the core by SiO 2 , a known lithography method and dry etching method used in a normal semiconductor process can be used.
　 (3) 第３変形例では、基板２２０１をｎ型Ｓｉ基板とし、コア２２０２をｎ型Ｓｉとする。この場合、このｎ型Ｓｉによるコア２２０２は、ＶＬＳ(Ｖapor‐Ｌiqid‐Ｓolid)成長により形成できる。 (3) In the third modification, the substrate 2201 is an n-type Si substrate, and the core 2202 is n-type Si. In this case, the core 2202 made of n-type Si can be formed by VLS (Vapor-Liqid-Solid) growth.
　尚、上記実施形態では、第１導電型の第１のシェル２２０３をｎ型ＧａＮとしてＭＯＣＶＤにより形成したが、第１導電型の第１のシェル２２０３の材質に応じてＣＶＤ,メッキ,スパッタ等を採用できる。また、上記実施形態では、基板２２０１,コア２２０２,第１のシェル２２０３をｎ型とし、第２のシェル２２０５をｐ型としたが、基板２２０１,コア２２０２,第１のシェル２２０３をｐ型とし、第２のシェル２２０５をｎ型としてもよい。また、上記実施形態と同様の工程で作製したダイオードで光電変換素子(光検出器や太陽電池)を構成してもよい。 In the above-described embodiment, the first conductivity type first shell 2203 is formed as n-type GaN by MOCVD. However, CVD, plating, sputtering, etc. may be performed according to the material of the first conductivity type first shell 2203. Can be adopted. In the above embodiment, the substrate 2201, the core 2202, and the first shell 2203 are n-type, and the second shell 2205 is p-type. However, the substrate 2201, the core 2202, and the first shell 2203 are p-type. The second shell 2205 may be n-type. In addition, a photoelectric conversion element (photodetector or solar cell) may be configured by a diode manufactured in the same process as in the above embodiment.
　　　(第１２の実施の形態)
　次に、図３５Ａの断面図を参照して、この発明の第１２実施形態の発光ダイオードを説明する。この第１２実施形態の発光ダイオード２３００は、前述の発光ダイオードの製造方法の第１１実施形態の図３４Ｆに示す工程まで作製したものを用いている。 (Twelfth embodiment)
Next, a light emitting diode according to a twelfth embodiment of the present invention will be described with reference to a sectional view of FIG. 35A. The light emitting diode 2300 according to the twelfth embodiment uses a light emitting diode manufactured up to the step shown in FIG. 34F of the eleventh embodiment of the method for manufacturing a light emitting diode.
　この第１２実施形態の発光ダイオード２３００は、図３５Ａに示すように、導電膜２２０６,ｐ型ＧａＮの第２のシェル２２０５,量子井戸層２２０４のうちの、上記ｎ型Ｓｉ基板２２０１の表面に沿って延在している端部をＲＩＥ等のエッチングにより除去して、ｎ型ＧａＮの第１のシェル２２０３の端部２２０３Ｂを露出させている。そして、この露出した第１のシェル２２０３の端部２２０３Ｂにコンタクト電極２３０７を形成し、上記導電膜２２０６の端部２２０６Ｂにコンタクト電極２３０１を形成した。 As shown in FIG. 35A, the light emitting diode 2300 of the twelfth embodiment is formed along the surface of the n-type Si substrate 2201 among the conductive film 2206, the p-type GaN second shell 2205, and the quantum well layer 2204. The extending end portion is removed by etching such as RIE to expose the end portion 2203B of the first shell 2203 of n-type GaN. Then, a contact electrode 2307 was formed on the exposed end portion 2203B of the first shell 2203, and a contact electrode 2301 was formed on the end portion 2206B of the conductive film 2206.
　この実施形態の発光ダイオード２３００は、ｎ型Ｓｉ基板２２０１上に間隔を隔てて立設状態で複数形成された各ｎ型Ｓｉ棒状コア２２０２をｎ型ＧａＮの第１のシェル２２０３,量子井戸層２２０４,ｐ型ＧａＮの第２のシェル２２０５で順次被覆している。したがって、この発光ダイオード２３００によれば、棒状コア２２０２を有さずフラットな積層膜とした場合に比べて、発光面積を増加させることができるので、低いコストで発光光量を増加させることができる。 In the light emitting diode 2300 of this embodiment, a plurality of n-type Si rod-like cores 2202 formed on an n-type Si substrate 2201 in a standing state with an interval are provided as a first shell 2203 and a quantum well layer 2204 of n-type GaN. , and sequentially covered with a second shell 2205 of p-type GaN. Therefore, according to the light emitting diode 2300, the light emitting area can be increased as compared with the case where a flat laminated film without the rod-shaped core 2202 is provided, and thus the amount of emitted light can be increased at a low cost.
　また、上記発光ダイオード２３００を実装した図３５Ｂに示す発光素子２３０５を、図３５Ｃに示すように、支持基板２３０６上に互いに間隔をあけて格子状に実装して、照明装置２３０７とすることができる。この照明装置２３０７はバックライト,表示装置とすることもできる。 In addition, the light-emitting elements 2305 shown in FIG. 35B on which the light-emitting diodes 2300 are mounted can be mounted in a grid pattern on the support substrate 2306 with a space therebetween as shown in FIG. 35C, whereby the lighting device 2307 can be obtained. . The lighting device 2307 can be a backlight or a display device.
　尚、この実施形態では、発光ダイオード２３００として、上記第１１実施形態の図３４Ｆに示す工程まで作製したものを用いたが、上記第１１実施形態の変形例で図３４Ｆに示す工程まで作製したものを用いてもよい。また、上記実施形態では、基板２２０１,コア２２０２,第１のシェル２２０３をｎ型とし、第２のシェル２２０５をｐ型としたが、基板２２０１,コア２２０２,第１のシェル２２０３をｐ型とし、第２のシェル２２０５をｎ型としてもよい。 In this embodiment, the light-emitting diode 2300 manufactured up to the step shown in FIG. 34F of the eleventh embodiment is used. However, the light-emitting diode 2300 manufactured up to the step shown in FIG. 34F is a modification of the eleventh embodiment. May be used. In the above embodiment, the substrate 2201, the core 2202, and the first shell 2203 are n-type, and the second shell 2205 is p-type. However, the substrate 2201, the core 2202, and the first shell 2203 are p-type. The second shell 2205 may be n-type.
　　　(第１３の実施の形態)
　次に、図３６Ａの断面図を参照して、この発明の第１３実施形態の発光ダイオードを説明する。この第１３実施形態の発光ダイオード２４００は、前述の発光ダイオードの製造方法の第１１実施形態の図３４Ｉに示す工程まで作製した発光ダイオード２２０７を用いている。 (Thirteenth embodiment)
Next, a light emitting diode according to a thirteenth embodiment of the present invention will be described with reference to the sectional view of FIG. 36A. The light emitting diode 2400 of the thirteenth embodiment uses the light emitting diode 2207 manufactured up to the step shown in FIG. 34I of the eleventh embodiment of the method for manufacturing a light emitting diode described above.
　図３６Ａに示すように、この第１３実施形態の発光ダイオード２４００は、前述の第１１実施形態で作製した発光ダイオード２２０７の導電膜２２０６,ｐ型ＧａＮの第２のシェル２２０５,量子井戸層２２０４のうちの、先端側の一部分をエッチングで除去してｎ型ＧａＮの第１のシェル２２０３の先端側の一部分２２０３Ｃを露出させている。この第１のシェル２２０３の一部分２２０３Ｃにコンタクト電極２４０３を形成し、上記導電膜２２０６にコンタクト電極２４０２を形成している。そして、この発光ダイオード２４００は、基板２４０１上に横倒しの状態で配置されている。上記基板２４０１は、例えば、フレキシブル基板またはガラス基板とすることができるが、上記基板２４０１は、他の材質の絶縁基板としてもよい。 As shown in FIG. 36A, the light emitting diode 2400 of the thirteenth embodiment includes the conductive film 2206 of the light emitting diode 2207 fabricated in the above eleventh embodiment, the second shell 2205 of p-type GaN, and the quantum well layer 2204. A part 2203C on the tip side of the n-type GaN first shell 2203 is exposed by removing a part on the tip side by etching. A contact electrode 2403 is formed on a portion 2203C of the first shell 2203, and a contact electrode 2402 is formed on the conductive film 2206. The light emitting diode 2400 is disposed on the substrate 2401 in a lying state. The substrate 2401 can be, for example, a flexible substrate or a glass substrate, but the substrate 2401 may be an insulating substrate of another material.
　また、図３６Ｂに示すように、上記発光ダイオード２４００を、基板２４０１上に複数配列して、発光素子２４１０としてもよい。この発光素子２４１０は、各列の各発光ダイオード２４００のコンタクト電極２４０２,２４０３に配線２４０５,２４０６を接続している。 Alternatively, as shown in FIG. 36B, a plurality of the light emitting diodes 2400 may be arranged on the substrate 2401 to form the light emitting element 2410. In this light emitting element 2410, wirings 2405 and 2406 are connected to contact electrodes 2402 and 2403 of each light emitting diode 2400 in each column.
　また、図３６Ｃに示すように、上記発光素子２４１０を、支持基板２４１１上に互いに間隔をあけて格子状に複数実装して、照明装置２４１２とすることができる。この照明装置２４１２はバックライト,表示装置とすることもできる。 Further, as shown in FIG. 36C, a plurality of the light emitting elements 2410 can be mounted on the support substrate 2411 in a lattice pattern with a space therebetween, whereby a lighting device 2412 can be obtained. The lighting device 2412 may be a backlight or a display device.
　尚、この実施形態では、発光ダイオード２４００として、上記第１１実施形態で作製したものを用いたが、上記第１１実施形態の変形例で作製したものを用いてもよい。 In this embodiment, as the light emitting diode 2400, the one manufactured in the eleventh embodiment is used. However, the light emitting diode 2400 manufactured in a modification of the eleventh embodiment may be used.
　　　(第１４の実施の形態)
　次に、図３７Ａの断面図を参照して、この発明のダイオードの第１４実施形態としての光電変換素子を説明する。この第１４実施形態の光電変換素子は、光検出器や太陽電池とすることができる。この第１４実施形態の光電変換素子は、前述の発光ダイオードの製造方法の第１１実施形態の図３４Ｆに示す工程までのうちの図３４Ｄに示す量子井戸層２２０４を形成する工程を省いた工程で作製したものを用いている。 (Fourteenth embodiment)
Next, a photoelectric conversion element as a fourteenth embodiment of the diode of the present invention will be described with reference to a sectional view of FIG. 37A. The photoelectric conversion element of the fourteenth embodiment can be a photodetector or a solar cell. The photoelectric conversion element of the fourteenth embodiment is a process that omits the step of forming the quantum well layer 2204 shown in FIG. 34D out of the steps up to the process shown in FIG. 34F of the eleventh embodiment of the method for manufacturing a light-emitting diode described above. The produced one is used.
　したがって、この実施形態の光電変換素子２５００では、ｎ型Ｓｉ基板２２０１上に間隔を隔てて複数形成されたｎ型Ｓｉ棒状コア２２０２をｎ型ＧａＮの第１のシェル２２０３,ｐ型ＧａＮの第２のシェル２２０５,ＩＴＯ導電膜２２０６で順次被覆している。また、上記ｎ型Ｓｉ基板２２０１は、絶縁基板２５０１上に配置される。また、この実施形態の光電変換素子２５００では、図３７Ａに示すように、導電膜２２０６,ｐ型ＧａＮの第２のシェル２２０５のうちの、上記ｎ型Ｓｉ基板２２０１の表面に沿って延在している部分２２０６Ｂ,２２０５Ｂの端部をＲＩＥ等のエッチングにより除去して、ｎ型ＧａＮの第１のシェル２２０３の端部２２０３Ｂを露出させている。そして、この露出した第１のシェル２２０３の端部２２０３Ｂにコンタクト電極２５０３を形成し、上記第２のシェル２２０５の端部２２０５Ｂまたは上記導電膜２２０６の端部２２０６Ｂにコンタクト電極２５０２を形成した。 Therefore, in the photoelectric conversion element 2500 of this embodiment, the n-type Si rod-shaped cores 2202 formed on the n-type Si substrate 2201 at intervals are used as the n-type GaN first shell 2203 and the p-type GaN second shell. The shell 2205 and the ITO conductive film 2206 are sequentially covered. The n-type Si substrate 2201 is disposed on the insulating substrate 2501. Further, in the photoelectric conversion element 2500 of this embodiment, as shown in FIG. 37A, the conductive film 2206 and the p-type GaN second shell 2205 extend along the surface of the n-type Si substrate 2201. The end portions of the portions 2206B and 2205B are removed by etching such as RIE to expose the end portion 2203B of the first shell 2203 of n-type GaN. Then, a contact electrode 2503 was formed on the exposed end portion 2203B of the first shell 2203, and a contact electrode 2502 was formed on the end portion 2205B of the second shell 2205 or the end portion 2206B of the conductive film 2206.
　この実施形態の光電変換素子２５００は、ｎ型Ｓｉ基板２２０１上に間隔を隔てて立設状態で複数形成された各ｎ型Ｓｉ棒状コア２２０２をｎ型ＧａＮの第１のシェル２２０３,ｐ型ＧａＮの第２のシェル２２０５で順次被覆している。したがって、この光電変換素子２５００によれば、棒状コア２２０２を有さないフラットな積層膜とした場合に比べて、基板２２０１の単位面積当たりのＰＮ接合面積を大きくすることができる。よって、ＰＮ接合面積の単位面積当たりのコストの低減を図れる。また、各ｎ型Ｓｉ棒状コア２２０２間の隙間へ光が入り込んで、光閉じ込め効果を得ることができるので、単位面積当たりの光電変換の効率を上げることができる。 In the photoelectric conversion element 2500 of this embodiment, a plurality of n-type Si rod-shaped cores 2202 formed on an n-type Si substrate 2201 in a standing state with a space therebetween are formed as a first shell 2203 of n-type GaN and p-type GaN. The second shell 2205 is sequentially covered. Therefore, according to this photoelectric conversion element 2500, the PN junction area per unit area of the substrate 2201 can be increased as compared with the case where a flat laminated film without the rod-shaped core 2202 is formed. Therefore, the cost per unit area of the PN junction area can be reduced. Further, since light enters the gaps between the n-type Si rod-like cores 2202 and a light confinement effect can be obtained, the efficiency of photoelectric conversion per unit area can be increased.
　尚、この実施形態の光電変換素子２５００では、上記第１１実施形態で作製したダイオードを用いたが、上記第１１実施形態の変形例で作製したダイオードを用いてもよい。 In addition, in the photoelectric conversion element 2500 of this embodiment, although the diode produced in the said 11th Embodiment was used, you may use the diode produced in the modification of the said 11th Embodiment.
　また、上記第１４実施形態の光電変換素子２５００の変形例では、前述の第１１実施形態の図３４Ｉに示す工程までのうちの図３４Ｄに示す量子井戸層２２０４を形成する工程を省いた工程で作製したダイオードを用いて、図３７Ｂに示す光電変換素子２５２０とした。 Further, in the modification of the photoelectric conversion element 2500 of the fourteenth embodiment, the step of forming the quantum well layer 2204 shown in FIG. 34D out of the steps shown in FIG. 34I of the eleventh embodiment is omitted. A photoelectric conversion element 2520 illustrated in FIG. 37B was obtained using the manufactured diode.
　この変形例の光電変換素子２５２０が有するダイオード２５１７は、導電膜２２０６,ｐ型ＧａＮの第２のシェル２２０５の先端側の部分の周方向の一部をエッチングにより除去して、ｎ型ＧａＮの第１のシェル２２０３の先端側の部分の周方向の一部を露出させている。この露出したｎ型ＧａＮの第１のシェル２２０３の先端側の部分にコンタクト電極２５１８を形成すると共に、上記ｎ型Ｓｉ棒状コア２２０２に関して上記コンタクト電極２５１８の反対側で導電膜２２０６にコンタクト電極２５１９を形成した。 The diode 2517 included in the photoelectric conversion element 2520 according to this modification is formed by removing a portion of the conductive film 2206 and a portion of the tip side of the p-type GaN second shell 2205 in the circumferential direction by etching. A part in the circumferential direction of the portion on the tip side of one shell 2203 is exposed. A contact electrode 2518 is formed on the exposed n-type GaN first shell 2203, and a contact electrode 2519 is formed on the conductive film 2206 on the opposite side of the n-type Si rod-shaped core 2202 from the contact electrode 2518. Formed.
　この変形例の光電変換素子２５２０では、図３７Ｂに示すように、ダイオード２５１７は基板２５２１上に上記コンタクト電極２５１９が上記基板２５２１側に位置するように横倒しの状態で配置されている。なお、上記基板２５２１としては、フレキシブル基板や導電性基板を採用できる。 In the photoelectric conversion element 2520 of this modified example, as shown in FIG. 37B, the diode 2517 is disposed on the substrate 2521 in a lying state so that the contact electrode 2519 is positioned on the substrate 2521 side. Note that a flexible substrate or a conductive substrate can be used as the substrate 2521.
　また、上記第１４実施形態の光電変換素子２５００のもう１つの変形例では、前述の第１１実施形態の図３４Ｉに示す工程までのうちの図３４Ｄに示す量子井戸層２２０４を形成する工程を省いた工程で作製したダイオードを用いて、図３７Ｃに示す光電変換素子２５３０とした。 Further, in another modification of the photoelectric conversion element 2500 of the fourteenth embodiment, the step of forming the quantum well layer 2204 shown in FIG. 34D out of the steps shown in FIG. 34I of the eleventh embodiment is omitted. A photoelectric conversion element 2530 shown in FIG. 37C was obtained using the diode manufactured through the above-described process.
　この変形例の光電変換素子２５３０が有するダイオード２５２７は、導電膜２２０６,ｐ型ＧａＮの第２のシェル２２０５の先端側の部分の周方向の一部をエッチングにより除去して、ｎ型ＧａＮの第１のシェル２２０３の先端側の部分の周方向の一部を露出させている。この露出したｎ型ＧａＮの第１のシェル２２０３の先端側の部分にコンタクト電極２５２８を形成すると共に上記コンタクト電極２５２８の同じ側で導電膜２２０６にコンタクト電極２５２９を形成した。 A diode 2527 included in the photoelectric conversion element 2530 of this modification is formed by removing a part of the conductive film 2206 and a portion of the tip side of the second shell 2205 of the p-type GaN in the circumferential direction by etching, thereby removing the n-type GaN first. A part in the circumferential direction of the portion on the tip side of one shell 2203 is exposed. A contact electrode 2528 was formed on the exposed portion of the exposed n-type GaN first shell 2203, and a contact electrode 2529 was formed on the conductive film 2206 on the same side of the contact electrode 2528.
　この変形例の光電変換素子２５３０では、図３７Ｃに示すように、ダイオード２５２７は基板２５３１の光入射面２５３１Ａの裏面２５３１ＢにＩＴＯ導電膜２２０６が接すると共に上記コンタクト電極２５２８,２５２９が上記基板２５３１に対して反対側に位置するように横倒しの状態で配置されている。なお、上記基板２５３１としては、ガラス基板や透光性基板を採用できる。 In the photoelectric conversion element 2530 of this modified example, as shown in FIG. 37C, the diode 2527 has the ITO conductive film 2206 in contact with the back surface 2531B of the light incident surface 2531A of the substrate 2531 and the contact electrodes 2528 and 2529 with respect to the substrate 2531. It is arranged in a lying state so that it is located on the opposite side. Note that a glass substrate or a light-transmitting substrate can be used as the substrate 2531.
　尚、この実施形態の変形例の光電変換素子２５２０,２５３０では、上記第１１実施形態で作製したダイオードを用いたが、上記第１１実施形態の変形例で作製したダイオードを用いてもよい。また、上記各実施形態では、コア部としての棒状コアを円柱形状としたが多角柱形状や楕円柱形状としてもよく、円錐形状,楕円錐形状,多角錐形状等でもよい。また、上記各実施形態では、第１,第２のシェルを円筒形状としたが上記コア部の形状に対応して多角筒形状,楕円筒形状,円錐形状,楕円錐形状,多角錐形状等としてもよい。 In addition, in the photoelectric conversion elements 2520 and 2530 of the modified example of this embodiment, the diode fabricated in the eleventh embodiment is used, but the diode fabricated in the modified example of the eleventh embodiment may be used. In each of the above embodiments, the rod-shaped core as the core portion has a cylindrical shape, but may have a polygonal column shape or an elliptical column shape, and may have a conical shape, an elliptical cone shape, a polygonal pyramid shape, or the like. In each of the above embodiments, the first and second shells have a cylindrical shape. However, a polygonal cylindrical shape, an elliptical cylindrical shape, a conical shape, an elliptical cone shape, a polygonal pyramid shape, etc., corresponding to the shape of the core portion. Also good.
１００　発光素子
１１０　第１の基板
１１１　シリコン基板
１１２　ｎ型ＧａＮ半導体層
１１３　ｎ型ＧａＮ半導体層
１２１　ｎ型ＧａＮ棒状半導体
１２２　活性層
１２３　ｐ型ＧａＮ半導体層
１２４　透明電極層
１２５　ｎ型ＧａＮ半導体層
１３１　透明部材
１４１　上部電極
１５１　フォトレジスト
Ａ　アノード
Ｋ　カソード
２００　棒状の発光素子
２１０　第２の基板
２１１　第１の電極
２１１Ａ　対向部分
２１２　第２の電極
２１２Ａ　対向部分
２１３　層間絶縁膜
２１４,２１５　メタル配線
２２１　流体
３００　ＬＥＤ電球
３０１　口金
３０２　放熱部
３０４　発光部
３０５　放熱板
３０６　発光装置
３１０　基板
３１１　第１の電極
３１２　第２の電極
３２０　発光素子
４００　バックライト
４０１　支持基板
４０２　発光装置
５２０　画素ＬＥＤ
Ｘ１　行アドレス線
Ｙ１　列アドレス線
１１００　発光素子
１１１１　基板
１１１３　ｎ型の半導体層
１１２１　板状(突起状)半導体
１１２２　活性層
１１２３　ｐ型の半導体層
１１２４　透明電極層
１１３１　透明部材
１１４１　上部電極
１１５１　フォトレジスト
２００１,２０１１,２０５１　ＳｉＣ棒状コア
２００２,２０１２,２０５２,２０６２,２０８２,２０９２,２１０２,２１１２,２２０３　ｎ型ＧａＮ第１のシェル
２００３,２０１３,２０５３,２０６３,２０８３,２０９３,２１０３,２１１３,２２０５　ｐ型ＧａＮ第２のシェル
２００５,２０１５,２０３５,２０６５,２０８５,２０９５,２１０５,２１１５,２１１７,２２０７,２３００,２４００　発光ダイオード
２００６,２０４６　ＳｉＣ基板
２００７,２０４７,２１００,２１１８　ＧａＮ基板
２００８,２００９,２０９６,２０９７,２１０６,２１０７,２４０２,２４０３,２５０２,２５０３,２５１８,２５１９,２５２８,２５２９　コンタクト電極
２０３１　第３のシェル
２０４５,２５１７　ダイオード
２０５６　ＳｉＣ基板
２０６１　ＳｉＯ２棒状コア
２０６７　ＳｉＯ２基板
２０８１,２０９１　ｎ型Ｓｉ棒状コア
２０９０,２２０１　ｎ型Ｓｉ基板
２１１０　Ｓｉ基板
２１１１　Ｓｉコア
２２０２　ｎ型Ｓｉコア
２２０４　量子井戸層
２２０６　ＩＴＯ導電膜
２３０５　発光素子
２３０６　支持基板
２３０７　照明装置
２４０１,２５２１,２５３１　基板
２４０５,２４０６　配線
２５００,２５２０,２５３０　光電変換素子
２５０１　絶縁基板 100 light emitting element 110 first substrate 111 silicon substrate 112 n-type GaN semiconductor layer 113 n-type GaN semiconductor layer 121 n-type GaN rod-shaped semiconductor 122 active layer 123 p-type GaN semiconductor layer 124 transparent electrode layer 125 n-type GaN semiconductor layer 131 transparent Member 141 Upper electrode 151 Photoresist A Anode K Cathode 200 Rod-like light emitting element 210 Second substrate 211 First electrode 211A Opposing portion 212 Second electrode 212A Opposing portion 213 Interlayer insulating films 214 and 215 Metal wiring 221 Fluid 300 LED Light bulb 301 Base 302 Heat radiating part 304 Light emitting part 305 Heat radiating plate 306 Light emitting device 310 Substrate 311 First electrode 312 Second electrode 320 Light emitting element 400 Back light 401 Support substrate 402 Light emitting device 520 Pixel LED
X1 row address line Y1 column address line 1100 light emitting element 1111 substrate 1113 n-type semiconductor layer 1121 plate-like (projection-like) semiconductor 1122 active layer 1123 p-type semiconductor layer 1124 transparent electrode layer 1131 transparent member 1141 upper electrode 1151 photoresist 2001 , 2011, 2051 SiC rod core 2002, 2012, 2052, 2062, 2082, 2092, 2102, 2112, 2203 n-type GaN first shell 2003, 2013, 2053, 2063, 2083, 2093, 2103, 2113, 2205 p-type GaN second shell 2005, 2015, 2035, 2065, 2085, 2095, 2105, 2115, 2117, 2207, 2300, 2400 Light emitting diode 2006, 2046 SiC substrate 2007, 2047, 2100, 2118 GaN substrate 2008, 20 9,2096,2097,2106,2107,2402,2403,2502,2503,2518,2519,2528,2529 contact electrode 2031 third shell 2045,2517 diode 2056 SiC substrate 2061 SiO 2 rod-shaped core 2067 SiO 2 substrate 2081, 2091 n-type Si rod-shaped cores 2090 and 2201 n-type Si substrate 2110 Si substrate 2111 Si core 2202 n-type Si core 2204 quantum well layer 2206 ITO conductive film 2305 light-emitting element 2306 support substrate 2307 illuminating devices 2401, 2521 and 2531 substrates 2405 and 2406 Wiring 2500, 2520, 2530 Photoelectric conversion element 2501 Insulating substrate

Claims (35)

  1. 　第１導電型の半導体基部(１１３,１１１３)と、
    　上記第１導電型の半導体基部上に形成された複数の第１導電型の突起状半導体(１２１,１１２１)と、
    　上記突起状半導体を覆う第２導電型の半導体層(１２３,１１２３)と
    を備えたことを特徴とする発光素子。     A first conductivity type semiconductor base (113, 1113);
    A plurality of first conductive type protruding semiconductors (121, 1121) formed on the first conductive type semiconductor base;
    A light emitting device comprising: a second conductive type semiconductor layer (123, 1123) covering the protruding semiconductor.
  2. 　請求項１に記載の発光素子において、
    　上記第１導電型の突起状半導体(１２１,１１２１)は第１導電型の棒状半導体(１２１)であることを特徴とする発光素子。     The light emitting device according to claim 1,
    The first conductive type protruding semiconductor (121, 1121) is a first conductive type rod-shaped semiconductor (121).
  3. 　請求項２に記載の発光素子において、
    　上記第１導電型の棒状半導体(１２１)の長さが上記第１導電型の棒状半導体(１２１)の太さの１０倍以上であることを特徴とする発光素子。     The light emitting device according to claim 2,
    A light emitting device characterized in that the length of the first conductivity type rod-shaped semiconductor (121) is 10 times or more the thickness of the first conductivity type rod-shaped semiconductor (121).
  4. 　請求項１に記載の発光素子において、
    　上記第１導電型の突起状半導体(１２１,１１２１)は第１導電型の板状半導体(１１２１)であることを特徴とする発光素子。     The light emitting device according to claim 1,
    The light emitting element, wherein the first conductive type protruding semiconductor (121, 1121) is a first conductive type plate semiconductor (1121).
  5. 　請求項１に記載の発光素子において、
    　上記第１導電型の突起状半導体(１２１,１１２１)と第２導電型の半導体層(１２３,１１２３)との間に活性層(１２２,１１２２)が形成されていることを特徴とする発光素子。     The light emitting device according to claim 1,
    An active layer (122, 1122) is formed between the first conductive type protruding semiconductor (121, 1121) and the second conductive type semiconductor layer (123, 1123). .
  6. 　請求項１に記載の発光素子において、
    　上記第２導電型の半導体層(１２３,１１２３)上に透明電極層(１３１,１１２４)が形成されていることを特徴とする発光素子。     The light emitting device according to claim 1,
    A light-emitting element, wherein a transparent electrode layer (131, 1124) is formed on the second conductive type semiconductor layer (123, 1123).
  7. 　請求項６に記載の発光素子において、
    　上記複数の第１導電型の突起状半導体(１２１,１１２１)の間で上記透明電極層(１２４,１１２４)が対向している対向間隙に上記透明電極層よりも透明性が高い材料で作製された透明部材(１３１,１１３１)が充填されていることを特徴とする発光素子。     The light emitting device according to claim 6,
    The transparent electrode layer (124, 1124) is made of a material having higher transparency than the transparent electrode layer in the facing gap where the transparent electrode layer (124, 1124) faces between the plurality of first conductive type protruding semiconductors (121, 1121). A light-emitting element characterized by being filled with transparent members (131, 1131).
  8. 　第１の基板(１１０)の一部または全部をなす第１導電型の半導体層(１１２,１１１２)の表面にマスク層(１５１,１１５１)をパターニングする工程と、
    　上記マスク層をマスクとして上記半導体層を非等方的にエッチングして複数の第１導電型の突起状半導体(１２１,１１２１)を形成する半導体コア形成工程と、
    　上記第１導電型の突起状半導体(１２１,１１２１)の表面を覆うように第２導電型の半導体層(１２３,１１２３)を形成する半導体シェル形成工程と
    を備えたことを特徴とする発光素子の製造方法。     Patterning a mask layer (151, 1151) on the surface of a first conductivity type semiconductor layer (112, 1112) forming part or all of the first substrate (110);
    Forming a plurality of first conductive type protruding semiconductors (121, 1121) by anisotropically etching the semiconductor layer using the mask layer as a mask;
    A semiconductor shell forming step of forming a second conductive type semiconductor layer (123, 1123) so as to cover the surface of the first conductive type protruding semiconductor (121, 1121); Manufacturing method.
  9. 　請求項８に記載の発光素子の製造方法において、
    　上記半導体コア形成工程の後であって、上記半導体シェル形成工程の前に、上記第１導電型の突起状半導体(１２１,１１２１)をアニールする結晶欠陥回復工程を行うことを特徴とする発光素子の製造方法。     In the manufacturing method of the light emitting element of Claim 8,
    A light emitting device characterized by performing a crystal defect recovery step of annealing the first conductive type protruding semiconductor (121, 1121) after the semiconductor core forming step and before the semiconductor shell forming step Manufacturing method.
  10. 　請求項８または９に記載の発光素子の製造方法において、
    　上記半導体コア形成工程の後であって、上記シェル形成工程の前に、ウェットエッチングにより上記第１導電型の突起状半導体(１２１,１１２１)の一部をエッチングする結晶欠陥除去工程を行うことを特徴とする発光素子の製造方法。     In the manufacturing method of the light emitting element of Claim 8 or 9,
    After the semiconductor core forming step and before the shell forming step, performing a crystal defect removing step of etching a part of the first conductive type protruding semiconductors (121, 1121) by wet etching. A method for manufacturing a light-emitting element.
  11. 　請求項８に記載の発光素子の製造方法において、
    　上記半導体コア形成工程の後であって、上記シェル形成工程の前に、ウェットエッチングにより上記第１導電型の突起状半導体(１２１,１１２１)の一部をエッチングする結晶欠陥除去工程と、
    　上記半導体コア形成工程の後であって、上記半導体シェル形成工程の前に、上記第１導電型の突起状半導体(１２１,１１２１)をアニールする結晶欠陥回復工程と
    を、上記結晶欠陥除去工程、上記結晶欠陥回復工程の順に行なうことを特徴とする発光素子の製造方法。     In the manufacturing method of the light emitting element of Claim 8,
    A crystal defect removing step of etching a part of the first conductive type protruding semiconductors (121, 1121) by wet etching after the semiconductor core forming step and before the shell forming step;
    After the semiconductor core formation step and before the semiconductor shell formation step, a crystal defect recovery step of annealing the first conductivity type protruding semiconductor (121, 1121), the crystal defect removal step, A method for manufacturing a light-emitting element, which is performed in the order of the crystal defect recovery step.
  12. 　第１の基板(１１０)の一部または全部をなす第１導電型の半導体層(１１２,１１１２)の表面にマスク層(１５１,１１５１)をパターニングする工程と、
    　上記マスク層(１５１,１１５１)をマスクとして上記半導体層を非等方的にエッチングして複数の第１導電型の突起状半導体(１２１,１１２１)を形成する半導体コア形成工程と、
    　上記第１導電型の突起状半導体(１２１,１１２１)の表面を覆うように第２導電型の半導体層(１２３,１１２３)を形成する半導体シェル形成工程と、
    　上記第２導電型の半導体層(１２３,１１２３)で覆われた上記第１導電型の突起状半導体(１２１,１１２１)を上記第１の基板(１１０)から切り離す発光素子切り離し工程と
    を備えたことを特徴とする発光素子の製造方法。     Patterning a mask layer (151, 1151) on the surface of a first conductivity type semiconductor layer (112, 1112) forming part or all of the first substrate (110);
    Forming a plurality of first-conductivity-type protruding semiconductors (121, 1121) by anisotropically etching the semiconductor layer using the mask layers (151, 1151) as a mask;
    A semiconductor shell forming step of forming a second conductivity type semiconductor layer (123, 1123) so as to cover a surface of the first conductivity type protruding semiconductor (121, 1121);
    A light emitting element separating step of separating the first conductive type projecting semiconductor (121, 1121) covered with the second conductive type semiconductor layer (123, 1123) from the first substrate (110). A method for manufacturing a light-emitting element.
  13. 　請求項８から１２のいずれか１つに記載の発光素子の製造方法であって、
    　上記半導体コア形成工程と上記半導体シェル形成工程との間で、上記第１導電型の突起状半導体(１２１,１１２１)の表面を覆うように活性層(１２２,１１２２)を形成することを特徴とする発光素子の製造方法。     A method for manufacturing a light emitting device according to any one of claims 8 to 12,
    An active layer (122, 1122) is formed between the semiconductor core formation step and the semiconductor shell formation step so as to cover the surface of the first conductive type protruding semiconductor (121, 1121). A method for manufacturing a light emitting device.
  14. 　請求項８から１３のいずれか１つに記載の発光素子の製造方法であって、
    　上記半導体シェル形成工程の後に、上記第２導電型の半導体層(１２３,１１２３)を覆うように透明電極層(１２４,１１２４)を形成することを特徴とする発光素子の製造方法。     A method of manufacturing a light emitting device according to any one of claims 8 to 13,
    A method for manufacturing a light emitting device, comprising: forming a transparent electrode layer (124, 1124) so as to cover the second conductive type semiconductor layer (123, 1123) after the semiconductor shell forming step.
  15. 　第１の基板(１１０)の一部または全部をなす第１導電型の半導体層(１１２,１１１２)の表面にマスク層(１５１,１１５１)をパターニングする工程と、
    　上記マスク層をマスクとして上記半導体層を非等方的にエッチングして複数の第１導電型の突起状半導体(１２１,１１２１)を形成する半導体コア形成工程と、
    　上記第１導電型の突起状半導体(１２１,１１２１)の表面を覆うように第２導電型の半導体層(１２３,１１２３)を形成する半導体シェル形成工程と、
    　上記第２導電型の半導体層(１２３,１１２３)で覆われた上記第１導電型の突起状半導体(１２１,１１２１)を上記第１の基板(１１０)から切り離して発光素子(２００)を得る発光素子切り離し工程と、
    　上記発光素子(２００)を第２の基板(２１０)上に配置する発光素子配置工程と、
    　上記第２の基板(２１０)上に配置された発光素子(２００)に通電するための配線(２１４,２１５)を行なう発光素子配線工程と
    を備えたことを特徴とする発光装置の製造方法。     Patterning a mask layer (151, 1151) on the surface of a first conductivity type semiconductor layer (112, 1112) forming part or all of the first substrate (110);
    Forming a plurality of first conductive type protruding semiconductors (121, 1121) by anisotropically etching the semiconductor layer using the mask layer as a mask;
    A semiconductor shell forming step of forming a second conductivity type semiconductor layer (123, 1123) so as to cover a surface of the first conductivity type protruding semiconductor (121, 1121);
    The protruding semiconductor (121, 1121) of the first conductivity type covered with the second conductivity type semiconductor layer (123, 1123) is separated from the first substrate (110) to obtain a light emitting device (200). A light emitting element separating step;
    A light emitting element disposing step of disposing the light emitting element (200) on the second substrate (210);
    A method of manufacturing a light emitting device, comprising: a light emitting element wiring step for performing wiring (214, 215) for energizing the light emitting element (200) disposed on the second substrate (210).
  16. 　請求項１５に記載の発光装置の製造方法により製造された発光装置(２５０)を備えたことを特徴とする照明装置。 An illumination device comprising the light emitting device (250) manufactured by the method for manufacturing a light emitting device according to claim 15.
  17. 　請求項１５に記載の発光装置の製造方法により製造された発光装置(２５０)を備えたことを特徴とする液晶バックライト。 A liquid crystal backlight comprising the light emitting device (250) manufactured by the method for manufacturing a light emitting device according to claim 15.
  18. 　第１の基板(１１０)の一部または全部をなす第１導電型の半導体層(１１２,１１１２)の表面にマスク層(１５１,１１５１)をパターニングする工程と、
    　上記マスク層をマスクとして上記半導体層を非等方的にエッチングして複数の第１導電型の突起状半導体(１２１,１１２１)を形成する半導体コア形成工程と、
    　上記第１導電型の突起状半導体(１２１,１１２１)の表面を覆うように第２導電型の半導体層(１２３,１１２３)を形成する半導体シェル形成工程と、
    　上記第２導電型の半導体層(１２３,１１２３)で覆われた上記第１導電型の突起状半導体(１２１,１１２１)を上記第１の基板(１１０)から切り離して発光素子(２００)を得る発光素子切り離し工程と、
    　上記発光素子(２００)を第２の基板(２１０)上の画素位置に対応して配置する発光素子配置工程と、
    　上記第２の基板(２１０)上の画素位置に対応して配置された発光素子(２００)に通電するための配線(２１４,２１５)を行なう発光素子配線工程と
    を備えたことを特徴とする表示装置の製造方法。     Patterning a mask layer (151, 1151) on the surface of a first conductivity type semiconductor layer (112, 1112) forming part or all of the first substrate (110);
    Forming a plurality of first conductive type protruding semiconductors (121, 1121) by anisotropically etching the semiconductor layer using the mask layer as a mask;
    A semiconductor shell forming step of forming a second conductivity type semiconductor layer (123, 1123) so as to cover a surface of the first conductivity type protruding semiconductor (121, 1121);
    The protruding semiconductor (121, 1121) of the first conductivity type covered with the second conductivity type semiconductor layer (123, 1123) is separated from the first substrate (110) to obtain a light emitting device (200). A light emitting element separating step;
    A light emitting element arranging step of arranging the light emitting element (200) corresponding to the pixel position on the second substrate (210);
    And a light emitting element wiring step for performing wiring (214, 215) for energizing the light emitting element (200) arranged corresponding to the pixel position on the second substrate (210). Manufacturing method of display device.
  19. 　請求項１８に記載の表示装置の製造方法により製造された表示装置。 A display device manufactured by the method for manufacturing a display device according to claim 18.
  20. 　コア部(２００１,２０１１,２０５１,２０６１,２０８１,２０９１,２１０１,２１１１,２２０２)と、
    　上記コア部を覆うように形成された第１導電型の半導体層(２００２,２２０１２,２０５２,２０８２,２０９２,２１０２,２１１２,２２０３)と、
    　上記第１導電型の半導体層を覆う第２導電型の半導体層(２００３,２０１３,２０５３,２０８３,２０９３,２１０３,２１１３,２２０５)と
    を備え、
    　上記コア部(２００１,２０１１,２０５１,２０６１,２０８１,２０９１,２１０１,２１１１,２２０２)の材質と上記第１導電型の半導体層(２００２,２０１２,２０５２,２０８２,２０９２,２１０２,２１１２,２２０３)の材質とが互いに異なっていることを特徴とするダイオード。     Core parts (2001, 2011, 2051, 2061, 2081, 2091, 2101, 2111, 2202),
    A first conductive type semiconductor layer (2002, 22012, 2052, 2082, 2092, 2102, 2112, 2203) formed so as to cover the core portion;
    A second conductive type semiconductor layer (2003, 2013, 2053, 2083, 2093, 2103, 2113, 2205) covering the first conductive type semiconductor layer,
    The material of the core (2001, 2011, 2051, 2061, 2081, 2091, 2101, 2111, 2202) and the semiconductor layer of the first conductivity type (2002, 2012, 2052, 2082, 2092, 2102, 2112, 2203) The diode is characterized in that the material of the is different from each other.
  21. 　請求項２０に記載のダイオードにおいて、
    　上記コア部(２００１,２０１１,２０５１)の屈折率が上記第１導電型の半導体層(２００２,２０１２,２０５２)の屈折率よりも大きいと共に発光ダイオード(２００５,２０１５,２０３５)であることを特徴とするダイオード。     The diode of claim 20,
    The core portion (2001, 2011, 2051) has a refractive index larger than that of the first conductive type semiconductor layer (2002, 2012, 2052) and is a light emitting diode (2005, 2015, 2035). And a diode.
  22. 　請求項２０に記載のダイオードにおいて、
    　上記コア部(２００１,２０１１,２０５１)の屈折率が上記第１導電型の半導体層(２００２,２０１２,２０５２)の屈折率よりも大きいと共に光電効果を有することを特徴とするダイオード。     The diode of claim 20,
    A diode characterized in that a refractive index of the core part (2001, 2011, 2051) is larger than a refractive index of the first conductive type semiconductor layer (2002, 2012, 2052) and has a photoelectric effect.
  23. 　請求項２０に記載のダイオードにおいて、
    　上記コア部(２０６１)の屈折率が上記第１導電型の半導体層(２００２)の屈折率よりも小さいと共に発光ダイオード(２０６５)であることを特徴とするダイオード。     The diode of claim 20,
    A diode characterized in that a refractive index of the core part (2061) is smaller than a refractive index of the semiconductor layer (2002) of the first conductivity type and a light emitting diode (2065).
  24. 　請求項２０に記載のダイオードにおいて、
    　上記コア部(２００１,２０１１)の熱伝導率が上記第１導電型の半導体層(２００２,２０１２)の熱伝導率よりも大きいと共に発光ダイオード(２００５,２０１５,２０３５)であることを特徴とするダイオード。     The diode of claim 20,
    The core part (2001, 2011) is larger in thermal conductivity than the first conductive type semiconductor layer (2002, 2012) and is a light emitting diode (2005, 2015, 2035). diode.
  25. 　請求項２０に記載のダイオードにおいて、
    　上記コア部(２００１,２０１１)の熱伝導率が上記第１導電型の半導体層(２００２,２０１２)の熱伝導率よりも大きいと共に光電効果を有することを特徴とするダイオード。     The diode of claim 20,
    The diode characterized in that the thermal conductivity of the core part (2001, 2011) is larger than the thermal conductivity of the first conductive type semiconductor layer (2002, 2012) and has a photoelectric effect.
  26. 　請求項２０に記載のダイオードにおいて、
    　上記コア部(２０８１,２０９１,２１０１,２１１１,２２０２)の電気伝導率が上記第１導電型の半導体層(２０８２,２０９２,２１０２,２１１２,２２０３)の電気伝導率よりも大きいと共に発光ダイオード(２０８５,２０９５,２１０５,２１１５,２２０７)であることを特徴とするダイオード。     The diode of claim 20,
    The electrical conductivity of the core parts (2081, 2091, 2101, 2111, 2202) is larger than the electrical conductivity of the first conductivity type semiconductor layer (2082, 2092, 2102, 2112, 2203) and the light emitting diode (2085). , 2095, 2105, 2115, 2207).
  27. 　請求項２０に記載のダイオードにおいて、
    　上記コア部(２０８１,２０９１,２１０１,２１１１,２２０２)の電気伝導率が上記第１導電型の半導体層(２０８２,２０９２,２１０２,２１１２,２２０３)の電気伝導率よりも大きいと共に光電効果を有することを特徴とするダイオード。     The diode of claim 20,
    The electrical conductivity of the core parts (2081, 2091, 2101, 2111, 2202) is larger than the electrical conductivity of the first conductive type semiconductor layer (2082, 2092, 2102, 2112, 2203) and has a photoelectric effect. A diode characterized by that.
  28. 　請求項２０に記載のダイオードにおいて、
    　上記コア部(２０８１,２０９１,２１０１,２１１１,２２０２)がシリコンで作製されていることを特徴とするダイオード。     The diode of claim 20,
    A diode characterized in that the core part (2081, 2091, 2101, 2111, 2202) is made of silicon.
  29. 　請求項２０から２８のいずれか１つに記載のダイオードにおいて、
    　基板(２０９０,２１１０,２２０１)上に上記コア部(２０８１,２０９１,２１０１,２１１１,２２０２),上記第１導電型の半導体層(２０８２,２０９２,２１０２,２１１２,２２０３)および上記第２導電型の半導体層(２０８３,２０９３,２１０３,２１１３,２２０５)を形成してから、上記基板から上記コア部,上記第１導電型の半導体層および上記第２導電型の半導体層を切り離すことで作製されたことを特徴とするダイオード。     A diode according to any one of claims 20 to 28,
    On the substrate (2090, 2110, 2201), the core (2081, 2091, 2101, 2111, 2202), the first conductive type semiconductor layer (2082, 2092, 2102, 2112, 2203) and the second conductive type The semiconductor layer (2083, 2093, 2103, 2113, 2205) is formed, and then the core portion, the first conductive type semiconductor layer, and the second conductive type semiconductor layer are separated from the substrate. A diode characterized by that.
  30. 　基板(２２０１)上にコア部(２２０２)を形成し、
    　上記コア部(２２０２)を覆うように第１導電型の半導体層(２２０３)を形成し、
    　上記第１導電型の半導体層(２２０３)を覆うように第２導電型の半導体層(２２０５)を形成し、
    　上記コア部(２２０２)の材質と上記第１導電型の半導体層(２２０３)の材質とが互いに異なっていることを特徴とするダイオードの製造方法。     Forming a core (2202) on a substrate (2201);
    Forming a first conductivity type semiconductor layer (2203) so as to cover the core portion (2202);
    Forming a second conductive type semiconductor layer (2205) so as to cover the first conductive type semiconductor layer (2203);
    A method of manufacturing a diode, characterized in that a material of the core portion (2202) and a material of the first conductive type semiconductor layer (2203) are different from each other.
  31. 　請求項２１、２３、２４、２６のいずれか１つに記載の発光ダイオード(２００５,２０１５,２０３５,２０６５,２０８５,２０９５,２１０５,２１１５)を備えた照明装置。 An illuminating device comprising the light-emitting diode (2005, 2015, 2035, 2065, 2085, 2095, 2105, 2115) according to any one of claims 21, 23, 24, and 26.
  32. 　請求項２１、２３、２４、２６のいずれか１つに記載の発光ダイオード(２００５,２０１５,２０３５,２０６５,２０８５,２０９５,２１０５,２１１５)を備えたバックライト。 A backlight comprising the light-emitting diode (2005, 2015, 2035, 2065, 2085, 2095, 2105, 2115) according to any one of claims 21, 23, 24, and 26.
  33. 　請求項２１、２３、２４、２６のいずれか１つに記載の発光ダイオード(２００５,２０１５,２０３５,２０６５,２０８５,２０９５,２１０５,２１１５)を備えた表示装置。 A display device comprising the light-emitting diode (2005, 2015, 2035, 2065, 2085, 2095, 2105, 2115) according to any one of claims 21, 23, 24, and 26.
  34. 　請求項２２、２５、２７のいずれか１つに記載の光電効果を有するダイオードを備えた光検出器。 A photodetector comprising the diode having the photoelectric effect according to any one of claims 22, 25, and 27.
  35. 　請求項２２、２５、２７のいずれか１つに記載の光電効果を有するダイオードを備えた太陽電池。 A solar cell comprising the diode having the photoelectric effect according to any one of claims 22, 25, and 27.
PCT/JP2011/064231 2010-09-01 2011-06-22 Light emitting element and production method for same, production method for light-emitting device, illumination device, backlight, display device, and diode WO2012029381A1 (en)

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