WO2012007558A1 - Verfahren und anordnung zur ansteuerung von power-mos-transistoren - Google Patents
Verfahren und anordnung zur ansteuerung von power-mos-transistoren Download PDFInfo
- Publication number
- WO2012007558A1 WO2012007558A1 PCT/EP2011/062092 EP2011062092W WO2012007558A1 WO 2012007558 A1 WO2012007558 A1 WO 2012007558A1 EP 2011062092 W EP2011062092 W EP 2011062092W WO 2012007558 A1 WO2012007558 A1 WO 2012007558A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- terminal
- transistor
- voltage
- current
- source
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/04—Modifications for accelerating switching
- H03K17/042—Modifications for accelerating switching by feedback from the output circuit to the control circuit
- H03K17/04206—Modifications for accelerating switching by feedback from the output circuit to the control circuit in field-effect transistor switches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/04—Modifications for accelerating switching
- H03K17/042—Modifications for accelerating switching by feedback from the output circuit to the control circuit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
- H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
- H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
- H03K17/163—Soft switching
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
- H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
- H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
- H03K17/163—Soft switching
- H03K17/164—Soft switching using parallel switching arrangements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
- H03K2217/0063—High side switches, i.e. the higher potential [DC] or life wire [AC] being directly connected to the switch and not via the load
Definitions
- the invention relates to a method for driving power MOS transistors, in which the power MOS transistor, which is arranged in series with a load, is driven by a control voltage at the gate terminal. This method realizes PWM control of an ohmic-inductive load by means of power MOS transistors.
- the invention also relates to an arrangement for driving power MOS transistors, in which a MOS transistor with its drain terminal with a
- a source terminal of the transistor is connected to a cathode terminal of a diode and a first terminal of a resistive load, an anode terminal of the diode and a second terminal of a resistive load with a potential Gnd are connected.
- the arrangement according to the invention as well as the method are not limited to a high-side transistor, but analogously applicable to a low-side transistor.
- parasitic resonances can be excited by the current commutation.
- This EMC radiation can be other functional components of the same or other devices and cause malfunctions in these.
- P M drive is well known in the art.
- a patent of the company HKR to avoid high-frequency EM radiation is known, with a
- a disadvantage of this prior art is that there must be a detection of the zero crossing of the source voltage of the MOS transistor, which is expensive and, for example, by the temperature dependence of the
- the invention is therefore based on the object
- the object is achieved in terms of the method in that the transistor is switched off with a linearly decreasing and for switching on with a linearly rising control voltage V gs , which is connected between the gate terminal and a source terminal of the transistor
- the switching MOS transistor is driven with a defined voltage waveform of the gate-source voltage. For this purpose, a linearly decreasing voltage V gs for turning off the transistor 1, as well as a linearly increasing voltage V gs to turn on the transistor 1 is generated.
- the invention offers the advantage that, due to the voltage control at the gate, a very fast switching edge results at the inductive load, while the current commutation is automatically slowed down.
- Discharge current, the switching edge on the load and the current commutation can be independent in many areas
- Voltage Ci of the diode 4 is determined and "held.”
- the capacitance Ci is further discharged and the current in the load circuit commutated by the transistor 1 to the diode 4, wherein the
- Voltage edge on the capacitor Ci depends, which acts on the amplifier Vi to the voltage V gs .
- the linearly increasing or decreasing control voltage V gs is controlled in its steepness.
- the linearly increasing or decreasing control voltage V gs can be regulated in its steepness.
- the linearly increasing or decreasing control voltage V gs can be regulated in its steepness.
- Amplifier Vi additional power sources, which the currents I 2 and I 3 generate, be switched on individually or together.
- the supply lines means that a second current source for the current I 2 between the operating voltage and the operating voltage terminal of the amplifier V x is interposed.
- the third is
- Times t 0 and t x is generated with a first slope and between the times t x and t 2 with a second, compared to the first transconductance smaller, slope.
- the time t 0 represents the earliest and the time t 2 represents the latest time in a time course.
- a further embodiment of the method provides to shorten the reaction time of the transistor to a switching command.
- the gate-source voltage V GS is first rapidly reduced by the time of the switching command t 0 , until a significant reaction at the source output of the
- Transistor 1 is recognizable. From this detected
- Time tl is closed a control loop and the gate-source voltage V GS according to a predetermined voltage edge until the time t2 further reduced.
- the object is the arrangement side in that a gate terminal of the MOS transistor is connected to an output of an impedance converter, that a non-inverting input of the impedance converter is connected to a first terminal of a capacitor C and a first terminal of a first current source I that a second terminal of the capacitor Ci with the
- Source terminal of the transistor (1) is connected and that a second terminal of the first current source I is connected via a switch Si to the potential Gnd.
- the gate terminal of the MOS transistor is connected to the output of an impedance converter. Between the non-inverting input of the impedance converter and the source terminal of the transistor 1 is a capacitance and between this input and the
- Gnd is an on and off switchable
- Constant current source arranged. When the constant current source is switched on, this generates a constant current I, with which the capacity is discharged.
- the described connection of the power source to ground applies only to the falling edge, for the rising edge, the power source must be made from the supply for the gate driver, which can - in the high-side case - be a charge pump voltage or a bootstrap voltage , in principle, a separately supplied from the outside voltage. In any case, this is higher than the drain voltage of the transistor when it is turned on.
- Ground terminal of the amplifier Vx and the potential Gnd is arranged.
- the current flowing at the output of the impedance converter and thus the gate-source voltage V gs can be influenced in a targeted manner.
- a fourth current source I 4 is arranged and that a second terminal of the
- Switching means is connected to the potential Gnd.
- a comparator and a further constant current source for the current I 4 are switched on and off. The connection and disconnection of this constant current source is by the switching means S 2
- the operating voltage potential at the first input of the comparator i does not necessarily lie at a smaller potential deviating therefrom.
- the goal is to first reduce the gate voltage of the transistor 1 quickly, until a significant reaction at the source potential is detected, in order then to go into the "slower" edge.
- Fig. 1 shows a circuit arrangement for controlling a resistive-inductive load
- Fig. La a particular embodiment of the arrangement according to
- FIG. 1 A first figure.
- FIG. 1b shows a further particular embodiment of the arrangement according to FIG. 1, FIG.
- Fig. 2 shows two diagrams of voltage
- Fig. 3 in the two diagrams of the voltage and current waveforms over time t in a low phase of the PWM signal with the interference
- Fig. 4 shows two diagrams of voltage
- FIG. 1 shows an arrangement in which a high-side n-channel MOSFET T 1 switches an ohmic-inductive load 2 against an operating voltage VB 4.
- the gate potential of the transistor 1 is raised above the operating voltage VB 3, so that the transistor 1 with its on-resistance R d s, on is in series with the load 2.
- the voltage drop across the transistor 1 is given in this state by
- a second transistor is used, ie in an inverter or half-bridge circuit.
- first one transistor 1 is turned off before the other is turned on. For a short time then the load current flows through the reverse diode of one of the two
- the power loss is in the
- the linearly rising or falling control voltage V gs can be regulated in its transconductance by means of one or two switched current sources arranged in the supply voltage lines of the amplifier Vi, as shown in FIG. 1a, which generate the currents I 2 and I 3 .
- each of these current sources can be bridged by means of a switch, not shown in the figure, and thus a direct connection between the respective pin of the amplifier Vi and the associated one
- Constant current sources can be set once to the respective application or by means of a corresponding one
- Control unit be run controllable.
- FIG. 1b shows another embodiment of the invention
- the discharge current is made much higher by the connection of I 4 .
- This increase can also be limited again by means of the same current limitation of the
- the additional current source I 4 is effective until a significant voltage difference between the drain and source has set at the transistor 1, for example two volts.
- This one is in the range of voltage switching edge, and the additional current source I 4 is turned off, whereby the gate-source voltage in the sequence then with the predetermined
- the time at which the freewheeling diode takes over the current is detected by the fact that the limiting current source in the operational amplifier comes to saturation, i. the voltage drop across the
- the gate of the transistor 1 can be discharged quickly to zero.
- the gate voltage up to this voltage value after the expiration of the time or reduction in the predetermined
- FIG. 2 shows a typical profile of the voltages and currents when the high-side MOSFET 1 is switched off
- Gate capacitance of transistor 1 (gate-source + gate-drain).
- the time for commutation of the load current from the transistor 1 to the diode 5 corresponds to a good approximation of the time to reach the transistor threshold voltage V th .
- the current flow corresponds to the approximately square
- Rate of current change dl / dt can easily excite parasitic resonances resulting from the gate capacitance of transistor 1 and inevitable inductances of the structure. This leads to the known high-frequency
- FIG. 3 illustrates by way of example such a signal curve in the low phase of a PWM signal with the occurring disturbances.
- FIG. 4 shows the switching process with a constant gate-source voltage ramp according to the present invention.
- the auxiliary lines shown indicate equivalence points of both switching operations.
- the voltage edge at the load 2 is much steeper, the commutation of the load current from the transistor 1 to the diode 4 is much slower.
- the gate-source edge is set so that it does not come just to excite parasitic resonances.
- the voltage edge at the load 2 is in this type of driving by the edge steepness of the gate-source voltage and the differential output conductance of
- Transistor 1 in the saturation region determined. It is therefore not independent of the speed of the
- the steepness of the rising and falling edges can be designed the same or different by appropriate dimensioning of the current limit.
- MOSFET Reference List Switching Transistor
Landscapes
- Electronic Switches (AREA)
- Power Conversion In General (AREA)
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013519106A JP2013532466A (ja) | 2010-07-15 | 2011-07-14 | 電力用mosトランジスタを駆動するための方法及び装置 |
KR1020137003530A KR20130041941A (ko) | 2010-07-15 | 2011-07-14 | 파워-모스-트랜지스터 구동 제어 방법 및 장치 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102010031407 | 2010-07-15 | ||
DE102010031407.2 | 2010-07-15 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2012007558A1 true WO2012007558A1 (de) | 2012-01-19 |
Family
ID=44514662
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2011/062092 WO2012007558A1 (de) | 2010-07-15 | 2011-07-14 | Verfahren und anordnung zur ansteuerung von power-mos-transistoren |
Country Status (3)
Country | Link |
---|---|
JP (1) | JP2013532466A (de) |
KR (1) | KR20130041941A (de) |
WO (1) | WO2012007558A1 (de) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2945288A1 (de) | 2014-05-15 | 2015-11-18 | Fronius International GmbH | Schaltungsanordnung und verfahren zum ansteuern eines halbleiterschaltelements |
WO2019072610A1 (de) * | 2017-10-13 | 2019-04-18 | Conti Temic Microelectronic Gmbh | Verfahren zum steuern einer halbleiterbrücke eines elektrisch betreibbaren motors mittels eines rampensignals, steuerungseinrichtung sowie anordnung |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4540893A (en) * | 1983-05-31 | 1985-09-10 | General Electric Company | Controlled switching of non-regenerative power semiconductors |
DE10143432C1 (de) * | 2001-09-05 | 2003-02-27 | Daimler Chrysler Ag | Treiberschaltung und Ansteuerverfahren für einen feldgesteuerten Leistungsschalter |
US20060267665A1 (en) * | 2005-05-30 | 2006-11-30 | Denso Corporation | Signal generator |
-
2011
- 2011-07-14 WO PCT/EP2011/062092 patent/WO2012007558A1/de active Application Filing
- 2011-07-14 JP JP2013519106A patent/JP2013532466A/ja not_active Withdrawn
- 2011-07-14 KR KR1020137003530A patent/KR20130041941A/ko not_active Application Discontinuation
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4540893A (en) * | 1983-05-31 | 1985-09-10 | General Electric Company | Controlled switching of non-regenerative power semiconductors |
DE10143432C1 (de) * | 2001-09-05 | 2003-02-27 | Daimler Chrysler Ag | Treiberschaltung und Ansteuerverfahren für einen feldgesteuerten Leistungsschalter |
US20060267665A1 (en) * | 2005-05-30 | 2006-11-30 | Denso Corporation | Signal generator |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2945288A1 (de) | 2014-05-15 | 2015-11-18 | Fronius International GmbH | Schaltungsanordnung und verfahren zum ansteuern eines halbleiterschaltelements |
US9729136B2 (en) | 2014-05-15 | 2017-08-08 | Fronius International Gmbh | Circuit arrangement and method for controlling semiconductor switching element |
WO2019072610A1 (de) * | 2017-10-13 | 2019-04-18 | Conti Temic Microelectronic Gmbh | Verfahren zum steuern einer halbleiterbrücke eines elektrisch betreibbaren motors mittels eines rampensignals, steuerungseinrichtung sowie anordnung |
CN111480296A (zh) * | 2017-10-13 | 2020-07-31 | 大陆泰密克微电子有限责任公司 | 控制可电操作的马达的半导体桥的方法、控制装置和设备 |
US11290041B2 (en) | 2017-10-13 | 2022-03-29 | Conti Temic Microelectronic Gmbh | Method for controlling a semiconductor bridge of an electrically operable motor by means of a ramp signal, control device and arrangement |
CN111480296B (zh) * | 2017-10-13 | 2023-10-31 | 大陆泰密克微电子有限责任公司 | 控制可电操作的马达的半导体桥的方法、控制装置和设备 |
Also Published As
Publication number | Publication date |
---|---|
JP2013532466A (ja) | 2013-08-15 |
KR20130041941A (ko) | 2013-04-25 |
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