WO2011162282A1 - 放射線検出器の製造方法、及び放射線検出器 - Google Patents

放射線検出器の製造方法、及び放射線検出器 Download PDF

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Publication number
WO2011162282A1
WO2011162282A1 PCT/JP2011/064221 JP2011064221W WO2011162282A1 WO 2011162282 A1 WO2011162282 A1 WO 2011162282A1 JP 2011064221 W JP2011064221 W JP 2011064221W WO 2011162282 A1 WO2011162282 A1 WO 2011162282A1
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substrate
radiation detector
semiconductor element
manufacturing
connecting member
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PCT/JP2011/064221
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English (en)
French (fr)
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主鉉 柳
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日立電線株式会社
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Definitions

  • the present invention relates to a method for manufacturing a radiation detector and a radiation detector.
  • the present invention relates to a method for manufacturing a radiation detector that detects radiation such as ⁇ -rays and X-rays, and a radiation detector.
  • a semiconductor detection unit including a wiring board having a thermal expansion coefficient of 8.0 ⁇ 10 ⁇ 6 [1 / ° C.] or more and a semiconductor detection element arranged on the wiring board is provided.
  • the semiconductor detection element is made of a substantially flat semiconductor crystal, and an element electrode made of Au (gold) is provided on the lower surface of the semiconductor crystal, and the element electrode and a pad electrode provided on the wiring board are provided.
  • a radiation detector is known that is fixed by a bump having a deviation elasticity smaller than the Young's modulus of the semiconductor crystal (for example, see Patent Document 1).
  • the radiation detector described in Patent Document 1 is supposed to be able to suppress deterioration in detection characteristics of a semiconductor crystal even in a wiring board having a large difference in thermal expansion coefficient with the semiconductor crystal.
  • the radiation detector according to Patent Document 1 does not consider the manufacturing yield of the radiation detector due to warpage of the substrate or the like in the process of arranging the semiconductor detection element on the substrate and fixing the semiconductor detection element to the substrate. .
  • an object of the present invention is to provide a radiation detector manufacturing method and a radiation detector capable of solving the above-mentioned problems and improving the product yield in the manufacturing process.
  • One aspect of the present invention is a method of manufacturing a radiation detector, the substrate preparing step of preparing a substrate having a wiring pattern and a first connection member provided on a surface of the wiring pattern, and the substrate An application step of partially applying a second connecting member thereon, a semiconductor element capable of detecting radiation via the second connecting member disposed on the substrate, and curing the second connecting member;
  • a radiation detector manufacturing method including a temporary fixing step of temporarily fixing a semiconductor element to the substrate.
  • the present invention can add the following improvements and changes to the above-described aspect (I).
  • the method further includes a curing step of curing the first connection member and electrically connecting the wiring pattern and the semiconductor element.
  • the semiconductor element has a quadrangular shape in plan view, and the application step is a step of applying the second connection member to a plurality of positions on the substrate facing the vicinity of the four corners of the semiconductor element. is there.
  • the quadrangular shape is not limited to a strict quadrangle, and may be substantially a square shape.
  • the first connecting member is silver paste or solder
  • the second connecting member is UV (ultraviolet) curable resin
  • the temporary fixing step irradiates the second connecting member with ultraviolet rays.
  • the second connecting member is cured by the step, and the curing step cures the first connecting member by heating the first connecting member.
  • the substrate preparing step is a step of preparing a substrate having the wiring pattern and the first connection member on each of both surfaces of the substrate, and the coating step is partially performed on each of both surfaces of the substrate.
  • a plurality of the second connection members are applied to the substrate, and the temporary fixing step includes arranging the plurality of semiconductor elements on both sides of the substrate, and arranging each of the plurality of semiconductor elements on both sides of the substrate.
  • the substrate preparation step is a step of preparing a substrate having the wiring pattern and the first connection member on each of both surfaces of the substrate, and the coating step is partially performed on each of both surfaces of the substrate.
  • a plurality of the second connection members, and the temporary fixing step includes arranging the plurality of semiconductor elements on one side of the substrate and arranging the plurality of semiconductor elements on the one side. And temporarily fixing the plurality of semiconductor elements disposed on the other surface by temporarily disposing the plurality of semiconductor elements on the other surface of the substrate.
  • FIG. 1 Another aspect of the present invention is a radiation detector, comprising a substrate having a wiring pattern and a first connecting member provided on a surface of the wiring pattern, and the first connecting member interposed therebetween.
  • a semiconductor element that is electrically connected to the wiring pattern and capable of detecting radiation, and a plurality of second connection members that are partially provided between the semiconductor element and the substrate and fix the semiconductor element to the substrate A radiation detector is provided.
  • the present invention can add the following improvements and changes to the above-described aspect (II).
  • the adhesive force of the second connecting member is weaker than the adhesive force of the first connecting member.
  • the substrate has a thickness of 0.4 mm or less.
  • the semiconductor element has a quadrangular shape in plan view, and the second connecting member is disposed in the vicinity of the four corners of the semiconductor element.
  • the first connecting member is a silver paste or solder, and the second connecting member is a UV curable resin.
  • the present invention it is possible to provide a manufacturing method that improves the product yield in the manufacturing process of the radiation detector. As a result, a radiation detector with high radiation detection reliability can be provided at low cost.
  • FIG. 3C It is a perspective schematic diagram showing an example of a radiation detector concerning a 1st embodiment of the present invention. It is the expansion schematic diagram which looked at a part of radiation detector shown in Drawing 1 from the direction in which radiation enters. It is the expansion schematic diagram which showed the board
  • FIG. 1 is a schematic perspective view showing an example of a radiation detector according to the first embodiment of the present invention.
  • FIG. 2 is a partially enlarged schematic view of a part of the radiation detector shown in FIG. 1 as seen from the direction in which the radiation enters.
  • the radiation detector 1 is a radiation detector that has a card shape and detects radiation such as ⁇ rays and X rays. As shown in FIG. 1, the radiation 100 advances from the upper side to the lower side in the drawing. In other words, the radiation 100 travels along the direction from the semiconductor element 10 of the radiation detector 1 toward the card holder 30 and the card holder 31 and reaches the radiation detector 1.
  • the radiation 100 is incident on the side surface of the semiconductor element 10 of the radiation detector 1 (that is, the surface facing upward in FIG. 1). That is, the side surface of the semiconductor element 10 is an incident surface for the radiation 100.
  • the radiation detector 1 having the side surface of the semiconductor element 10 as the incident surface of the radiation 100 is referred to as an edge-on type radiation detector 1 in the present embodiment.
  • the radiation detector 1 includes a collimator (for example, a matched collimator, a pinhole collimator, etc.) having a plurality of openings through which the incident radiation 100 passes along a specific direction (for example, a direction toward the radiation detector 1). ), An edge-on type radiation detector 1 configured by arranging a plurality of radiation detectors 1 that detect the radiation 100 via the above-described configuration can be used.
  • a collimator for example, a matched collimator, a pinhole collimator, etc.
  • An edge-on type radiation detector 1 configured by arranging a plurality of radiation detectors 1 that detect the radiation 100 via the above-described configuration can be used.
  • the radiation detector 1 includes a pair of opposed semiconductor elements 10 capable of detecting the radiation 100, a thin substrate 20, and a substrate 20 sandwiched between adjacent portions of the opposed pair of semiconductor elements 10.
  • the card holder 30 and the card holder 31 which support 20 are provided.
  • FIG. 1 as an example of the present embodiment, there are four pairs of semiconductor elements 10 facing each other, which are fixed to the substrate 20 so as to sandwich the substrate 20 therebetween.
  • the pair of semiconductor elements 10 in each set is fixed to a symmetric position with the substrate 20 as a symmetry plane on each of one surface and the other surface of the substrate 20.
  • the substrate 20 is supported by being sandwiched between a card holder 30 and a card holder 31.
  • the card holder 30 and the card holder 31 are not particularly limited in shape, they are formed in the same shape in FIG.
  • the protrusion 36 of the card holder 31 fits in the grooved hole 34 of the card holder 30 and the protrusion of the card holder 30 in the grooved hole 34 (not shown) of the card holder 31.
  • substrate 20 is supported by the part 36 (not shown) fitting.
  • An elastic member 32 composed of a leaf spring or the like is attached to the card holders 30 and 31 so that a plurality of radiation detectors 1 can be inserted and stably supported in a radiation detector stand (not shown).
  • the radiation detector stand preferably has a connector into which the card edge portion 29 is inserted.
  • the radiation detector 1 includes an external electric circuit (for example, a control circuit, an external power supply line, a ground line, etc.) when the card edge portion 29 is inserted into the connector and the electrode of the connector contacts the pattern 29a. Electrically connected.
  • the radiation detector 1 electrically connects each of the electrode pattern of each semiconductor element 10 and the plurality of substrate terminals 22 provided on the substrate 20 on the opposite side of the substrate 20 of the pair of semiconductor elements 10 facing each other.
  • a flexible substrate having a wiring pattern to be connected can be further provided (note that the electrode pattern of the semiconductor element 10, the flexible substrate, and the wiring pattern of the flexible substrate are not shown).
  • the flexible substrate can be provided on both the one semiconductor element 10 side and the other semiconductor element 10 side of the pair of semiconductor elements 10 facing each other.
  • a flexible substrate can be provided on each of one semiconductor element 10 side of each of the four pairs of semiconductor elements 10 and each of the other semiconductor element 10 side.
  • a thin substrate for example, a glass epoxy substrate such as FR4 on which a conductive thin film (for example, copper foil) made of a conductive material such as a metal conductor is formed is formed from an insulating material such as a solder resist. It is preferable that the insulating layer be formed to have flexibility.
  • substrate 20 has the wiring pattern 200 electrically connected to the electrode pattern of the semiconductor element 10 (refer FIG. 2).
  • a conductive first connection member 50 (for example, silver paste) is provided in a partial region of the surface of the wiring pattern 200, and the electrode pattern of the semiconductor element 10 is connected to the wiring pattern 200 via the first connection member 50. Electrically connected.
  • the wiring pattern of the substrate 20 that is electrically connected to the electrode pattern of the semiconductor element 10 is formed so as to be electrically connected to the pattern 29 a of the card edge portion 29.
  • the substrate 20 has a wiring pattern that electrically connects the substrate terminal 22 and the pattern 29 a of the card edge portion 29.
  • the electrode on the surface of the semiconductor element 10 on the substrate 20 side is electrically connected to the pattern 29 a of the card edge portion 29 by the wiring pattern of the substrate 20.
  • the electrode on the surface opposite to the substrate 20 side of the semiconductor element 10 is electrically connected to the pattern 29a of the card edge portion 29 via the wiring pattern of the flexible substrate, the substrate terminal 22, and the wiring pattern of the substrate 20. Connected to.
  • the electrode on the substrate 20 side of the semiconductor element 10 is an anode electrode
  • the electrode on the opposite side of the semiconductor element 10 on the substrate 20 side is a cathode electrode.
  • the signal from the anode electrode and the signal from the cathode electrode are respectively guided to the pattern 29a of the card edge portion 29 and output to an external electric circuit via the pattern 29a.
  • a negative high voltage for example, ⁇ 300 to ⁇ 800 V
  • ⁇ 300 to ⁇ 800 V is applied to the cathode electrode of the semiconductor element 10.
  • the substrate 20 has a length of about 40 mm in the wide direction (left-right direction in the figure), and has a length of about 20 mm in the short direction (up-down direction in the figure). Further, solder that melts at a low temperature may be used as the first connection member 50.
  • substrate 20 cannot detect a radiation, since the area
  • the substrate 20 preferably has a thickness of 0.4 mm or less. In this embodiment, it has a thickness of 0.2 mm as an example.
  • substrate 20 is not specifically limited, From a viewpoint of manufacturability, by using a flexible substrate as the board
  • the semiconductor element 10 has a thin, substantially rectangular parallelepiped shape (for example, approximately 5 mm in length, approximately 11.2 mm in width, approximately 1.2 mm in thickness, that is, approximately rectangular in plan view), and is on the substrate 20 side.
  • An electrode pattern is provided on each of the element surface 10b and the element surface 10c which is the surface opposite to the element surface 10b (not shown). Radiation enters from the upper surface (surface representing thickness) of each semiconductor element 10 and travels through the semiconductor element 10 toward the card edge portion 29 side.
  • the semiconductor element 10 according to the present embodiment is provided with a plurality of grooves 10a on the element surface 10b which is one surface perpendicular to the surface on which the radiation is incident.
  • the width of the groove 10a is, for example, 0.2 mm.
  • an in-element pixel region In the element surface 10b of the semiconductor element 10, a region delimited by the groove 10a is referred to as an in-element pixel region.
  • (N-1) grooves 10a are formed on the element surface 10b of the semiconductor element 10, and electrodes are formed on each element pixel region and on each element surface 10c corresponding to each element pixel area, N in-element pixels are formed on the upper side surface (the surface on which radiation is incident) of the semiconductor element 10.
  • Each intra-element pixel corresponds to one picture element (pixel) that detects radiation. That is, one semiconductor element 10 has n pixels.
  • one radiation detector 1 when one radiation detector 1 includes eight semiconductor elements 10 (four pairs of semiconductor elements 10) and each semiconductor element 10 includes eight in-element pixels, one radiation detector 1 Will have a resolution of 64 pixels. By increasing or decreasing the number of grooves 10a, the number of pixels of one semiconductor element 10 can be increased or decreased.
  • CdTe As a material constituting the semiconductor element 10, CdTe can be used. Further, the semiconductor element 10 is not limited to a CdTe element as long as radiation such as ⁇ rays can be detected. For example, a compound semiconductor element such as a CdZnTe (CZT) element or an HgI 2 element can also be used as the semiconductor element 10.
  • CZT CdZnTe
  • HgI 2 element HgI 2 element
  • the semiconductor element 10 is partially provided between the semiconductor element 10 and the substrate 20, and a plurality of second connection members 40 (for example, for temporarily fixing the semiconductor element 10 to the substrate 20).
  • UV (ultraviolet) curable resin for example, for temporarily fixing the semiconductor element 10 to the substrate 20.
  • the second connection member 40 is located near each of the four corners of the semiconductor element 10 and temporarily fixes the semiconductor element 10 and the substrate 20.
  • temporary fixing means being used for the purpose of temporarily fixing the semiconductor element 10 to the substrate 20 in the manufacturing process of the radiation detector 1 to be described later.
  • the semiconductor element 10 is fixed to the substrate 20 via the first connection member 50.
  • “near the four corners” includes a position that is separated from the four corners of the substrate 20 by a predetermined distance. Note that rubber or clay may be used instead of the UV curable resin.
  • the adhesive strength of the second connecting member is preferably weaker than the adhesive strength of the first connecting member. Thereby, it can suppress that a crack generate
  • a plurality of wiring patterns 200 on each of the front surface and the back surface, and a first connection member 50 (here, an Ag paste) provided in a partial region of each surface of the plurality of wiring patterns 200
  • the substrate 20 is prepared (substrate preparation step).
  • the Ag paste 50 can be applied to a partial region of the surface of the wiring pattern 200 by, for example, metal mask application or dispenser application.
  • a second connection member 40 (here, UV curable resin) having an adhesive strength weaker than the adhesive strength of the Ag paste 50 is partially applied to a plurality of locations on the substrate 20.
  • the UV curable resin 40 is applied to the front and back surfaces of the substrate 20 in regions where the semiconductor element 10 is to be fixed and corresponding to the vicinity of the four corners of the semiconductor element 10.
  • the application of the UV curable resin 40 can be performed by dispenser application.
  • the semiconductor element 10 is arranged on the substrate 20 via the UV curable resin 40, and the UV curable resin 40 is cured by UV light irradiation and temporarily fixed (temporary fixing step). .
  • the pair of semiconductor elements 10 are arranged symmetrically on the front surface side and the back surface side of the substrate 20, respectively.
  • the placement of the semiconductor element 10 on the substrate 20 can be performed using, for example, an automatic mounting apparatus.
  • the semiconductor element 10 is adsorbed by the collet 60 provided in the automatic mounting apparatus.
  • the collet 60 places the adsorbed semiconductor element 10 at a predetermined position on the substrate 20 and presses the semiconductor element 10 toward the substrate 20 with a certain force (for example, 50 to 100 gf).
  • the semiconductor element 10 on which one collet 60 is adsorbed and the semiconductor element 10 on which the other collet 60 is adsorbed on the substrate 20 at substantially the same position across the substrate 20. Pressed.
  • the pair of semiconductor elements 10 are arranged at predetermined positions on the front surface and the back surface of the substrate 20. Thereafter, the UV curable resin 40 is cured by irradiating each of the plurality of UV curable resins 40 sandwiched between the semiconductor element 10 and the substrate 20, and each of the pair of semiconductor elements 10 is temporarily fixed to the substrate 20. To do.
  • a pair of semiconductor elements 10 is newly placed next to the pair of semiconductor elements 10 temporarily fixed, and temporarily fixed to the substrate 20.
  • a method in which a plurality of pairs of semiconductor elements 10 are arranged on each of the front surface side and the back surface side of the substrate 20 and the plurality of pairs of semiconductor elements 10 are temporarily fixed at symmetrical positions on the substrate 20 at the same time may be used.
  • the Ag paste 50 is cured, and the wiring pattern 200 and the semiconductor element 10 are electrically connected (curing process).
  • a hardening process is implemented by heating the Ag paste 50, for example in a thermostat. As an example, heating is performed at 75 ° C. for 2 to 3.5 hours.
  • the flexible substrate, the card holder 30, the card holder 31, the elastic member 32, and the like are attached to the predetermined positions of the plurality of semiconductor elements 10 and the substrate 20 (assembly process). With the above, the radiation detector 1 according to the first embodiment is manufactured.
  • substrate 20 in a manufacturing process (especially in a hardening process) ( Undesirable disconnection) can be suppressed, and the yield can be improved.
  • the pair of semiconductor elements 10 are pressed from both sides of the substrate 20 at the symmetrical position of the substrate 20 with the substrate 20 interposed therebetween, even when the substrate 20 is warped.
  • the substrate 20 can be flattened. In other words, since the warpage of the substrate 20 can be suppressed, variation in the thickness of the Ag paste 50 after the Ag paste 50 is cured can be reduced. Thereby, the stress distribution applied to the semiconductor element 10 can be reduced.
  • an adhesive that is cured by heat may be used as the second connection member. This is because the pair of semiconductor elements 10 are pressed from both surfaces of the substrate 20, so that even when heat is applied when the second connection member is cured, warpage due to heat of the substrate 20 can be suppressed. However, the temperature at which the second connecting member is cured is lower than the temperature at which the first connecting member is cured.
  • the semiconductor element 10 when using the automatic mounting device, can be arranged on the substrate 20 with a positional accuracy of ⁇ 0.02 mm. Thereby, the semiconductor element 10 can be arranged on the substrate 20 with high accuracy and the arrangement speed can be improved.
  • the UV curable resin 40 functions as a temporary fixing member that temporarily fixes the semiconductor element 10 to the substrate 20, so that the semiconductor element 10 is placed at a predetermined position on the substrate 20. It can be held stably. Thereby, since the complicated jig which arrange
  • the UV curable resin 40 can be cured in a short time, from a predetermined position of the substrate 20 of the semiconductor element 10 due to warpage of the substrate 20 in a process after the temporary fixing process (for example, a curing process). Can be suppressed. Furthermore, by using a UV curable resin 40 having a Young's modulus (20 to 200 MPa) similar to that of the Ag paste 50 as the UV curable resin 40, it is possible to relieve the stress caused by the difference in linear expansion to the semiconductor element 10.
  • this embodiment is particularly effective when using a substrate that is thin, easily bent, and easily warps.
  • a thin substrate preferably a thin substrate having a thickness of 0.4 mm or less
  • the manufacturing method of the radiation detector according to the second embodiment is substantially the same as the manufacturing method of the radiation detector according to the first embodiment except for a part thereof. Therefore, detailed description other than the differences will be omitted.
  • 4A to 4D are enlarged schematic views showing a flow of a temporary fixing step in the method of manufacturing the radiation detector according to the second exemplary embodiment of the present invention.
  • a plurality of wiring patterns 200 are formed on both surfaces of the substrate 20, and a part of the surface of each of the plurality of wiring patterns 200 is formed. Then, the substrate 20 is prepared in which the Ag paste 50 is provided and the UV curable resin 40 is provided at a predetermined position. Next, as shown in FIG. 4A, the semiconductor element 10 is disposed on the substrate 20 via the UV curable resin 40, and the UV curable resin 40 is cured by UV light irradiation and temporarily fixed.
  • the semiconductor element 10 is disposed on either the front surface or the back surface of the substrate 20 and temporarily fixed.
  • the semiconductor elements 10 are arranged one by one on the surface side of the substrate 20, and the UV curable resin 40 sandwiched between the arranged semiconductor elements 10 and the substrate 20 is irradiated with UV light to temporarily fix the semiconductor elements 10.
  • the semiconductor element 10 is newly placed next to the semiconductor element 10 temporarily fixed, and is temporarily fixed to the substrate 20.
  • the plurality of semiconductor elements 10 are temporarily fixed only on one surface (front surface) side of the substrate 20.
  • the semiconductor elements 10 are arranged one by one on the other surface (back surface) of the substrate 20, and the UV curing is sandwiched between the arranged semiconductor elements 10 and the substrate 20.
  • the semiconductor elements 10 are sequentially temporarily fixed by irradiating the resin 40 with UV light.
  • the plurality of semiconductor elements 10 are temporarily fixed to both surfaces of the substrate 20 so as to form a pair.
  • the radiation detector according to the second embodiment is manufactured through a curing process and an assembly process.
  • the substrate 20 it is preferable not to apply heat in the temporary fixing step so that the substrate 20 is not warped.
  • an adhesive that cures at room temperature (20 ° C. to 40 ° C.) can be used in addition to the UV curable resin.
  • FIG. 5A to FIG. 5B are enlarged schematic views showing the flow of a temporary fixing step in the manufacturing method of the radiation detector according to the third exemplary embodiment of the present invention.
  • a plurality of wiring patterns 200 are formed on both surfaces of the substrate 20, and a part of the surface of each of the plurality of wiring patterns 200 is formed. Then, the substrate 20 is prepared in which the Ag paste 50 is provided and the UV curable resin 40 is provided at a predetermined position. Next, as shown in FIG. 5A, the semiconductor element 10 is disposed on the substrate 20 via the UV curable resin 40, and the UV curable resin 40 is cured and temporarily fixed by irradiation with UV light.
  • a plurality of semiconductor elements 10 are arranged on either the front surface or the back surface of the substrate 20.
  • the semiconductor element 10 is disposed on the entire surface of the substrate 20 where the semiconductor element 10 is to be mounted, and UV light is applied to the UV curable resin 40 sandwiched between the disposed semiconductor element 10 and the substrate 20. Is temporarily fixed to each of the plurality of semiconductor elements 10 (see FIG. 5A).
  • the semiconductor element 10 is disposed on all the portions on which the semiconductor element 10 is to be mounted on the other surface (back surface) side of the substrate 20.
  • the UV curable resin 40 sandwiched between the substrates 20 is irradiated with UV light to temporarily fix each of the plurality of semiconductor elements 10.
  • the plurality of semiconductor elements 10 are temporarily fixed to both surfaces of the substrate 20 so as to form a pair.
  • the radiation detector according to the third embodiment is manufactured through a curing process and an assembly process.
  • the substrate 20 it is preferable not to apply heat in the temporary fixing step so that the substrate 20 is not warped.
  • an adhesive that cures at room temperature (20 ° C. to 40 ° C.) can be used in addition to the UV curable resin.
  • SYMBOLS 1 DESCRIPTION OF SYMBOLS 1 ... Radiation detector, 10 ... Semiconductor element, 10a ... Groove, 10b ... Element surface, 10c ... Element surface, 20 ... Substrate, 22 ... Substrate terminal, 29 ... Card edge part, 29a ... Pattern, 30, 31 ... Card holder , 32 ... elastic member, 34 ... grooved hole, 36 ... projection, 40 ... second connecting member, 50 ... first connecting member, 60 ... collet, 100 ... radiation, 200 ... wiring pattern.

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Abstract

　本発明は、製造工程において製品の歩留りを向上させることのできる放射線検出器の製造方法、及び放射線検出器を提供する。本発明に係る放射線検出器の製造方法は、配線パターンと前記配線パターンの表面に設けられる第１接続部材とを有する基板を準備する基板準備工程と、前記基板上に第２接続部材を部分的に塗布する塗布工程と、前記第２接続部材を介して放射線を検出可能な半導体素子を前記基板上に配置し、前記第２接続部材を硬化させることにより前記半導体素子を前記基板に一時的に固定する仮固定工程とを備える。

Description

放射線検出器の製造方法、及び放射線検出器
　本発明は、放射線検出器の製造方法、及び放射線検出器に関する。特に、本発明は、γ線、Ｘ線等の放射線を検出する放射線検出器の製造方法、及び放射線検出器に関する。
　従来の放射線検出器として、熱膨張係数が８．０×１０－６［１／℃］以上の配線基板と、前記配線基板上に配置された半導体検出素子とから構成される半導体検出部を備え、前記半導体検出素子が略平板状の半導体結晶体からなり、前記半導体結晶体の下面にＡｕ（金）からなる素子電極が設けられ、前記素子電極と前記配線基板に設けられたパッド電極とを前記半導体結晶のヤング率より小さいずれ弾性を有するバンプで固定する放射線検出器が知られている（例えば、特許文献１参照）。特許文献１に記載の放射線検出器は、半導体結晶体との間で熱膨張係数差が大きな配線基板でも半導体結晶体の検出特性の劣化を抑制することができるとされている。
特開２００７－２１４１９１号公報
　しかしながら、特許文献１に係る放射線検出器は、基板に半導体検出素子を配置し、半導体検出素子を基板に固定する工程において、基板の反り等に起因する放射線検出器の製造歩留りについて考慮されていない。
　したがって、本発明の目的は、上記課題を解決し、製造工程において製品の歩留りを向上させることのできる放射線検出器の製造方法、及び放射線検出器を提供することにある。
　（I）本発明の１つの態様は、放射線検出器の製造方法であって、配線パターンと前記配線パターンの表面に設けられる第１接続部材とを有する基板を準備する基板準備工程と、前記基板上に第２接続部材を部分的に塗布する塗布工程と、前記第２接続部材を介して放射線を検出可能な半導体素子を前記基板上に配置し、前記第２接続部材を硬化させることにより前記半導体素子を前記基板に一時的に固定する仮固定工程とを備える放射線検出器の製造方法を提供する。
　また、本発明は、上記の態様（I）において、以下のような改良や変更を加えることができる。
（i）前記仮固定工程の後に、前記第１接続部材を硬化させ、前記配線パターンと前記半導体素子とを電気的に接続させる硬化工程を更に備える。
（ii）前記半導体素子が、平面視にて四角形状を有し、前記塗布工程が、前記半導体素子の四隅近傍に対向する前記基板上の複数の位置に前記第２接続部材を塗布する工程である。なお、本発明において、上記四角形状とは厳密な四角形に限定されるものではなく、実質的に四角形風に見えればよい。
（iii）前記第１接続部材が、銀ペースト又ははんだであり、前記第２接続部材が、ＵＶ（紫外線）硬化樹脂であり、前記仮固定工程が、前記第２接続部材に紫外線を照射することにより前記第２接続部材を硬化させる工程であり、前記硬化工程が、前記第１接続部材を加熱することにより前記第１接続部材を硬化させる。
（iv）前記基板準備工程が、前記基板の両面のそれぞれに前記配線パターンと前記第１接続部材とを有する基板を準備する工程であり、前記塗布工程が、前記基板の両面のそれぞれに部分的に複数の前記第２接続部材を塗布する工程であり、前記仮固定工程が、前記基板の両面のそれぞれに複数の前記半導体素子を配置し、前記複数の半導体素子のそれぞれを前記基板の両面に一時的に固定する工程である。
（v）前記基板準備工程が、前記基板の両面のそれぞれに前記配線パターンと前記第１接続部材とを有する基板を準備する工程であり、前記塗布工程が、前記基板の両面のそれぞれに部分的に複数の前記第２接続部材を塗布する工程であり、前記仮固定工程が、前記基板の一方の面に複数の前記半導体素子を配置して前記一方の面に配置した前記複数の半導体素子を一時的に固定し、その後、前記基板の他方の面に複数の前記半導体素子を配置して前記他方の面に配置した前記複数の半導体素子を一時的に固定する工程である。
　（II）本発明の他の１つの態様は、放射線検出器であって、配線パターンと前記配線パターンの表面に設けられた第１接続部材とを有する基板と、前記第１接続部材を介して前記配線パターンに電気的に接続され、放射線を検出可能な半導体素子と、前記半導体素子と前記基板との間に部分的に設けられ、前記半導体素子を前記基板に固定させる複数の第２接続部材とを備える放射線検出器を提供する。
　また、本発明は、上記の態様（II）において、以下のような改良や変更を加えることができる。
（vi）前記第２接続部材の接着力が、前記第１接続部材の接着力よりも弱い。
（vii）前記基板が、０．４ｍｍ以下の厚さを有する。
（viii）前記半導体素子が、平面視にて四角形状を有し、前記第２接続部材が、前記半導体素子の四隅近傍に配設されている。
（ix）前記第１接続部材が、銀ペースト又ははんだであり、前記第２接続部材が、ＵＶ硬化樹脂である。
　本発明によれば、放射線検出器の製造工程において製品の歩留りが向上する製造方法を提供することができる。その結果、放射線検出の信頼性が高い放射線検出器を低コストで提供することができる。
本発明の第１の実施形態に係る放射線検出器の１例を示す斜視模式図である。 図１に示した放射線検出器の一部を放射線が入射する方向から見た拡大模式図である。 本発明の第１の実施形態に係る放射線検出器の製造方法における基板準備工程を示した拡大模式図である。 本発明の第１の実施形態に係る放射線検出器の製造方法における塗布工程を示した拡大模式図である。 本発明の第１の実施形態に係る放射線検出器の製造方法における仮固定工程を示した拡大模式図である。 図３Ｃに示した仮固定工程の続きを示した拡大模式図である。 本発明の第２の実施形態に係る放射線検出器の製造方法における仮固定工程を示した拡大模式図である。 図４Ａに示した仮固定工程の続きを示した拡大模式図である。 図４Ｂに示した仮固定工程の続きを示した拡大模式図である。 図４Ｃに示した仮固定工程の続きを示した拡大模式図である。 本発明の第３の実施形態に係る放射線検出器の製造方法における仮固定工程を示した拡大模式図である。 図５Ａに示した仮固定工程の続きを示した拡大模式図である。
　以下、本発明の実施形態について、図面を参照しながら実施例に基づいて説明する。なお、本発明はここで取り上げた実施例に限定されることはなく、要旨を変更しない範囲で適宜組み合わせや改良が可能である。
　［第１の実施形態］
　図１は、本発明の第１の実施形態に係る放射線検出器の１例を示す斜視模式図である。図２は、図１に示した放射線検出器の一部を放射線が入射する方向から見た部分拡大模式図である。
　（放射線検出器１の構成の概要）
　本実施形態に係る放射線検出器１は、カード形状を呈し、γ線やＸ線等の放射線を検出する放射線検出器である。図１に示したように、放射線１００は、図中の上方から下方に向かって進行している。言い換えると、放射線１００は、放射線検出器１の半導体素子１０からカードホルダ３０及びカードホルダ３１に向かう方向に沿って進行して放射線検出器１に到達する。そして、放射線１００は、放射線検出器１の半導体素子１０の側面（つまり、図１の上方に面している面）に入射する。すなわち、半導体素子１０の側面が放射線１００の入射面となっている。このように、半導体素子１０の側面を放射線１００の入射面とする放射線検出器１を、本実施の形態ではエッジオン型の放射線検出器１と称する。
　なお、放射線検出器１は、特定の方向（例えば、放射線検出器１に向かう方向）に沿って入射してくる放射線１００が通過する複数の開口を有するコリメータ（例えば、マッチドコリメータ、ピンホールコリメータ等）を介して放射線１００を検出する複数の放射線検出器１が並べられて構成されるエッジオン型の放射線検出器１として構成することもできる。
　具体的には、放射線検出器１は、放射線１００を検出可能な対向した一対の半導体素子１０と、薄い基板２０と、対向した一対の半導体素子１０の隣接部分にて基板２０を挟み込むことにより基板２０を支持するカードホルダ３０及びカードホルダ３１とを備える。図１においては、本実施形態の一例として、対向した一対の半導体素子１０が４組あり、基板２０を挟み込むように基板２０に固定される。言い換えると、各組の一対の半導体素子１０は、基板２０の一方の面と他方の面とのそれぞれに基板２０を対称面として対称の位置に固定される。
　基板２０はカードホルダ３０とカードホルダ３１とに挟み込まれて支持される。カードホルダ３０とカードホルダ３１との形状に特段の限定はないが、図１では、それぞれ同一形状に形成されている。挟み込み方としては、例えば、カードホルダ３０が有する溝付穴３４にカードホルダ３１が有する突起部３６が嵌め合うと共に、カードホルダ３１が有する溝付穴３４（図示しない）にカードホルダ３０が有する突起部３６（図示しない）が嵌め合うことにより基板２０を支持する。
　放射線検出器立て（図示せず）に複数の放射線検出器１を挿入し安定して支持できるように、板ばね等から構成される弾性部材３２がカードホルダ３０，３１に取り付けられ、放射線検出器１が挿入された場合に放射線検出器１と放射線検出器立てとが押し付けられる。また、放射線検出器立てはカードエッジ部２９が挿入されるコネクタを有していることが好ましい。放射線検出器１は、カードエッジ部２９が該コネクタに挿入され、コネクタの電極とパターン２９ａとが接触することにより外部の電気回路（例えば、制御回路、外部からの電源線、グランド線等）と電気的に接続される。
　また、放射線検出器１は、対向する一対の半導体素子１０の基板２０と反対側に、各半導体素子１０の電極パターンと基板２０に設けられている複数の基板端子２２とのそれぞれを電気的に接続する配線パターンを有するフレキシブル基板を更に備えることができる（なお、半導体素子１０の電極パターン、フレキシブル基板、フレキシブル基板の配線パターンは図示していない）。フレキシブル基板は、対向する一対の半導体素子１０の一方の半導体素子１０側、及び他方の半導体素子１０側の双方に設けることができる。例えば、４組の一対の半導体素子１０の一方の半導体素子１０側のそれぞれと、他方の半導体素子１０側のそれぞれとの双方に、フレキシブル基板をそれぞれ設けることができる。
　（基板２０の詳細）
　基板２０としては、金属導体等の導電性材料からなる導電性薄膜（例えば、銅箔）が表面に形成された薄肉基板（例えば、ＦＲ４等のガラスエポキシ基板）を、ソルダーレジスト等の絶縁材料からなる絶縁層で挟んで可撓性を有して形成されることが好ましい。基板２０は、半導体素子１０の電極パターンに電気的に接続する配線パターン２００を有する（図２参照）。配線パターン２００の表面の一部の領域には導電性を有する第１接続部材５０（例えば、銀ペースト）が設けられ、半導体素子１０の電極パターンは第１接続部材５０を介して配線パターン２００に電気的に接続される。
　半導体素子１０の電極パターンに電気的に接続する基板２０の配線パターンは、カードエッジ部２９のパターン２９ａに電気的に接続するように形成されている。また、基板２０は、基板端子２２とカードエッジ部２９のパターン２９ａとを電気的に接続する配線パターンを有する。これにより、基板２０において、半導体素子１０の基板２０側の面の電極は、基板２０の配線パターンによりカードエッジ部２９のパターン２９ａに電気的に接続される。また、半導体素子１０の基板２０側の反対側の面の電極は、フレキシブル基板の配線パターンと、基板端子２２と、基板２０の配線パターンとを経由してカードエッジ部２９のパターン２９ａに電気的に接続される。
　ここで、例えば、半導体素子１０の基板２０側の電極をアノード電極とし、半導体素子１０の基板２０側の反対側の面の電極をカソード電極とする。この場合、アノード電極からの信号とカソード電極からの信号とはそれぞれ、カードエッジ部２９のパターン２９ａに導かれ、パターン２９ａを介して外部の電気回路へ出力される。また、半導体素子１０のカソード電極には、負の高電圧（例えば、－３００～－８００Ｖ）が印加される。
　基板２０は、一例として、幅広の方向（図中の左右方向）において４０ｍｍ程度の長さを有し、短手方向（図中の上下方向）において２０ｍｍ程度の長さを有している。また、第１接続部材５０として低温で溶融するはんだを用いてもよい。なお、基板２０は放射線を検出することができないので、対向する一対の半導体素子１０によって挟まれる基板２０の厚さ分の領域は不感領域となることから、基板２０の厚さは薄いことが好ましい。基板２０は、０．４ｍｍ以下の厚さであることが好ましい。本実施形態では、一例として、０．２ｍｍの厚さを有している。基板２０の厚さの下限は特に限定されないが、製造可能性の観点から、基板２０としてフレキシブル基板を用いることにより０．０４ｍｍまで薄くすることができる。
　（半導体素子１０の詳細）
　半導体素子１０は、薄い略直方体形状を有しており（例えば、縦５ｍｍ程度、横１１．２ｍｍ程度、厚さ１．２ｍｍ程度、つまり、平面視にて略四角形状である）、基板２０側の素子表面１０ｂと、素子表面１０ｂの反対側の面である素子表面１０ｃとのそれぞれに電極パターンが設けられる（図示しない）。放射線は各半導体素子１０の上側面（厚みを表す面）から入射して、カードエッジ部２９側に向かって半導体素子１０中を走行する。また、本実施形態に係る半導体素子１０は、放射線が入射する面に垂直な一の面である素子表面１０ｂに複数の溝１０ａが設けられる。溝１０ａの幅は、例えば、０．２ｍｍである。
　半導体素子１０の素子表面１０ｂにおいて、溝１０ａで区切られる領域を、素子内ピクセル領域と称する。半導体素子１０の素子表面１０ｂに（ｎ－１）個の溝１０ａを形成すると共に、各素子内ピクセル領域上および各素子内ピクセル領域に対応する素子表面１０ｃ上にそれぞれ電極を形成することにより、半導体素子１０の上側面（放射線が入射する面）にｎ個の素子内ピクセルが構成される。各素子内ピクセルが、放射線を検出する１つの画素（ピクセル）に対応する。すなわち、一つの半導体素子１０は、ｎ個の画素を有する。
　一例として、１つの放射線検出器１が８つの半導体素子１０（４組の一対の半導体素子１０）を備え、１つの半導体素子１０がそれぞれ８つの素子内ピクセルを有する場合、１つの放射線検出器１は、６４ピクセルの解像度を有することになる。溝１０ａの数を増減させることにより、一の半導体素子１０のピクセル数を増減させることができる。
　半導体素子１０を構成する材料としては、ＣｄＴｅを用いることができる。また、γ線等の放射線を検出できる限り、半導体素子１０はＣｄＴｅ素子に限られない。例えば、半導体素子１０として、ＣｄＺｎＴｅ（ＣＺＴ）素子、ＨｇＩ２素子等の化合物半導体素子を用いることもできる。
　ここで、図２に示すように半導体素子１０は、半導体素子１０と基板２０との間に部分的に設けられ、半導体素子１０を基板２０に仮に固定させる複数の第２接続部材４０（例えば、ＵＶ（紫外線）硬化樹脂）を備える。具体的に、第２接続部材４０は、半導体素子１０の四隅近傍のそれぞれに位置し、半導体素子１０と基板２０とを仮に固定している。本発明において「仮に固定」とは、後述する放射線検出器１の製造工程において半導体素子１０を基板２０に一時的に固定することを目的として用いられていることを意味する。半導体素子１０は第１接続部材５０を介して基板２０に固定されている。また、「四隅近傍」とは、基板２０の四隅から予め定められた距離だけ離れた位置であることを含む。なお、ＵＶ硬化樹脂の代わりにゴム又は粘土を用いることもできる。
　第２接続部材の接着力は、第１接続部材の接着力よりも弱いことが好ましい。これにより、第１接続部材と第２接続部材の熱膨張差によって発生する応力によって第１接続部材の接着箇所にクラックが生じることを抑制できる。また、第２接続部材としてのＵＶ硬化樹脂は、紫外線を照射することにより短時間で硬化させることができるという利点と、基板２０に反りを発生させるような熱を加えることなく硬化させることができる利点とを有する。
　（放射線検出器１の製造方法）
　図３Ａ～図３Ｄは、本発明の第１の実施形態に係る放射線検出器の製造方法における流れを示した拡大模式図である。
　まず、図３Ａに示したように、表面及び裏面のそれぞれに複数の配線パターン２００と、複数の配線パターン２００それぞれの表面の一部の領域に設けられる第１接続部材５０（ここではＡｇペーストとする）とを有する基板２０を準備する（基板準備工程）。なお、Ａｇペースト５０は、例えば、メタルマスク塗布、又はディスペンサ塗布により配線パターン２００の表面の一部の領域に塗布することができる。
　次に、図３Ｂに示したように、Ａｇペースト５０の接着力より弱い接着力を有する第２接続部材４０（ここではＵＶ硬化樹脂とする）を、基板２０上の複数個所に部分的に塗布する（塗布工程）。具体的には、基板２０の表面及び裏面のそれぞれに対して、半導体素子１０が固定されるべき領域であって、半導体素子１０の四隅近傍に対応する位置にＵＶ硬化樹脂４０を塗布する。ＵＶ硬化樹脂４０の塗布は、ディスペンサ塗布により実施することができる。
　続いて、図３Ｃに示したように、ＵＶ硬化樹脂４０を介して半導体素子１０を基板２０上に配置し、ＵＶ光の照射によりＵＶ硬化樹脂４０を硬化させて仮固定する（仮固定工程）。
　具体的には、第１の実施形態では、基板２０の表面側及び裏面側のそれぞれに一対の半導体素子１０を対称に配置する。半導体素子１０の基板２０への配置は、例えば、自動マウント装置を用いて実施できる。まず、自動マウント装置が備えるコレット６０で半導体素子１０を吸着する。そして、コレット６０は、吸着した半導体素子１０を基板２０上の予め定められた位置に配置し、一定の力（例えば、５０～１００ｇｆ）で半導体素子１０を基板２０側へ押しつける。第１の実施形態では、基板２０を挟んで対称の位置において、一方のコレット６０が吸着している半導体素子１０と、他方のコレット６０が吸着している半導体素子１０とを基板２０に略同時に押しつけている。これにより、一対の半導体素子１０が基板２０の表面及び裏面の予め定められた位置に配置される。その後、半導体素子１０と基板２０とに挟まれた複数のＵＶ硬化樹脂４０それぞれに紫外線を照射することによりＵＶ硬化樹脂４０を硬化させ、一対の半導体素子１０のそれぞれを基板２０に一時的に固定する。
　続いて、図３Ｄに示したように、先に仮固定した一対の半導体素子１０の隣に、新たに一対の半導体素子１０を配置すると共に基板２０に仮固定する。なお、基板２０の表面側及び裏面側のそれぞれに複数対の半導体素子１０を配置し、複数対の半導体素子１０を基板２０の対称の位置に実質的に同時に仮固定する方法でもよい。
　次に、Ａｇペースト５０を硬化させ、配線パターン２００と半導体素子１０とを電気的に接続させる（硬化工程）。硬化工程は、例えば、恒温槽内においてＡｇペースト５０を加熱することにより実施する。一例として、７５℃で２～３．５時間程度保持する加熱を行う。硬化工程後、フレキシブル基板、カードホルダ３０及びカードホルダ３１、弾性部材３２等を複数の半導体素子１０及び基板２０の定められた位置に取り付ける（組み立て工程）。以上で、第１の実施形態に係る放射線検出器１が製造される。
　（第１の実施形態の効果）
　本発明の第１の実施形態に係る放射線検出器１の製造方法は、基板２０への半導体素子１０の固定において、まずＵＶ硬化樹脂４０で半導体素子１０を基板２０に仮固定するので、硬化工程で基板２０に発生しうる反りをＡｇペースト５０が硬化するまで抑制することができる。また、ＵＶ硬化樹脂４０は、半導体素子１０の四隅近傍に設けられるので、基板２０に対する半導体素子１０の傾きを抑制することができる。これにより、第１の実施形態に係る放射線検出器１の製造方法においては、製造工程中（特に、硬化工程中）における半導体素子１０の電極パターンと基板２０の配線パターンとの電気的な切断（望まない断線）を抑制でき、歩留りを向上させることができる。
　また、第１の実施形態においては、基板２０を挟み、基板２０の対称な位置で一対の半導体素子１０を基板２０の両面から押さえつけるので、基板２０に反りが存在している場合であっても、基板２０を平坦にすることができる。言い換えると、基板２０の反りを抑制することができるので、Ａｇペースト５０が硬化した後のＡｇペースト５０の厚さのばらつきを低減できる。これにより、半導体素子１０に掛かる応力分布を低減できる。
　なお、本実施の形態においては、第２接続部材として、熱により硬化する接着剤を用いてもよい。一対の半導体素子１０を基板２０の両面から押さえつけているため、第２接続部材を硬化する際に熱を加えても、基板２０の熱による反りを抑制できるからである。ただし、第２接続部材を硬化させる温度は、第１接続部材が硬化する温度よりも低くする。
　また、自動マウント装置を用いる場合、±０．０２ｍｍの位置精度で半導体素子１０を基板２０に配置することができる。これにより、高精度で半導体素子１０を基板２０に配置することができると共に、配置スピードを向上させることができる。
　更に、Ａｇペースト５０が硬化するまでの間、ＵＶ硬化樹脂４０が半導体素子１０を基板２０に一時的に固定する仮固定部材として機能するので、半導体素子１０を基板２０の予め定められた位置に安定して保持することができる。これにより、複数の半導体素子１０のそれぞれを基板２０の予め定められた位置に配置する複雑な冶具を要さないので、放射線検出器１の量産コストを低減できる。
　また、ＵＶ硬化樹脂４０は短時間で硬化させることができるので、仮固定工程後の工程（例えば、硬化工程）において基板２０の反りに起因する半導体素子１０の基板２０の予め定められた位置からの位置ずれを抑制できる。更に、ＵＶ硬化樹脂４０としてＡｇペースト５０と同程度のヤング率（２０～２００ＭＰａ）のＵＶ硬化樹脂４０を用いることにより、半導体素子１０への線膨張差に起因する応力を緩和することができる。
　また、本実施の形態は、厚さが薄く、撓みやすく、反りが発生しやすい基板を用いる場合に、特に有効である。薄い基板（好ましくは０．４ｍｍ以下の厚さを有する薄い基板）を用いることにより、放射線検出の不感領域を低減できる。
　［第２の実施形態］
　第２の実施形態に係る放射線検出器の製造方法は、前述の第１の実施形態に係る放射線検出器の製造方法とは一部を除き略同じの製造方法である。したがって、相違点以外の詳細な説明は省略する。図４Ａ～図４Ｄは、本発明の第２の実施形態に係る放射線検出器の製造方法における仮固定工程の流れを示した拡大模式図である。
　まず、第１の実施形態と同様に、基板準備工程と塗布工程とを経ることにより、基板２０の両面のそれぞれに複数の配線パターン２００が形成され、複数の配線パターン２００それぞれの表面の一部にＡｇペースト５０が設けられ、更に予め定められた位置にＵＶ硬化樹脂４０が設けられた基板２０を作製する。次に、図４Ａに示したように、ＵＶ硬化樹脂４０を介して半導体素子１０を基板２０上に配置し、ＵＶ光の照射によりＵＶ硬化樹脂４０を硬化させて仮固定する。
　具体的には、まず、基板２０の表面又は裏面のいずれか一方の面に半導体素子１０を配置し、一時的に固定する。例えば、基板２０の表面側に半導体素子１０を一つずつ配置し、配置された半導体素子１０と基板２０とに挟まれたＵＶ硬化樹脂４０にＵＶ光を照射して当該半導体素子１０を仮固定する。図４Ａに続いて、図４Ｂに示したように、先に仮固定した半導体素子１０の隣に、新たに半導体素子１０を配置すると共に基板２０に仮固定する。その結果、基板２０の一方の面（表面）側だけに複数の半導体素子１０が仮固定される。
　次に、図４Ｃ～図４Ｄに示したように、基板２０の他方の面（裏面）に半導体素子１０を一つずつ配置し、配置された半導体素子１０と基板２０とに挟まれたＵＶ硬化樹脂４０にＵＶ光を照射して半導体素子１０を順次仮固定する。その結果、基板２０の両面に複数の半導体素子１０がそれぞれ対になるように対向して仮固定される。
　次に、硬化工程および組み立て工程を経て、第２の実施形態に係る放射線検出器が製造される。
　本実施の形態においては、基板２０に反りが発生しないように、仮固定工程で熱を加えないことが好ましい。例えば、第２接続部材としては、ＵＶ硬化樹脂の他に、常温（２０℃～４０℃）で硬化する接着剤を用いることができる。
　［第３の実施の形態］
　第３の実施形態に係る放射線検出器の製造方法は、前述の第１の実施形態に係る放射線検出器１の製造方法とは一部を除き略同じ製造方法である。したがって、相違点以外の詳細な説明は省略する。図５Ａ～図５Ｂは、本発明の第３の実施形態に係る放射線検出器の製造方法における仮固定工程の流れを示した拡大模式図である。
　まず、第１の実施形態と同様に、基板準備工程と塗布工程とを経ることにより、基板２０の両面のそれぞれに複数の配線パターン２００が形成され、複数の配線パターン２００それぞれの表面の一部にＡｇペースト５０が設けられ、更に予め定められた位置にＵＶ硬化樹脂４０が設けられた基板２０を作製する。次に、図５Ａに示したように、ＵＶ硬化樹脂４０を介して半導体素子１０を基板２０上に配置し、ＵＶ光の照射によりＵＶ硬化樹脂４０を硬化させて仮固定する。
　具体的には、まず、基板２０の表面又は裏面のいずれか一方の面に複数の半導体素子１０を配置する。例えば、基板２０の表面側であって、半導体素子１０を搭載すべき部分の全てに半導体素子１０を配置し、配置された半導体素子１０と基板２０とに挟まれたＵＶ硬化樹脂４０にＵＶ光を照射して複数の半導体素子１０それぞれを仮固定する（図５Ａ参照）。
　次に、図５Ｂに示したように、基板２０の他方の面（裏面）側であって、半導体素子１０を搭載すべき部分の全てに半導体素子１０を配置し、配置された半導体素子１０と基板２０とに挟まれたＵＶ硬化樹脂４０にＵＶ光を照射して複数の半導体素子１０それぞれを仮固定する。その結果、基板２０の両面に複数の半導体素子１０がそれぞれ対になるように対向して仮固定される。
　次に、硬化工程および組み立て工程を経て、第３の実施形態に係る放射線検出器が製造される。
　本実施の形態においては、基板２０に反りが発生しないように、仮固定工程で熱を加えないことが好ましい。例えば、第２接続部材としては、ＵＶ硬化樹脂の他に、常温（２０℃～４０℃）で硬化する接着剤を用いることができる。
　以上、本発明の実施形態を説明したが、上記に記載した実施形態は請求の範囲に係る発明を限定するものではない。また、実施形態の中で説明した特徴の組合せの全てが発明の課題を解決するための手段に必須であるとは限らない点に留意すべきである。
　１…放射線検出器、１０…半導体素子、１０ａ…溝、１０ｂ…素子表面、１０ｃ…素子表面、２０…基板、２２…基板端子、２９…カードエッジ部、２９ａ…パターン、３０，３１…カードホルダ、３２…弾性部材、３４…溝付穴、３６…突起部、４０…第２接続部材、５０…第１接続部材、６０…コレット、１００…放射線、２００…配線パターン。

Claims (11)

  1. 　放射線検出器の製造方法であって、
    配線パターンと、前記配線パターンの表面に設けられる第１接続部材とを有する基板を準備する基板準備工程と、
    前記基板上に第２接続部材を部分的に塗布する塗布工程と、
    前記第２接続部材を介して放射線を検出可能な半導体素子を前記基板上に配置し、前記第２接続部材を硬化させることにより前記半導体素子を前記基板に一時的に固定する仮固定工程とを備えることを特徴とする放射線検出器の製造方法。
  2. 　請求項１に記載の放射線検出器の製造方法において、
    前記仮固定工程の後に、前記第１接続部材を硬化させ、前記配線パターンと前記半導体素子とを電気的に接続させる硬化工程を更に備えることを特徴とする放射線検出器の製造方法。
  3. 　請求項２に記載の放射線検出器の製造方法において、
    前記半導体素子が、平面視にて四角形状を有し、
    前記塗布工程が、前記半導体素子の四隅近傍に対向する前記基板上の複数の位置に前記第２接続部材を塗布する工程であることを特徴とする放射線検出器の製造方法。
  4. 　請求項３に記載の放射線検出器の製造方法において、
    前記第１接続部材が、銀ペースト又は半田であり、
    前記第２接続部材が、ＵＶ硬化樹脂であり、
    前記仮固定工程が、前記第２接続部材に紫外線を照射することにより前記第２接続部材を硬化させる工程であり、
    前記硬化工程が、前記第１接続部材を加熱することにより前記第１接続部材を硬化させる工程であることを特徴とする放射線検出器の製造方法。
  5. 　請求項１に記載の放射線検出器の製造方法において、
    前記基板準備工程が、前記基板の両面のそれぞれに前記配線パターンと前記第１接続部材とを準備する工程であり、
    前記塗布工程が、前記基板の両面のそれぞれに部分的に複数の前記第２接続部材を塗布する工程であり、
    前記仮固定工程が、前記基板の両面のそれぞれに複数の前記半導体素子を配置し、前記複数の半導体素子のそれぞれを前記基板の両面に一時的に固定する工程であることを特徴とする放射線検出器の製造方法。
  6. 　請求項１に記載の放射線検出器の製造方法において、
    前記基板準備工程が、前記基板の両面のそれぞれに前記配線パターンと前記第１接続部材とを準備する工程であり、
    前記塗布工程が、前記基板の両面のそれぞれに部分的に複数の前記第２接続部材を塗布する工程であり、
    前記仮固定工程が、前記基板の一方の面に複数の前記半導体素子を配置して前記一方の面に配置した前記複数の半導体素子を一時的に固定し、その後、前記基板の他方の面に複数の前記半導体素子を配置して前記他方の面に配置した前記複数の半導体素子を一時的に固定する工程であることを特徴とする放射線検出器の製造方法。
  7. 　放射線検出器であって、
    配線パターンと、前記配線パターンの表面に設けられた第１接続部材とを有する基板と、
    前記第１接続部材を介して前記配線パターンに電気的に接続され、放射線を検出可能な半導体素子と、
    前記半導体素子と前記基板との間に部分的に設けられ、前記半導体素子を前記基板に固定させる複数の第２接続部材とを備えることを特徴とする放射線検出器。
  8. 　請求項７に記載の放射線検出器において、
    前記第２接続部材の接着力が、前記第１接続部材の接着力よりも弱いことを特徴とする放射線検出器。
  9. 　請求項８に記載の放射線検出器において、
    前記基板が、０．４ｍｍ以下の厚さを有することを特徴とする放射線検出器。
  10. 　請求項９に記載の放射線検出器において、
    前記半導体素子が、平面視にて四角形状を有し、
    前記第２接続部材が、前記半導体素子の四隅近傍に配設されていることを特徴とする放射線検出器。
  11. 　請求項１０に記載の放射線検出器において、
    前記第１接続部材が、銀ペースト又ははんだであり、
    前記第２接続部材が、ＵＶ硬化樹脂であることを特徴とする放射線検出器。
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JP3649907B2 (ja) * 1998-01-20 2005-05-18 シャープ株式会社 二次元画像検出器およびその製造方法
JP2003303946A (ja) * 2002-04-12 2003-10-24 Sony Corp 固体撮像装置およびその製造方法

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JP2001091656A (ja) * 1999-09-22 2001-04-06 Sharp Corp 二次元画像検出器

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CN106057690A (zh) * 2015-04-02 2016-10-26 贺利氏德国有限及两合公司 基板结构及其制造法、电子部件及其与基板结构的结合法
EP3086361A3 (de) * 2015-04-02 2017-01-25 Heraeus Deutschland GmbH & Co. KG Verfahren zum herstellen einer substratanordnung mit einem vorfixiermittel, entsprechende substratanordnung, verfahren zum verbinden eines elektronikbauteils mit einer substratanordnung mit anwendung eines auf dem elektronikbauteil und/oder der substratanordnung aufgebrachten vorfixiermittels und mit einer substratanordnung verbundenes elektronikbauteil

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