WO2011086734A1 - Procédé pour la production de substrat en carbure de silicium - Google Patents

Procédé pour la production de substrat en carbure de silicium Download PDF

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Publication number
WO2011086734A1
WO2011086734A1 PCT/JP2010/066784 JP2010066784W WO2011086734A1 WO 2011086734 A1 WO2011086734 A1 WO 2011086734A1 JP 2010066784 W JP2010066784 W JP 2010066784W WO 2011086734 A1 WO2011086734 A1 WO 2011086734A1
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substrate
silicon carbide
base layer
manufacturing
main surface
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PCT/JP2010/066784
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English (en)
Japanese (ja)
Inventor
太郎 西口
信 佐々木
真 原田
伸介 藤原
靖生 並川
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住友電気工業株式会社
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Publication of WO2011086734A1 publication Critical patent/WO2011086734A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/36—Carbides
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • C30B33/06—Joining of crystals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02378—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02529—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
    • H01L29/66068—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608—Silicon carbide

Definitions

  • the present invention relates to a method for manufacturing a silicon carbide substrate, and more particularly to a method for manufacturing a silicon carbide substrate that can reduce the manufacturing cost of a semiconductor device using the silicon carbide substrate.
  • silicon carbide (SiC) is being adopted as a material constituting a semiconductor device in order to enable a semiconductor device to have a high breakdown voltage, low loss, and use in a high temperature environment.
  • Silicon carbide is a wide band gap semiconductor having a larger band gap than silicon that has been widely used as a material for forming semiconductor devices. Therefore, by adopting silicon carbide as a material constituting the semiconductor device, it is possible to achieve a high breakdown voltage and a low on-resistance of the semiconductor device.
  • a semiconductor device that employs silicon carbide as a material has an advantage that a decrease in characteristics when used in a high temperature environment is small as compared with a semiconductor device that employs silicon as a material.
  • silicon carbide does not have a liquid phase at normal pressure.
  • the crystal growth temperature is as high as 2000 ° C. or higher, and it is difficult to control the growth conditions and stabilize the growth conditions. Therefore, it is difficult to increase the diameter of silicon carbide single crystal while maintaining high quality, and it is not easy to obtain a high-quality silicon carbide substrate having a large diameter.
  • due to the difficulty in manufacturing a large-diameter silicon carbide substrate not only the manufacturing cost of the silicon carbide substrate increases, but also when manufacturing a semiconductor device using the silicon carbide substrate, one batch There is a problem that the number of per-manufactured products decreases and the manufacturing cost of semiconductor devices increases. Further, it is considered that the manufacturing cost of the semiconductor device can be reduced by effectively using the silicon carbide single crystal having a high manufacturing cost as the substrate.
  • an object of the present invention is to provide a method for manufacturing a silicon carbide substrate that can reduce the manufacturing cost of a semiconductor device using the silicon carbide substrate.
  • a method of manufacturing a silicon carbide substrate according to the present invention includes a step of preparing a SiC substrate made of single crystal silicon carbide, a step of disposing a silicon carbide source so as to face one main surface of the SiC substrate, and silicon carbide. Forming a base layer made of silicon carbide so as to be in contact with one main surface of the SiC substrate by heating the source. In the step of forming the base layer, the silicon carbide source is heated in an atmosphere containing nitrogen.
  • the base layer is formed so as to be in contact with one main surface of the SiC substrate made of single crystal silicon carbide. Therefore, for example, a silicon carbide single crystal that is high quality but does not have a desired shape or the like is adopted as a SiC substrate, while a base layer made of low quality silicon carbide crystal that is inexpensive but has a large defect density is described above. It can be formed to have a predetermined shape and size. Since the silicon carbide substrate manufactured by such a process is unified in a predetermined shape and size, it can contribute to the efficiency of manufacturing the semiconductor device.
  • a semiconductor device is manufactured using a SiC substrate made of a high-quality silicon carbide single crystal that has not been used because it cannot be processed into a desired shape or the like. Therefore, the silicon carbide single crystal can be used effectively.
  • the method for manufacturing a silicon carbide substrate of the present invention it is possible to provide a method for manufacturing a silicon carbide substrate that can reduce the manufacturing cost of a semiconductor device using the silicon carbide substrate.
  • the silicon carbide source when the silicon carbide source is heated to form the base layer, impurities that should generate majority carriers in the base layer are separated from the silicon carbide source, and the base layer and the SiC substrate Impurity density may be lowered in the junction region with the entire base layer.
  • the resistivity in the thickness direction of the substrate is increased and the obtained silicon carbide substrate is used for manufacturing a semiconductor device in which a current flows in the thickness direction of the substrate, such as a vertical semiconductor device, This will cause an increase in on-resistance.
  • the silicon carbide source is heated in an atmosphere containing nitrogen.
  • the base layer in the step of preparing the SiC substrate, a plurality of SiC substrates are prepared, and in the step of arranging the silicon carbide source, the plurality of SiC substrates are arranged in a plan view.
  • the base layer in the step of forming the base layer by disposing the silicon carbide source in the state, the base layer may be formed so that one main surfaces of the plurality of SiC substrates are connected to each other.
  • a plurality of SiC substrates taken from a high-quality silicon carbide single crystal are arranged in a plane and a base layer is formed so that one main surface of the plurality of SiC substrates is connected to each other.
  • a silicon carbide substrate that can be handled as a large-diameter substrate having a high-quality SiC layer can be obtained.
  • the manufacturing process of the semiconductor device can be made efficient.
  • adjacent SiC substrates among the plurality of SiC substrates are arranged in contact with each other. More specifically, for example, the plurality of SiC substrates are preferably spread in a matrix as viewed in a plan view.
  • the base substrate made of silicon carbide as the silicon carbide source is in contact with one main surface of the base substrate and one main surface of the SiC substrate.
  • the base substrate may be heated to join the base substrate to the SiC substrate to form the base layer.
  • the raw material substrate made of silicon carbide as the silicon carbide source has one main surface of the raw material substrate and one main surface of the SiC substrate.
  • the base layer may be formed by sublimating silicon carbide constituting the raw material substrate by heating the raw material substrate.
  • the base layer can be easily formed.
  • the average value of the distance between the SiC substrate and the raw material substrate is smaller than the average free path of the sublimation gas during heating in the step of forming the base layer.
  • the SiC substrate and the raw material substrate may be arranged so as to be. Thereby, a base layer can be formed easily.
  • the base substrate is made of single-crystal silicon carbide, and in the step of disposing the silicon carbide source, the surface orientation of the main surface of the SiC substrate facing each other and the surface orientation of the main surface of the base substrate
  • the SiC substrate and the base substrate may be arranged so that the two coincide with each other.
  • the thermal expansion coefficient of single crystal silicon carbide has anisotropy due to the crystal plane. Therefore, when crystal planes having greatly different thermal expansion coefficients are joined together, a stress caused by the difference in the thermal expansion coefficient acts between the base layer and the SiC substrate. This stress may cause distortion or cracking of the silicon carbide substrate in the manufacture of the silicon carbide substrate and the manufacturing process of the semiconductor device using the silicon carbide substrate. On the other hand, when one main surface of the base substrate and one main surface of the SiC substrate are arranged in contact with each other, the plane orientations of the silicon carbide single crystals constituting the surfaces to be joined as described above coincide. By doing so, the stress can be relaxed.
  • the state in which the surface orientation of the main surface of the SiC substrate and the surface orientation of the main surface of the base substrate coincide with each other does not need to coincide with each other in a strict sense. I do it. More specifically, if the angle formed by the crystal plane constituting the main surface of the base substrate and the crystal plane constituting the main surface of the SiC substrate is 1 ° or less, the plane orientation of the main surface of the base substrate and the SiC substrate It can be said that the plane orientation of the main surface of this is substantially the same.
  • the SiC substrate and the silicon carbide source are heated in a container at least part of which is made of graphite.
  • Graphite is not only stable at high temperatures, but also relatively easy to process. Therefore, the manufacturing cost of the silicon carbide substrate can be reduced by adopting such a container and carrying out the method for manufacturing the silicon carbide substrate.
  • an off angle of the main surface opposite to the base layer of the SiC substrate with respect to the ⁇ 0001 ⁇ plane is 50 ° or more and 65 ° or less.
  • a base layer may be formed.
  • Hexagonal single crystal silicon carbide can be produced in a ⁇ 0001> direction to efficiently produce a high quality single crystal. And from the silicon carbide single crystal grown in the ⁇ 0001> direction, a silicon carbide substrate having a ⁇ 0001 ⁇ plane as a main surface can be efficiently collected. On the other hand, there may be a case where a high-performance semiconductor device can be manufactured by using a silicon carbide substrate having a main surface with an off angle with respect to the plane orientation ⁇ 0001 ⁇ of 50 ° to 65 °.
  • a silicon carbide substrate used for manufacturing a MOSFET Metal Oxide Semiconductor Field Effect Transistor
  • MOSFET Metal Oxide Semiconductor Field Effect Transistor
  • a MOSFET Metal Oxide Semiconductor Field Effect Transistor
  • An epitaxial growth layer is formed on the main surface, and an oxide film, an electrode, and the like are formed on the epitaxial growth layer, thereby obtaining a MOSFET.
  • a channel region is formed in a region including the interface between the epitaxial growth layer and the oxide film.
  • the off-angle of the main surface of the substrate with respect to the ⁇ 0001 ⁇ plane is about 8 °, so that the interface between the epitaxial growth layer and the oxide film in which the channel region is formed Many interface states are formed in the vicinity, hindering carrier travel, and channel mobility is lowered.
  • the carbonized surface is manufactured by setting the off angle of the main surface opposite to the base layer of the SiC substrate to the ⁇ 0001 ⁇ plane to be 50 ° or more and 65 ° or less. Since the off angle of the main surface of the silicon substrate with respect to the ⁇ 0001 ⁇ plane is not less than 50 ° and not more than 65 °, formation of the interface state is reduced, and a MOSFET with reduced on-resistance can be manufactured.
  • the angle formed between the off orientation of the main surface opposite to the base layer of the SiC substrate and the ⁇ 1-100> direction is 5 ° or less.
  • a base layer may be formed.
  • the ⁇ 1-100> direction is a typical off orientation in the silicon carbide substrate. Then, by setting the variation in off orientation due to the variation in slicing in the substrate manufacturing process to 5 ° or less, the formation of an epitaxially grown layer on the silicon carbide substrate can be facilitated.
  • the off angle of the main surface opposite to the base layer of the SiC substrate relative to the ⁇ 03-38 ⁇ plane in the ⁇ 1-100> direction is ⁇
  • the base layer may be formed so as to be 3 ° or more and 5 ° or less.
  • the channel mobility when a MOSFET is manufactured using a silicon carbide substrate can be further improved.
  • the off angle with respect to the plane orientation ⁇ 03-38 ⁇ is set to ⁇ 3 ° or more and + 5 ° or less.
  • the channel mobility is particularly high within this range. Is based on the obtained.
  • the “off angle with respect to the ⁇ 03-38 ⁇ plane in the ⁇ 1-100> direction” is an orthogonal projection of the normal of the principal surface to the plane extending in the ⁇ 1-100> direction and the ⁇ 0001> direction, This is an angle formed with the normal of the ⁇ 03-38 ⁇ plane, and its sign is positive when the orthographic projection approaches parallel to the ⁇ 1-100> direction, and the orthographic projection is in the ⁇ 0001> direction. The case of approaching parallel to is negative.
  • the surface orientation of the main surface is more preferably ⁇ 03-38 ⁇ , and the surface orientation of the main surface is more preferably ⁇ 03-38 ⁇ .
  • the surface orientation of the main surface is substantially ⁇ 03-38 ⁇ , taking into account the processing accuracy of the substrate, etc., the substrate is within an off-angle range where the surface orientation can be substantially regarded as ⁇ 03-38 ⁇ .
  • the off-angle range is, for example, a range where the off-angle is ⁇ 2 ° with respect to ⁇ 03-38 ⁇ .
  • the angle formed between the off orientation of the main surface opposite to the base layer of the SiC substrate and the ⁇ 11-20> direction is 5 ° or less.
  • a base layer may be formed.
  • the ⁇ 11-20> direction is a typical off orientation in the silicon carbide substrate, similarly to the ⁇ 1-100> direction. Then, by setting the variation in the off orientation due to the variation in the slice processing in the substrate manufacturing process to ⁇ 5 °, it is possible to facilitate the formation of the epitaxial growth layer on the SiC substrate.
  • the method for manufacturing a silicon carbide substrate may further include a step of polishing the main surface of the SiC substrate corresponding to the main surface of the SiC substrate opposite to the base layer.
  • a semiconductor device including the high-quality epitaxially grown layer as an active layer can be manufactured. That is, by adopting such a process, it is possible to obtain a silicon carbide substrate capable of manufacturing a high-quality semiconductor device including an epitaxially grown layer formed on the SiC substrate.
  • the main surface of the SiC substrate may be polished after the formation of the base layer, or the main surface of the SiC substrate to be the main surface opposite to the base layer is previously polished to It may be carried out before the formation of the layer.
  • the step of forming the base layer is performed without polishing the main surface of the SiC substrate on which the base layer is formed before the step of forming the base layer. Also good.
  • the manufacturing cost of the silicon carbide substrate can be reduced.
  • the main surface of the SiC substrate on which the base layer is formed in the step of forming the base layer may not be polished as described above.
  • the step of forming the base layer is performed after the step of removing the damaged layer by, for example, etching. It is preferable.
  • the base layer in the step of forming the base layer, may be formed under a pressure higher than 10 ⁇ 1 Pa and lower than 10 4 Pa.
  • the method for manufacturing a silicon carbide substrate of the present invention it is possible to provide a method for manufacturing a silicon carbide substrate that can reduce the manufacturing cost of a semiconductor device using the silicon carbide substrate. it can.
  • FIG. 3 is a flowchart showing an outline of a method for manufacturing a silicon carbide substrate in the first embodiment.
  • 3 is a schematic cross sectional view for illustrating the method for manufacturing the silicon carbide substrate in the first embodiment.
  • FIG. 1 is a schematic cross sectional view showing a structure of a silicon carbide substrate in a first embodiment.
  • 5 is a flowchart showing an outline of a method for manufacturing a silicon carbide substrate in a second embodiment.
  • FIG. 11 is a schematic cross sectional view for illustrating the method for manufacturing the silicon carbide substrate in the second embodiment.
  • FIG. 11 is a schematic cross sectional view for illustrating the method for manufacturing the silicon carbide substrate in the second embodiment.
  • FIG. 11 is a schematic cross sectional view for illustrating the method for manufacturing the silicon carbide substrate in the second embodiment.
  • FIG. 11 is a schematic cross sectional view for illustrating the method for manufacturing the silicon carbide substrate in the second embodiment.
  • FIG. 6 is a schematic cross sectional view showing a structure of a silicon carbide substrate in a second embodiment.
  • FIG. 11 is a schematic cross sectional view for illustrating the method for manufacturing the silicon carbide substrate in the third embodiment.
  • FIG. 7 is a schematic cross sectional view showing a structure of a silicon carbide substrate in a third embodiment.
  • It is a schematic sectional drawing which shows the structure of vertical MOSFET. It is a flowchart which shows the outline of the manufacturing method of vertical MOSFET. It is a schematic sectional drawing for demonstrating the manufacturing method of vertical MOSFET. It is a schematic sectional drawing for demonstrating the manufacturing method of vertical MOSFET. It is a schematic sectional drawing for demonstrating the manufacturing method of vertical MOSFET. It is a schematic sectional drawing for demonstrating the manufacturing method of vertical MOSFET. It is a schematic sectional drawing for demonstrating the manufacturing method of
  • a substrate preparation step is first performed as a step (S10).
  • step (S10) referring to FIG. 2, for example, base substrate 10 made of single crystal silicon carbide and SiC substrate 20 made of single crystal silicon carbide are prepared.
  • main surface 20A of SiC substrate 20 is the main surface of the silicon carbide substrate obtained by this manufacturing method (see FIG. 3 to be described later), so that SiC substrate 20 is aligned with the surface orientation of the desired main surface.
  • the plane orientation of the main surface 20A is selected.
  • SiC substrate 20 whose main surface is a ⁇ 03-38 ⁇ plane is prepared.
  • the base substrate 10 for example, a substrate having an impurity density higher than 2 ⁇ 10 19 cm ⁇ 3 may be employed.
  • SiC substrate 20 for example, a substrate having an impurity density larger than 5 ⁇ 10 18 cm ⁇ 3 and smaller than 2 ⁇ 10 19 cm ⁇ 3 is employed.
  • the base substrate 10 is not limited to a single crystal but may be prepared from a polycrystalline, amorphous or sintered body.
  • a substrate flattening step is performed as a step (S20).
  • the main surface (joint surface) of base substrate 10 and SiC substrate 20 to be in contact with each other in step (S30) described later is planarized by, for example, polishing.
  • this process (S20) is not an essential process, since the size of the gap between the base substrate 10 and the SiC substrate 20 facing each other becomes uniform by performing this process, it will be described later.
  • the uniformity of reaction (bonding) within the bonding surface is improved. As a result, base substrate 10 and SiC substrate 20 can be more reliably bonded.
  • the step (S30) may be performed without omitting the step (S20) and polishing the main surfaces of the base substrate 10 and the SiC substrate 20 that should face each other. Thereby, the manufacturing cost of silicon carbide substrate 1 can be reduced. Further, from the viewpoint of removing the damaged layer near the surface formed by slicing or the like during the production of the base substrate 10 and the SiC substrate 20, for example, the step of removing the damaged layer by etching is replaced with the step (S20). Or after performing after the said process (S20), the process (S30) mentioned later may be implemented.
  • step (S30) a stacking step is performed as a step (S30).
  • SiC substrate 20 is placed so as to be in contact with main surface 10A of base substrate 10, and multilayer substrate 2 is manufactured.
  • a joining step is performed as a step (S40).
  • the laminated substrate 2 is heated in the heating container 80, whereby the base substrate 10 and the SiC substrate 20 are bonded.
  • silicon carbide substrate 1 including base substrate 10 as base layer 10 is completed.
  • the silicon carbide substrate 1 can have a desired shape and size by selecting the shape of the base substrate 10 and the like, which can contribute to the efficiency of manufacturing the semiconductor device. Further, in silicon carbide substrate 1 manufactured by such a process, a semiconductor device is manufactured using SiC substrate 20 made of a high-quality silicon carbide single crystal that has not been used since it cannot be processed into a desired shape or the like. Therefore, a silicon carbide single crystal can be used effectively. As a result, according to the method for manufacturing silicon carbide substrate 1 in the present embodiment, silicon carbide substrate 1 capable of reducing the manufacturing cost of a semiconductor device using the silicon carbide substrate can be manufactured.
  • silicon carbide substrate 1 manufactured by the method for manufacturing a silicon carbide substrate in the present embodiment is a silicon carbide substrate in which an increase in resistivity in the thickness direction is suppressed.
  • atmosphere containing nitrogen for example, a mixed atmosphere of nitrogen and argon, a mixed atmosphere of nitrogen and helium, a mixed atmosphere of nitrogen, argon and helium, a nitrogen atmosphere, or the like can be employed.
  • step (S30) when base substrate 10 made of single-crystal silicon carbide is employed as described above, in step (S30), with reference to FIG. 2, the plane orientation of main surface 20B of SiC substrate 20 facing each other and the base substrate It is preferable that SiC substrate 20 and base substrate 10 are arranged so that the surface orientation of 10 main surfaces 10A substantially matches. Thereby, referring to FIG. 3, the stress acting between base layer 10 and SiC substrate 20 due to the anisotropy of the thermal expansion coefficient due to the crystal plane is reduced, and the strain and cracks in silicon carbide substrate 1 are reduced. Can be suppressed.
  • a heating vessel 80 at least part of which is made of graphite.
  • graphite that is stable at high temperatures and relatively easy to process as a material for the heating container, the manufacturing cost of silicon carbide substrate 1 can be reduced.
  • main surface 20A of SiC substrate 20 may have an off angle of 50 ° to 65 ° with respect to the ⁇ 0001 ⁇ plane.
  • main surface 20A of SiC substrate 20 may be a ⁇ 0001 ⁇ plane.
  • the angle formed between the off orientation of main surface 20A of SiC substrate 20 and the ⁇ 1-100> direction may be 5 ° or less.
  • the ⁇ 1-100> direction is a typical off orientation in a silicon carbide substrate. Then, by making the variation in the off orientation due to the variation in the slice processing in the substrate manufacturing process 5 ° or less, the formation of the epitaxial growth layer on the silicon carbide substrate 1 (on the main surface 20A) is facilitated. be able to.
  • the off angle of main surface 20A of SiC substrate 20 with respect to the ⁇ 03-38 ⁇ plane in the ⁇ 1-100> direction is preferably -3 ° or more and 5 ° or less.
  • the angle formed between the off orientation of main surface 20A of SiC substrate 20 and the ⁇ 11-20> direction may be 5 ° or less.
  • ⁇ 11-20> is also a typical off orientation in a silicon carbide substrate. Then, by setting the variation in the off orientation due to the variation in slicing in the substrate manufacturing process to ⁇ 5 °, on the silicon carbide substrate 1 manufactured by the method for manufacturing the silicon carbide substrate of the present embodiment (mainly The formation of an epitaxial growth layer on the surface 20A) can be facilitated.
  • the diameter of the base substrate 10 is preferably 2 inches or more, and more preferably 6 inches or more.
  • the silicon carbide substrate is used for manufacturing a power device such as a MOSFET
  • the polytype of silicon carbide constituting SiC substrate 20 is preferably 4H type.
  • base substrate 10 and SiC substrate 20 have the same crystal structure.
  • the difference in thermal expansion coefficient (linear expansion coefficient) between base layer 10 and SiC substrate 20 is small enough not to cause cracks in the process when silicon carbide substrate 1 is used for manufacturing a semiconductor device. desirable.
  • Variations in the thickness of base substrate 10 and SiC substrate 20 are preferably small. More specifically, the difference between the maximum value and the minimum value of base substrate 10 and SiC substrate 20 in the substrate is 10 ⁇ m or less, respectively. It is preferable.
  • the electric resistivity of the base layer 10 is small. Specifically, the electrical resistivity of the base layer 10 is preferably less than 50 m ⁇ cm, and more preferably less than 10 m ⁇ cm.
  • the region of 100 ⁇ m 2 or more in the main surface of the silicon carbide substrate 1 opposite to the base layer 10 of the SiC substrate 20 is single crystal carbonized. It is preferably made of silicon.
  • the thickness of silicon carbide substrate 1 is preferably 300 ⁇ m or more.
  • a heating method of the heating container in the step (S40) a resistance heating method, a high frequency induction heating method, a lamp annealing method, or the like can be employed.
  • a part of the base layer 10 may maintain the state of the base substrate 10 without sublimation.
  • main surface 20A of SiC substrate 20 corresponding to main surface 20A on opposite side of base substrate 10 of SiC substrate 20 in laminated substrate 2 is polished. You may further provide the process. This makes it possible to form a high quality epitaxial growth layer on the main surface 20A. As a result, it is possible to manufacture a semiconductor device including the high-quality epitaxially grown layer as an active layer, for example. That is, by adopting such a process, silicon carbide substrate 1 capable of manufacturing a high-quality semiconductor device including an epitaxial layer formed on SiC substrate 20 can be obtained.
  • the step of performing the polishing may be performed before the formation of the base layer (bonding of the SiC substrate 20 and the base substrate 10) or after the formation (step S10). Also good.
  • the heating temperature of the multilayer substrate in the step (S40) is preferably 1800 ° C. or higher and 2500 ° C. or lower.
  • the heating temperature is lower than 1800 ° C., it takes a long time to join base substrate 10 and SiC substrate 20, and the manufacturing efficiency of silicon carbide substrate 1 decreases.
  • the heating temperature exceeds 2500 ° C., the surfaces of base substrate 10 and SiC substrate 20 are roughened, and there is a risk that the number of crystal defects in silicon carbide substrate 1 to be manufactured increases.
  • the heating temperature of the laminated substrate in step (S40) is preferably 1900 ° C. or higher and 2100 ° C. or lower.
  • the laminated substrate may be heated under a pressure higher than 10 ⁇ 1 Pa and lower than 10 4 Pa.
  • the atmosphere during heating in the step (S40) may be an inert gas atmosphere containing nitrogen.
  • the atmosphere is preferably a nitrogen atmosphere or an inert gas atmosphere containing nitrogen and at least one of argon and helium.
  • a substrate preparation step is first performed as a step (S10).
  • SiC substrate 20 is prepared in the same manner as in the first embodiment, and source substrate 11 made of silicon carbide is prepared.
  • Raw material substrate 11 may be made of single crystal silicon carbide, may be made of polycrystalline silicon carbide, or may be a sintered body of silicon carbide. Moreover, it can replace with the raw material board
  • a proximity arrangement step is performed as a step (S50).
  • SiC substrate 20 and raw material substrate 11 are held by first heater 81 and second heater 82 arranged in heating container 80 so as to face each other.
  • the appropriate value of the distance between the SiC substrate 20 and the raw material substrate 11 is related to the average free path of the sublimation gas during heating in the step (S60) described later.
  • the average value of the distance between the SiC substrate 20 and the raw material substrate 11 can be set to be smaller than the average free path of the sublimation gas during heating in the step (S60) described later.
  • the mean free path of atoms and molecules strictly depends on the atomic radius and molecular radius, but is about several to several tens of centimeters. Is preferably several cm or less. More specifically, SiC substrate 20 and raw material substrate 11 are arranged close to each other with their main surfaces facing each other with an interval of 1 ⁇ m to 1 cm. Furthermore, by setting the average value of the intervals to 1 cm or less, the film thickness distribution of the base layer 10 formed in the step (S60) described later can be reduced. Furthermore, by setting the average value of the intervals to 1 mm or less, the film thickness distribution of the base layer 10 formed in the step (S60) described later can be further reduced.
  • the sublimation gas is a gas formed by sublimation of solid silicon carbide, and includes, for example, Si, Si 2 C, and SiC 2 .
  • a sublimation step is performed as a step (S60).
  • SiC substrate 20 is heated to a predetermined substrate temperature by first heater 81.
  • the raw material substrate 11 is heated to a predetermined raw material temperature by the second heater 82.
  • SiC is sublimated from the surface of the source substrate by heating source substrate 11 to the source temperature.
  • the substrate temperature is set lower than the raw material temperature. Specifically, for example, the substrate temperature is set to be 1 ° C. or more and 100 ° C. or less lower than the raw material temperature.
  • the substrate temperature is, for example, 1800 ° C. or more and 2500 ° C. or less.
  • SiC that is sublimated from the raw material substrate 11 into a gas reaches the surface of the SiC substrate 20 and becomes a solid, thereby forming the base layer 10.
  • the step (S60) is completed, and silicon carbide substrate 1 shown in FIG. 8 is completed.
  • step (S60) silicon carbide constituting raw material substrate 11 is once sublimated, and then base layer 10 is formed. For this reason, impurities that should generate majority carriers contained in the raw material substrate 11 may be separated during sublimation, and the impurity density in the entire base layer 10 may be lowered.
  • the heating of raw material substrate 11 and SiC substrate 20 in the step (S60) is performed in a state where the inside of heating container 80 is in an atmosphere containing nitrogen, as in the case of the first embodiment.
  • nitrogen in the atmosphere is taken into the entire base layer 10 as an impurity, and a decrease in impurity density in the base layer 10 is suppressed.
  • silicon carbide substrate 1 manufactured by the method for manufacturing a silicon carbide substrate in the present embodiment is a silicon carbide substrate in which an increase in resistivity in the thickness direction is suppressed.
  • Embodiment 3 which is still another embodiment of the present invention will be described.
  • the method for manufacturing the silicon carbide substrate in the third embodiment is basically performed in the same manner as in the first embodiment. However, the method for manufacturing the silicon carbide substrate in the third embodiment is different from that in the first embodiment in the arrangement of the SiC substrate.
  • a substrate preparation step is first performed as a step (S10) as in the case of the first embodiment.
  • base substrate 10 and SiC substrate 20 are prepared.
  • a plurality of SiC substrates 20 are prepared in the present embodiment.
  • a laminating step is performed as a step (S30).
  • a plurality of SiC substrates 20 prepared in step (S10) are in contact with main surface 10A of base substrate 10 in a state of being arranged side by side in plan view. Arranged. That is, a plurality of SiC substrates 20 are arranged along the main surface 10 ⁇ / b> A of the base substrate 10. At this time, the plurality of SiC substrates 20 may be arranged in a matrix so that adjacent SiC substrates 20 on base substrate 10 are in contact with each other. On the other hand, SiC substrates 20 may be arranged at intervals. At this time, the interval is preferably 100 ⁇ m or less, and more preferably 10 ⁇ m or less.
  • a joining process is implemented as process (S40), and layered substrate 2 is heated in the atmosphere containing nitrogen.
  • one main surface 20B of a plurality of SiC substrates 20 is connected by base substrate 10 to complete silicon carbide substrate 1 shown in FIG. Since silicon carbide substrate 1 can be easily increased in diameter by using a plurality of SiC substrates, the manufacturing cost of a semiconductor device using a silicon carbide substrate is further reduced. Further, since heating for bonding base substrate 10 and SiC substrate 20 is performed in an atmosphere containing nitrogen, silicon carbide substrate 1 in which an increase in resistivity in the thickness direction is suppressed is obtained.
  • a semiconductor device 101 according to the present invention is a vertical DiMOSFET (Double Implanted MOSFET), and includes a substrate 102, a buffer layer 121, a breakdown voltage holding layer 122, a p region 123, an n + region 124, and a p +.
  • a region 125, an oxide film 126, a source electrode 111 and an upper source electrode 127, a gate electrode 110, and a drain electrode 112 formed on the back side of the substrate 102 are provided.
  • buffer layer 121 made of silicon carbide is formed on the surface of substrate 102 made of silicon carbide of n-type conductivity.
  • substrate 102 a silicon carbide substrate manufactured by the method for manufacturing a silicon carbide substrate of the present invention including silicon carbide substrate 1 described in the first to third embodiments is employed.
  • buffer layer 121 is formed on SiC substrate 20 of silicon carbide substrate 1.
  • Buffer layer 121 has n-type conductivity, and its thickness is, for example, 0.5 ⁇ m. Further, the density of the n-type conductive impurity in the buffer layer 121 can be set to 5 ⁇ 10 17 cm ⁇ 3 , for example.
  • a breakdown voltage holding layer 122 is formed on the buffer layer 121.
  • the breakdown voltage holding layer 122 is made of silicon carbide of n-type conductivity, and has a thickness of 10 ⁇ m, for example. Further, as the density of the n-type conductive impurity in the breakdown voltage holding layer 122, for example, a value of 5 ⁇ 10 15 cm ⁇ 3 can be used.
  • p regions 123 having a p-type conductivity are formed at intervals. Inside the p region 123, an n + region 124 is formed in the surface layer of the p region 123. A p + region 125 is formed at a position adjacent to the n + region 124. From the n + region 124 in one p region 123 to the p region 123, the breakdown voltage holding layer 122 exposed between the two p regions 123, the other p region 123, and the n + region 124 in the other p region 123. An oxide film 126 is formed so as to extend to. A gate electrode 110 is formed on the oxide film 126.
  • a source electrode 111 is formed on the n + region 124 and the p + region 125.
  • An upper source electrode 127 is formed on the source electrode 111.
  • a drain electrode 112 is formed on the back surface of the substrate 102 which is the surface opposite to the surface on which the buffer layer 121 is formed.
  • the silicon carbide substrate of the present invention such as the silicon carbide substrate 1 described in the first to third embodiments is employed as the substrate 102.
  • the silicon carbide substrate of the present invention can reduce the manufacturing cost of the semiconductor device using the silicon carbide substrate and can reduce the resistivity in the thickness direction by the method for manufacturing the silicon carbide substrate. It is manufactured. Therefore, the semiconductor device 101 is a semiconductor device in which the manufacturing cost is reduced and the on-resistance is reduced.
  • a substrate preparation step (S110) is performed.
  • a substrate 102 (see FIG. 13) made of silicon carbide having a (03-38) plane as a main surface is prepared.
  • the silicon carbide substrate of the present invention including silicon carbide substrate 1 manufactured by the manufacturing method described in the first to third embodiments is prepared.
  • this substrate 102 for example, a substrate having an n-type conductivity and a substrate resistance of 0.02 ⁇ cm may be used.
  • an epitaxial layer forming step (S120) is performed. Specifically, the buffer layer 121 is formed on the surface of the substrate 102. Buffer layer 121 is formed on main surface 20A of SiC substrate 20 of silicon carbide substrate 1 employed as substrate 102 (see FIGS. 3, 8, and 10). Buffer layer 121 is formed of an n-type silicon carbide, and an epitaxial layer having a thickness of 0.5 ⁇ m, for example, is formed. As the density of the conductive impurities in the buffer layer 121, for example, a value of 5 ⁇ 10 17 cm ⁇ 3 can be used. Then, a breakdown voltage holding layer 122 is formed on the buffer layer 121 as shown in FIG.
  • breakdown voltage holding layer 122 a layer made of silicon carbide of n-type conductivity is formed by an epitaxial growth method.
  • a thickness of the breakdown voltage holding layer 122 for example, a value of 10 ⁇ m can be used.
  • a value of 5 ⁇ 10 15 cm ⁇ 3 can be used.
  • an injection step (S130) is performed as shown in FIG. Specifically, by using an oxide film formed by photolithography and etching as a mask, an impurity having a conductivity type of p type is implanted into the breakdown voltage holding layer 122, whereby the p region 123 is formed as shown in FIG. Form. Further, after removing the used oxide film, an oxide film having a new pattern is formed again by photolithography and etching. Then, by using the oxide film as a mask, an n-type conductive impurity is implanted into a predetermined region, thereby forming an n + region 124. Further, the p + region 125 is formed by injecting a p-type conductive impurity in the same manner. As a result, a structure as shown in FIG. 14 is obtained.
  • activation annealing is performed.
  • this activation annealing treatment for example, argon gas is used as an atmospheric gas, and conditions such as a heating temperature of 1700 ° C. and a heating time of 30 minutes can be used.
  • a gate insulating film formation step (S140) is performed as shown in FIG. Specifically, as illustrated in FIG. 15, an oxide film 126 is formed so as to cover the breakdown voltage holding layer 122, the p region 123, the n + region 124, and the p + region 125.
  • a condition for forming this oxide film 126 for example, dry oxidation (thermal oxidation) may be performed.
  • dry oxidation thermal oxidation
  • conditions for this dry oxidation conditions such as a heating temperature of 1200 ° C. and a heating time of 30 minutes can be used.
  • a nitrogen annealing step (S150) is performed as shown in FIG. Specifically, the annealing process is performed using nitrogen monoxide (NO) as the atmosphere gas.
  • NO nitrogen monoxide
  • the heating temperature is 1100 ° C. and the heating time is 120 minutes.
  • nitrogen atoms are introduced near the interface between the oxide film 126 and the underlying breakdown voltage holding layer 122, the p region 123, the n + region 124, and the p + region 125.
  • annealing using nitrogen monoxide as an atmospheric gas annealing using nitrogen monoxide as an atmospheric gas.
  • argon (Ar) gas which is an inert gas may be performed.
  • argon gas may be used as the atmosphere gas
  • the heating temperature may be 1100 ° C. and the heating time may be 60 minutes.
  • an electrode formation step (S160) is performed as shown in FIG. Specifically, a resist film having a pattern is formed on the oxide film 126 by using a photolithography method. Using the resist film as a mask, portions of the oxide film located on n + region 124 and p + region 125 are removed by etching. Thereafter, a conductor film such as a metal is formed so as to be in contact with n + region 124 and p + region 125 on the resist film and inside the opening formed in oxide film 126. Thereafter, by removing the resist film, the conductor film located on the resist film is removed (lifted off).
  • nickel (Ni) can be used as the conductor.
  • the source electrode 111 and the drain electrode 112 can be obtained.
  • an upper source electrode 127 (see FIG. 11) is formed on the source electrode 111. Further, a drain electrode 112 (see FIG. 11) is formed on the back surface of the substrate 102. In this way, the semiconductor device 101 shown in FIG. 11 can be obtained.
  • an upper source electrode 127 (see FIG. 11) is formed on the source electrode 111. Further, a drain electrode 112 (see FIG. 11) is formed on the back surface of the substrate 102. Further, the gate electrode 110 (see FIG. 11) is formed on the oxide film 126. In this way, the semiconductor device 101 shown in FIG. 11 can be obtained. That is, semiconductor device 101 is manufactured by forming an epitaxial layer and an electrode on SiC substrate 20 of silicon carbide substrate 1.
  • a vertical MOSFET has been described as an example of a semiconductor device that can be manufactured using a silicon carbide substrate manufactured by the method for manufacturing a silicon carbide substrate of the present invention.
  • the device is not limited to this.
  • various semiconductor devices such as JFET (Junction Field Effect Transistor), IGBT (Insulated Gate Bipolar Transistor), and Schottky barrier diode can be manufactured using the silicon carbide substrate of the present invention. It is.
  • the semiconductor device is manufactured by forming the epitaxial layer functioning as the active layer on the silicon carbide substrate having the (03-38) plane as the main surface has been described.
  • the crystal plane that can be used as the main surface is not limited to this, and any crystal plane according to the application including the (0001) plane can be used as the main surface.
  • a silicon carbide substrate was manufactured by changing the heating temperature in the heating vessel, the composition of the atmosphere, and the pressure of the atmosphere in the bonding step. And the experiment which investigates the impurity density of the junction area
  • the experimental procedure is as follows.
  • the base substrate has a disk shape with a diameter of 2 inches and a thickness of 300 ⁇ m, the plane orientation of the main surface is the (03-38) plane, the polytype is 4H—SiC, and the n-type impurity density is 2 ⁇ 10 19 cm ⁇ . 3.
  • a substrate made of silicon carbide having a micropipe density of 1 ⁇ 10 4 cm ⁇ 2 and a stacking fault density of 1 ⁇ 10 5 cm ⁇ 1 was prepared.
  • the SiC substrate the planar shape is a square with a side of 20 mm, the thickness is 300 ⁇ m, the principal surface has a (03-38) plane orientation, the polytype is 4H—SiC, and the density of n-type impurities.
  • a substrate made of silicon carbide having a density of 1 ⁇ 10 19 cm ⁇ 3 , a micropipe density of 0.2 cm ⁇ 2 , and a stacking fault density of less than 1 cm ⁇ 1 was prepared. Then, two SiC substrates were arranged side by side in a plan view on the base substrate to produce a laminated substrate.
  • the laminated substrate was charged into a heating container made of graphite. Then, the conditions of heating temperature 2000 ° C., atmospheric pressure 1 Torr (condition A), heating temperature 1800 ° C., atmospheric pressure 1 Torr (condition B), heating temperature 2000 ° C., atmospheric pressure 10 Torr (condition C) Under the three conditions, the laminated substrate was heated in the heating vessel with the atmosphere in the heating vessel being a mixed atmosphere of nitrogen and argon, thereby producing a silicon carbide substrate.
  • the nitrogen concentration in the atmosphere was set to seven levels of 0% (argon atmosphere), 1%, 5%, 10%, 20%, 50% and 100% (nitrogen atmosphere). And the impurity density in the junction area
  • a silicon carbide substrate is manufactured by heating in an atmosphere containing nitrogen as compared with a case where heating is performed in an atmosphere not containing nitrogen (when the nitrogen concentration is 0%). It can be seen that the impurity density increases. In addition, the impurity density in the junction region increases as the nitrogen concentration in the atmosphere increases. Furthermore, comparing Table 1 and Table 2, it can be seen that the impurity density of the reaction layer decreases as the heating temperature decreases. This is considered to be because the reactivity of nitrogen becomes low as the heating temperature becomes low. Further, comparing Table 1 and Table 3, by increasing the atmospheric pressure, the impurity density of the reaction layer is lowered when the nitrogen concentration is low (specifically, less than 10%). This is considered to be because the sublimation speed of the base substrate was lowered.
  • a silicon carbide substrate capable of reducing the manufacturing cost of a semiconductor device using the silicon carbide substrate can be manufactured. That is, the silicon carbide substrate according to the present invention is manufactured by the above-described method for manufacturing a silicon carbide substrate of the present invention.
  • a semiconductor device can be manufactured using the silicon carbide substrate of the present invention. That is, in the semiconductor device of the present invention, the epitaxial growth layer as the active layer is formed on the silicon carbide substrate manufactured by the method for manufacturing the silicon carbide substrate of the present invention.
  • the epitaxial growth layer as an active layer is formed in the semiconductor device of this invention on the silicon carbide substrate of the said invention. More specifically, the semiconductor device of the present invention includes the silicon carbide substrate of the present invention, an epitaxial growth layer formed on the silicon carbide substrate, and an electrode formed on the epitaxial growth layer.
  • the method for manufacturing a silicon carbide substrate of the present invention can be particularly advantageously applied to a method for manufacturing a silicon carbide substrate that is required to improve the manufacturing efficiency of a semiconductor device by being used for manufacturing a semiconductor device.

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Abstract

L'invention porte sur un procédé pour la production d'un substrat en carbure de silicium, comprenant une étape consistant à préparer un substrat en SiC (20) comprenant du carbure de silicium monocristallin, une étape consistant à placer une source de carbure de silicium (10) de façon à faire face à une surface principale (20B) du substrat en SiC (20) et une étape consistant à chauffer la source de carbure de silicium (10) pour former une couche de base comprenant du carbure de silicium de façon à ce que la couche de base soit en contact avec une surface principale (20B) du substrat en SiC (20), la source de carbure de silicium (10) étant chauffée dans une atmosphère contenant de l'azote dans l'étape de formation de la couche de base.
PCT/JP2010/066784 2010-01-15 2010-09-28 Procédé pour la production de substrat en carbure de silicium WO2011086734A1 (fr)

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