Classifications

• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B82—NANOTECHNOLOGY
  • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
  • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
  • H10D12/211—Gated diodes
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
  • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
  • H10D62/117—Shapes of semiconductor bodies
  • H10D62/118—Nanostructure semiconductor bodies

Definitions

• the present invention relates generally to semiconductor device structures and, more particularly, to an indirectly induced tunnel emitter for tunnel field effect transistor (TFET) devices.
• TFET tunnel field effect transistor
• Microelectronic devices are typically fabricated on semiconductor substrates as integrated circuits, which include complementary metal oxide
• CMOS complementary metal-oxide-semiconductor
• TFETs tunnel field effect transistors
• an indirectly induced tunnel emitter for a tunneling field effect transistor (TFET) structure includes an outer sheath that at least partially surrounds an elongated core element, the elongated core element formed from a first semiconductor material; an insulator layer disposed between the outer sheath and the core element; the outer sheath disposed at a location corresponding to a source region of the TFET structure; and a source contact that shorts the outer sheath to the core element; wherein the outer sheath is configured to introduce a carrier concentration in the source region of the core element sufficient for tunneling into a channel region of the TFET structure during an on state.
• TFET tunneling field effect transistor
• a method of forming an indirectly induced tunnel emitter for a tunneling field effect transistor (TFET) structure includes forming an elongated core element from a first semiconductor material; forming an insulator layer that at least partially surrounds the core element; forming an outer sheath that at least partially surrounds the insulator layer at a location corresponding to a source region of the TFET structure; and forming a source contact that shorts the outer sheath to the core element; wherein the outer sheath is configured to introduce a carrier concentration in the source region of the core element sufficient for tunneling into a channel region of the TFET structure during an on state.
• TFET tunneling field effect transistor
• Figure 1 is a band diagram that illustrates electron tunneling across a P/N junction of a TFET
• Figure 2 is a band diagram for a TFET device having a staggered band heterojunction in the "on" state
• Figure 3 is a band diagram for a TFET device having a staggered band heterojunction in the "off state
• Figure 4 is a cut-away sectional view of a source region of a TFET device wherein holes are induced in a nanowire by a surrounding metal sheath that is separated from the nanowire by a thin insulator layer;
• Figure 5 (a) is a side cross-sectional views of a TFET structure having an
• HTE Indirectly Induced Tunnel Emitter
• Figure 5(b) is an end cross-sectional view of the IITE, taken along the lines b-b of Figure 5 (a);
• Figure 6 is a partial band diagram illustrating the valence bands for an exemplary n-channel TFET as shown in Figures 5(a) and 5(b);
• Figure 7 (a) is another side cross-sectional view of the TFET structure of
• Figure 7(b) is a band diagram corresponding to the structure of Figure
• Figure 8 is a generic band diagram of a heterojunction tunneling emitter where the bands correspond to conduction band convention and are inverted with respect 6.
• FIG. 1 is a band diagram that illustrates this process for a simple P/N junction, wherein the "P" side represents the source region and the "N" side represents the channel of a TFET.
• the "on" state (as indicated by the darkened curves denoting the bands) electrons can tunnel from the valence band in the source to the conduction band in the channel.
• junction arrangement for a TFET device is what is known as a staggered band heterojunction line up, illustrated in the band diagrams of Figures 2 and 3.
• the energy bands in the source and channel regions are offset from one another so as to allowing switching from the "on" state in Figure 2 to the "off state in Figure 3 with much smaller longitudinal electric fields.
• a primary objective of TFET use is to achieve switching from "on" to
• band diagrams of Figures 2 and 3 also illustrate several factors that serve to increase S and degrade the performance of the TFET.
• degeneracy in the source region (a) in Figure 2) reduces the states available for tunneling, thereby reducing the "on” current.
• band bending region (b) in Figure 2) increases the gate voltage needed to turn on the TFET.
• band bending regions (c) and (d) in Figure 3) increases the voltage swing required to turn off the TFET and leaves potential wells in the valence and conduction bands.
• thermal tails can cause a reversion to the 60 mV/decade slope when tunneling from the wells, band-to-band transfer by multiphonon processes (region (e) of Figure 3), or band-to-band transfer via tunneling by gap states (region (f) of Figure 3).
• Figure 4 is a cut-away sectional view of a source region of a TFET device 400 where, in this example, holes are induced in a nanowire 402 by way of a surrounding metal sheath 404 that is separated from the nanowire 402 by a thin insulator layer 406, similar to a gate conductor and gate dielectric layer of an FET.
• the interface states at the insulator-nanowire boundary may provide additional tunneling paths, and metal-induced gap states may be induced by the close proximity of the sheath 404 to the channel.
• Figures 5(a) and 5(b) are side and end cross-sectional views, respectively, of a TFET structure 500 having what is referred to herein as an Indirectly Induced Tunnel Emitter (HTE), in accordance with an exemplary embodiment of the invention.
• the IITE includes a elongated core element 502 (e.g., a nanowire) formed from a first semiconductor material (Sl), an insulator layer 504 formed from a second semiconductor material (S2) that surrounds the nanowire, the second
• S4 could all be epitaxially grown semiconductors forming heterojunctions at their interfaces. This could reduce or eliminate interface states, which represent a problem for TFET structures such as the one shown in Figure 4. Because the outer sheath 506 is also a doped semiconductor (S3), metal induced gap states (MIGS) are also eliminated. Further, the TFET structure shown in Figures 5 (a) and 5(b) may be simplified by using the same semiconductor material for Sl, S3 and S4.
• the exemplary embodiment depicted illustrates a concentric circular configuration for the core element, insulator and outer sheath
• the cross-sectional shapes of the individual element may be other shapes besides circular, such as elliptical, oval, square or rectangular, for example.
• the illustrated embodiment depicts layers completely surrounding other layers (e.g., the insulator layer 504 surrounding the core element 502), it is also contemplated that an outer layer of the structure can partially surround an inner layer of the structure, such as an omega ( ⁇ ) shape, for example.
• the core element 502 in addition to a nanowire structure element, could also be formed from other structures such as a semiconductor fin or a carbon nanotube, for example.
• FIG. 6 there is shown a partial band diagram 600 illustrating the valence bands for an exemplary n-channel TFET as shown in Figures 5(a) and 5(b), cutting across the circular cross section.
• Eoi and E 03 are the ground state sub-band energies in regions 1 and 3, respectively, and Vs is the Fermi energy (source voltage).
• the bandgaps of S1-S3 are assumed to be wide enough so that the conduction bands in the emitter do not play a role in its operation.
• the band alignments and thickness of the layers are adjusted to achieve a configuration such that the ground-state energies Eoi and E 03 ensure that the holes in Sl are barely degenerate while S3 has a much larger hole concentration.
• the same screening advantages may be obtained as in the metal-sheathed TFET structure 400 of Figure 4.
• S3 may be replaced with a metal sheath (as in Figure 4), so long as the work functions and band-offsets are adjusted to ensure a suitable hole concentration in Sl.
• S3 may be coated with an additional metal layer (not shown) to improve screening.
• the exemplary IITE embodiments disclosed herein are equally applicable for a complementary tunneling-hole injector by replacing all p-type semiconductors with n-type semiconductors, and ensuring a suitable conduction band line up as shown in Figure 6, but inverted.
• Figures 7 (a) and 7(b) are depicted schematically in Figures 7 (a) and 7(b), wherein Figure 7(a) is another side cross-sectional view of the TFET structure of Figure 5(a), and Figure 7(b) is a band diagram corresponding to the structure of Figure 7(a).
• the outer doped sheath (S3) provides longitudinal screening and reduces band-bending.
• the doping-induced states and degeneracy conditions in S3 are isolated from the injector core (Sl) by S2.
• the semiconductor bandgap of S3 minimizes metal induced gap states.
• epitaxial compatible materials Sl -S3 eliminates interface states due to a single crystal structure.
• the source contact layer S4 eliminates the need for an extra external contact to the sheath.
• Figure 8 is a generic band diagram 800 of a heterojunction tunneling emitter where the bands correspond to conduction band convention and are inverted with respect to Figure 6. That is, the band diagram 800 is drawn in the radial direction and with energy of the charge carrier upwards, as is the convention for electrons in conduction bands (whereas for holes the convention is downwards, as shown in Figure 6.
• E b3 must be sufficiently larger than Eu, or when Eu is greater than E b3 the difference must be sufficiently small, in order to satisfy condition 2.
• the conditions for S4 are not critical. S4 must have heavy enough doping or a small enough bandgap to ensure a good ohmic contact with both Sl and S3. Sl and S3 may also be doped adjacent to S4 to ensure an ohmic contact. In this case, S4 may be a metal.
• suitable selected semiconductor materials are as follows: InAs o 8 ? o 2 for Si, InP for S 2 and InAs for S 3 and for S 4 .
• the radii of Si, S 2 and S 3 are 30, 40 and 50nm respectively.
• Si and S 4 are doped with silicon to a concentration of 10 19 atoms/cm 3 , ensuring a good ohmic contact of S 3 to Si via S 4 and that Eq. 1 above is satisfied. That equation becomes:

Landscapes

• Engineering & Computer Science (AREA)
• Chemical & Material Sciences (AREA)
• Nanotechnology (AREA)
• Crystallography & Structural Chemistry (AREA)
• Physics & Mathematics (AREA)
• Mathematical Physics (AREA)
• Theoretical Computer Science (AREA)
• Bipolar Transistors (AREA)
• Thin Film Transistor (AREA)

Priority Applications (4)

Applications Claiming Priority (2)

Publications (1)

Family

ID=43127353

Family Applications (1)

Country Status (7)

Cited By (3)

Families Citing this family (8)

Citations (2)

Family Cites Families (6)

• 2009
  • 2009-08-31 US US12/550,857 patent/US8288803B2/en active Active
• 2010
  • 2010-06-28 TW TW099121078A patent/TWI463653B/zh active
  • 2010-08-30 CN CN201080038343.7A patent/CN102484132B/zh active Active
  • 2010-08-30 DE DE112010003495T patent/DE112010003495B4/de active Active
  • 2010-08-30 GB GB1200880.1A patent/GB2485495B/en not_active Expired - Fee Related
  • 2010-08-30 WO PCT/IB2010/053884 patent/WO2011024152A1/en not_active Ceased
  • 2010-08-30 JP JP2012526177A patent/JP5501463B2/ja not_active Expired - Fee Related

Patent Citations (2)

Also Published As

Similar Documents

Legal Events