WO2011020260A1 - 一种dpsk接收机中解调器相位锁定的装置和方法 - Google Patents

一种dpsk接收机中解调器相位锁定的装置和方法 Download PDF

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WO2011020260A1
WO2011020260A1 PCT/CN2009/075326 CN2009075326W WO2011020260A1 WO 2011020260 A1 WO2011020260 A1 WO 2011020260A1 CN 2009075326 W CN2009075326 W CN 2009075326W WO 2011020260 A1 WO2011020260 A1 WO 2011020260A1
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demodulator
phase
dpsk
feedback signal
receiver
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PCT/CN2009/075326
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English (en)
French (fr)
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沈百林
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中兴通讯股份有限公司
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Publication of WO2011020260A1 publication Critical patent/WO2011020260A1/zh

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/60Receivers
    • H04B10/66Non-coherent receivers, e.g. using direct detection
    • H04B10/67Optical arrangements in the receiver
    • H04B10/676Optical arrangements in the receiver for all-optical demodulation of the input optical signal
    • H04B10/677Optical arrangements in the receiver for all-optical demodulation of the input optical signal for differentially modulated signal, e.g. DPSK signals

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  • the present invention relates to the field of optical communication technologies, and in particular, to a device and method for phase locking of a demodulator in a DPSK receiver. Background technique
  • the differential phase shift keying (DPSK) modulation pattern is superior to the traditional intensity modulation based pattern, and has been widely studied and applied in high speed and long distance optical transmission.
  • the phase modulation technique achieves signal reception through two methods: coherent demodulation and self-coherent detection.
  • coherent demodulation is more complicated, and the self-coherent detection method is relatively simple: using a delay-interferometer (DLI) as a demodulator (Demodulator), and then using a balanced receiver (BR, Balanced Receiver) to implement signals.
  • DLI delay-interferometer
  • BR Balanced Receiver
  • the demodulator must ensure that the phase matching, that is, the wavelength of the demodulator is the same as the wavelength of the input signal, otherwise the transmission performance will be seriously damaged; generally, the control circuit of the demodulator is used to change the length of one arm of the demodulator by temperature. Change the phase.
  • the phase of the demodulator in the DPSK receiver needs to be accurately locked to 0 or ⁇ for best performance.
  • the phase locking scheme includes two steps of phase coarse adjustment and phase fine adjustment.
  • the coarse phase adjustment can use the two currents of the balanced receiver as feedback information. When the current ratio is maximum, the phase is roughly locked.
  • the phase trimming can use the error rate information before error correction. When the bit error rate is the smallest, it is realized. Precise locking of the phase.
  • a method of controlling the demodulator is proposed: a peak detecting device for detecting the peak value of the amplified electrical signal; a delay control module connected between the fiber decoder and the peak detecting device When the peak detecting device does not detect the peak value of the electrical signal amplified by the limiting amplifier, it controls the delay time of the fiber decoder. This is to adjust the demodulator by using the amplitude of the amplitude of the electrical signal after photoelectric conversion.
  • the peak monitoring is subject to dispersion. Greater impact.
  • European Patent No. EP1643665A1 entitled “Control of delay line interferometer”, proposes an apparatus and method for adjusting a demodulator using error correction information of FEC (Forward Error Correction).
  • FEC Forward Error Correction
  • the specific implementation of the phase locking based on the error correction information before the error and the software algorithm are relatively complicated, and the coordination with other optimization adjustment controls needs to be considered. Summary of the invention
  • the main object of the present invention is to provide a device and method for demodulator phase locking in a DPSK receiver, which can realize the fusion of the demodulator phase coarse adjustment and fine adjustment in the DPSK receiver, and greatly optimize the DPSK receiver. Control plan.
  • the present invention provides a device for phase locking of a demodulator in a DPSK receiver, comprising: a demodulator, a balanced receiver, a multiplier, and a demodulator control unit, wherein
  • the demodulator is configured to demodulate a differential phase shift keying (DPSK) optical signal and send the signal to the balanced receiver;
  • DPSK differential phase shift keying
  • the balanced receiver is configured to convert the demodulated two DPSK optical signals into monitoring electrical signals, and separately separate a part of the monitoring electrical signals from the two monitoring electrical signals, send them to the multiplier, and monitor another part.
  • the electrical signal is differentially amplified and output;
  • the multiplier performs multiplication operation on two monitoring electrical signals sent by the balanced receiver, and sends the operation result as a feedback signal to the demodulator control unit;
  • a demodulator control unit configured to monitor a feedback signal output by the multiplier, and according to The feedback signal directs the phase adjustment direction of the demodulator.
  • the demodulator control unit includes:
  • a temperature control circuit configured to adjust a phase of the demodulator by using the feedback information.
  • the temperature control circuit is further configured to analyze whether the phase of the demodulator is locked, and when not locked, adjust a phase control parameter of the demodulator until Phase lock
  • the phase lock of the demodulator is determined when the feedback signal tends to zero or is less than a predetermined threshold.
  • the temperature control circuit is further configured to implement a phase shift of the demodulator by controlling a temperature of the demodulator;
  • the temperature control of the demodulator is achieved by a heater; the phase shift of the demodulator is proportional to the square of the voltage value of the heater.
  • the demodulator is further configured to demodulate the DPSK optical signal into an interference phase optical signal and an interference phase extinction signal.
  • the balanced receiver includes a photodetector and a differential amplifier, wherein
  • the photodetector is configured to convert the demodulated two DPSK optical signals into monitoring electrical signals, and separately separate a part of the monitoring electrical signals from the two monitoring electrical signals, and send the signals to the multiplier, and the other A part of the monitoring electrical signal is sent to the differential amplifier;
  • the differential amplifier is configured to convert the monitored electrical signal into a non-return-to-zero code differential electrical signal for output.
  • the invention also provides a method for phase locking of a demodulator in a DPSK receiver, the method comprising:
  • Step A Converting the demodulated two DPSK optical signals into monitoring electrical signals, and separately separating a part of the monitoring electrical signals from the two monitoring electrical signals, and sending them to the multiplier, and the other part
  • the monitoring electrical signal is differentially amplified and output;
  • Step B The multiplier performs a multiplication operation on the two monitoring electrical signals, and outputs the operation result as a feedback signal;
  • Step C monitoring the feedback signal output by the multiplier, and guiding the phase adjustment direction of the demodulator according to the feedback signal.
  • the phase adjustment direction of the demodulator is guided according to the feedback signal: analyzing whether the phase of the demodulator is locked, and when not locking, adjusting the phase control parameter of the demodulator until the phase is locked .
  • phase lock is determined.
  • the phase shift of the demodulator is achieved by controlling the temperature of the demodulator; the temperature control of the demodulator is implemented by a heater; the phase shift of the demodulator is proportional to the square of the voltage value of the heater.
  • the apparatus and method for demodulator phase locking in a DPSK receiver converts two demodulated DPSK optical signals into electrical signals, and separately separates a part of the monitoring electrical signals from the two electrical signals,
  • the multiplier multiplies the two monitoring electrical signals, and outputs the operation result as a feedback signal. Based on the detection of the feedback signal, the phase adjustment of the demodulator can be realized; and another part of the monitoring electrical signal performs differential amplification. After the output. In this way, the input optical power variation and the detection current are prevented from causing the demodulator erroneous adjustment effect due to the data pattern change; and the solution of the present invention does not require error correction pre-error information, and thus does not optimize other DPSK receivers.
  • the control algorithm generates aliasing interference, directly realizes the fusion of the demodulator phase coarse adjustment and fine adjustment in the DPSK receiver, greatly optimizes the DPSK receiver control scheme, and greatly improves the engineering practicability of the DPSK system.
  • Figure 1 is a schematic structural diagram of a DPSK system receiver
  • FIG. 2 is a schematic structural diagram of an apparatus for phase locking of a demodulator in a DPSK receiver according to the present invention
  • 3 is a flow chart of a method for phase locking of a demodulator in a DPSK receiver of the present invention.
  • FIG. 2 is a schematic diagram showing the structure of a device for phase locking of a demodulator in a DPSK receiver of the present invention, the device comprising: a demodulator 10, a balanced receiver 20, a multiplier 30 and a demodulator control unit 40.
  • the demodulator 10 is configured to demodulate the DPSK optical signal into an interference phase optical signal and an interference phase cancellation optical signal, and send the signal to the balanced receiver 20.
  • the demodulator 10 can use a free space Michelson interferometer or a fiber optic Mach Zehnder interferometer, both of which are mature optical device products.
  • the demodulator 10 can achieve phase shifting by temperature control, which is implemented by the heater, i.e., the phase shift of the demodulator 10 is proportional to the square of the voltage across the heater.
  • the balanced receiver 20 includes a photodetector 21 (PD1) and a photodetector 22 (PD2) and a differential amplifier 23.
  • the demodulated interference phase long optical signal and the interference phase extinction signal are respectively converted into monitoring electrical signals by two photodetectors (PD1, PD2), and a part of the monitoring electrical signals are separately separated from the two monitoring electrical signals, and sent.
  • To the multiplier 30; another part of the monitoring electrical signal is sent to the differential amplifier 23 to be converted into a non-return-to-zero (NRZ) differential electrical signal and output.
  • the transmission paths of the two monitoring electrical signals sent to the multiplier 30 should be as equal as possible to avoid additional phase errors.
  • the demodulator 10 and the balanced receiver 20 can be two separate optical devices or they can be integrated.
  • the multiplier 30 multiplies the two monitoring electrical signals sent from the balanced receiver 20 and transmits the result of the operation to the demodulator control unit 40.
  • the multiplier 30 can use the ANALOG DEVICES AD835 chip with a bandwidth of 250 MHz.
  • the multiplier 30 transmits the result of multiplication of the two monitoring electrical signals as a feedback signal
  • the demodulator control unit 40 is provided.
  • the demodulator control unit 40 is configured to monitor the feedback signal output by the multiplier 30 and use the feedback signal to guide the phase adjustment direction of the demodulator 10.
  • the demodulator control unit 40 further includes a digital analog converter 41 for monitoring the feedback signal, and a temperature control circuit 42 for adjusting the phase of the demodulator 10 with feedback information, specifically
  • the implementation is: analyzing whether the phase of the demodulator 10 is locked, adjusting the phase control parameter of the demodulator 10 until the phase is locked when the lock is not locked; determining the demodulator 10 when the feedback signal tends to be 0 or less than a predetermined threshold Phase locked.
  • the temperature control circuit 42 can also implement the phase shift of the demodulator by controlling the temperature of the demodulator; wherein the temperature control for the demodulator 10 can be implemented based on a heater on the demodulator 10, the demodulator 10
  • the phase offset is proportional to the square of the heater's voltage value.
  • the above feedback signal is generated as follows:
  • the two outputs of the demodulator 10 are:
  • ⁇ ⁇ denotes the DPSK signal at time t
  • E t -r denotes a DPSK signal delayed by 1 bit, which is the phase of the DPSK signal
  • denotes a complex number, where the frequency dependent term ⁇ is ignored.
  • the phase difference ⁇ ⁇ ) - ⁇ ) of the adjacent bits of the DPSK signal, the value is 0 or ⁇ , and the phase error is set to 4.
  • the output signal of the multiplier 30 is used as a feedback signal of the demodulator control unit 40, and the output of the electrical signal from the photodetectors (PD1, PD2) is detected as a square rate, that is, the square of the absolute value of the signal, and the signal is expressed in a plural form.
  • the two channels are respectively cross-multiplied to eliminate the influence of the time t. Considering that the phase difference of the adjacent bits of the DPSK signal is 0 or ⁇ , the feedback signal related only to the phase error is obtained, and the derivation process of the feedback signal is as follows: formula: O
  • the method for realizing the phase lock of the demodulator in the DPSK receiver is as shown in FIG. 3, and includes the following steps:
  • Step 100 Demodulate the DPSK optical signal and convert it into a monitoring electrical signal by two photodetectors, and separate a part of the monitoring electrical signal from the two monitoring electrical signals, send it to the multiplier, and perform another part of the monitoring electrical signal. Differential amplification and output.
  • Step 200 The multiplier performs multiplication operation on the two monitoring electrical signals, and outputs the operation result as a feedback signal;
  • Step 300 Monitor the feedback signal output by the multiplier, and guide the phase adjustment direction of the demodulator according to the feedback signal.
  • step 300 the phase adjustment direction of the demodulator is guided according to the feedback signal: whether the phase is locked or not, and when not locked, the phase control parameter of the demodulator is adjusted until the phase is locked.
  • the feedback signal tends to zero or is less than a predetermined threshold, it indicates phase lock.
  • the phase shift is controlled by controlling the temperature of the demodulator, which is implemented by a heater whose phase shift is proportional to the square of the voltage across the heater.
  • the apparatus and method for demodulating the phase of the demodulator in the DPSK receiver avoids the change of the input optical power and the error of the detection current due to the change of the data pattern due to the change of the demodulator phase compared with the prior art.
  • the effect is that no error correction information is needed before error correction, and no aliasing interference is generated for other optimal control algorithms of the DPSK receiver, which directly realizes the fusion of the demodulator phase coarse adjustment and fine adjustment in the DPSK receiver, and greatly optimizes the DPSK.
  • the receiver control scheme greatly improves the engineering practicability of the DPSK system.

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  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
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Abstract

本发明公开了一种DPSK接收机中解调器相位锁定的装置和方法,其中,解调器,用于将差分相移键控(DPSK)光信号进行解调后发送至平衡接收机;平衡接收机,用于将解调后的两路DPSK光信号转换为电信号,并分别从两路电信号中分离出一部分监测电信号,发送至乘法器,将另一部分监测电信号进行差分放大后输出;乘法器,对平衡接收机发出的两路监测电信号进行相乘运算,并将运算结果作为反馈信号发送至解调器控制单元;解调器控制单元,用于监测乘法器输出的反馈信号,并根据反馈信号指导解调器的相位调整方向。通过本发明,可以直接实现DPSK接收机中解调器相位粗调和微调的融合,极大地优化了DPSK接收机控制方案。

Description

一种 DPSK接收机中解调器相位锁定的装置和方法 技术领域
本发明涉及光通信技术领域, 特别涉及一种 DPSK接收机中解调器相 位锁定的装置和方法。 背景技术
差分相移键控 ( DPSK, Differential Phase Shift Keying )调制码型比传 统的基于强度调制的码型更优越, 目前在高速、 长距离光传输中获得了广 泛的研究和应用。 相位调制技术通过相干解调和自相干探测两种方法实现 信号的接收。 其中, 相干解调实现较复杂, 自相干探测法相对简单: 利用 延迟干涉仪(DLI, Delay-interferometer )作为解调器(Demodulator ), 然后 再利用平衡接收机(BR, Balanced Receiver )实现信号的恢复,如图 1所示。 DPSK系统解调器的相位对系统性能影响显著, 可参考 A.H.Gnauck的论文 "Optical Phase-Shift-Keyed Transmission" ( JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 23 , NO. 1 , JANUARY 2005 )„ DPSK接收机的解 调器必须保证相位匹配、 即解调器的波长与输入信号的波长一致, 否则会 导致传输性能损伤严重; 一般利用解调器的控制电路, 通过温度改变解调 器其中一臂的长度来改变相位。 DPSK接收机中解调器的相位需精确锁定为 0或 π, 以实现最好的性能。
目前, 相位锁定方案包括相位粗调和相位微调两步骤。 相位粗调可利 用平衡接收机的两路电流作为反馈信息, 当电流比最大时即实现了相位的 粗略锁定; 相位微调可利用纠错前误码率信息, 当误码率最小时即实现了 相位的精确锁定。
公开号为 CN200710143877.6、发明名称为" DPSK光调制信号接收装置 和方法" 的中国专利, 提出了一种如何控制解调器的方法: 峰值检测装置, 用于检测被放大的电信号的峰值; 延时控制模块, 连接在光纤解码器和峰 值检测装置之间, 当峰值检测装置检测不到由限幅放大器放大的电信号的 峰值时, 控制光纤解码器的延迟时间。 这是利用光电转换后电信号幅度峰 值来调整解调器。 但是, 峰值监测受色散影响较大。
公开号为 EP1643665A1 、 发明名称为 "Control of delay line interferometer"的欧洲专利, 提出了一种利用前向纠错 ( FEC , Forward Error Correction )误码信息来调整解调器的装置和方法。 但是, 该专利中基于纠 错前误码信息的相位锁定的具体实现和软件算法相对较复杂, 并且需要考 虑和其他优化调整控制的协调。 发明内容
有鉴于此, 本发明的主要目的在于提供一种 DPSK接收机中解调器相 位锁定的装置和方法, 能够实现 DPSK接收机中解调器相位粗调和微调的 融合, 极大地优化了 DPSK接收机控制方案。
为达到上述目的, 本发明的技术方案是这样实现的:
本发明提供了一种 DPSK接收机中解调器相位锁定的装置, 包括: 解 调器、 平衡接收机、 乘法器、 和解调器控制单元, 其中,
所述解调器, 用于将差分相移键控(DPSK )光信号进行解调后发送至 所述平衡接收机;
所述平衡接收机, 用于将解调后的两路 DPSK光信号转换为监测电信 号, 并分别从两路监测电信号中各分离出一部分监测电信号, 发送至乘法 器, 将另一部分监测电信号进行差分放大后输出;
所述乘法器, 对所述平衡接收机发出的两路监测电信号进行相乘运算, 并将运算结果作为反馈信号发送至解调器控制单元;
所述解调器控制单元, 用于监测所述乘法器输出的反馈信号, 并根据 所述反馈信号指导所述解调器的相位调整方向。
其中, 所述解调器控制单元包括:
数字模拟转化器, 用于监测所述反馈信号;
温度控制电路, 用于利用所述反馈信息调整所述解调器的相位。
根据所述反馈信号指导解调器的相位调整方向时, 所述温度控制电路 进一步用于, 分析所述解调器的相位是否锁定, 在未锁定时, 调整解调器 的相位控制参数, 直到相位锁定;
所述反馈信号趋于 0或者小于预定阀值时, 确定所述解调器的相位锁 定。
所述温度控制电路, 进一步用于通过控制解调器的温度实现解调器的 相位偏移;
所述解调器的温度控制通过加热器实现; 所述解调器的相位偏移与所 述加热器的电压值平方成正比。
所述解调器, 进一步用于将 DPSK光信号解调为干涉相长光信号和干 涉相消光信号。
所述平衡接收机包括光探测器和差分放大器, 其中,
所述光探测器, 用于将所述解调后的两路 DPSK光信号转换为监测电 信号, 并分别从两路监测电信号中各分离出一部分监测电信号, 发送至乘 法器, 将另一部分监测电信号发送至差分放大器;
所述差分放大器, 用于将所述监测电信号转化非归零码差分电信号后 输出。
本发明还提供了一种 DPSK接收机中解调器相位锁定的方法, 该方法 包括:
步骤 A: 将解调后的两路 DPSK光信号转换为监测电信号, 并分别从 两路监测电信号中各分离出一部分监测电信号, 发送至乘法器, 将另一部 分监测电信号进行差分放大后输出;
步骤 B: 乘法器对所述两路监测电信号进行相乘运算, 并将运算结果 作为反馈信号输出;
步骤 C: 监测所述乘法器输出的反馈信号, 并根据所述反馈信号指导 解调器的相位调整方向。
在所述步骤 C中, 根据所述反馈信号指导解调器的相位调整方向为: 分析所述解调器的相位是否锁定, 在未锁定时, 调整解调器的相位控制参 数, 直到相位锁定。
分析所述解调器的相位是否锁定为: 所述反馈信号趋于 0或者小于预 定阀值时, 确定相位锁定。
通过控制解调器的温度实现解调器的相位偏移; 所述解调器的温度控 制通过加热器实现; 解调器的相位偏移与加热器的电压值平方成正比。
本发明所提供的 DPSK接收机中解调器相位锁定的装置和方法, 将解 调后的两路 DPSK光信号转换为电信号, 并分别从两路电信号中分离出一 部分监测电信号, 由乘法器对这两路监测电信号进行相乘运算, 并将运算 结果作为反馈信号输出, 基于对该反馈信号的检测, 可以实现解调器的相 位调整; 而另一部分监测电信号则进行差分放大后输出。 如此, 避免了输 入光功率变化和检测电流因数据图案变化而导致解调器误调整效果; 并且, 本发明的方案不需要纠错前误码信息, 因此也不会对 DPSK接收机的其他 优化控制算法产生混叠干扰, 直接实现了 DPSK接收机中解调器相位粗调 和微调的融合, 极大地优化了 DPSK接收机控制方案, 大大提高了 DPSK 系统的工程实用性。 附图说明
图 1为 DPSK系统接收机原理结构图;
图 2为本发明 DPSK接收机中解调器相位锁定的装置的结构示意图; 图 3为本发明 DPSK接收机中解调器相位锁定的方法的流程图。 具体实施方式 下面通过具体的实施例来详细描述本发明的 DPSK接收机中解调器相 位锁定的装置和方法。
如图 2所示为本发明的 DPSK接收机中解调器相位锁定的装置的结构 示意图, 该装置包括: 解调器 10、 平衡接收机 20、 乘法器 30和解调器控 制单元 40。
其中, 解调器 10, 用于将 DPSK光信号解调为干涉相长光信号和干涉 相消光信号, 并发送至平衡接收机 20。 其中, 解调器 10可以釆用自由空间 迈克尔逊干涉仪, 也可以釆用光纤马赫泽德干涉仪, 两者均为成熟的光器 件产品。 另外, 解调器 10可以通过温度控制实现相位偏移, 温度控制由加 热器实现, 也就是解调器 10的相位偏移与加热器上的电压值平方成正比。
平衡接收机 20, 包括光电探测器 21 ( PD1 )和光电探测器 22 ( PD2 ) 以及差分放大器 23。 上述解调后的干涉相长光信号和干涉相消光信号分别 通过两个光电探测器(PD1、 PD2 )转换为监测电信号, 并从两路监测电信 号中分别分离出一部分监测电信号, 发送至乘法器 30; 将另外一部分监测 电信号送入差分放大器 23转化为非归零码(NRZ )差分电信号后输出。 其 中, 发送至乘法器 30的两路监测电信号的传输路径应尽量相等, 以避免产 生额外的相位误差。
另外, 解调器 10和平衡接收机 20可以是两个分离式光器件, 也可以 集成在一起。
乘法器 30, 对平衡接收机 20发出的两路监测电信号进行相乘运算, 并 将运算结果发送至解调器控制单元 40。
乘法器 30可釆用 ANALOG DEVICES公司的 AD835 芯片, 带宽为 250MHz。 乘法器 30将两路监测电信号的相乘运算结果作为反馈信号发送 给解调器控制单元 40。
解调器控制单元 40, 用于监测乘法器 30输出的反馈信号, 并利用该反 馈信号指导解调器 10的相位调整方向。 解调器控制单元 40进一步包括数 字模拟转化器 41和温度控制电路 42, 其中, 数字模拟转换器 41用于监测 反馈信号; 温度控制电路 42用于利用反馈信息调整解调器 10的相位, 具 体实现为: 分析解调器 10 的相位是否锁定, 在未锁定时, 调整解调器 10 的相位控制参数, 直到相位锁定; 反馈信号趋于 0或者小于预定阀值时, 确定解调器 10的相位锁定。
另外, 温度控制电路 42还可以通过控制解调器的温度实现解调器的相 位偏移; 其中, 对于解调器 10的温度控制可以基于解调器 10上的加热器 实现, 解调器 10的相位偏移与加热器的电压值平方成正比。
上述反馈信号的产生原理如下:
根据 DPSK的解调理论, 解调器 10的两路输出: 干涉相长光信号和干 涉相消光信号为:
Figure imgf000008_0001
其中, ^) = ^Μ表示在 t时刻的 DPSK信号, E t -r)表示延迟 1比 特的 DPSK信号, 为 DPSK信号的相位, ·表示复数, 此处忽略了频 率相关项 ^ 。
DPSK信号相邻比特的相位差 Δ = ^) - Γ) , 取值为 0或 π, 4叚设相 位误差为 。乘法器 30的输出信号作为解调器控制单元 40的反馈信号,监 测电信号从光电探测器(PD1、 PD2 )的输出为平方率检波, 即信号绝对值 的平方, 将信号表述为复数形式, 分别将两路进行交叉相乘, 消除时间 t 的影响,考虑到 DPSK信号的相邻比特的相位差为 0或 π, 最后得出仅与相 位误差相关的反馈信号, 反馈信号的推导过程具体如下式: O
-
Figure imgf000009_0001
2 (i-T)+j2S _ ]2φ ή 2φ(ή■
e ― e
= 1 + 1 _ eJM'-T)-j t)+j2S _ e 2cp{t-T)+j2cp{t)-j2d
= 2 - 2 cos (2A^ - 2^)
= 4 sin2 (Δ^ - ^)
= 4 sin2 (S) 可以看出, 当相位误差为 0时, 即解调器 10相位锁定, 乘法器 30的 输出反馈信号也为 0。 随着相位误差增加, 乘法器 30的输出也增加。 具体 解释如下: 当增加解调器 10的电压时, 如果反馈信号增加, 说明解调器 10 的相位控制方向错误, 应该减少解调器 10 电压; 同理, 当增加解调器 10 的电压, 如果反馈信号减少, 说明调整方向正确, 应该继续增加解调器 10 的电压, 直至反馈信号趋于 0或者小于某阈值。
基于上述装置, 本发明实现 DPSK接收机中解调器相位锁定的方法如 图 3所示, 包括以下步骤:
步骤 100:将 DPSK光信号进行解调后通过两个光电探测器转换为监测 电信号, 并从两路监测电信号中分离出一部分监测电信号, 发送至乘法器, 将另一部分监测电信号进行差分放大后输出。
步骤 200: 乘法器对两路监测电信号进行相乘运算, 并将运算结果作为 反馈信号输出;
步骤 300: 监测乘法器输出的反馈信号, 并根据该反馈信号指导解调器 的相位调整方向。
其中, 在步骤 300 中, 根据反馈信号指导解调器的相位调整方向为: 分析相位是否锁定, 在未锁定时, 调整解调器的相位控制参数, 直到相位 锁定。 反馈信号趋于 0或者小于预定阀值时, 表示相位锁定。 另外, 通过控制解调器的温度来控制相位偏移, 温度控制由加热器实 现, 解调器的相位偏移与加热器上的电压值平方成正比。
综上所述, 依照本发明的 DPSK接收机中解调器相位锁定的装置和方 法, 与现有技术相比, 避免了输入光功率变化和检测电流因数据图案变化 而导致解调器误调整效果, 不需要纠错前误码信息, 也不会对 DPSK接收 机的其他优化控制算法产生混叠干扰, 直接实现了 DPSK接收机中解调器 相位粗调和微调的融合, 极大地优化了 DPSK接收机控制方案, 大大提高 了 DPSK系统的工程实用性。
以上所述, 仅为本发明的较佳实施例而已, 并非用于限定本发明的保 护范围。

Claims

权利要求书
1、 一种 DPSK接收机中解调器相位锁定的装置, 其特征在于, 包括: 解调器、 平衡接收机、 乘法器、 和解调器控制单元, 其中,
所述解调器, 用于将差分相移键控 ( DPSK )光信号进行解调后发送至 所述平衡接收机;
所述平衡接收机, 用于将解调后的两路 DPSK光信号转换为监测电信 号, 并分别从两路监测电信号中各分离出一部分监测电信号, 发送至乘法 器, 将另一部分监测电信号进行差分放大后输出;
所述乘法器, 对所述平衡接收机发出的两路监测电信号进行相乘运算, 并将运算结果作为反馈信号发送至解调器控制单元;
所述解调器控制单元, 用于监测所述乘法器输出的反馈信号, 并根据 所述反馈信号指导所述解调器的相位调整方向。
2、 根据权利要求 1所述 DPSK接收机中解调器相位锁定的装置, 其特 征在于, 所述解调器控制单元包括:
数字模拟转化器, 用于监测所述反馈信号;
温度控制电路, 用于利用所述反馈信息调整所述解调器的相位。
3、 根据权利要求 2所述 DPSK接收机中解调器相位锁定的装置, 其特 征在于, 根据所述反馈信号指导解调器的相位调整方向时, 所述温度控制 电路进一步用于, 分析所述解调器的相位是否锁定, 在未锁定时, 调整解 调器的相位控制参数, 直到相位锁定;
所述反馈信号趋于 0或者小于预定阀值时, 确定所述解调器的相位锁 定。
4、 根据权利要求 3所述 DPSK接收机中解调器相位锁定的装置, 其特 征在于, 所述温度控制电路, 进一步用于通过控制解调器的温度实现解调 器的相位偏移; 所述解调器的温度控制通过加热器实现; 所述解调器的相位偏移与所 述加热器的电压值平方成正比。
5、根据权利要求 1至 4任一项所述 DPSK接收机中解调器相位锁定的 装置, 其特征在于, 所述解调器, 进一步用于将 DPSK光信号解调为干涉 相长光信号和干涉相消光信号。
6、根据权利要求 1至 4任一项所述 DPSK接收机中解调器相位锁定的 装置, 其特征在于, 所述平衡接收机包括光探测器和差分放大器, 其中, 所述光探测器, 用于将所述解调后的两路 DPSK光信号转换为监测电 信号, 并分别从两路监测电信号中各分离出一部分监测电信号, 发送至乘 法器, 将另一部分监测电信号发送至差分放大器;
所述差分放大器, 用于将所述监测电信号转化非归零码差分电信号后 输出。
7、 一种 DPSK接收机中解调器相位锁定的方法, 其特征在于, 该方法 包括:
步骤 A: 将解调后的两路 DPSK光信号转换为监测电信号, 并分别从 两路监测电信号中各分离出一部分监测电信号, 发送至乘法器, 将另一部 分监测电信号进行差分放大后输出;
步骤 B: 乘法器对所述两路监测电信号进行相乘运算, 并将运算结果 作为反馈信号输出;
步骤 C: 监测所述乘法器输出的反馈信号, 并根据所述反馈信号指导 解调器的相位调整方向。
8、 根据权利要求 7所述 DPSK接收机中解调器相位锁定的方法, 其特 征在于, 在所述步骤 C中, 根据所述反馈信号指导解调器的相位调整方向 为: 分析所述解调器的相位是否锁定, 在未锁定时, 调整解调器的相位控 制参数, 直到相位锁定。
9、 根据权利要求 8所述 DPSK接收机中解调器相位锁定的方法, 其特 征在于, 分析所述解调器的相位是否锁定为: 所述反馈信号趋于 0或者小 于预定阀值时, 确定相位锁定。
10、 根据权利要求 7至 9中任一项所述 DPSK接收机中解调器相位锁 定的方法, 其特征在于, 通过控制解调器的温度实现解调器的相位偏移; 所述解调器的温度控制通过加热器实现; 解调器的相位偏移与加热器的电 压值平方成正比。
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