WO2011002079A1 - 受信装置、受信方法およびプログラム - Google Patents
受信装置、受信方法およびプログラム Download PDFInfo
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- WO2011002079A1 WO2011002079A1 PCT/JP2010/061319 JP2010061319W WO2011002079A1 WO 2011002079 A1 WO2011002079 A1 WO 2011002079A1 JP 2010061319 W JP2010061319 W JP 2010061319W WO 2011002079 A1 WO2011002079 A1 WO 2011002079A1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2647—Arrangements specific to the receiver only
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0202—Channel estimation
- H04L25/022—Channel estimation of frequency response
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0202—Channel estimation
- H04L25/0224—Channel estimation using sounding signals
- H04L25/0228—Channel estimation using sounding signals with direct estimation from sounding signals
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L25/03159—Arrangements for removing intersymbol interference operating in the frequency domain
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L25/03178—Arrangements involving sequence estimation techniques
- H04L25/03248—Arrangements for operating in conjunction with other apparatus
- H04L25/0328—Arrangements for operating in conjunction with other apparatus with interference cancellation circuitry
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
- H04L25/067—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing soft decisions, i.e. decisions together with an estimate of reliability
Definitions
- the output of the CP removal unit 102 is connected to the DFT unit 103 via a signal line.
- the output of the DFT unit 103 is connected to each of the equalization filter 106 and the channel estimation unit 104 via a signal line.
- the output of the channel estimation unit 104 is connected to the weight calculation unit 105 via a signal line.
- the output of the weight calculation unit 105 is connected to the equalization filter 106 via a signal line.
- the output of the equalization filter 106 is connected to the IDFT unit 107 via a signal line.
- the output of the IDFT unit 107 is connected to the bit likelihood calculation unit 108 through a signal line.
- the output of the bit likelihood calculation unit 108 is connected to the decoder 109 via a signal line.
- the DFT unit 103 receives the received signal from which the CP has been removed by the CP removing unit 102, performs DFT of N DFT points (N DFT is an integer of 2 or more) on the received signal, and converts the received signal into a frequency domain.
- the received signal of carrier k (1 ⁇ k ⁇ N DFT ) is output.
- the bit likelihood calculation unit 108 receives the equalization signal of the time-domain single carrier signal, which is the output of the IDFT unit 107, and calculates the likelihood of the equalization signal for each transmitted bit.
- the calculated likelihood for each bit is referred to as bit likelihood.
- the receiving apparatus shown in FIG. 1 has the following problems.
- a frequency equalizer is used to suppress multipath interference.
- this frequency equalizer includes a channel estimation unit 104, a weight calculation unit 105, and an equalization filter 106.
- FIG. 2 is a block diagram illustrating a configuration example of the receiving apparatus according to the present embodiment.
- the receiving apparatus 1 of the present embodiment will be described as a case of a single carrier receiving apparatus that performs equalization processing by converting a time-domain single carrier signal into i-th frequency domain subcarrier k (i is an integer of 1 or more). To do. Further, the same components as those of the receiving apparatus 100 illustrated in FIG. 1 are denoted by the same reference numerals, and detailed description thereof is omitted.
- the receiving apparatus 1 further includes a symbol replica generating unit 10, a DFT unit 11, a residual interference replica generating unit 12, and a subtracting unit 13 with respect to the receiving apparatus 100 described in FIG.
- Each of weight calculation unit 15, equalization filter 16, and IDFT unit 17 has basically the same configuration as each of weight calculation unit 105, equalization filter 106, and IDFT unit 107 shown in FIG. There are different signal types to be processed.
- the output of the equalization filter 16 is connected to the subtracting unit 13 through a signal line.
- the output of the subtracting unit 13 is connected to the IDFT unit 17 through a signal line.
- the output of the bit likelihood calculation unit 108 is connected to each of the decoder 109, the symbol replica generation unit 10 and the correction coefficient calculation unit 14 via signal lines.
- the output of the symbol replica generation unit 10 is connected to the DFT unit 11 via a signal line.
- An output of the DFT unit 11 is connected to the residual interference replica generation unit 12 via a signal line.
- the MMSE weight W (i) (k) in the i-th repetitive subcarrier k is the channel estimation value H (k) and the correction coefficient ⁇ (i ⁇ ) corresponding to the residual multipath interference in the (i ⁇ 1) -th repetition.
- W (i) (k) (H * (k)) / ( ⁇ (i ⁇ 1)
- ⁇ 2 represents noise power.
- ⁇ ( ⁇ 1) 1.
- the equalization filter 16 receives the equalization weight calculated by the weight calculation unit 15 and the reception signal of the i-th repeated subcarrier k converted to the frequency domain by the DFT unit 103, and is equal to the reception signal for each subcarrier. By multiplying the equalization weight, the received signal of the i-th repeated subcarrier k is equalized in the frequency domain.
- the subtraction unit 13 subtracts the residual multipath interference replica generated by the residual interference replica generation unit 12 from the equalized signal that has been equalized by the equalization filter 16 in the frequency domain. Thereby, residual multipath interference is removed.
- the IDFT unit 17 receives the equalization signal of the i-th subcarrier k in the frequency domain from which the residual multipath interference is removed, which is an output of the subtraction unit 13, and inputs N IDFT points to the input equalization signal. IDFT (N IDFT is an integer of 2 or more) is performed, and the equalized signal from which residual multipath interference is removed is converted into a single carrier signal in the time domain.
- the symbol replica generation unit 10 receives the bit likelihood calculated by the bit likelihood calculation unit 108 and generates a symbol replica based on the bit likelihood.
- a method of generating a symbol replica a method of generating a hard decision symbol replica, a method of generating a hard decision symbol replica and multiplying by a predetermined replica weight coefficient (a constant of 1 or less), a method of generating a soft decision symbol replica and so on.
- the DFT unit 11 receives the symbol replica generated by the symbol replica generation unit 10 as input, performs DFT of N DFT points (N DFT is an integer of 2 or more) on the symbol replica, and converts the symbol replica to the i th repetition of the frequency domain Convert to subcarrier k.
- the residual interference replica generation unit 12 includes a symbol replica of the i-th repeated subcarrier k converted to the frequency domain by the DFT unit 11, and a channel of the i-th repeated subcarrier k of the frequency domain estimated by the channel estimation unit 104.
- the estimated value and the equalization weight calculated by the weight calculation unit 15 are input, and a residual multipath interference replica is generated using these values.
- the correction coefficient calculation unit 14 receives the bit likelihood calculated by the bit likelihood calculation unit 108 and calculates a correction coefficient ⁇ (i ⁇ 1) corresponding to the residual multipath interference using the bit likelihood.
- FIG. 3 is a block diagram illustrating a configuration example of the residual interference replica generation unit 12.
- the residual interference replica generation unit 12 includes a first multiplication unit 20, an average unit 21, a subtraction unit 22, and a second multiplication unit 23.
- the output of the first multiplication unit 20 is connected to each of the subtraction unit 22 and the averaging unit 21 via signal lines.
- the output of the subtractor 22 is connected to the second multiplier 23 via a signal line.
- the first multiplier 20 receives the channel estimation value of the i-th iterative subcarrier k in the frequency domain estimated by the channel estimation unit 104 and the equalization weight calculated by the weight calculation unit 15 as input, and equalizes the channel estimation value.
- the equalized channel gain is calculated by multiplying the weight for each subcarrier.
- the averaging unit 21 calculates the average post-equalization channel gain, which is the channel gain after the average equalization, by averaging the post-equalization channel gain calculated by the first multiplication unit 20 by subcarriers for NDFT points. .
- the subtracting unit 22 calculates residual multipath interference by subtracting the average post-equalization channel gain calculated by the average unit 21 from the post-equalization channel gain calculated by the first multiplication unit 20.
- the second multiplication unit 23 receives the residual multipath interference calculated by the subtraction unit 22 and the symbol replica converted to the frequency domain by the DFT unit 11 and multiplies the residual multipath interference by the symbol replica to thereby obtain the residual multipath interference.
- a multipath interference replica is generated, and the residual multipath interference replica is sent to the subtraction unit 13 shown in FIG.
- the residual multipath interference replica M (i) (k) generated by the residual interference replica generation unit 12 has an average equalized channel gain G (i) .
- M (i) (k) [W (i) (k) H (i) (k) -G (i) ] S (i-1) (k) (8)
- S (i ⁇ 1) (k) indicates a symbol replica that has been converted to the frequency domain by the DFT unit 11 in subcarrier k, repeating (i ⁇ 1) th.
- M (0) 1.
- FIG. 3 schematically shows a state in which residual multipath interference is extracted by the subtraction unit 22 for easy understanding.
- the equalized channel gain and the average equalized channel gain are represented by rectangles A1 to A5 and B1 to B5, respectively. It is assumed that the heights of the rectangles A1 to A5 and B1 to B5 represent the gain level.
- the equalized channel gain rectangles A1, A3, and A5 are higher than the average equalized channel gain rectangles B1 to B5. Since the average equalized channel gain is averaged by the average unit 21, the change in height of the rectangles B1 to B5 is more gradual than the rectangles A1 to A5 of the equalized channel gain.
- the subtracting unit 22 subtracts the average post-equalization channel gain from the post-equalization channel gain to extract rectangles C1 to C5 representing residual multipath interference.
- the height of the rectangles C1 to C5 represents the level of residual multipath interference, and is the height obtained by subtracting the heights of the rectangles B1 to B5 from the heights of the rectangles A1 to A5.
- the post-equalization channel gain is larger than the average post-equalization channel gain, but the post-equalization channel gain may be larger than the post-equalization channel gain.
- the second multiplication unit 23 multiplies the residual multipath interference corresponding to the rectangles C1 to C5 by the symbol replica converted into the frequency domain by the DFT unit 11 to generate a residual multipath interference replica.
- residual multipath interference replicas are represented by rectangles C1 to C5.
- the subtracting unit 13 outputs the equalized channel signal (residual) as output from the equalization filter 16.
- the residual multipath interference replicas (rectangles C1 to C5) generated by the residual interference replica generation unit 12 are subtracted from the equalized channel signal including residual multipath interference output from the equalization filter 16.
- the subtracting unit 13 outputs an equalized channel signal from which the residual multipath interference corresponding to the residual multipath interference replica is removed.
- the receiving apparatus 1 gradually removes the residual multipath interference, and finally, a decoding result in which the residual multipath interference is significantly reduced is obtained. Therefore, it is preferable to perform selection processing that validates only the final decoding result after the end of the iterative processing after the decoder 109.
- a switch is provided between the bit likelihood calculation unit 108 and the decoder 109, this switch is opened during the execution of the iterative process, this switch is closed when the iterative process is completed, and only the final result is decoded. 109 may be input.
- the equalization filter 16 in order to execute the most characteristic processing, at least the equalization filter 16, the subtraction unit 13, the channel estimation unit 104, the weight calculation unit 15, the residual, among the configurations shown in FIG.
- the interference replica generation unit 12 and the correction coefficient calculation unit 14 may be provided.
- residual multipath can be reduced even when a frequency equalizer using MMSE weights is used.
Abstract
Description
H(k)=RRS(k)X*(k) ・・・(1)
で計算される。ここで、X(k)はリファレンス信号であり、RRS(k)はDFT部103で周波数領域に変換されたリファレンス受信信号であり、添え字*は複素共役を示す。
W(k)=(H*(k))/(|H(k)|2+σ2) ・・・(2)
で計算される。ここで、σ2は雑音電力を示す。
Y(k)=W(k)RD(k) ・・・(3)
で計算される。
本発明の実施形態の受信装置の構成を説明する。図2は本実施形態の受信装置の一構成例を示すブロック図である。
次に、本実施形態の受信装置1の動作について説明する。ここでは、図1に示した受信装置100と同様な動作についての説明を省略する。
W(i)(k)=(H*(k))/(ρ(i-1)|H(k)|2+σ2) ・・・(4)
で計算される。ここで、σ2は雑音電力を示す。ただし、ρ(-1)=1である。
Y(i)(k)=W(i)(k)RD(k) ・・・(5)
で計算される。
Y(i) rmv(k)=Y(i)(k)-M(i)(k) ・・・(6)
で表される。
次に、残留干渉レプリカ生成部12の構成について図3を参照して説明する。図3は、残留干渉レプリカ生成部12の一構成例を示すブロック図である。残留干渉レプリカ生成部12は、第一乗算部20、平均部21、減算部22、および第二乗算部23を有する構成である。
次に、残留干渉レプリカ生成部12の動作について図3を参照して説明する。
G(i)=(1/NDFT)Σk=1 to NDFTW(i)(k)H(i)(k) ・・・(7)
M(i)(k)=[W(i)(k)H(i)(k)-G(i)]S(i-1)(k) ・・・(8)
で表される。ここで、S(i-1)(k)は、第(i-1)繰り返し、サブキャリアkにおける、DFT部11で周波数領域に変換されたシンボルレプリカを示す。ただし、M(0)=1である。
このようにして、残留干渉レプリカ生成部12により残留マルチパス干渉レプリカが生成されると、図4に示すように、減算部13によって、等化フィルタ16から出力される等化後チャネル信号(残留マルチパス干渉含む)から残留マルチパス干渉レプリカを減算することより、残留マルチパス干渉を除去した等化後チャネル信号が得られる。
次に、補正係数計算部14の構成について図5を参照して説明する。図5は、補正係数計算部14の一構成例を示すブロック図である。補正係数計算部14は、硬判定シンボルレプリカ生成部30、軟判定シンボルレプリカ生成部31、第一電力計算部32、第二電力計算部33、減算部34、および加算部35を有する構成である。
次に、補正係数計算部14の動作について図5を参照して説明する。硬判定シンボルレプリカ生成部30は、ビット尤度計算部108で計算されたビット尤度を入力とし、ビット尤度に基づいて硬判定シンボルレプリカを生成する。第一電力計算部32は、硬判定シンボルレプリカの電力をシンボル毎に計算する。
本発明の実施形態は、その要旨を逸脱しない限り、様々に変更が可能である。例えば、上述した実施形態では、時間領域信号から周波数領域信号への変換をDFT、周波数領域信号から時間領域信号への変換をIDFTで行っているが、これを高速フーリエ変換(FFT:Fast Fourier Transform)、高速逆フーリエ変換(IFFT:Inverse Fast Fourier Transform)あるいは他の信号変換アルゴリズムを用いてもよい。
10 シンボルレプリカ生成部
11 DFT部
12 残留干渉レプリカ生成部
13、22、34 減算部
14 補正係数計算部
15 ウェイト計算部
16 等化フィルタ
17 IDFT部
20 第一乗算部
21 平均部
23 第二乗算部
30 硬判定シンボルレプリカ生成部
31 軟判定シンボルレプリカ生成部
32 第一電力計算部
33 第二電力計算部
35 加算部
Claims (7)
- シングルキャリア信号を受信する受信装置であって、
前記シングルキャリア信号が時間領域から周波数領域に変換されたリファレンス受信信号と予め記憶したリファレンス信号との相関処理によりチャネル推定値を推定するチャネル推定部と、
ビット尤度から残留マルチパス干渉に対応した補正係数を算出する補正係数計算部と、
前記チャネル推定値と前記補正係数とを用いて等化ウェイトを算出するウェイト計算部と、
前記等化ウェイトにより周波数領域で受信信号に等化処理を行って等化信号を生成する等化フィルタと、
周波数領域に変換されたシンボルレプリカ、前記チャネル推定値、および前記等化ウェイトを用いて残留マルチパス干渉レプリカを生成する残留干渉レプリカ生成部と、
前記等化信号から前記残留マルチパス干渉レプリカを周波数領域で減算する第1の減算部と、
を有する受信装置。 - 請求項1記載の受信装置において、
前記残留干渉レプリカ生成部は、
前記チャネル推定部で推定された周波数領域のチャネル推定値と前記ウェイト計算部で計算された等化ウェイトとを乗算することにより、等化後チャネル利得を求める第一乗算部と、
前記第一乗算部で算出された等化後チャネル利得をサブキャリア平均することにより、平均等化後チャネル利得を求める平均部と、
前記第一乗算部で算出された等化後チャネル利得から上記平均部で算出された平均等化後チャネル利得を減算することにより、残留マルチパス干渉を求める第2の減算部と、
前記第2の減算部で算出された残留マルチパス干渉と周波数領域に変換されたシンボルレプリカとを乗算することにより、前記残留マルチパス干渉レプリカを生成する第二乗算部と、
を有する受信装置。 - 請求項1または2記載の受信装置において、
前記補正係数計算部は、
前記ビット尤度から硬判定シンボルレプリカを生成する硬判定シンボルレプリカ生成部と、
前記硬判定シンボルレプリカ生成部で生成された硬判定シンボルレプリカの電力をシンボル毎に計算する第一電力計算部と、
前記ビット尤度から軟判定シンボルレプリカを生成する軟判定シンボルレプリカ生成部と、
前記軟判定シンボルレプリカ生成部で生成された軟判定シンボルレプリカの電力をシンボル毎に計算する第二電力計算部と、
前記第一電力計算部で算出された硬判定シンボルレプリカの電力から前記第二電力計算部で算出された軟判定シンボルレプリカの電力をシンボル毎に減算する第3の減算部と、
前記第3の減算部でシンボル毎に減算した結果をシンボル分加算することにより、残留マルチパス干渉を考慮した前記補正係数を算出する加算部と、
を有する受信装置。 - 請求項1または2記載の受信装置において、
前記ウェイト計算部、前記等化フィルタ、前記残留干渉レプリカ生成部および前記第1の減算部は、周波数領域の繰り返し処理により、残留マルチパス干渉を除去する、受信装置。 - 請求項1記載の受信装置において、
前記ウェイト計算部は、残留マルチパス干渉を考慮した前記補正係数を用いて最小平均自乗誤差法に基づいて前記等化ウェイトを算出する、受信装置。 - シングルキャリア信号を受信する受信装置が行う受信方法であって、
前記シングルキャリア信号を周波数領域に変換したリファレンス受信信号と予め記憶したリファレンス信号との相関処理によりチャネル推定値を推定し、
ビット尤度から残留マルチパス干渉に対応した補正係数を算出し、
前記チャネル推定値と前記補正係数とを用いて等化ウェイトを算出し、
前記等化ウェイトにより周波数領域で受信信号の等化処理を行って等化信号を生成し、
周波数領域に変換されたシンボルレプリカ、前記チャネル推定値および前記等化ウェイトを用いて残留マルチパス干渉レプリカを生成し、
前記等化信号から前記残留マルチパス干渉レプリカを周波数領域で減算する、受信方法。 - シングルキャリア信号を受信する受信装置の信号処理部に実行させるためのプログラムを記録した記録媒体であって、
前記シングルキャリア信号を周波数領域に変換したリファレンス受信信号と予め記憶したリファレンス信号との相関処理によりチャネル推定値を推定し、
ビット尤度から残留マルチパス干渉に対応した補正係数を算出し、
前記チャネル推定値と前記補正係数とを用いて等化ウェイトを算出し、
前記等化ウェイトにより周波数領域で受信信号の等化処理を行って等化信号を生成し、
周波数領域に変換されたシンボルレプリカ、前記チャネル推定値および前記等化ウェイトを用いて残留マルチパス干渉レプリカを生成し、
前記等化信号から前記残留マルチパス干渉レプリカを周波数領域で減算する処理を前記信号処理部に実行させるためのプログラムを記録した記録媒体。
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
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WO2013109617A1 (en) * | 2012-01-16 | 2013-07-25 | Qualcomm Incorporated | Frequency domain interference cancellation and equalization for downlink cellular systems |
WO2013109620A1 (en) * | 2012-01-16 | 2013-07-25 | Qualcomm Incorporated | Intercell frequency offset compensation for frequency domain interference cancellation and equalization for downlink cellular systems |
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JP5788088B2 (ja) * | 2012-05-14 | 2015-09-30 | 三菱電機株式会社 | 受信装置および受信方法 |
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CN105099970B (zh) * | 2014-04-24 | 2018-08-14 | 富士通株式会社 | 自适应均衡器、自适应均衡方法以及接收机 |
DE102014115136B4 (de) * | 2014-10-17 | 2021-10-28 | Apple Inc. | Kommunikationsvorrichtung und Verfahren zum Verarbeiten eines empfangenen Signals |
US9590690B2 (en) | 2014-12-18 | 2017-03-07 | Motorola Solutions, Inc. | Methods and systems for canceling a blocking signal to obtain a desired signal |
CN105897628A (zh) * | 2016-06-15 | 2016-08-24 | 晶晨半导体(上海)有限公司 | 单载波均衡器及包括该单载波均衡器的接收机系统 |
CN105897629A (zh) * | 2016-06-15 | 2016-08-24 | 晶晨半导体(上海)有限公司 | 一种信号判决器及信号判决方法 |
US10069587B1 (en) * | 2017-06-02 | 2018-09-04 | Qualcomm Incorporated | Mitigation of interference caused by a transmitter |
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WO2013109617A1 (en) * | 2012-01-16 | 2013-07-25 | Qualcomm Incorporated | Frequency domain interference cancellation and equalization for downlink cellular systems |
WO2013109620A1 (en) * | 2012-01-16 | 2013-07-25 | Qualcomm Incorporated | Intercell frequency offset compensation for frequency domain interference cancellation and equalization for downlink cellular systems |
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Also Published As
Publication number | Publication date |
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US8576934B2 (en) | 2013-11-05 |
JPWO2011002079A1 (ja) | 2012-12-13 |
US20120093272A1 (en) | 2012-04-19 |
CN102474374A (zh) | 2012-05-23 |
JP5569525B2 (ja) | 2014-08-13 |
CN102474374B (zh) | 2016-09-07 |
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