WO2010107060A1 - Convertisseur cc-cc - Google Patents

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Publication number
WO2010107060A1
WO2010107060A1 PCT/JP2010/054552 JP2010054552W WO2010107060A1 WO 2010107060 A1 WO2010107060 A1 WO 2010107060A1 JP 2010054552 W JP2010054552 W JP 2010054552W WO 2010107060 A1 WO2010107060 A1 WO 2010107060A1
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WIPO (PCT)
Prior art keywords
voltage
time
switching
switching elements
circuit
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PCT/JP2010/054552
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English (en)
Japanese (ja)
Inventor
希 丹
彰二 堀内
Original Assignee
株式会社ウインズ
三井物産株式会社
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Application filed by 株式会社ウインズ, 三井物産株式会社 filed Critical 株式会社ウインズ
Priority to JP2011504865A priority Critical patent/JPWO2010107060A1/ja
Publication of WO2010107060A1 publication Critical patent/WO2010107060A1/fr

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B10/00—Integration of renewable energy sources in buildings
    • Y02B10/30—Wind power
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present invention relates to a DC-DC converter, and more particularly to an isolated DC-DC converter for a distributed power source that converts power from a distributed DC power source into medium power capacity.
  • a distributed power supply system that converts electric power from a distributed direct current power source, for example, a household fuel cell, a solar power generation system or a wind power generation system into a medium power capacity (0.3 kW to 10 kW) is a power conversion device such as an inverter.
  • a power conversion device such as an inverter.
  • insulation between the input (primary side) and the system (secondary side) is desired. Even if a high-frequency insulation type converter is used in such a power conversion device, there is a problem that efficiency is deteriorated as compared with a non-insulation type converter.
  • Patent Document 1 proposes a highly efficient DC-DC converter.
  • Patent Document 2 discloses a resonant switching power supply that can reduce switching loss by switching a switching element (FET) with zero voltage or zero current (ZVS or ZCS).
  • Patent Document 3 discloses a DC-DC converter that switches a switch of a switching power supply at zero voltage and zero current. Patent Document 3 describes that a current resonance circuit is provided between the switching power supply circuit and the transformer, and the switch of the switching power supply circuit is operated at a frequency near the resonance frequency fr.
  • Patent Documents 4 and 5 describe that not only the switching power supply is provided on the primary side of the transformer, but also the booster circuit provided on the secondary side is formed of switching elements.
  • Japanese Patent No. 3934654 Japanese Patent Application Laid-Open No. 07-274498 Japanese Patent Application Laid-Open No. 07-222444 JP 2005-318757 A Japanese Patent Laid-Open No. 06-311743
  • the DC-DC converters disclosed in Patent Documents 1 to 5 can achieve high efficiency. However, from the viewpoint of small energy, there has been a demand for the development of a DC-DC converter that can realize a DC-DC conversion with a higher switching efficiency and a higher efficiency.
  • the present invention has been made to solve the above problems, and an object thereof is to provide a highly efficient DC-DC converter.
  • the present invention has been made to solve the above problems, and an object thereof is to provide a highly efficient DC-DC converter.
  • It includes a pair of first switching elements that are alternately switched, and includes a first switching circuit that includes any one of a full-bridge circuit, a half-bridge circuit, and a push-pull circuit, and has a low output voltage variation.
  • a voltage resonance circuit that receives DC power from a voltage DC power supply, converts the DC power into DC-AC, and outputs the DC resonance power;
  • An insulated high-frequency transformer having a primary side and a secondary side to which the voltage resonance circuit is connected;
  • An inductance connected in series between one terminal on the secondary side of the insulated high-frequency transformer and one of the output terminals; It is composed of a pair of second switching elements connected so as to be alternately switched, and one of the pair of second switching elements is one terminal on the secondary side of the insulated high-frequency transformer and an output terminal And the other of the pair of second switching elements is connected between the other terminal on the secondary side of the insulated high-frequency transformer and the other of the output terminals.
  • a switching circuit A rectifier circuit for rectifying the output from the second switching circuit; A smoothing circuit that smoothes the output from the rectifying circuit and outputs the smoothed output to the output terminal; A first driver circuit that maintains voltage resonance in the voltage resonance circuit with a first switching signal that turns on and off the first switching element at a timing when the conduction current is substantially zero and the applied voltage is substantially zero; A second driver circuit that maintains zero voltage switching with a second switching signal that turns on and off the second switching element at a timing when the applied voltage is substantially zero; A control circuit for setting the frequency of the first and second switching signals and the on-time of each of the first and second switching signals depending on the output voltage output from the rectifier circuit, When the output voltage is higher than the reference frequency when the output voltage is higher, and when the output voltage is lower than the target voltage, the frequency is lower than the reference frequency, and the input voltage is higher than the reference voltage. A control circuit for reducing the ON time of the second switching signal and setting the ON time of the second switching signal to be large when the input voltage is smaller
  • the primary and secondary switching circuits perform soft switching in the entire operation region, the efficiency becomes high. Further, according to the DC-DC converter of the present invention, since the number of circuit components is small, the size and weight can be reduced, and not only the cost is reduced, but also the reliability against the component failure is improved.
  • FIG. 1 is a circuit diagram showing a DC-DC converter according to an embodiment of the present invention.
  • FIG. 2 is a circuit diagram showing a DC-DC converter according to another embodiment of the present invention in which the voltage resonance circuit is constituted by a half bridge circuit.
  • FIG. 3 is a circuit diagram showing a DC-DC converter according to still another embodiment of the present invention in which the voltage resonance circuit is configured by a push-pull circuit.
  • FIG. 4 is a graph showing the relationship between the frequency of the pulse signal and the input voltage Vin for making the output power output constant in the circuit shown in FIG.
  • FIG. 5A is a graph showing the relationship between the output power and the frequency of a pulse signal that varies the output power output after the input voltage reaches a certain steady state in the circuit shown in FIG. FIG.
  • FIG. 5B is a graph showing the relationship between the output power output after the input voltage reaches a certain steady state and the duty ratio of the pulse signal in the circuit shown in FIG.
  • FIG. 6 is a control block diagram for controlling the switching element shown in FIG.
  • FIG. 7 is a flowchart showing a control flow for controlling the switching element shown in FIG.
  • FIGS. 8A to 8E show the operation of each part in the DC-DC converter shown in FIG. 1 when the rated voltage mode is set in the steady state.
  • (F) to (j) of FIG. 9 show the operation of each part in the DC-DC converter shown in FIG. 1 when the rated voltage mode is set in the steady state.
  • (K) to (o) of FIG. 10 show the operation of each part in the DC-DC converter shown in FIG.
  • FIG. 1 when the rated voltage mode is set in the steady state.
  • A) to (e) of FIG. 11 show the operation of each part in the DC-DC converter shown in FIG. 1 when the low input voltage mode is set in the steady state.
  • (F) to (i) in FIG. 12 show the operation of each part in the DC-DC converter shown in FIG. 1 when the low input voltage mode is set in the steady state.
  • (K) to (o) of FIG. 13 show the operation of each part in the DC-DC converter shown in FIG. 1 when the low input voltage mode is set in the steady state.
  • 14A to 14E show the operation of each part in the DC-DC converter shown in FIG. 1 when the high input voltage mode is set in the steady state.
  • FIG. 1 when the medium power mode is set in the steady state.
  • 20A to 20E show the operation of each part in the DC-DC converter shown in FIG. 1 when the low power mode is set in the steady state.
  • 21 (f) to (i) show the operation of each part in the DC-DC converter shown in FIG. 1 when the low power mode is set in the steady state.
  • K) to (o) in FIG. 22 show the operation of each part in the DC-DC converter shown in FIG. 1 when the low power mode is set in the steady state.
  • FIGS. 23A to 23E show the operation of each part in the DC-DC converter shown in FIG. 1 when the high power mode is set in the steady state.
  • (F) to (i) of FIG. 24 show the operation of each part in the DC-DC converter shown in FIG.
  • FIG. 6 is a circuit diagram showing a DC-DC converter according to a modification of the DC-DC converter shown in FIG. 1.
  • FIG. 1 shows a DC-DC converter according to an embodiment of the present invention.
  • the DC-DC converter and the inverter unit that performs DC-AC conversion shown in FIG. 1 constitute a connected inverter as a power conditioner, and this connected inverter is applied to a distributed power supply system.
  • the input terminal Vin of the DC-DC converter shown in FIG. 1 is input with a DC power supply (not shown) with fluctuation in output, for example, an output (DC power) Vin from a fuel cell, a solar cell, or wind power generation.
  • This output Vin is DC-DC converted by the converter shown in FIG. 1, and the converted DC output is converted into an AC output and a relatively small output (for example, about 0.3 kW to several tens of kW) by the inverter unit.
  • it is output as a commercial voltage (system voltage) Vout to a load in the home.
  • the commercial voltage (system voltage) Vout corresponds to 101V or 202V (in the case of single-phase three-wire connection) in Japan, and corresponds to 115V or 230V in the United States.
  • an input voltage Vin of 80 V or less, currently 20 V to 60 V, is input to the converter shown in FIG. 1, and the output voltage Vin is highest when there is no load, and the voltage increases as the load increases. Has a characteristic of lowering by about 25% to 30%.
  • a voltage Vin of 17-21V is output from one solar cell module, and a voltage Vout of 170V to 350V is output as the system.
  • the output voltage Vout varies in the range of 120V to 450V.
  • an output voltage Vin of about 50V is generated. However, when the blades are rotating, the output Vin is fluctuated in the range of 30V to 50V.
  • This converter is a high-frequency insulation type DC-DC converter, which is arranged between a high-frequency transformer T1, an input terminal Vin connected to a DC power supply, and a primary side of the high-frequency transformer T1, and outputs a high-frequency voltage.
  • the leakage inductor L1 may be connected to the secondary side of the high-frequency transformer T1 separately in addition to the leakage inductor L1.
  • the converter shown in FIG. 1 further includes a drive buffer 17 that controls the voltage resonance circuit 11 and a drive buffer 18 that controls the switching circuit 13. Further, the switching controller 12 further comprising a CPU 30 that outputs a pulse width modulation signal PWM to the drive buffers 17 and 18 with reference to the reference table 36 storing the pulse signal corresponding to the operation mode and the reference table 36. I have.
  • the DC-DC converter is connected to the interconnection inverter unit of the normal system 200V, and a voltage of about 370V is output from the secondary side of the high-frequency transformer 12. Is done.
  • the voltage resonance circuit 11 arranged on the primary side can be constituted by a full bridge voltage resonance circuit as shown in FIG.
  • the switching element Q1 and the switching element Q3 are connected in series, and the switching element Q2 and the switching element Q4 are connected in series.
  • a series circuit of the switching elements Q1 and Q3 and a series circuit of the switching elements Q2 and Q4 are connected in parallel to the input capacitor C7 and are connected in parallel to the DC power sources on the input sides 10A and 10B so as to form a full bridge circuit. .
  • the input capacitor C7 is connected between the positive side 10A and the negative side 10B of the power source, the drains of the switching elements Q1, Q2 are connected to the positive side 10A of the power source, and the sources of the switching elements Q3, Q4 are the negative side 10B of the power source. It is connected to the. Further, a connection part between the switching element Q1 and the switching element Q3 is connected to one end part of the transformer T1 on the output side, and a connection part between the switching element Q2 and the switching element Q4 is connected to the other end part of the transformer T1.
  • Each of these switching elements Q1 to Q4 is composed of a switching element such as an FET (field effect transistor) or an IGBT (insulated gate / bipolar transistor), and is parasitic between a drain and a source (between an emitter and a collector in the case of IGBT). Capacitors C1 to C4 and parasitic diodes D1 to D4 are provided. Further, a drive buffer 17 is connected to the gates of the switching elements Q1 to Q4 to turn on and off the switching elements Q1 to Q4 at the timing of zero voltage and zero supply current.
  • a switching element such as an FET (field effect transistor) or an IGBT (insulated gate / bipolar transistor
  • the voltage at the input terminal 10A is detected as an input voltage signal and input to the CPU 30 via an interface (not shown).
  • the input voltage signal is referred to the reference input voltage stored in the reference table 36 by the CPU 30, and a pulse signal having a switching period and a pulse width corresponding to the reference input voltage is selected.
  • This pulse signal is supplied from the CPU 30 to the drive buffer 17, and a switching signal is output from the drive buffer 17 to the switching elements Q1 to Q4. That is, the switching pulse output from the drive buffer 17 has its frequency and duty ratio (ratio of the on period to the duty cycle) selected according to the input voltage signal, so that each of the switching elements Q1 to Q4 is substantially effective. ON and OFF at the timing of a zero voltage and a zero supply current.
  • the zero supply current means that the current supplied from the input terminals 10A and 10B to the corresponding switching elements Q1 to Q4 is switched in a zero state.
  • the switching elements Q1 to Q4 have parasitic capacitances C1 to C4, respectively.
  • a reactive current for charging the parasitic capacitances C1 to C4 is supplied from the inductor of the high frequency transformer T1, and the parasitic capacitances C1 to C4 are supplied.
  • C4 is discharged from the inductor of the high-frequency transformer T1.
  • this reactive current is not included in the zero supply current when the switching elements Q1 to Q4 are switched.
  • the voltage resonance circuit 11 shown in FIG. 1 may be a half-bridge voltage resonance circuit as shown in FIG.
  • a series circuit of switching elements Q2 and Q4 is connected in parallel to a capacitor C7, and the connection point between the switching elements Q2 and Q4 is the primary side of T1 of the high-frequency transformer.
  • the primary side ground terminal of the high-frequency transformer T1 is connected to the ground side terminal 10B.
  • This half-bridge voltage resonance circuit operates in the same manner as a bridge voltage resonance circuit described later. That is, in the waveform diagram for explaining the operation of the bridge voltage resonance circuit, the operation is performed in the same manner as when the switching elements Q1 and Q3 are removed, and thus the explanation of the operation of the half bridge voltage resonance circuit is omitted.
  • the voltage resonance circuit 11 shown in FIG. 1 may be constituted by a push-pull voltage resonance circuit as shown in FIG.
  • the primary side intermediate tap of the transformer T1 is connected to the positive side 10A of the power source
  • the drains of the switching elements Q3 and Q4 are connected to the primary side terminal of the transformer T1
  • the sources of the switching elements Q3 and Q4 Is connected to the negative side 10B of the power source.
  • a switching circuit 13 is connected to the secondary side of the transformer T1.
  • a boosting reactor L1 is connected in series to the secondary high voltage terminal of the transformer T1, and between the high voltage terminal of the transformer T1 and the ground terminal 20B via the boosting reactor L1,
  • a switching element Q6 constituting the switching circuit 13 is connected.
  • a switching element Q5 constituting the switching circuit 13 is connected between the secondary low voltage terminal of the transformer T1 and the ground terminal 20B.
  • the switching elements Q5 and Q6 include parasitic capacitors C5 and C6 and parasitic diodes D5 and D6 connected in parallel between the drain (collector in the case of IGBT) and the source (emitter in the case of IGBT), respectively. ing.
  • a driver buffer 18 is connected to the switching elements Q5 and Q6. That is, the drain (collector in the case of IGBT) of the switching element Q6 is connected to the secondary high-voltage side terminal of the transformer T1 via the boost reactor L1, and the source (emitter in the case of IGBT) of the switching element Q6 is grounded. It is connected to the output terminal 20B.
  • the drain (collector in the case of IGBT) of the switching element Q5 is connected to the secondary low voltage side terminal of the transformer T1, and the source (emitter in the case of IGBT) of the switching element Q5 is connected to the ground side output terminal 20B. It is connected.
  • the drain of the switching element Q5 is connected to the plus-side output terminal 20A via the diode D8 constituting the rectifying and smoothing circuit 14.
  • the diode D7 constituting the rectifying / smoothing circuit 14 is connected to the secondary high-voltage side terminal of the transformer T1 via the step-up reactor L1 and to the plus-side output terminal 20A, and the diode D8 constituting the rectifying / smoothing circuit 14 is
  • the transformer T1 is connected between the secondary low-voltage side terminal and the plus-side output terminal 20A
  • the smoothing capacitor C8 is connected between the output terminals 20A and 20B.
  • the gates of the switching elements Q5 and Q6 are connected to the drive buffer 18 to turn on and off the switching elements Q5 and Q6 at a predetermined timing, and output voltage signals Vout are output from the output terminals 20A and 20B.
  • the output voltage detected at the output terminal 20A is input to the CPU 30 as an output voltage signal through an electrically insulating circuit element 32, for example, a photocoupler and an interface (not shown).
  • the CPU 30 refers to the reference table 36 with the input voltage signal input from the input terminal 10A and the output voltage signal output between the output terminals 20A and 20B, and the switching element Q5 and the switching element Q5 according to each mode described below.
  • the reference table 36 stores the optimal pulse signal frequency and pulse signal duty ratio from the relationships shown in FIGS. 4, 5A and 5B.
  • a pulse signal selected from the stored table is applied to the switching elements Q5 and Q6, and the switching circuit 13 is optimally controlled.
  • FIG. 4 is a graph showing the relationship between the frequency of the pulse signal and the output voltage Vout for making the output power Vout output from the output terminals 20A and 20B constant, and the duty ratio of the pulse signal (the ON period with respect to the duty cycle). It is a graph which shows the relationship between an input voltage and an input voltage.
  • the primary side input voltage of the transformer T1 is lowered. Accordingly, the frequency of the pulse signal is lowered to increase the ON time in the voltage resonance circuit 11 functioning as a booster circuit on the secondary side of the transformer T1, and the duty ratio is selected to be large so that the switching elements Q1, Q2, Q3 are selected. , Q4 are set to be long and the OFF period is set to be short so that the boosting ratio in the switching elements Q1, Q2, Q3, and Q4 is increased.
  • the output voltage Vout is high, the primary side input voltage of the transformer T1 is increased.
  • the frequency of the pulse signal is increased in order to shorten the ON time in the voltage resonance circuit 11 functioning as a booster circuit on the secondary side of the transformer T1, and the duty ratio is selected to be small so that the switching elements Q1, Q2, Q3 are selected.
  • Q4 are set to be short and the off period is set to be long so that the step-up ratio in the switching elements Q1, Q2, Q3, Q4 is lowered.
  • the frequency of the pulse signal is used to increase the on-time in the voltage resonance circuit 11.
  • the duty ratio is selected to be large so that the ON period of the switching elements Q5 and Q6 is long and the OFF period is set to be short so that the step-up ratio in the switching elements Q5 and Q6 is large and the output voltage is constant. Kept.
  • the primary side input voltage of the transformer T1 is increased.
  • the frequency of the pulse signal is increased in order to shorten the on-time in the voltage resonance circuit 11 functioning as a booster circuit on the secondary side of the transformer T1, and the duty ratio is selected to be small so that the switching elements Q2 and Q4 are turned on.
  • the output voltage is kept constant by setting the switching period Q2 and Q4 lower by setting the switching period Q2 and Q4 longer by setting the off period longer.
  • 5A and 5B are graphs showing the relationship between the frequency of the pulse signal and the output power (output voltage Vout: constant) with respect to the load fluctuation after the input voltage reaches a constant steady state, and the duty ratio (duty ratio) of the pulse signal.
  • the frequency of the pulse signal is varied according to the load connected to the output terminals 20A and 20B, and a constant output voltage is output from the output terminals 20A and 20B.
  • the frequency of the switching pulse for switching the switching elements Q1 to Q4 of the voltage resonance circuit 11 is determined depending on the boost reactor L1.
  • the frequency at which the time period is the maximum value from the start of supply of current energy to the boost reactor L1 until the current energy is saturated is set to the lowest frequency, and the reference frequency is set to a frequency higher than the lowest frequency, The frequency is controlled based on this reference frequency.
  • the power (voltage) output from the DC-DC converter can be controlled to reach the target power (target voltage).
  • the frequency of the switching pulse signal is varied, and the output voltage signal Vout output from between the output terminals 20A and 20B is varied. Therefore, the frequency of the pulse signal is varied according to the load connected to the output terminals 20A and 20B, and the output voltage is output from the output terminals 20A and 20B.
  • the target voltage Vref is input to the CPU 30 by an input device (not shown) as shown in step S1 as shown in FIG. 6, and the output voltage Vout from the rectifier circuit 14 is As shown in step S ⁇ b> 2, the signal is input through the electrical insulating circuit element 32.
  • the target voltage Vref and the output voltage Vout are compared by the CPU 30 as shown in step S3, the reference table 36 is referred to by the difference voltage, and the primary of the transformer Ti in the frequency table in the reference table 36 as shown in step S4.
  • the switching frequency of the side switching elements Q1 to Q4 and the switching frequency of the secondary side switching elements Q5 to Q6 of the transformer Ti are determined.
  • the CPU 30 determines the ON period (time) of the pulse width modulation signal PWM. Based on the determined frequency and on-period, the CPU 30 operates as a pulse generator as shown in step S7, and a pulse signal (pulse width modulation signal) PWM is supplied to the driver buffer 17 and stored therein. Based on the determined frequency and on-period, the CPU 30 operates as a pulse generator as shown in step S7, and the pulse signal (pulse width modulation signal) PWM is supplied to the driver buffer 18 via the electrical insulation circuit element 34. Is given and stored.
  • the driver buffer 17 switches the switching elements Q1 to Q4 by applying the first to fourth gate pulses to the primary side switching elements Q1 to Q4 as shown in steps S8 to S11.
  • the driver buffer 18 switches the switching elements Q5 to Q6 by applying fifth and sixth gate pulses to the secondary side switching elements Q5 and Q6 as shown in steps S12 and S13.
  • a target voltage is output from the smoothing circuit 16 including the capacitor C8.
  • the target output voltage is first set as shown in FIG. (Step S21)
  • a reference switching frequency corresponding to the target output voltage is set in advance.
  • the primary side switching elements Q1 to Q5 are switched at this switching frequency.
  • the output voltage Vout from the rectifier circuit 14 is detected and compared with the target voltage in step S22.
  • switching at the switching frequency is continued.
  • Step S23 If the output voltage Vout has not reached the target voltage, it is determined in step S24 whether the output voltage Vout is greater than the target voltage.
  • a frequency higher than the set frequency is set as shown in step S25, and step S22 is executed again.
  • step S26 a frequency lower than the set frequency is set as shown in step S26, and step S22 is executed again.
  • the frequency is set low, the period during which the excitation current flows increases, the primary terminal voltage of the transformer Ti increases, the boosting effect is increased, and the excitation energy of the secondary reactance L1 is increased. As a result, the output voltage Vout is increased. In this way, the frequency of the gate pulse is controlled and the output is kept constant.
  • the switching elements Q5 and Q6 on the secondary side are alternately turned on, and the excitation energy of the reactance L1 on the secondary side and the energy of the transformer connected in series are supplied to the diodes D7 and D8.
  • the cathode side of the diodes D7 and D8 pulsating energy is synthesized, smoothed by the output capacitor C8, and output as DC power.
  • the energy release of the reactance L1 is supplied to C8 through the period D8 when the switching element Q5 is off, and is supplied to C8 through the period D7 when the switching element Q6 is off.
  • the DC-DC converter shown in FIG. 1 operates with high efficiency because the primary and secondary switching elements Q1 to Q6 are soft-switched in the entire operation region.
  • the size and weight can be reduced, and not only the cost is reduced, but also the reliability against component failure is improved.
  • FIGS. 8 (a) to 8 (o) show the operation of each part in the DC-DC converter shown in FIG. 1 in the low input voltage mode. The operation of the DC-DC converter shown in FIG. 1 will be described with reference to FIGS. 8 (a) to 8 (o).
  • the drain currents of the switching elements Q1 and Q4 are not completely zero, but a slight current flows. This current corresponds to free vibration in the boost reactor L1 and exciting current in the exciting inductance of the transformer T1. .
  • drain currents iQ1 and iQ4 are discharged from the drains of the switching elements Q1 and Q4 due to free vibration in the boost reactor L1 and exciting current in the exciting inductance of the transformer T1. It flows into the capacitors C1 and C4 between the drain and source of the switching elements Q1 and Q4, and the capacitors C1 and C4 are charged. Therefore, as shown in FIG. 8B, the drain voltages of the switching elements Q1 and Q4 are gently increased from time t2.
  • the other switching elements Q2 and Q3 constituting the bridge circuit are in an off state at time t2, and the drain-source capacitors C2 and C4 are discharged as the switching elements Q1 and Q4 are turned off.
  • the In this discharge current the drain currents iQ2 and iQ3 shown in FIG. 8 (f) contribute to the free oscillation by the boost reactor L1 and the exciting current of the transformer T1. Further, the drain voltages of the switching elements Q2, Q3 are gently lowered from the time point t2 to the time point t3 as shown in FIG. 8D.
  • the switching elements Q2 and Q3 are continuously turned on, and the switching element Q5 on the secondary side of the transformer T1 is switched from time t3 to time t5 as shown in FIGS. 9 (i) and (j). It is turned on during Further, as shown in FIGS. 8K and 8L, the switching element Q6 is kept on from the time point t2 to the time point t12, particularly from the time point t3 to the time point t9. Accordingly, between time t3 and time t5, the switching elements Q5 and Q6, the secondary side of the transformer T1 and the boost reactor L1 form a closed circuit, and the voltage generated on the secondary side of the transformer T1 is all boosted reactor L1.
  • E is the input voltage
  • T is the on-time
  • L is the inductance of the reactor L1 converted to the primary side.
  • the switching element Q5 is maintained in the off state. Between time t5 and time t6, as shown in FIG. 9 (j), the drain-source capacitance C5 of the switching element Q5 is charged by the current flowing through the step-up reactor L1, and the drain voltage is gently increased.
  • the drain currents iQ2 and iQ3 of the switching elements Q2 and Q3 constituting the bridge circuit are caused by the free vibration caused by the boost reactor L1 and the exciting current of the transformer T1.
  • the drain-source capacitances C1 and C4 are discharged, and the drain voltages of the switching elements Q1 and Q4 are gently lowered as shown in FIG. 8B.
  • the switching element Q6 is turned on at time t16 when the voltage of the switching element Q6 becomes approximately 0V, and the switching elements Q1, Q4 are turned off as shown in FIG. 8 (a).
  • the supply current of the switching elements Q1 and Q4 is approximately 0 A, and the drain voltage is also zero voltage, so that switching is performed at zero current and zero voltage.
  • the currents iQ1 and iQ4 of the switching elements Q1 and Q4 have capacitances C1 and C4 between the drains and sources of the switching elements Q1 and Q4 due to free oscillation by the boost reactor L1 and excitation current of the transformer T1, respectively. Charging is performed, and the drain voltages of switching elements Q1 and Q4 are gently increased.
  • the currents iQ2 and iQ3 of the switching elements Q2 and Q3 are caused by free oscillation by the boosting reactor L1 and the exciting current of the transformer T1, and the capacitance C2 between the drain and source of the switching elements Q2 and Q3, C3 is discharged, and the drain voltages of the switching elements Q2 and Q3 are gently lowered as shown in FIG. 8 (d).
  • FIG. 11A to FIG. 13O show the operation of each part in the DC-DC converter shown in FIG. 1 in the low input voltage mode. The operation of the DC-DC converter shown in FIG. 1 will be described with reference to FIGS. 11 (a) to 13 (o).
  • the free oscillation by the boosting reactor L1 and the exciting current of the transformer T1 cause a drain-source connection between the switching elements Q2 and Q3 as shown in FIG.
  • the capacitors C2 and C3 are discharged, and the drain voltages of the switching elements Q2 and Q3 are gently lowered as shown in FIG. 11 (d).
  • the current i1 obtained by combining the drain currents iQ1 and iQ4 and the drain currents iQ2 and iQ3 flows through the primary side of the transformer T1, and the secondary side of the transformer T1 has the circuit shown in FIG.
  • a current i2 obtained by subtracting the excitation current flows.
  • the switching elements Q2 and Q3 are turned on from the time t3 to the time t12.
  • the switching element Q5 is on from time t3 to time t9 as shown in FIG. 12 (i)
  • the switching element Q6 is between time t3 and time t12 as shown in FIG. 13 (k).
  • the drain currents iQ2 and iQ3 are linearly increased as shown in FIG.
  • the switching element Q5 is turned off. Due to the current flowing in the boost reactor L1 between time t9 and time t10, the drain-source capacitance C5 of the switching element Q5 is charged, and the drain voltage is gently increased.
  • the rectifier diode D8 conducts, and the energy of the secondary boost reactor L1 is released. Accordingly, the drain currents iQ2 and iQ3 are lowered, and the current iD8 of the diode D8 is also lowered as shown in FIG. 13 (m). At time t11, all the energy of the boost reactor L1 is released, the current of the rectifier diode D8 becomes zero, and the rectifier diode D8 is gently turned off. That is, the rectifier diode D8 is switched with zero current.
  • the switching elements Q1 and Q4 discharge the capacitances C1 and C4 between the drain and source of the switching elements Q1 and Q4 by the free vibration of the step-up reactor L1 and the exciting current of the transformer T1, and the switching elements Q1 and Q4 are discharged.
  • the drain voltage of Q4 is gently lowered.
  • the switching elements Q1, Q4 are turned on. Since the drain voltage at this time is almost 0 V, zero voltage switching is performed.
  • the switching elements Q1 and Q4 are turned on from time t13 to time t22.
  • the switching element Q5 on the secondary side of the transformer T1 is on during the period from time t13 to time t22, and the switching element Q6 is turned on in FIG. 13 (k).
  • the switching element Q6 is turned off at time t19.
  • the current flowing in the boost reactor L1 between time t19 and time t20 charges the drain-source capacitance C6 of the switching element Q6, and the drain voltage gently rises as shown in FIG. 13 (l). .
  • the rectifier diode D7 is turned on, the energy of the secondary boost reactor L1 is released, the currents iQ1 and iQ4 are lowered, and the current of the diode D7 iD7 is also lowered.
  • the current of the rectifier diode D7 becomes zero, and the rectifier diode D7 is gently turned off. That is, the rectifier diode D7 is switched with zero current.
  • the currents iQ1 and iQ4 charge the capacitances C1 and C4 between the drains and sources of the switching elements Q1 and Q4 by the free oscillation of the boost reactor L1 and the exciting current of the transformer T1, and FIG. ), The drain voltages of the switching elements Q1 and Q4 are gently increased.
  • the free oscillation by the boosting reactor L1 and the exciting current of the transformer T1 cause the drain-source between the switching elements Q2 and Q3 as shown in FIG.
  • the capacitance is discharged, and the drain voltages of the switching elements Q2 and Q3 are gently lowered.
  • FIG. 13 (k) when an input voltage lower than the rated input voltage is supplied to the converter, the switching frequency is lowered and the on-duty is set large.
  • FIGS. 14A to 16O show the operation of each part in the DC-DC converter shown in FIG. 1 in the high input voltage mode. The operation of the DC-DC converter shown in FIG. 1 will be described with reference to FIGS. 14 (a) to 16 (o).
  • the capacitances C2 and C3 between the drain and source of the switching elements Q2 and Q3 are discharged by the free vibration of the boost reactor L1 and the exciting current of the transformer T1, and the switching elements Q2 and Q3 are discharged.
  • the drain voltages of Q2 and Q3 are gently lowered.
  • the current i1 obtained by combining the currents iQ1, iQ4 and iQ2, iQ3 flows through the primary side of the transformer T1, and the secondary side of the transformer T1 has the structure shown in FIG. 15 (h).
  • a current i2 obtained by subtracting the excitation current flows.
  • the rectifier diode D8 is turned on, the energy of the secondary boost reactor L1 is released, the currents iQ2 and iQ3 are decreased, and the diode current iD8 is also decreased. Is done. At the time t6, all the energy of the boost reactor L1 is released, the current of the rectifier diode D8 becomes zero, and the rectifier diode D8 is gently turned off. That is, the rectifier diode D8 is switched with zero current.
  • the switching elements Q2 and Q3 charge the drain-source capacitances C2 and C3 of the switching elements Q2 and Q3 by the free vibration of the boost reactor L1 and the exciting current of the transformer T1, and the switching elements Q2 and Q3
  • the drain voltages of Q2 and Q3 rise gently.
  • the free vibration generated by the step-up reactor L1 and the exciting current of the transformer T1 supply the switching elements Q1 and Q4, and the drain-source capacitors C1 and C4 are discharged.
  • the drain voltages of elements Q1 and Q4 are gently lowered.
  • switching elements Q1, Q4 are turned on. Since the drain voltage at this time is almost 0 V, zero voltage switching is performed.
  • the switching elements Q1 and Q4 are turned on from time t8 to time t13.
  • the secondary side switching element Q5 is turned on from time t8 to time t13, and as shown in FIG. 16 (k), the switching element Q6 remains on from time t8 to time t9, and the transformer T1
  • the currents iQ1 and iQ4 rise linearly on the primary side of the transformer T1.
  • the switching element Q6 is turned off.
  • the current flowing through the boost reactor L1 between time t9 and time t10 charges the drain-source capacitance C6 of the switching element Q6, and the drain voltage is gently increased as shown in FIG. 16 (l).
  • the rectifier diode D7 is turned on, the energy of the secondary boost reactor L1 is released, the currents iQ1 and iQ4 are lowered, and the current iD7 of the diode D7 Is also lowered.
  • the current of the rectifier diode D7 becomes zero, and the rectifier diode D7 is gently turned off. That is, the rectifier diode D7 is switched with zero current.
  • the currents iQ1 and iQ4 charge the drain-source capacitances C1 and C4 of the switching elements Q1 and Q4 by the free oscillation of the boost reactor L1 and the exciting current of the transformer T1, and FIG. ),
  • the drain voltages of the switching elements Q1 and Q4 are gently increased.
  • the bridge circuit discharges the capacitances C2 and C3 between the drains and the sources of the switching elements Q2 and Q3 by the free vibration of the boost reactor L1 and the exciting current of the transformer T1, and the drain voltage of the switching elements Q2 and Q3 is: It is gently lowered as shown in FIG.
  • switching elements Q2 and Q3 are turned on. Since the drain voltage at this time is almost 0 V, zero voltage switching is performed.
  • FIG. 16 (o) As described above, even in the high input voltage mode, an output current as shown in FIG. 16 (o) is supplied to the capacitor C8, and the voltage across the capacitor C8 is output from the output terminals 20A and 20B as a constant voltage.
  • FIG. 16 (k) when an input voltage higher than the rated input voltage is supplied to the converter, the switching frequency is increased and the on-duty is set small.
  • FIGS. 17 (a) to 19 (o) show the operation of each part in the DC-DC converter shown in FIG. 1 in the medium power mode.
  • 17 (a) to 19 (o) are the same as the rated input voltage mode (constant power), and therefore in the description of the rated input voltage mode (constant power), FIG. 8 (a) to FIG. )
  • FIG. 17 (a) to FIG. 19 (o) the operation of the DC-DC converter in the medium power mode can be understood.
  • Low power mode (constant input voltage) 20 (a) to 22 (o) show the operation of each part in the DC-DC converter shown in FIG. 1 in the low power mode. The operation of the DC-DC converter shown in FIG. 1 will be described with reference to FIGS. 20 (a) to 22 (o).
  • the drain-source capacitances C2 and C3 of the switching elements Q2 and Q3 are discharged by the free vibration of the boost reactor L1 and the exciting current of the transformer T1, and the drain voltages of the switching elements Q2 and Q3 are moderate. Is lowered.
  • a current obtained by combining the currents iQ1, iQ4 and iQ2, iQ3 flows as the transformer current i1 on the primary side.
  • iQ3 flows as the transformer current i1 on the primary side.
  • a current obtained by subtracting the excitation current flows as the current i2.
  • the switching element Q5 is turned off at time t3.
  • the current flowing through the step-up reactor L1 between the time point t3 and the time point t4 charges the capacitance C5 between the drain and source of the switching element Q5, and the drain voltage is gently increased as shown in FIG. 21 (j).
  • the rectifier diode D8 is turned on, and the energy of the secondary boost reactor L1 is released, and as shown in FIG. 21 (f), the current iQ2, iQ3 is lowered and the diode current iD8 is also lowered.
  • the current of the rectifier diode D8 becomes zero, and the rectifier diode D8 is gently turned off. That is, the rectifier diode D8 is switched with zero current.
  • switching elements Q1 and Q4 are turned on.
  • the currents iQ1 and iQ4 rise linearly on the primary side of the transformer T1 as well.
  • the switching element Q6 is turned off at time t8.
  • the current flowing through the boost reactor L1 between time t8 and time t9 charges the capacitance between the drain and source of the switching element Q6, and the drain voltage gently rises as shown in FIG. 22 (l).
  • the rectifier diode D7 is turned on, the energy of the secondary boost reactor L1 is released, the currents iQ1 and iQ4 are lowered, and the current iD7 of the diode D7 is decreased. Is also lowered.
  • time t10 all the energy of the boost reactor L1 is released, the current of the rectifier diode D7 becomes zero, and the rectifier diode D7 is gently turned off. That is, the rectifier diode D7 is switched with zero current.
  • the currents iQ1 and iQ4 charge the drain-source capacitances C1 and C4 of the switching elements Q1 and Q4 by the free vibration of the step-up reactor L1 and the exciting current of the transformer T1, and the switching elements Q1 and Q4 are charged.
  • the drain voltage of Q4 is gently increased.
  • the capacitances C2 and C3 between the drains and the sources of the switching elements Q2 and Q3 are discharged by the free vibration of the step-up reactor L1 and the exciting current of the transformer T1, and switching is performed as shown in FIG.
  • the drain voltages of elements Q2 and Q3 are gently lowered.
  • switching elements Q2 and Q3 are turned on. Since the drain voltage at this time is almost 0 V, zero voltage switching is performed.
  • the switching frequency is increased and the on-duty is set small.
  • FIG. 23 (a) to FIG. 25 (o) show the operation of each part in the DC-DC converter shown in FIG. 1 in the high power mode. The operation of the DC-DC converter shown in FIG. 1 will be described with reference to FIGS. 23 (a) to 25 (o).
  • the drain-source capacitances of the switching elements Q2 and Q3 are discharged by the free vibration of the step-up reactor L1 and the exciting current of the transformer T1, and the switching elements Q2 and Q2 are discharged as shown in FIG.
  • the drain voltage of Q3 falls gently.
  • a current obtained by combining the currents iQ1, iQ4 and iQ2, iQ3 flows as the primary-side transformer current i1, and the secondary-side transformer current i2 as shown in FIG. 24 (h).
  • a current obtained by subtracting the excitation current flows.
  • the switching elements Q2 and Q3 are turned on from the time t3 to the time t13.
  • the secondary side switching element Q5 is on from the time t3 to the time t7
  • the switching element Q6 is turned on from the time t3.
  • the currents iQ2 and iQ3 increase linearly on the primary side of the transformer T1 as well.
  • the switching element Q5 is turned off.
  • the current flowing through the step-up reactor L1 from time t7 to time t8 charges the drain-source capacitance C5 of the switching element Q5, and the drain voltage gently rises as shown in FIG. 24 (j). .
  • the rectifier diode D8 is turned on, the energy of the secondary boost reactor L1 is released, the currents iQ2 and iQ3 are lowered, and the diode current iD8 is also Descend.
  • the current of the rectifier diode D8 becomes zero, and the rectifier diode D8 is gently turned off. That is, the rectifier diode D8 is switched with zero current.
  • the currents iQ2 and iQ3 charge the drain-source capacitances C2 and C3 of the switching elements Q2 and Q3 by the free oscillation of the step-up reactor L1 and the exciting current of the transformer T1, and the switching elements Q2 and Q3 are charged.
  • the drain voltage of Q3 rises gently.
  • the drain-source capacitances C1 and C4 of the switching elements Q1 and Q4 are discharged by the free vibration of the step-up reactor L1 and the exciting current of the transformer T1, and the drain voltages of the switching elements Q1 and Q4 are gently reduced. Be lowered.
  • switching elements Q1, Q4 are turned on. Since the drain voltage at this time is almost 0 V, zero voltage switching is performed.
  • the rectifier diode D7 is turned on, the energy of the secondary boost reactor L1 is released, the currents iQ1 and iQ4 are lowered, and the current iD7 of the diode D7 is also lowered.
  • the current of the rectifier diode D7 becomes zero, and the rectifier diode D7 is gently turned off. That is, the rectifier diode D7 is switched with zero current.
  • the currents iQ1 and iQ4 are charged by the free oscillation of the boost reactor L1 and the exciting current of the transformer T1, and the drain-source capacitances C1 and C4 of the switching elements Q1 and Q4 are charged.
  • the drain voltage of Q4 rises gently.
  • the drain-source capacitances C2 and C3 of the switching elements Q2 and Q3 are discharged by the free vibration of the boosting reactor L1 and the exciting current of the transformer T1, and the drain voltages of the switching elements Q2 and Q3 are gently reduced. Be lowered.
  • switching elements Q2 and Q3 are turned on. Since the drain voltage at this time is almost 0 V, zero voltage switching is performed.
  • FIG. 25 (o) an output current as shown in FIG. 25 (o) is supplied to the capacitor C8, and the voltage across the capacitor C8 is output from the output terminals 20A and 20B as a constant voltage.
  • 25 (k) when a power larger than the rated input power is supplied to the converter, the switching frequency is lowered and the on-duty is set large.
  • FIG. 26 is a waveform diagram showing an operation in each part of the push-pull voltage resonance circuit shown in FIG.
  • the operation mode shown in FIG. 26 corresponds to a mode in which a rated input voltage is input, and switching elements Q4 and Q2 are similarly operated as is apparent from a comparison between FIG. 26 and FIG.
  • FIG. 26 shows on / off of the gate voltage of the switching element Q4, and (b) in FIG. 26 shows changes in the drain voltage of the switching element Q4.
  • (c) of FIG. 26 shows on / off of the gate voltage of the switching element Q2, and
  • (d) of FIG. 26 shows a change in the drain voltage of the switching element Q2.
  • FIG. 26E shows a change in the drain current of the switching element Q4.
  • the push-pull voltage resonance circuit is operated in the same manner as the bridge resonance circuit, and therefore the description and the waveform diagrams in each mode are omitted.
  • the DC-DC converter shown in FIG. 1 is different from the DC-DC converter of Patent Document 1 as a comparative example in that it has a wide control range (constant output power, control when the input voltage is variable, constant input voltage, and output power. Control when variable) is possible.
  • a wide control range constant output power, control when the input voltage is variable, constant input voltage, and output power. Control when variable
  • two transformer outputs are rectified from the primary-side uncontrolled converter, and series and parallel are alternately controlled by the secondary-side converter, so this can be realized only within the double input voltage range. There is no problem.
  • the DC-DC converter shown in FIG. 1 uses boosting for output voltage control. Therefore, even when the secondary voltage of the transformer is low, any input voltage range can be controlled as long as it has a boosting function. Therefore, a wide control range can be realized.
  • composite resonance is used.
  • current resonance is performed by a resonance reactor (including transformer leakage inductance) and a resonance capacitor, and a current close to a sine wave is passed.
  • the switching element is turned on / off at 0 A to realize zero current switching.
  • the output of the two transformers is operated in series and parallel in the secondary circuit, and the output voltage is controlled.
  • voltage control is performed using frequency control without providing a current resonance circuit. Therefore, soft switching can be realized in both the primary circuit and the secondary circuit.
  • the circuit of the comparative example has two rectifier circuits on the secondary side (voltage doubler circuit), each circuit has at least two rectifier diodes, and two flywheel diodes and diodes in the secondary circuit A total of 6 are required.
  • the number of rectifier diodes can be reduced to two, and the diode loss can be reduced.
  • the step-up reactor helps charge / discharge of the capacitance between the drain and source of the primary switching element, and can reduce the exciting current flowing in the transformer primary. Since the exciting current is a reactive current, reducing the reactive current reduces the loss and improves the efficiency. Specifically, according to the DC-DC converter shown in FIG. 1, the efficiency can be improved by 0.5% to 1.0% compared to the circuit according to the comparative example.
  • the diodes D5 and D6 shown in FIG. 1 constitute a synchronous rectifier circuit with switching elements Q7 and Q8 (FET) that are turned on and off in synchronization with the switching elements Q5 and Q6 as shown in FIG. You may do it. Since the switching elements Q7 and Q8 are turned on / off in synchronism, they are operated in the same manner as shown in FIGS. 8 (a) to 25 (o).
  • the switching elements Q7 and Q8 have capacitors C7 and C8 and diodes D7 and D8 equivalently as other switching elements.
  • the step-up reactor L1 is connected to the secondary high voltage terminal of the transformer T1, but is connected to the secondary high voltage terminal as shown in FIG. Instead, it may be connected between the primary side of the transformer T1 and the connection point between the switching elements Q2 and Q4. Further, if the high-frequency transformer T1 is a leakage transformer, the leakage inductance included in the leakage transformer has the action of a boosting reactor, and therefore the boosting reactor L1 shown in FIG. 1 may be omitted.
  • control is performed as follows in constant power control.
  • the voltage of the transformer T1 When the input voltage is low, the voltage of the transformer T1 is lowered. Therefore, the frequency is lowered in order to lengthen the ON time of the booster circuit on the secondary side.
  • the on period In the low input voltage mode, since the current is increased at the timing from time t3 to time t9, the on period is set longer and the off period is set shorter in the duty cycle of switching element Q5 and switching element Q6.
  • the voltage boost ratio is set large.
  • the transformer voltage is raised. Therefore, the frequency is increased in order to shorten the ON period of the booster circuit on the secondary side.
  • the duty cycle of the switching element Q5 and the switching element Q6 is set to be long and the on period is set to be short so that the current is decreased at the timing from the time point t8 to the time point t9. Is set smaller.
  • the duty cycle of the switching element Q5 and the switching element Q6 is constant. Since the frequency is increased and the ON period of the booster circuit is reduced, the energy stored in the boost reactor is reduced, and the output voltage is kept constant so as to correspond to the small output power.
  • the duty cycle of switching element Q5 and switching element Q6 is made constant. Since the ON period of the booster circuit is increased by reducing the frequency, the energy stored in the booster reactor is increased, and the output voltage is kept constant so as to correspond to the large output power.
  • the switching elements used on the input / output sides (primary and secondary sides) of the isolation transformer are all controlled by soft switching, a highly efficient DC -It can be a DC converter.
  • the leakage inductance of the transformer is used. Therefore, although it is a high-efficiency DC-DC converter, it is possible to realize low cost without requiring individual components.
  • leakage inductance has a large individual difference and variation in the value of the resonance frequency, but since switching control is performed by software, individual adjustment values can be recorded, and ideal resonance and control can be realized. . Further, since the switching element is controlled by lowering the switching frequency, the loss in switching or the core loss of the transformer can be reduced, and higher efficiency can be realized.
  • a highly efficient DC-DC converter is provided.

Abstract

L'invention porte sur un convertisseur CC-CC dans lequel un transformateur haute fréquence isolé est installé et un circuit résonant en tension composé d'un circuit de commutation est connecté au côté primaire d'un premier transformateur. Une inductance est connectée en série entre la borne côté secondaire du transformateur haute fréquence et une borne de sortie, un second circuit de commutation est connecté entre le côté secondaire et la borne de sortie de façon à être alternativement commuté entre ceux-ci, et une tension est délivrée par l'intermédiaire d'un circuit de redressement et d'un circuit de lissage. Le circuit résonant en tension est commuté au moyen de premiers signaux de commutation, et la fréquence des premiers signaux de commutation est réglée plus haute qu'une fréquence de référence lorsque la tension de sortie est supérieure à une tension cible, et lorsque la tension de sortie est inférieure à la tension cible, la fréquence du premier signal de commutation est réglée plus basse que la fréquence de référence.
PCT/JP2010/054552 2009-03-18 2010-03-17 Convertisseur cc-cc WO2010107060A1 (fr)

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JP2015154506A (ja) * 2014-02-10 2015-08-24 オリジン電気株式会社 Ｄｃ−ｄｃコンバータ
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JP2013546295A (ja) * 2010-11-12 2013-12-26 エスエムエー ソーラー テクノロジー エージー 電気エネルギーをｄｃ発電機から２本の電力線を有するａｃグリッドに供給する電力インバータ
JPWO2013114758A1 (ja) * 2012-02-03 2015-05-11 富士電機株式会社 共振形ｄｃ−ｄｃコンバータの制御装置
WO2013114758A1 (fr) * 2012-02-03 2013-08-08 富士電機株式会社 Dispositif de commande pour convertisseur continu-continu du type à résonance
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WO2013132727A1 (fr) * 2012-03-05 2013-09-12 富士電機株式会社 Dispositif de conversion c.c.-c.c.
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JP2014176241A (ja) * 2013-03-12 2014-09-22 Denso Corp スイッチング電源
JP2015154506A (ja) * 2014-02-10 2015-08-24 オリジン電気株式会社 Ｄｃ−ｄｃコンバータ
US11881788B2 (en) 2019-12-16 2024-01-23 Mitsubishi Electric Corporation DC/DC converter and power conversion device
CN112953266A (zh) * 2021-03-23 2021-06-11 山东大学 一种非对称隔离型ac-dc变换器的运行状态控制方法及系统
CN112953266B (zh) * 2021-03-23 2022-04-08 山东大学 一种非对称隔离型ac-dc变换器的运行状态控制方法及系统

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