WO2010081312A1 - 叠状表面贴装型热敏电阻及其制造方法 - Google Patents
叠状表面贴装型热敏电阻及其制造方法 Download PDFInfo
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- WO2010081312A1 WO2010081312A1 PCT/CN2009/072497 CN2009072497W WO2010081312A1 WO 2010081312 A1 WO2010081312 A1 WO 2010081312A1 CN 2009072497 W CN2009072497 W CN 2009072497W WO 2010081312 A1 WO2010081312 A1 WO 2010081312A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/18—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material comprising a plurality of layers stacked between terminals
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
- H01C1/1406—Terminals or electrodes formed on resistive elements having positive temperature coefficient
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
- H01C1/148—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors the terminals embracing or surrounding the resistive element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/02—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material having positive temperature coefficient
- H01C7/027—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material having positive temperature coefficient consisting of conducting or semi-conducting material dispersed in a non-conductive organic material
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49082—Resistor making
- Y10T29/49085—Thermally variable
Definitions
- the present invention relates to the field of thermistor technology, and more particularly to the field of surface mount type thermistors, and more particularly to a stacked surface mount type thermistor and a method of manufacturing the same. Background technique
- PTC Positive Temperature Coefficient
- the upper and lower surfaces of the metal foil are often etched to form an etched area, which affects the effective use area thereof, and is soldered to the circuit board.
- the positional offset has the potential to cause a short circuit.
- the main object of the present invention is to provide a stacked surface mount type thermistor and a method for manufacturing the same according to the above problems and disadvantages, and the stacked surface mount type thermistor has superior performance and high product qualification rate.
- the manufacturing method has unique process, no etching, environmental protection, cost reduction, stable process, high precision and high yield.
- a stacked surface mount type thermistor of the present invention and a method of manufacturing the same are as follows:
- the conductive module includes a core conductive module and an insulating layer, and the insulating layer covers upper and lower surfaces and left and right sides of the core conductive module, and the core conductive module includes a conductive unit comprising an upper metal foil bonded in order from top to bottom, a conductive polymer chip having PTC characteristics, and a lower metal foil, wherein the left conductive metal layer and the right conductive metal layer are respectively attached
- the insulating layer is partially passed through the left and right portions of the conductive module to be respectively connected to the upper metal foil/lower metal foil and the lower metal foil/upper metal foil of the conductive unit.
- the insulating layer includes an upper insulating layer, a lower insulating layer, a left insulating layer and a right insulating layer, and the upper insulating layer and the lower insulating layer are respectively attached to the upper and lower surfaces of the core conductive module The left insulating layer and the right insulating layer are respectively attached to the left and right sides of the core conductive module.
- the upper insulating layer and the lower insulating layer are an upper insulating film and a lower insulating film, respectively, and the left insulating layer and the right insulating layer are a left insulating rubber and a right insulating rubber, respectively.
- the left conductive metal layer partially penetrates the left insulating layer
- the right conductive metal layer partially penetrates the right insulating layer to respectively form the upper metal foil of the conductive unit and the Lower metal foil connection.
- the left conductive metal layer partially penetrates the upper insulating layer
- the right conductive metal layer partially penetrates the lower insulating layer to respectively form the upper metal foil of the conductive unit and the Lower metal foil connection.
- the conductive polymer chip is prepared by mixing at least one of a crystalline polymer, a conductive filler and a processing aid, and then by a twin-screw extrusion calendering process.
- the upper metal foil, the lower metal foil, the left conductive metal layer and the right conductive metal layer are respectively selected from one or more of copper, iron, nickel, tin, silver, and gold. , of course, other suitable metals can also be used; the insulating layer And the insulating material layer is respectively selected from one or more of a polypropylene resin, a bisphenol epoxy resin, an epoxidized phenolic resin, a silicone resin, or a glass fiber reinforced mixture, and of course, other suitable insulation may be used. material.
- the conductive polymer chip has a thickness of 0.10 to 5 mm.
- the left conductive metal layer and the right conductive metal are U-shaped thin-walled metal layers.
- the upper resistive coating and the lower resistive coating are respectively attached to the upper and lower surfaces of the conductive module for blocking the left conductive metal layer and the right conductive Metal layer.
- the upper resist coating film and the lower resist coating film are respectively selected from one or more of a polypropylene resin, an epoxy resin, and a silicone resin.
- a polypropylene resin an epoxy resin
- a silicone resin a polypropylene resin
- other suitable high molecular polymer materials may also be used.
- the conductive polymer chip is prepared by mixing at least one crystalline polymer, a conductive filler and a processing aid through a twin-screw extrusion calender.
- the conductive polymer chip has a thickness of 0.10 to 5 mm.
- the upper metal foil, the lower metal foil, the left conductive metal layer and the right conductive metal layer are respectively selected from one or more of copper, iron, nickel, tin, silver, and gold.
- the insulating layer and the insulating material layer are respectively selected from one or more of bisphenol epoxy resin, epoxidized phenolic resin, silicone resin, or glass fiber reinforced type. Mixture, of course, other suitable insulating materials may also be used; the upper resist coating film and the lower resist coating film are respectively selected from one or more of a polypropylene resin, an epoxy resin, and a silicone resin, and of course, Use other suitable polymeric materials.
- the insulating layer comprises an upper insulating layer, a lower insulating layer, a left insulating layer and a right insulating layer, wherein the upper insulating layer and the lower insulating layer are respectively attached to each other On the upper and lower surfaces of the core conductive module, the left insulating layer and the right insulating layer are respectively attached to the left and right sides of the core conductive module.
- the left insulating layer and the right insulating layer are formed by respectively applying an insulating paste on the left and right sides of the core conductive module and curing it.
- the physical processing method includes, but is not limited to, a laser processing method.
- a stacked surface mount type thermistor comprising: a conductive module, a left conductive metal layer and a right conductive metal layer, wherein the conductive module comprises a core conductive module And an insulating layer covering the upper and lower surfaces and the left and right sides of the core conductive module, the core conductive module includes at least two conductive units stacked in sequence, and an insulating material layer is spaced between the two conductive units, the conductive unit
- the upper metal foil, the conductive polymer chip having the PTC characteristic, and the lower metal foil are sequentially bonded from top to bottom, and the left conductive metal layer and the right conductive metal layer respectively adhere to the left side of the conductive module and
- the insulating layer is disposed through the right portion and partially to be respectively connected to the upper metal foil/lower metal foil and the lower metal foil/upper metal foil of the conductive unit.
- the insulating layer includes an upper insulating layer, a lower insulating layer, a left insulating layer and a right insulating layer, and the upper insulating layer and the lower insulating layer are respectively attached to the upper and lower surfaces of the core conductive module The left insulating layer and the right insulating layer are respectively attached to the left and right sides of the core conductive module.
- the upper insulating layer and the lower insulating layer are an upper insulating film and a lower insulating film, respectively, and the left insulating layer and the right insulating layer are a left insulating rubber and a right insulating rubber, respectively.
- the number of said conductive units is two.
- the number of conductive units can be more than two, and the specific number can be determined according to actual needs.
- the left conductive metal layer partially penetrates the left insulating layer to be connected to the upper metal foil of one of the conductive units and the lower metal foil of another of the conductive units
- the right The conductive metal layer partially penetrates the right insulating layer to be connected to the lower metal foil of one of the conductive units and the upper metal foil of the other of the conductive units.
- the left conductive metal layer partially penetrates the upper insulating layer and the lower insulating layer to contact the upper metal foil of one of the conductive units and the lower metal of another of the conductive units a foil connection
- the right conductive metal layer partially penetrates the right insulating layer to be connected to the lower metal foil of one of the conductive units and the upper metal foil of another of the conductive units.
- the conductive polymer chip is mixed with at least one crystalline polymer, conductive filler and processing aid. After the combination, it is produced by a twin-screw extrusion calendering or the like.
- the upper metal foil, the lower metal foil, the left conductive metal layer and the right conductive metal layer are respectively selected from one or more of copper, iron, nickel, tin, silver, and gold.
- the insulating layer and the insulating material layer are respectively selected from one or more of a polypropylene resin, a bisphenol epoxy resin, an epoxidized phenolic resin, and a silicone resin, or Glass fiber reinforced mixtures, of course, other suitable insulating materials can also be used.
- the conductive polymer chip has a thickness of 0.10 to 5 mm.
- the left conductive metal layer and the right conductive metal are U-shaped thin-walled metal layers.
- the upper resistive coating and the lower resistive coating are respectively attached to the upper and lower surfaces of the conductive module for blocking the left conductive metal layer and the right conductive Metal layer.
- the upper resist coating film and the lower resist coating film are respectively selected from one or more of a polypropylene resin, an epoxy resin, and a silicone resin.
- a polypropylene resin an epoxy resin
- a silicone resin a polypropylene resin
- other suitable high molecular polymer materials may also be used.
- a method of fabricating the above-described stacked surface mount type thermistor the main feature of which is the following steps:
- the conductive polymer chip is prepared by mixing at least one crystalline polymer, a conductive filler and a processing aid through a twin-screw extrusion calender.
- the conductive polymer chip has a thickness of 0.10 to 5 mm.
- the upper metal foil, the lower metal foil, the left conductive metal layer and the right conductive metal layer are respectively selected from one or more of copper, iron, nickel, tin, silver, and gold.
- the insulating layer And the insulating material layer is respectively selected from one or more of a bisphenol epoxy resin, an epoxidized phenolic resin, a silicone resin, or a glass fiber reinforced mixture, and of course, other suitable insulating materials may also be used
- the upper resist coating and the lower resist coating are respectively selected from one or more of a polypropylene resin, an epoxy resin, and a silicone resin.
- other suitable high molecular polymer materials may also be used.
- the insulating layer comprises an upper insulating layer, a lower insulating layer, a left insulating layer and a right insulating layer, wherein the upper insulating layer and the lower insulating layer are respectively attached to each other On the upper and lower surfaces of the core conductive module, the left insulating layer and the right insulating layer are respectively attached to the left and right sides of the core conductive module.
- the left insulating layer and the right insulating layer are formed by respectively applying an insulating paste on the left and right sides of the core conductive module and curing it.
- the physical processing method includes, but is not limited to, a laser processing method.
- the method further comprises the step of: cutting the core conductive module into a suitable shape.
- a stacked surface mount type thermistor comprising: a conductive module, a left conductive metal layer and a right conductive metal layer insulated from each other, the conductive module
- the core conductive module and the insulating layer are coated on the upper surface and the lower surface of the core conductive module, and the core conductive module comprises at least two conductive polymer chips having PTC characteristics stacked in sequence And a central metal layer is interposed between two adjacent conductive polymer chips having PTC characteristics, and the top surface of the uppermost conductive polymer chip having PTC characteristics is coated with an upper metal layer And the bottom surface of the conductive polymer chip having the PTC characteristic of the lowermost layer is attached with a lower metal layer, and the left conductive metal layer and the right conductive metal layer respectively adhere to the left and right of the conductive module And the upper metal layer, the central metal layer and the lower metal layer are respectively connected to the left conductive metal layer and the right conductive metal layer in an even-and-even manner
- the insulating layer comprises an upper insulating layer and a lower insulating layer, and the upper insulating layer and the lower insulating layer are respectively attached on the upper surface and the lower surface of the core conductive module.
- the insulating layer may further include a left insulating layer and a right insulating layer, and the left insulating layer and the right insulating layer are respectively attached to the left side surface and the right side surface of the core conductive module.
- the left conductive metal layer is attached to the outside of the left insulating layer, and the left conductive metal layer partially penetrates the left insulating layer and the corresponding metal part of the upper metal layer, the central metal layer and the lower metal layer
- the layer is electrically connected
- the right conductive metal layer is attached to the outside of the right insulating layer, and the right conductive metal layer partially penetrates the right insulating layer and the upper metal layer, the central metal layer and the lower layer A corresponding portion of the metal layer in the metal layer is electrically connected.
- the number of the conductive polymer chips having the PTC characteristics may be an even number.
- the insulating layer further includes a left insulating layer and a right insulating layer, and the left insulating layer and the right insulating layer are respectively attached to the left side surface and the right side surface of the core conductive module, The left conductive metal layer is attached to the outer side of the left insulating layer, and the left conductive metal layer partially penetrates the left insulating layer to be electrically connected to a corresponding partial metal layer of the central metal layer.
- the right conductive metal layer is attached to the outside of the right insulating layer, and the right conductive metal layer partially passes through the right insulating layer and is electrically connected to a corresponding one of the central metal layers;
- the conductive metal layer partially penetrates the upper insulating layer and the lower insulating layer and is electrically connected to the upper metal layer and the lower metal layer, respectively.
- the number of the conductive polymer chips having the PTC characteristics may also be an odd number.
- the insulating layer may further include a left insulating layer and a right insulating layer, and the left insulating layer and the right insulating layer are respectively attached to the left side surface and the right side surface of the core conductive module.
- the left conductive metal layer is attached to the outside of the left insulating layer, and the left conductive metal layer partially penetrates the left insulating layer and is electrically connected to a corresponding partial metal layer of the central metal layer.
- the right conductive metal layer is attached to the outside of the right insulating layer, and the right conductive metal layer partially passes through the right insulating layer and is electrically connected to a corresponding portion of the central metal layer;
- the left conductive metal layer partially penetrates the upper insulating layer and is electrically connected to the upper metal layer and the phase, and the right conductive metal layer partially penetrates the lower insulating layer and the lower metal The layer is electrically connected.
- the thermistor further comprises an upper resistive coating and a lower resistive coating, wherein the upper resistive coating and the lower resistive coating are respectively attached to the upper and lower surfaces of the conductive module and insulated to block the left conductive metal. Layer and right conductive metal layer.
- the central metal layer is a double-faced metal foil.
- the upper metal layer and the lower metal layer are both single-faced metal foils, and the matte surface of the single-faced metal foil is attached to the corresponding surface of the conductive polymer chip having the PTC characteristics. .
- the upper metal layer, the central metal layer and the lower metal layer are respectively electrically connected to the left conductive metal layer and the right conductive metal layer in an evenly spaced manner; or, in the conductive module
- the intermediate portions of the upper and lower surfaces are respectively adhered to the upper plating resist and the lower resist coating, and then integrally plated to form the left conductive metal layer and the right conductive metal layer, and the upper metal layer and the central metal layer are formed.
- the lower metal layer are respectively electrically connected to the left conductive metal layer and the right conductive metal layer in an even-and-even manner.
- the conductive polymer chip is prepared by mixing at least one crystalline polymer, a conductive filler and a processing aid, followed by twin-screw extrusion calendering.
- the insulating layer comprises an upper insulating layer, a lower insulating layer, a left insulating layer and a right insulating layer, and the upper insulating layer and the lower insulating layer are respectively attached to the On the upper and lower surfaces of the core conductive module, the left insulating layer and the right insulating layer are respectively attached to the left and right sides of the core conductive module.
- the left insulating layer and the right insulating layer are formed by respectively applying an insulating paste on the left and right sides of the core conductive module.
- the physical processing method includes, but is not limited to, a laser processing method.
- the method does not need to perform an etching process on the surface of the metal foil, as long as two insulating rubbers (or two of the insulating films, or one of the insulating paste and one of the insulating films) of the conductive module having the insulating layer formed on the upper, lower, left, and right sides
- the physical processing (for example, laser gasification) step is performed so that the metal foil portion is partially exposed and connected to the two plated metal layers bonded to the outside.
- the manufacturing method does not require secondary processing on the surface of the metal foil, but only requires secondary treatment on the surface of the insulating film/insulating adhesive to form a small physical processing grooved area.
- the above-described stacked surface mount type thermistor and the manufacturing method of the present invention have the following advantages:
- the physical processing slotting precision is high, for example, the linear precision of laser processing can reach 0.05mm, the laser processing line width can also reach 0.05mm, and the yield rate is higher than the traditional process;
- Fig. 1 A is a perspective view showing a first embodiment of the stacked surface mount type thermistor of the present invention.
- FIG. 1B to II are schematic views showing the manufacturing process of the first embodiment shown in Fig. 1A.
- Fig. 2A is a perspective view showing a second embodiment of the stacked surface mount type thermistor of the present invention.
- FIG. 2B to 2D are schematic views showing a part of the manufacturing process of the second embodiment shown in Fig. 2A.
- Fig. 3A is a perspective view showing a third embodiment of the stacked surface mount type thermistor of the present invention.
- 3B to 3E are schematic views showing a part of the manufacturing process of the third embodiment shown in Fig. 3A.
- Fig. 4A is a perspective view showing a fourth embodiment of the stacked surface mount type thermistor of the present invention.
- FIG. 4B to 4G are schematic views showing the manufacturing process of the fourth embodiment shown in Fig. 4A.
- Figure 5 is a perspective view showing a fifth embodiment of the stacked surface mount type thermistor of the present invention.
- Fig. 6A is a perspective view showing a sixth embodiment of the stacked surface mount type thermistor of the present invention.
- FIG. 6B to 6F are schematic views showing a part of the manufacturing process of the sixth embodiment shown in Fig. 6A.
- Fig. 7A is a perspective view showing a seventh embodiment of the stacked surface mount type thermistor of the present invention.
- FIG. 7B to 7E are schematic views showing a part of the manufacturing process of the seventh embodiment shown in Fig. 7A.
- Fig. 8A is a perspective view showing an eighth embodiment of the stacked surface mount type thermistor of the present invention.
- FIG. 8B to 8E are schematic views showing the manufacturing process of the eighth embodiment shown in Fig. 8A. detailed description
- Fig. 1A is a structural diagram of a stacked surface mount type positive temperature coefficient characteristic thermistor of Example 1 of the present invention.
- the PTC-charging conductive polymer chip 3 is a polymer sheet composed of a mixture of one or more crystal polymers, a conductive filler, and a processing aid; the metal foil 2 is uniformly covered above.
- the conductive polymer chip 3 of the PTC characteristic is upper and lower sides; the insulating film 1 is uniformly adhered to the surfaces of the two metal foils 2; the insulating adhesive 4 is applied to the left and right sides of the conductive polymer chip 3 of the above PTC characteristics, both sides
- the insulating adhesive 4 is formed into four parts in total; the resistive coating film 5 is uniformly adhered to the intermediate portion of the upper and lower insulating films 1 , and the upper and lower resistive coating films 5 are formed in two parts; formed in the gaps of the insulating rubber 4 on both sides
- the physical processing grooved area on each of the left and right sides, the electroplated conductive metal layer 6 at both ends is well adhered to the surface of the insulating glue 4, the insulating film 1 and the metal foil 2 in the physical processing grooved area, so that the left and right ends are plated with conductive metal
- the layer 6 maintains a good electrical connection with the two-sided metal foil 2 described above.
- one or more kinds of crystal polymer, conductive filler and processing aid are mixed, respectively, through a twin-screw extrusion calender to make a total thickness of 0.10 ⁇ 5mm, as shown in Figure 1B of the core conductive module, the process
- the obtained core conductive module is characterized in that the metal foil 2 is closely laminated on the upper and lower surfaces of the conductive polymer chip 3;
- an insulating film 1 is laminated on each of the upper and lower sides of the core conductive module to form a sheet as shown in FIG. 1C; and then cut into strips of a prescribed width, as shown in FIG. 1D; or The insulating film 1 is cut before being pressed; and if the sheet as shown in Fig. 1C is originally a suitable size, it is not necessary to cut;
- a layer of insulating glue 4 is coated on the left and right sides of the strip-shaped sheet and cured, so that the upper and lower sides of the core conductive module are covered with an insulating layer, thereby forming a conductive module precursor as shown in FIG. 1E;
- a surface of the outer insulating cover is grooved by a physical processing method (for example, laser processing) to expose a portion of the inner metal foil to form a physical processing grooved region as shown in FIG. 1F.
- a conductive module shown by a circle in Figure 1F;
- a strip of anti-plating film 5 is applied to each of the upper and lower surfaces of the conductive module to form a sheet as shown in FIG. 1G; and then integrally plated to form a strip having a conductive metal layer 6 as shown in FIG. 1H. ;
- the thin strip of the sheet shown in Fig. 1H is cut into individual surface mount type components having a prescribed size, as shown in Fig. II, if the size of the thin strip shown in Fig. 1H is originally a single surface mount type component. The size does not need to be cut. See Figure 1A for the specific structure.
- the step of applying the plating resist 5 and the physical processing grooving process are interchangeable, which does not affect the manufacture of the surface mount type positive temperature coefficient characteristic thermistor.
- a stacked surface mount type positive temperature coefficient characteristic thermistor of the embodiment 2 of the present invention and a method of manufacturing the same will be described with reference to Figs. 2A to 2D.
- Fig. 2A is a structural view showing a stacked surface mount type positive temperature coefficient characteristic thermistor of Example 2 of the present invention.
- the PTC-charging conductive polymer chip 3 is a polymer sheet composed of a mixture of one or more crystalline polymers, conductive fillers, and processing aids; the metal foil 2 is uniformly covered above.
- the conductive polymer chip 3 of the PTC characteristic is upper and lower sides; the insulating film 1 is uniformly adhered to the surfaces of the two metal foils 2; the insulating adhesive 4 is applied to the left and right sides of the conductive polymer chip 3 of the above PTC characteristics, both sides
- the insulating rubber 4 is formed into four parts in total; a physical processing grooved area is formed in the gap between the two sides of the insulating rubber 4, and the conductive metal layer 6 of the left and right ends and the upper and lower parts are well adhered to the insulating glue 4,
- the insulating film 1 and the surface of the metal foil 2 in the grooving region are physically processed so that the conductive metal layer 6 maintains a good electrical connection with the above-mentioned double-sided metal foil 2.
- a conductive module having a physically machined grooved area (shown by a circle in Fig. 2B) as shown in Fig. 2B is formed by the same process as that corresponding to Figs. 1B to F in the embodiment 1.
- a conductive metal layer 6 is formed on both sides of the conductive module, that is, a U-shaped thin-walled metal groove (see FIG. 2C), and the U-shaped metal groove is connected to the PTC metal foil by soldering or the like to form a conductive metal layer 6.
- Fig. 3A is a structural view showing a stacked surface mount type positive temperature coefficient characteristic thermistor of Example 3 of the present invention.
- the PTC-charging conductive polymer chip 3 is a polymer sheet composed of a mixture of one or more crystal polymers, a conductive filler, and a processing aid; the metal foil 2 is uniformly covered above.
- the conductive polymer chip 3 of the PTC characteristic is upper and lower sides;
- the insulating film 1 is uniformly adhered to the surfaces of the two metal foils 2, and the insulating film 1 is on both sides A total of four portions are formed on the metal foil 2;
- the insulating adhesive 4 is applied to the left and right side ends of the conductive polymer chip 3 of the above PTC characteristics;
- the resist plating film 5 is uniformly adhered to the intermediate portion of the upper and lower surfaces of the insulating film 1, upper and lower sides
- the resistive coating film 5 - forms two parts in total; in the gap between the upper and lower insulating films, there is a physical processing grooved area having grooves on the upper and lower sides; the electroplated conductive metal layer 6 is well adhered to the insulating glue 4,
- the first step of the conductive module shown in FIG. 3B is formed by the same process as that corresponding to FIG. 1B to E in the first embodiment; then, the resistive coating film 5 is partially coated on the upper and lower surfaces of the upper and lower surfaces of the conductive module precursor, and is formed as shown in the figure.
- a surface of the outer insulating cover layer is grooved by a physical processing method (for example, laser processing or the like) to expose the inner metal foil, thereby forming a concave shape as shown in FIG. 3D.
- a conductive module that physically processes the slotted area shown by ⁇ in Figure 3D;
- the above-mentioned conductive module is integrally plated to form a strip-shaped sheet having a conductive metal layer as shown in FIG. 3E.
- the thin strip-shaped sheet is cut into a single surface mount having a prescribed size and structure as shown in FIG. 3A.
- the type of component likewise, if the size of the thin strip shown in Fig. 3E is originally the size of a single surface mount component, no cutting is required.
- the step of cutting into a strip-shaped sheet, the step of applying the insulating paste 4 and the resist plating film 5, and the step of physically processing the grooving may also be interchanged, which does not affect the surface mount type positive temperature coefficient characteristic thermistor Manufacturing.
- Fig. 4A is a structural diagram of a stacked surface mount type positive temperature coefficient characteristic thermistor of Example 4 of the present invention.
- the PTC-charging conductive polymer chip 3 is composed of a mixture of one or more crystalline polymers, conductive fillers, and processing aids, and is formed into a polymer sheet as shown in the figure.
- the insulating rubber 4 on both sides forms a total of five parts; the physical processing of the groove is formed at the intersection of the insulating film 1, the metal foil 2 and the left and right insulating rubber 4 a grooved area, wherein the left side is two places, and the right side is one; the resist plating film 5 is uniformly adhered to the intermediate portion of the upper and lower double-sided insulating films 1, and a total of two portions of the plating resist film 5 are formed; the conductive metal layers 6 at the left and right ends are well adhered to Insulating adhesive 4, Border membrane 12 surface area and the physical processing slotted metal foil, the conductive metal layer such that the left and right ends 62 to maintain good electrical contact with the opposing metal foils.
- the conductive polymer chip 3 is prepared by mixing one or more kinds of crystal polymer, conductive filler and processing aid, respectively, through a twin-screw extrusion calender, and the metal foil 2 is closely laminated on the conductive polymer chip 3 Forming a single layer PTC thermistor sheet on both sides;
- the two single-layer PTC thermistor sheets and the three-layer insulating film 1 are taken, and a laminated film of two layers of PTC thermistors is formed by a hot pressing process, which is characterized in that each of the above-mentioned single-layer PTC thermal An insulating film 1 is laminated on both upper and lower sides of the resistive sheet, and then cut into strips of a predetermined width, as shown in Fig. 4B, of course, if the size is already suitable, no cutting is required;
- an insulating rubber is applied to the left and right sides of the strip-shaped laminated sheet and solidified to form a four-sided insulating coating layer to form a conductive module precursor as shown in FIG. 4C;
- the surface of the outer insulating cover is grooved by a physical processing method (for example, laser processing, etc.) to partially expose the inner metal foil, and three or more physical processes are formed as shown in FIG. 4D.
- a conductive module in the slotted area shown as a circle in Figure 4D, one on the left and two on the right);
- a plating resist 5 is applied to the upper and lower surfaces of the conductive module to form a laminated sheet as shown in FIG. 4E; and then integrally plated to form a laminated sheet having a conductive metal layer as shown in FIG. 4F;
- the stacked thin strips as shown in Fig. 4F are cut into individual surface mount type components having a prescribed size, as shown in Fig. 4G, and likewise, if the size of the laminated sheets shown in Fig. 4F is originally a single surface The size of the mounted component does not need to be cut. See Figure 4A for the specific structure.
- the U-shaped metal groove is closely connected with the PTC metal foil by welding, etc. Finally, the formed thin strip-shaped sheet is cut. A single surface mount component with a specified size. The element structure obtained at this time is free from the upper and lower two-layer resist film 5 shown in Fig. 4A.
- Fig. 5 illustrates an innovative structure for forming a physically processed grooving zone of another mode. Obviously, it is not limited to the slotting method described in this example.
- the PTC-characterized conductive polymer chip 3 is composed of a mixture of one or more crystalline polymers, conductive fillers, and processing aids, and is formed into a polymer sheet as shown in the figure.
- the metal foil 2; the insulating film 1 is uniformly adhered to the surface of the above-mentioned four-layer metal foil 2, and the four-layer metal foil 2 makes a total of three insulating films 1 and three insulating films 1 form a total of five parts;
- the insulating glues 4 on both sides are formed in three parts; in the insulating film 1, the metal foil 2 and the insulating rubber
- a stacked surface mount type positive temperature coefficient characteristic thermistor of Embodiment 6 of the present invention and a method of manufacturing the same will be described with reference to Figs. 6A to 6F.
- Fig. 6A is a structural view showing a stacked surface mount type positive temperature coefficient characteristic thermistor of Example 6 of the present invention.
- the PTC-charging conductive polymer chip 1 is a polymer sheet composed of a mixture of one or more crystal polymers, a conductive filler, and a processing aid; a double-faced metal foil 3 uniformly covering the upper and lower layers of the PTC characteristics of the conductive polymer chip 1 on the interlayer; the two layers of the single-faced metal foil 2 are uniformly adhered to the upper and lower sides of the two layers of the PTC-characterized conductive polymer chip 1;
- the insulating film 4 is uniformly adhered to the surface of the two single-sided metal foils 2, and the insulating film 4 is formed on the two sides of the single-sided metal foil 2 in two parts; the insulating rubber 6 covers the left and right sides of the combined body In the gap between the insulating film 4 on the upper and lower sides and the metal foil, there are three physical processing regions having grooves, wherein the left side is at two places and the right side is at one side; the left and right ends and the upper and lower portions are The conductive metal
- the sheet obtained by the process is characterized in that a double-faced metal foil 3 is uniformly covered on the upper and lower layers of the PTC-charging conductive polymer chip 1 on the interlayer, and the two-layered single-faced metal foil 2 is formed. Tightly laminated on the upper and lower surfaces of the conductive polymer chip 1, the insulating film 4 is in close contact with the two layers of the single-faced metal foil 2;
- the inner metal foil is exposed by a physical processing method (for example, laser processing or the like) to expose the inner metal foil to form a sheet having three physical processing regions as shown in FIG. 6D.
- the physical processing zone of the sheet is characterized by two places on the left side and one side on the right side;
- Fig. 7A is a structural diagram of a stacked surface mount type positive temperature coefficient characteristic thermistor of Example 7 of the present invention.
- the PTC-charging conductive polymer chip 1 is a polymer sheet composed of a mixture of one or more crystal polymers, a conductive filler, and a processing aid; a double-faced metal foil 3 uniformly covering the upper and lower layers of the PTC characteristics of the conductive polymer chip 1 on the interlayer; the two layers of the single-faced metal foil 2 uniformly adhere to the upper and lower sides of the two layers of the PTC-characterized conductive polymer chip 3;
- the insulating film 4 is uniformly adhered to the surface of the two single-sided metal foils 2, and the insulating film 4 is formed on the two sides of the single-sided metal foil 2 in two parts; the insulating rubber 6 covers the left and right sides of the combined body In the gap between the insulating film 4, the insulating rubber 6 and the metal foil, there are three physical processing regions having grooves, wherein the left side is at two places and the right side is at one side; the left and right ends and the upper and lower portions are
- the conductive metal layer 5 uniform
- a sheet as shown in Fig. 7B is formed by the same steps as those in Figs. 6B to 6D in the seventh embodiment;
- Fig. 8A is a structural diagram of a stacked surface mount type positive temperature coefficient characteristic thermistor of Example 8 of the present invention.
- the PTC-charging conductive polymer chip 1 is a polymer sheet composed of a mixture of one or more crystal polymers, a conductive filler, and a processing aid; a double-faced metal foil 3 uniformly covering the upper and lower layers of the PTC characteristics of the conductive polymer chip 1 on the interlayer; the two layers of the single-faced metal foil 2 are uniformly adhered to the upper and lower sides of the two layers of the PTC-characterized conductive polymer chip 1;
- the insulating film 4 is uniformly adhered to the surface of the two single-sided metal foils 2, and the insulating film 4 is formed in four parts on the single-sided metal foil 2 on both sides; the insulating rubber 6 covers the left and right sides, and the insulating film 4 on the upper and lower sides
- the sheet is formed into a four-sided insulating cover layer by the same process as that corresponding to Fig. 6B to Fig. 6C of the embodiment 6, to form a sheet as shown in Fig. 8B;
- the inner metal foil is exposed by a physical processing method (for example, laser processing) to form a groove on the surface of the outer insulating cover layer, and three physical processing grooved regions are formed as shown in FIG. 8C. a stack of sheets (one on each side and one on the right);
- a physical processing method for example, laser processing
- the U-shaped metal groove is closely connected with the PTC metal foil by welding or the like; finally, the thin strip-shaped piece is cut into a prescribed Size single surface mount component.
- the element structure obtained at this time is free from the upper and lower two-layer resist plating films 8 shown in Fig. 8A.
- two-layer, three-layer or more stacked surface mount type PTC characteristic thermistors are also in the present invention.
- the present invention Similar to the innovative structure of the stacked surface mount type PTC characteristic thermistor of the above embodiments and the manufacturing method thereof, two-layer, three-layer or more stacked surface mount type PTC characteristic thermistors are also in the present invention. Within the scope of protection.
- the above-mentioned stacked surface mount type thermistor and the manufacturing method thereof are used, wherein the stacked surface mount type thermistor has novel structure, superior performance, high product qualification rate and unique manufacturing process, and the manufacturing method thereof is adopted.
- There is no need to perform an etching process on the surface of the metal foil as long as the two insulating pastes (or the two insulating films, or one of the insulating paste and one of the insulating films) of the conductive module having the insulating layers formed on the upper, lower, left, and right sides.
- a physical processing (for example, laser gasification) step is performed to partially expose the metal foil, and each of the two metal plating layers bonded to the outside may be connected.
- the above laminated surface mount type thermistor and the manufacturing method using the present invention have the following advantages over the conventional process:
- the physical processing slotting precision is high, for example, the linear precision of laser processing can reach 0.05mm, and the laser processing line width can also be Up to 0.05mm, the yield is higher than the traditional process;
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Description
叠状表面贴装型热敏电阻及其制造方法 技术领域
本发明涉及热敏电阻技术领域, 更具体地, 涉及表面贴装型热敏电阻技术领域, 特别是 指叠状表面贴装型热敏电阻及其制造方法。 背景技术
正温度系数(PTC, Positive Temperature Coefficient )特性热敏电阻已广泛用于电脑、 通 讯、 消费性电子、 汽车、 通路、 数字内容等 6C 产业领域中的电路保护。 其工作原理是: 当 电路正常工作时, PTC热敏电阻阻值 R0非常小不阻碍电流通过; 而当电路出现过流、 过载 或过热等故障时, 热敏电阻表面温度迅速上升, 超过开关温度时瞬间升至高阻态, 从而及时 限制电路电流到很低水平保护电路; 当故障排除后, PTC热敏电阻迅速冷却并恢复到原低阻 状态, 电路恢复正常后此热敏电阻可再次重复使用。
在 6C产业的高密度线路制造领域中, 电子元件需要达到表面贴装要求, 因此, PTC热 敏电阻元件的表面贴装化已成为发展趋势。 由于对初始阻值 R0及其他性能(如电流特性、 电压-电流特性等) 的要求, 在结构设计上, 时常釆用叠状(即"两层或多层 PTC热敏电阻芯 片", 以下皆称为"叠状")形式。 然而目前的叠状表面贴装式 PTC 特性热敏电阻在设计和制 造上都有一些不足之处, 下面, 对以往叠状表面贴装式 PTC特性热敏电阻的结构设计和制造 工艺加以说明。
以往公开的技术 (如中国专利申请公开说明书 CN 1291775A, CN 2569298Y , CN 2591719Y等)揭示各种表面贴装型正温度系数特性热敏电阻制造时, 都不可避免的经过表面 金属箔的蚀刻工艺, 蚀刻工艺现普遍釆用化学蚀刻法。 但化学蚀刻法在技术上具有先天的缺 点, 其一, 工艺所用的蚀刻液对环境污染严重, 对人体和机械设备亦有较大危害; 其二, 工 艺开口精度较差, 成品率相对较低; 其三, 蚀刻后续工序易使蚀刻图形产生漂移、 错位等异 常现象, 使得工艺不稳定。 另外, 以往所揭示的各种表面贴装型正温度系数特性热敏电阻结 构内, 往往是在金属箔上下表面经蚀刻形成蚀刻区, 这样影响其有效使用面积, 且其焊至电 路板时焊接位置偏移有引起短路可能。
同时, 在公开的技术(如中国公开号 CN 2591719Y等)中所揭示的各种叠状表面贴装型 正温度系数特性热敏电阻, 其中的结构以及在制造过程中, 还都不可避免的具有如下缺点:
( 1 )组成元件所需材料(PTC特性电阻芯片、金属箔、 阻镀膜、 绝缘膜、表面金属层等) 过多, 使得原材料总成本较高;
( 2 ) 由于材料过多, 使得所需工序复杂, 造成总成品率相对较低;
( 3 )由于材料过多, 在热压等工序作业时, 容易产生图层漂移、 错位等异常现象, 从而 使工艺不稳定。
因此, 需要提供一种低成本、 益于环保、 成品合格率高、 无需蚀刻、 性能优越的表面贴 装型热敏电阻结构及相应的制造方法。 发明内容
本发明的主要目的就是针对以上存在的问题与不足, 提供一种叠状表面贴装型热敏电阻 及其制造方法, 该叠状表面贴装型热敏电阻性能优越、 产品合格率高, 其制造方法工艺独特、 无需蚀刻、 益于环保、 成本大大降低、 工艺稳定、 精度高、 成品率高。
为了实现上述的目的, 本发明的叠状表面贴装型热敏电阻及其制造方法如下: 在本发明的第一方面, 提供了一种叠状表面贴装型热敏电阻, 其主要特点是, 包括导电 模块、 左导电金属层和右导电金属层, 所述导电模块包括核心导电模块和绝缘层, 所述绝缘 层包覆所述核心导电模块上下表面及左右侧面, 所述核心导电模块包括一导电单元, 所述导 电单元包括从上至下依次贴合的上金属箔、 具有 PTC特性的导电性聚合物芯片和下金属箔, 所述左导电金属层和所述右导电金属层分别贴合所述导电模块左部和右部并局部穿设所述绝 缘层从而分别与所述导电单元的所述上金属箔 /下金属箔和所述下金属箔 /上金属箔连接。
较佳的, 所述绝缘层包括上绝缘层、 下绝缘层、 左绝缘层和右绝缘层, 所述上绝缘层和 所述下绝缘层分别贴合在所述核心导电模块的所述上下表面上, 所述左绝缘层和所述右绝缘 层分别贴合在所述核心导电模块的所述左右侧面上。
更佳的, 所述上绝缘层和所述下绝缘层分别是上绝缘膜和下绝缘膜, 所述左绝缘层和所 述右绝缘层分别是左绝缘胶和右绝缘胶。
更佳的, 所述左导电金属层局部穿设所述左绝缘层, 所述右导电金属层局部穿设所述右 绝缘层, 从而分别与所述导电单元的所述上金属箔和所述下金属箔连接。
更佳地, 所述左导电金属层局部穿设所述上绝缘层, 所述右导电金属层局部穿设所述下 绝缘层, 从而分别与所述导电单元的所述上金属箔和所述下金属箔连接。
较佳的, 所述导电性聚合物芯片是由至少一种晶体聚合物、 导电填充料以及加工助剂混 合后通过双螺杆挤出压延等加工方法制成。
较佳的, 所述上金属箔、 所述下金属箔、 所述左导电金属层和所述右导电金属层分别选 自铜、 铁、 镍、 锡、 银、 金中的一种或几种, 当然, 还可以釆用其他合适金属; 所述绝缘层
和所述绝缘材料层分别选自聚丙烯树脂、 双酚环氧树脂、 环氧化酚醛、 硅树脂中的一种或几 种, 或玻璃纤维增强型混合物, 当然, 还可以釆用其他合适绝缘材料。
较佳的, 所述导电性聚合物芯片的厚度为 0.10 ~ 5mm。
较佳的, 所述左导电金属层和所述右导电金属为 U型薄壁金属层。
较佳的, 还包括上阻镀膜和下阻镀膜, 所述上阻镀膜和所述下阻镀膜分别贴合在所述导 电模块上下表面用于阻隔开所述左导电金属层和所述右导电金属层。
更佳的, 所述上阻镀膜和所述下阻镀膜分别选自聚丙烯树脂、 环氧树脂、 硅树脂中的一 种或几种, 当然, 还可以釆用其他合适的高分子聚合物材料。
在本发明的第二方面, 提供了一种上述的叠状表面贴装型热敏电阻的制造方法, 其主要 特点是, 包括以下步骤:
( 1 )制造所述导电性聚合物芯片,在所述导电性聚合物芯片上下表面分别贴合两金属箔, 即上金属箔和下金属箔, 从而形成导电单元;
( 2 )将所述导电单元直接作为所述核心导电模块;
( 3 )将所述绝缘层包覆所述核心导电模块的所述上下表面和所述左右侧面,从而形成所 述导电模块;
( 4 )对所述绝缘层通过物理加工方法进行开槽, 分别使所述导电单元的两所述金属箔部 分棵露出;
( 5 )将所述左导电金属层和所述右导电金属层贴合在所述导电模块的所述左部和所述右 部, 并分别与所述导电单元的两所述金属箔连接; 或者, 在所述导电模块的上下表面的中间 区域分别贴合上阻镀膜和下阻镀膜, 然后进行整体电镀, 从而形成分别与所述导电单元的两 所述金属箔连接的所述左导电金属层和所述右导电金属层。
较佳的, 在所述步骤(1 )中, 所述导电性聚合物芯片是由至少一种晶体聚合物、 导电填 充料以及加工助剂混合后通过双螺杆挤出压延机制成。
较佳的, 在步骤(1 ) 中, 所述导电性聚合物芯片的厚度为 0.10 ~ 5mm。
较佳的, 所述上金属箔、 所述下金属箔、 所述左导电金属层和所述右导电金属层分别选 自铜、 铁、 镍、 锡、 银、 金中的一种或几种, 当然, 还可以釆用其他合适金属; 所述绝缘层 和所述绝缘材料层分别选自双酚环氧树脂、 环氧化酚醛、 硅树脂中的一种或几种, 或玻璃纤 维增强型混合物, 当然, 还可以釆用其他合适绝缘材料; 所述上阻镀膜和所述下阻镀膜分别 选自聚丙烯树脂、 环氧树脂、 硅树脂中的一种或几种, 当然, 还可以釆用其他合适的高分子 聚合物材料。
较佳的, 在所述步骤(3 )中, 所述绝缘层包括上绝缘层、 下绝缘层、 左绝缘层和右绝缘 层, 所述上绝缘层和所述下绝缘层分别贴合在所述核心导电模块的所述上下表面上, 所述左 绝缘层和所述右绝缘层分别贴合在所述核心导电模块的所述左右侧面上。
更佳的, 通过在所述核心导电模块的所述左右侧面上分别涂布绝缘胶, 并使其固化, 从 而形成所述左绝缘层和所述右绝缘层。
较佳的, 在所述步骤(4 ) 中, 所述物理加工方法包括但不局限于激光加工方法。
较佳的, 在所述步骤(2 )后, 在所述步骤(3 )之前, 还包括以下步骤:
( 21 )将所述核心导电模块切割成合适形状。
在本发明的第三方面, 还提供了一种叠状表面贴装型热敏电阻, 其主要特点是, 包括导 电模块、 左导电金属层和右导电金属层, 所述导电模块包括核心导电模块和绝缘层, 所述绝 缘层包覆所述核心导电模块上下表面及左右侧面, 所述核心导电模块包括依次堆叠的至少两 导电单元, 两导电单元之间间隔一绝缘材料层, 所述导电单元包括从上至下依次贴合的上金 属箔、 具有 PTC特性的导电性聚合物芯片和下金属箔, 所述左导电金属层和所述右导电金属 层分别贴合所述导电模块左部和右部并局部穿设所述绝缘层从而分别与所述导电单元的所述 上金属箔 /下金属箔和所述下金属箔 /上金属箔连接。
较佳的, 所述绝缘层包括上绝缘层、 下绝缘层、 左绝缘层和右绝缘层, 所述上绝缘层和 所述下绝缘层分别贴合在所述核心导电模块的所述上下表面上, 所述左绝缘层和所述右绝缘 层分别贴合在所述核心导电模块的所述左右侧面上。
更佳的, 所述上绝缘层和所述下绝缘层分别是上绝缘膜和下绝缘膜, 所述左绝缘层和所 述右绝缘层分别是左绝缘胶和右绝缘胶。
更佳的, 所述导电单元的数目是两个。 显然, 导电单元的数目可以多于 2个, 可以根据 实际需要确定具体数目。
更进一步地, 所述左导电金属层局部穿设所述左绝缘层从而与一所述导电单元的所述上 金属箔和另一所述导电单元的的所述下金属箔连接, 所述右导电金属层局部穿设所述右绝缘 层从而与一所述导电单元的所述下金属箔和另一所述导电单元的所述上金属箔连接。
更进一步地, 所述左导电金属层局部穿设所述上绝缘层和所述下绝缘层从而与一所述导 电单元的所述上金属箔和另一所述导电单元的的所述下金属箔连接, 所述右导电金属层局部 穿设所述右绝缘层从而与一所述导电单元的所述下金属箔和另一所述导电单元的所述上金属 箔连接。
较佳的, 所述导电性聚合物芯片是由至少一种晶体聚合物、 导电填充料以及加工助剂混
合后通过双螺杆挤出压延等加工方法制成。
较佳的, 所述上金属箔、 所述下金属箔、 所述左导电金属层和所述右导电金属层分别选 自铜、 铁、 镍、 锡、 银、 金中的一种或几种, 当然, 还可以釆用其他合适金属; 所述绝缘层 和所述绝缘材料层分别选自聚丙烯树脂、 双酚环氧树脂、 环氧化酚醛、 硅树脂中的一种或几 种, 或玻璃纤维增强型混合物, 当然, 还可以釆用其他合适绝缘材料。
较佳的, 所述导电性聚合物芯片的厚度为 0.10 ~ 5mm。
较佳的, 所述左导电金属层和所述右导电金属为 U型薄壁金属层。
较佳的, 还包括上阻镀膜和下阻镀膜, 所述上阻镀膜和所述下阻镀膜分别贴合在所述导 电模块上下表面用于阻隔开所述左导电金属层和所述右导电金属层。
更佳的, 所述上阻镀膜和所述下阻镀膜分别选自聚丙烯树脂、 环氧树脂、 硅树脂中的一 种或几种, 当然, 还可以釆用其他合适的高分子聚合物材料。
在本发明的第四方面, 提供了一种上述的叠状表面贴装型热敏电阻的制造方法, 其主要 特点是, 包括以下步骤:
( 1 )制造所述导电性聚合物芯片,在所述导电性聚合物芯片上下表面分别贴合两金属箔, 即上金属箔和下金属箔, 从而形成导电单元;
( 2 )釆用两个或两个以上所述导电单元, 依次堆叠, 两所述导电单元之间间隔所述绝缘 材料层, 从而形成所述核心导电模块;
( 3 )将所述绝缘层包覆所述核心导电模块的所述上下表面和所述左右侧面,从而形成所 述导电模块;
( 4 )对所述绝缘层通过物理加工方法进行开槽, 分别使所述导电单元的两所述金属箔部 分棵露出;
( 5 )将所述左导电金属层和所述右导电金属层贴合在所述导电模块的所述左部和所述右 部, 并分别与所述导电单元的两所述金属箔连接; 或者, 在所述导电模块的上下表面的中间 区域分别贴合上阻镀膜和下阻镀膜, 然后进行整体电镀, 从而形成分别与所述导电单元的两 所述金属箔连接的所述左导电金属层和所述右导电金属层。
较佳的, 在所述步骤(1 )中, 所述导电性聚合物芯片是由至少一种晶体聚合物、 导电填 充料以及加工助剂混合后通过双螺杆挤出压延机制成。
较佳的, 在步骤(1 ) 中, 所述导电性聚合物芯片的厚度为 0.10 ~ 5mm。
较佳的, 所述上金属箔、 所述下金属箔、 所述左导电金属层和所述右导电金属层分别选 自铜、 铁、 镍、 锡、 银、 金中的一种或几种, 当然, 还可以釆用其他合适金属; 所述绝缘层
和所述绝缘材料层分别选自双酚环氧树脂、 环氧化酚醛、 硅树脂中的一种或几种, 或玻璃纤 维增强型混合物, 当然, 还可以釆用其他合适绝缘材料; 所述上阻镀膜和所述下阻镀膜分别 选自聚丙烯树脂、 环氧树脂、 硅树脂中的一种或几种, 当然, 还可以釆用其他合适的高分子 聚合物材料。
较佳的, 在所述步骤(3 )中, 所述绝缘层包括上绝缘层、 下绝缘层、 左绝缘层和右绝缘 层, 所述上绝缘层和所述下绝缘层分别贴合在所述核心导电模块的所述上下表面上, 所述左 绝缘层和所述右绝缘层分别贴合在所述核心导电模块的所述左右侧面上。
更佳的, 通过在所述核心导电模块的所述左右侧面上分别涂布绝缘胶, 并使其固化, 从 而形成所述左绝缘层和所述右绝缘层。
较佳的, 在所述步骤(4 ) 中, 所述物理加工方法包括但不局限于激光加工方法。
较佳的, 在所述步骤(2 )后, 在所述步骤(3 )之前, 还包括步骤: 将所述核心导电模 块切割成合适形状。
在本发明的第五方面, 还提供了一种叠状表面贴装型热敏电阻, 其主要特点是, 包括导 电模块、 彼此绝缘的左导电金属层和右导电金属层, 所述的导电模块包括核心导电模块和绝 缘层, 所述绝缘层包覆于所述的核心导电模块的上表面和下表面, 所述的核心导电模块包括 依次堆叠的至少两个具有 PTC特性的导电性聚合物芯片, 且相邻的两个具有 PTC特性的导 电性聚合物芯片之间均夹设有一中央金属层, 所述的最上层的具有 PTC特性的导电性聚合物 芯片的顶面贴覆有上金属层, 且所述的最下层的具有 PTC特性的导电性聚合物芯片的底面贴 覆有下金属层, 所述的左导电金属层和右导电金属层分别贴合所述的导电模块左部和右部, 且所述的上金属层、 中央金属层和下金属层依次按照奇偶间隔方式分别与所述的左导电金属 层和右导电金属层相导通连接。
较佳的, 所述的绝缘层包括上绝缘层和下绝缘层, 所述的上绝缘层和下绝缘层分别贴覆 于所述的核心导电模块的上表面和下表面上。
更佳的, 所述的绝缘层还可以包括左绝缘层和右绝缘层, 所述的左绝缘层和右绝缘层分 别贴覆于所述的核心导电模块的左侧面和右侧面, 所述的左导电金属层贴合于所述的左绝缘 层外侧, 且该左导电金属层局部穿设该左绝缘层与所述的上金属层、 中央金属层和下金属层 中的对应部分金属层相导通连接, 所述的右导电金属层贴合于所述的右绝缘层外侧, 且该右 导电金属层局部穿设该右绝缘层与所述的上金属层、 中央金属层和下金属层中的对应部分金 属层相导通连接。
更佳的, 所述的具有 PTC特性的导电性聚合物芯片的数量可以为偶数。
更进一步地, 所述的绝缘层还包括左绝缘层和右绝缘层, 所述的左绝缘层和右绝缘层分 别贴覆于所述的核心导电模块的左侧面和右侧面, 所述的左导电金属层贴合于所述的左绝缘 层外侧, 且该左导电金属层局部穿设该左绝缘层与所述的中央金属层中的对应部分金属层相 导通连接, 所述的右导电金属层贴合于所述的右绝缘层外侧, 且该右导电金属层局部穿设该 右绝缘层与所述的中央金属层中的对应部分金属层相导通连接; 所述的左导电金属层局部穿 设所述的上绝缘层和下绝缘层并分别与所述的上金属层和下金属层相导通连接。
更进一步地, 所述的具有 PTC特性的导电性聚合物芯片的数量也可以为奇数。
较佳的, 所述的绝缘层还可以包括左绝缘层和右绝缘层, 所述的左绝缘层和右绝缘层分 别贴覆于所述的核心导电模块的左侧面和右侧面, 所述的左导电金属层贴合于所述的左绝缘 层外侧, 且该左导电金属层局部穿设该左绝缘层与所述的中央金属层中的对应部分金属层相 导通连接, 所述的右导电金属层贴合于所述的右绝缘层外侧, 且该右导电金属层局部穿设该 右绝缘层与所述的中央金属层中的对应部分金属层相导通连接; 所述的左导电金属层局部穿 设所述的上绝缘层并与所述的上金属层和相导通连接, 所述的右导电金属层局部穿设所述的 下绝缘层并与所述的下金属层相导通连接。
更佳的, 所述的热敏电阻还包括上阻镀膜和下阻镀膜, 所述的上阻镀膜和下阻镀膜分别 贴覆于所述的导电模块上下表面且绝缘阻隔所述的左导电金属层和右导电金属层。
较佳的, 所述的中央金属层为双毛面金属箔。
更佳的, 所述的上金属层和下金属层均为单毛面金属箔, 且该单毛面金属箔的毛面贴覆 于所述的具有 PTC特性的导电性聚合物芯片的相应表面。
在本发明的第六方面, 提供了一种制造上述的叠状表面贴装型热敏电阻的方法, 其主要 特点是, 包括以下步骤:
( 1 )制造所述的导电性聚合物芯片, 将两个或两个以上所述的导电性聚合物芯片依次堆 叠, 相邻的两个所述的导电性聚合物芯片之间间隔设置所述的中央金属层, 在最上层的导电 性聚合物芯片的顶面贴合上金属层, 在最下层的导电性聚合物芯片的底面贴合下金属层, 从 而形成所述的核心导电模块;
( 2 )将所述的绝缘层包覆于所述的核心导电模块的上表面、 下表面、 左侧面和右侧面, 从而形成所述导电模块;
( 3 )对所述的绝缘层通过物理加工方法进行开槽, 分别使所述的中央金属层、 上金属层 和下金属层部分棵露出;
( 4 )将所述左导电金属层和所述右导电金属层分别贴合在所述的导电模块的左部和右
部, 且使得所述的上金属层、 中央金属层和下金属层依次按照奇偶间隔方式分别与所述的左 导电金属层和右导电金属层相导通连接; 或者, 在所述导电模块的上下表面的中间区域分别 贴合上阻镀膜和下阻镀膜, 然后进行整体电镀, 从而形成所述的左导电金属层和所述右导电 金属层, 且使得所述的上金属层、 中央金属层和下金属层依次按照奇偶间隔方式分别与所述 的左导电金属层和右导电金属层相导通连接。
较佳的, 在步骤(1 )中, 所述导电性聚合物芯片是由至少一种晶体聚合物、 导电填充料 以及加工助剂混合后通过双螺杆挤出压延制成。
较佳的, 在所述步骤(2 )中, 所述绝缘层包括上绝缘层、 下绝缘层、 左绝缘层和右绝缘 层, 所述上绝缘层和所述下绝缘层分别贴合在所述核心导电模块的所述上下表面上, 所述左 绝缘层和所述右绝缘层分别贴合在所述核心导电模块的所述左右侧面上。
更佳的, 通过在所述核心导电模块的所述左右侧面上分别涂布绝缘胶, 从而形成所述左 绝缘层和所述右绝缘层。
较佳的, 在所述步骤(3 ) 中, 所述物理加工方法包括但不局限于激光加工方法。
较佳的, 在所述步骤(1 )后, 在所述步骤(2 )之前, 还包括以下步骤:
( 11 )将所述核心导电模块切割成合适形状。
釆用了该发明的叠状表面贴装型热敏电阻及其制造方法, 其中的叠状表面贴装型热敏电 阻结构新颖、 性能优越、 产品合格率高而制造工艺独特, 釆用其制造方法, 无需在金属箔表 面进行蚀刻工序, 只要对形成的上下左右四面具有绝缘层的导电模块的两所述绝缘胶(或两 所述绝缘膜、 或一所述绝缘胶及一所述绝缘膜)进行物理加工 (例如激光气化) 工序, 使得 金属箔部分棵露出来, 分别与外面贴合的两电镀金属层连接即可。 故总体上, 其制造方法无 需在金属箔表面进行二次加工, 而只需在四周绝缘膜 /绝缘胶表面进行二次处理形成很小的物 理加工开槽区。 对比传统工艺, 使用本发明的上述叠状表面贴装型热敏电阻及制造方法有如 下优点:
( 1 )经物理加工 (例如激光加工等)开槽后的有机颗粒物质易通过密封管道回收处理, 故利于环境保护, 不存在类似于蚀刻液的对环境污染严重的缺点;
( 2 )物理加工 (例如激光加工等)开槽成本(单层 PTC元件约 0.01元 /件, 多层 PTC 元件成本增加较少)相对于化学蚀刻成本(单层 PTC元件约 0.08元 /件, 多层 PTC元件成本 成倍增加) 更低, 从而节约大量生产成本;
( 3 )不易出现类似于蚀刻图形易产生漂移、 错位等异常缺陷, 物理加工(例如激光加工 等)开槽工艺更稳定;
( 4 )物理加工开槽精度高, 例如激光加工等直线精度可达 0.05mm, 激光加工线宽亦可 达 0.05mm, 成品率相对传统工艺更高;
( 5 )组成元件所需材料相对较少, 使得材料总成本较于传统结构材料成本少;
( 6 ) 由于材料相对较少, 使得制造工序较少, 造成总成品率相对较高;
( 7 ) 由于双毛面金属箔表层的粗糙度较大, 其与 PTC芯片结合附着力较大, 使得材料 结合更加紧密, 且材料相对较少, 故在热压等工序作业时, 产生图层的漂移、 错位等异常现 象几率较小, 使结构更加稳定可靠。 附图说明
图 1 A是本发明的叠状表面贴装型热敏电阻的第一具体实施例的立体示意图。
图 1B〜图 II是图 1A所示的第一具体实施例的制造过程示意图。
图 2A是本发明的叠状表面贴装型热敏电阻的第二具体实施例的立体示意图。
图 2B〜图 2D是图 2A所示的第二具体实施例的部分制造过程示意图。
图 3 A是本发明的叠状表面贴装型热敏电阻的第三具体实施例的立体示意图。
图 3B〜图 3E是图 3A所示的第三具体实施例的部分制造过程示意图。
图 4A是本发明的叠状表面贴装型热敏电阻的第四具体实施例的立体示意图。
图 4B〜图 4G是图 4A所示的第四具体实施例的制造过程示意图。
图 5是本发明的叠状表面贴装型热敏电阻的第五具体实施例的立体示意图。
图 6A是本发明的叠状表面贴装型热敏电阻的第六具体实施例的立体示意图。
图 6B〜图 6F是图 6A所示的第六具体实施例的部分制造过程示意图。
图 7A是本发明的叠状表面贴装型热敏电阻的第七具体实施例的立体示意图。
图 7B〜图 7E是图 7A所示的第七具体实施例的部分制造过程示意图。
图 8A是本发明的叠状表面贴装型热敏电阻的第八具体实施例的立体示意图。
图 8B〜图 8E是图 8A所示的第八具体实施例的制造过程示意图。 具体实施方式
为了能够更清楚地理解本发明的技术内容, 特举以下实施例详细说明。
实施例 1
下面参照图 1A〜图 II说明本发明的实施例 1的叠状表面贴装型正温度系数特性热敏电 阻及其制造方法。
图 1A是本发明的实施例 1的叠状表面贴装型正温度系数特性热敏电阻的结构图。
在图 1A中, PTC特性的导电性聚合物芯片 3是由一种或多种晶体聚合物、 导电填充料 以及加工助剂等混合物构成的高分子聚合物片体; 金属箔 2均匀覆盖于上述 PTC特性的导电 性聚合物芯片 3上下两面; 绝缘膜 1均匀紧贴于上述两金属箔 2表面上; 绝缘胶 4涂布于上 述 PTC特性的导电性聚合物芯片 3左右两侧面, 两侧的绝缘胶 4一共形成四部分; 阻镀膜 5 均匀紧贴于上述上下两面的绝缘膜 1中间区域上, 上下两侧的阻镀膜 5—共形成两部分; 在 两侧部绝缘胶 4的间隙内形成左右两侧各一的物理加工开槽区, 两端的电镀导电金属层 6良 好的附着于绝缘胶 4、 绝缘膜 1和物理加工开槽区内的金属箔 2表面, 使得左右两端电镀导 电金属层 6与上述两面金属箔 2保持良好的电气连接。
下面参照图 1A〜图 II,说明本发明的实施例 1的叠状表面贴装型正温度系数特性热敏电 阻的制造方法。
首先, 将一种或多种晶体聚合物、 导电填充料以及加工助剂等原料混合分别通过双螺杆 挤出压延机制成总厚度为 0.10 ~ 5mm、 如图 1B所示的核心导电模块, 其工序所得核心导电 模块的特点是, 金属箔 2紧密叠压于导电性聚合物芯片 3上下两面上;
然后, 在上述核心导电模块上下两面各叠压一层绝缘膜 1 , 形成如图 1C所示的薄片; 再将其切割成一条条规定宽度、 如图 1D所示的条形薄片; 或者在叠压绝缘膜 1之前切 割; 而如果如图 1C所示的薄片本来就是合适尺寸, 就不必切割了;
接着, 在上述条形薄片左右两侧各涂布一层绝缘胶 4并将其固化, 使核心导电模块的上 下及左右四面均覆盖绝缘层, 从而形成如图 1E所示的导电模块前体;
继而在上述导电模块前体的左右两侧面上, 通过物理加工方法(例如激光加工等)在外 绝缘覆盖层表面开槽使内部金属箔部分露出, 形成如图 1F所示具有形成物理加工开槽区(图 1F中圆圏所示) 的导电模块;
其后, 在上述导电模块上下两面中间区域各涂布一层阻镀膜 5 , 形成如图 1G所示薄片; 后将其整体电镀, 形成具有导电金属层 6、 如图 1H所示的条形薄片;
最后,将图 1H所示的薄条形片切割成具有规定尺寸单个表面贴装型元件,如图 II所示, 如果图 1H所示的薄条形片的尺寸本来就是单个表面贴装型元件的尺寸, 就无需进行切割, 其具体结构图请参见图 1A。
上述工艺中, 涂布阻镀膜 5工序与物理加工开槽工序可互换作业, 其不影响所述表面贴 装型正温度系数特性热敏电阻的制造。
这里, 只是针对于产品具体结构说明其制造工序, 没有对各工序具体参数作细致说明, 而其中的辐照交联、 热处理工序可根据具体元件的电气性能(如电阻 -温度特性、 电流特性、
电压 -电流特性)要求, 串接于上述各工序中。 以下各实施例皆如此, 故不赘述。 实施例 2
参照图 2A ~图 2D说明本发明的实施例 2的叠状表面贴装型正温度系数特性热敏电阻及 其制造方法。
图 2A是本发明的实施例 2的叠状表面贴装型正温度系数特性热敏电阻的结构图。
在图 2A中, PTC特性的导电性聚合物芯片 3是由一种或多种晶体聚合物、 导电填充料 以及加工助剂等混合物构成的高分子聚合物片体; 金属箔 2均匀覆盖于上述 PTC特性的导电 性聚合物芯片 3上下两面; 绝缘膜 1均匀紧贴于上述两金属箔 2表面上; 绝缘胶 4涂布于上 述 PTC特性的导电性聚合物芯片 3左右两侧面, 两侧的绝缘胶 4一共形成四部分; 在两侧部 绝缘胶 4的间隙内形成左右两侧各一的物理加工开槽区, 左右端及上下面部分的导电金属层 6良好的附着于绝缘胶 4、 绝缘膜 1和物理加工开槽区内的金属箔 2表面, 使得导电金属层 6 与上述两面金属箔 2保持良好的电气连接。
下面参照图 2A〜图 2D说明本发明的实施例 2的表面贴装型正温度系数特性热敏电阻及 其制造方法。
用与实施例 1中图 1B ~ F所对应的相同工序, 形成如图 2B所示的具有物理加工开槽区 (图 2B中圆圏所示) 的导电模块;
其后, 在上述导电模块两侧面套上导电金属层 6即 U型薄壁金属槽(见图 2C )后通过焊 接等方式将 U型金属槽与 PTC金属箔连接, 形成具有导电金属层 6、 如图 2D所示的条形薄 片;
最后, 将上述薄条形片切割成具有规定尺寸、 结构图如图 2A的单个表面贴装型元件, 同样, 如果图 2D所示的薄条形片的尺寸本来就是单个表面贴装型元件的尺寸, 就无需进行 切割。 实施例 3
下面参照图 3A〜图 3E说明本发明的实施例 3的叠状表面贴装型正温度系数特性热敏电 阻及其制造方法。
图 3A是本发明的实施例 3的叠状表面贴装型正温度系数特性热敏电阻的结构图。
在图 3A中, PTC特性的导电性聚合物芯片 3是由一种或多种晶体聚合物、 导电填充料 以及加工助剂等混合物构成的高分子聚合物片体; 金属箔 2均匀覆盖于上述 PTC特性的导电 性聚合物芯片 3上下两面; 绝缘膜 1均匀紧贴于上述两金属箔 2表面上, 绝缘膜 1在两面的
金属箔 2上一共形成四部分; 绝缘胶 4涂布于上述 PTC特性的导电性聚合物芯片 3左右两侧 面端; 阻镀膜 5均匀紧贴于上述绝缘膜 1上下两面的中间区域部分, 上下两面的阻镀膜 5— 共形成两部分;在上下两面的绝缘膜的间隙内存在上下两面各一具有凹槽的物理加工开槽区; 电镀导电金属层 6良好的附着于绝缘胶 4、 绝缘膜 1和上下面绝缘膜 1凹槽物理加工开槽区 内的金属箔 2表面, 使得左右导电金属层 6分别与上述两面金属箔 2保持良好的电气连接。
下面参照图 3A〜图 3E说明本发明的实施例 2的表面贴装型正温度系数特性热敏电阻及 其制造方法。
用与实施例 1中图 1B ~ E所对应的相同工序, 形成如图 3B所示的导电模块前体一; 接着, 在导电模块前体上下两面中间区域部分涂布阻镀膜 5 , 形成如图 3C所示导电模块 前体二;
然后, 在上述导电模块前体二的上下两面的绝缘膜 1上, 通过物理加工方法(例如激光 加工等)在外绝缘覆盖层表面开槽使内部金属箔露出, 从而形成如图 3D所示具有凹槽物理 加工开槽区 (图 3D中圏圏所示) 的导电模块;
其后, 将上述导电模块整体电镀, 形成具有导电金属层、 如图 3E所示的条形薄片; 最后, 将上述薄条形片切割成具有规定尺寸、 结构图如图 3A的单个表面贴装型元件, 同样,如果图 3E所示的薄条形片的尺寸本来就是单个表面贴装型元件的尺寸,就无需进行切 割。
上述工艺中, 切割成条状薄片工序、 涂布绝缘胶 4及阻镀膜 5工序与物理加工开槽工序 亦可互换作业, 其不影响所述表面贴装型正温度系数特性热敏电阻的制造。
类似于实施例 1与实施例 2, 这里, 在图 3D所示的物理加工开槽工序后, 亦可进行以下 工序:
在形成物理加工开槽工序所得导电模块两侧面, 套上 U型薄壁金属槽后通过焊接等方式 将 U型金属槽与 PTC金属箔连接紧密; 最后, 如果需要, 再将上述形成的薄条形片切割成具 有规定尺寸单个表面贴装型元件。 此时所得之元件结构上, 无上述图 3A所示的上下两层阻 镀膜 5。 实施例 4
下面参照图 4A ~图 4G说明本发明的实施例 4的叠状表面贴装型正温度系数特性热敏电 阻及其制造方法。
图 4A是本发明的实施例 4的叠状表面贴装型正温度系数特性热敏电阻的结构图。
在图 4A中, PTC特性的导电性聚合物芯片 3是由一种或多种晶体聚合物、 导电填充料 以及加工助剂等混合物构成高分子聚合物片体, 如图所示, 其一共形成两层 PTC特性的导电 性聚合物芯片 3; 金属箔 2均匀覆盖于上述 PTC特性的导电性聚合物芯片 3的上下两面, 这 样, 两层 PTC特性的导电性聚合物芯片 3使得一共有四层金属箔 2; 绝缘膜 1均匀紧贴于上 述四层金属箔 2的面上, 四层金属箔 2使得一共有三层绝缘膜 1; 绝缘胶 4涂布于上述 PTC 特性的导电性聚合物芯片 3、 绝缘膜 1及金属箔 2左右两侧, 两侧的绝缘胶 4一共形成五部 分; 在绝缘膜 1、 金属箔 2及左右两侧绝缘胶 4的交合处形成具有凹槽的物理加工开槽区, 其中左侧两处, 右侧一处; 阻镀膜 5均匀粘贴于上述上下两面绝缘膜 1的中间区域, 其一共 形成两部分阻镀膜 5; 左右两端的导电金属层 6良好的附着于绝缘胶 4、绝缘膜 1和物理加工 开槽区内金属箔 2表面,使得左右两端导电金属层 6与上述两金属箔 2保持良好的电气连接。
下面参照图 4A ~图 4G, 说明本发明的实施例 4的表面贴装型正温度系数特性热敏电阻 的制造方法。
将一种或多种晶体聚合物、 导电填充料以及加工助剂等原料混合分别通过双螺杆挤出压 延机制成导电性聚合物芯片 3 , 金属箔 2紧密叠压于导电性聚合物芯片 3上下两面, 形成单 层 PTC热敏电阻薄片;
其后, 取上述两片单层 PTC热敏电阻薄片及三层绝缘膜 1 , 通过热压工序形成两层 PTC 热敏电阻的叠状薄片, 其特点是, 上述的每个单层 PTC热敏电阻薄片上下两面都叠压有一层 绝缘膜 1 , 再将其切割成一条条规定宽度、 如图 4B所示的条形叠状薄片, 当然, 如果尺寸已 经合适, 就无需进行切割;
接着,在上述条形叠状薄片左右两侧面涂布绝缘胶并固化,使薄片形成四面绝缘覆盖层, 形成如图 4C所示导电模块前体;
继而在上述导电模块前体的左右两侧面上, 通过物理加工方法(例如激光加工等)在外 绝缘覆盖层表面开槽使内部金属箔部分露出, 形成如图 4D所示具有三个或以上物理加工开 槽区 (如图 4D中圆圏所示, 左侧一个、 右侧两个) 的导电模块;
其后, 在上述导电模块上下两面中间区域涂布阻镀膜 5 , 形成如图 4E所示的叠状薄片; 后将其整体电镀, 形成具有导电金属层、 如图 4F所示的叠状薄片;
最后, 将如图 4F 所示的叠状薄条形片切割成具有规定尺寸单个表面贴装型元件, 如图 4G所示, 同样, 如果图 4F所示的叠状薄片的尺寸本来就是单个表面贴装型元件的尺寸, 就 无需进行切割, 其具体结构图请参见图 4A。
类似于实施例 1与实施例 2, 这里, 在图 4D所示的形成物理加工开槽工序后, 亦可进行
以下工序:
在形成物理加工开槽工序所得导电模块两侧面, 套上 U型薄壁金属槽后通过焊接等方式 将 U型金属槽与 PTC金属箔连接紧密; 最后,再将形成的上述薄条形片切割成具有规定尺寸 单个表面贴装型元件。 此时所得之元件结构上, 无上述图 4A所示的上下两层阻镀膜 5。
上述利用激光气化等物理加工开槽工序中, 亦可形成其他方式的物理加工开槽区, 只要 不影响其连接性能即可。 实施例 5
例如, 类似于实施例 3所示的物理加工开槽工序的开槽方式, 图 5说明了一种形成其他 方式的物理加工开槽区的创新型结构。 显然, 并不局限于此例所述之开槽方式。
在图 5中, PTC特性的导电性聚合物芯片 3是由一种或多种晶体聚合物、 导电填充料以 及加工助剂等混合物构成高分子聚合物片体, 如图所示, 其一共形成两层 PTC特性的导电性 聚合物芯片 3;金属箔 2均匀覆盖于上述 PTC特性的导电性聚合物芯片 3的上下两面,这样, 两层 PTC特性的导电性聚合物芯片 3使得一共有四层金属箔 2; 绝缘膜 1均匀紧贴于上述四 层金属箔 2的面上, 四层金属箔 2使得一共有三层绝缘膜 1 , 三层绝缘膜 1一共形成五部分; 绝缘胶 4涂布于上述 PTC特性的导电性聚合物芯片 3、 绝缘膜 1及金属箔 2左右两侧, 两侧 的绝缘胶 4一共形成三部分; 在绝缘膜 1、 金属箔 2及左右两侧绝缘胶 4的交合处形成具有 凹槽的物理加工开槽区, 其中上下两面各一处, 右侧一处; 阻镀膜 5均匀粘贴于上述上下两 面绝缘膜 1的中间区域, 其一共形成两部分阻镀膜 5; 导电金属层 6良好的附着于绝缘胶 4、 绝缘膜 1和物理加工开槽区内金属箔 2表面, 使得左右两端导电金属层 6分别与上述各导电 性聚合物芯片 3的上下两面的金属箔 2保持良好的电气连接。 实施例 6
参照图 6A ~图 6F说明本发明的实施例 6的叠状表面贴装型正温度系数特性热敏电阻及 其制造方法。
图 6A是本发明的实施例 6的叠状表面贴装型正温度系数特性热敏电阻的结构图。
在图 6A中, PTC特性的导电性聚合物芯片 1是由一种或多种晶体聚合物、 导电填充料 以及加工助剂等混合物构成的高分子聚合物片体; 一层双毛面金属箔 3均匀覆盖于上述上下 两层 PTC特性的导电性聚合物芯片 1夹层面上;两层单毛面金属箔 2均匀紧贴于上述两层 PTC 特性的导电性聚合物芯片 1的上下两面上; 绝缘膜 4均匀紧贴于上述两单面金属箔 2面上, 绝缘膜 4在两面的单面金属箔 2上一共形成两部分; 绝缘胶 6覆盖于上述结合体的左右两侧
面,在上下两面的绝缘膜 4与金属箔之间的间隙内存在三处的具有凹槽的物理加工区, 其中, 左侧面两处, 右侧面一处; 左右端及上下面部分的导电金属层 7 良好的附着于绝缘膜 4、 绝 缘胶 6和凹槽物理加工区内的金属箔 2表面, 使得导电金属层 Ί与上述各金属箔保持良好的 电气连接。
下面参照附图图 6A〜图 6F, 说明发明实施例 2的表面贴装型 PTC特性热敏电阻新型结 构及其制造方法:
( 1 )将一种或多种晶体聚合物、导电填充料以及加工助剂等原料混合分别通过双螺杆挤 出压延等加工方式制成总厚度为 0.05 ~ 5mm的薄片, 然后, 通过热压方式形成如图 7B的薄 片, 其工序所得薄片特征是, 一层双毛面金属箔 3均匀覆盖于上述上下两层 PTC特性的导电 性聚合物芯片 1夹层面上,两层单毛面金属箔 2紧密叠压于导电性聚合物芯片 1上下两面上, 绝缘膜 4紧贴于上述两层单毛面金属箔 2上;
( 2 )在上述薄片左右两侧面各覆盖一层绝缘胶 6并将其固化,使薄片形成四面绝缘覆盖 层, 形成如图 6C所示的薄片;
( 3 )在上述薄片左右两侧面上, 通过物理加工方法(例如激光加工等)在外绝缘覆盖层 表面开槽使内部金属箔露出, 形成如图 6D所示、 具有三处物理加工区的薄片, 其薄片的物 理加工区特征是, 左侧两处, 右侧一处;
( 4 )在上述薄片两侧面套上 U型薄壁金属槽(请参阅图 6E )后通过焊接等方式将 U型 金属槽与 PTC金属箔连接, 形成具有导电金属层 7、 如图 6F所示的条形薄片, 其工序如图 6E;
( 5 )将上述薄条形片切割成具有规定尺寸、 结构图如图 6A的单个表面贴装式元件。 实施例 7
下面参照图 7A〜图 7E说明本发明的实施例 7的叠状表面贴装型正温度系数特性热敏电 阻及其制造方法。
图 7A是本发明的实施例 7的叠状表面贴装型正温度系数特性热敏电阻的结构图。
在图 7A中, PTC特性的导电性聚合物芯片 1是由一种或多种晶体聚合物、 导电填充料 以及加工助剂等混合物构成的高分子聚合物片体; 一层双毛面金属箔 3均匀覆盖于上述上下 两层 PTC特性的导电性聚合物芯片 1夹层面上;两层单毛面金属箔 2均匀紧贴于上述两层 PTC 特性的导电性聚合物芯片 3的上下两面上; 绝缘膜 4均匀紧贴于上述两单面金属箔 2面上, 绝缘膜 4在两面的单面金属箔 2上一共形成两部分; 绝缘胶 6覆盖于上述结合体的左右两侧
面, 在绝缘膜 4、 绝缘胶 6与金属箔之间的间隙内存在三处的具有凹槽的物理加工区, 其中, 左侧面两处, 右侧面一处; 左右端及上下面部分的导电金属层 5 良好的附着于绝缘膜 4、 绝 缘胶 6和凹槽物理加工区内的金属箔 2表面, 使得导电金属层 5与上述各金属箔保持良好的 电气连接; 阻镀膜 8均匀紧贴于上述上下两面的绝缘膜 4中间区域上, 上下两面的阻镀膜 8 一共形成两部分。
下面参照图 7A〜图 7E, 说明发明实施例 7的表面贴装型正温度系数特性热敏电阻新型 结构及其制造方法。
( 1 )用与实施例 7中图 6B〜图 6D所对应的相同工序, 形成如图 7B所示的薄片;
( 2 )在上述薄片的上下两表面中间区域涂布阻镀膜 8 , 形成如图 7C所示的叠状薄片;
( 3 )将上述薄片整体电镀, 形成具有导电金属层 5、 如图 7D所示的条形薄片;
( 4 )将上述薄条形片切割成具有规定尺寸、 结构图如图 7A的单个表面贴装式元件, 其 工序请参见图 7E;
上述各工序之间存在部分工序 (如物理加工开槽工序与涂布阻镀膜 8工序) 互换作业, 只要不影响所述表面贴装式 PTC特性热敏电阻的制造即可。 实施例 8
下面参照图 8A ~图 8E说明本发明的实施例 8的叠状表面贴装型正温度系数特性热敏电 阻及其制造方法。
图 8A是本发明的实施例 8的叠状表面贴装型正温度系数特性热敏电阻的结构图。
在图 8A中, PTC特性的导电性聚合物芯片 1是由一种或多种晶体聚合物、 导电填充料 以及加工助剂等混合物构成的高分子聚合物片体; 一层双毛面金属箔 3均匀覆盖于上述上下 两层 PTC特性的导电性聚合物芯片 1夹层面上;两层单毛面金属箔 2均匀紧贴于上述两层 PTC 特性的导电性聚合物芯片 1的上下两面上; 绝缘膜 4均匀紧贴于上述两单面金属箔 2面上, 绝缘膜 4在两面的单面金属箔 2上一共形成四部分; 绝缘胶 6覆盖于左右两侧面, 在上下两 面的绝缘膜 4、 左右两侧面的绝缘胶 6与上述单、 双毛面金属箔的间隙处存在三处具有凹槽 的物理加工区, 其中, 上下两面各一处, 右侧面一处; 左右端及上下面部分的导电金属层 5 良好的附着于绝缘膜 4、 绝缘胶 6和凹槽物理加工区内的各金属箔表面, 使得导电金属层 5 与上述各金属箔保持良好的电气连接; 阻镀膜 8均匀紧贴于上述上下两面的绝缘膜 4中间区 域上, 上下两面的阻镀膜 8一共形成两部分。
下面参照附图图 8B ~图 8E, 说明本发明实施例 8的表面贴装型 PTC特性热敏电阻新型
结构及其制造方法:
( 1 )用与实施例 6中图 6B〜图 6C所对应的相同工序, 使薄片形成四面绝缘覆盖层, 形 成如图 8B所示的薄片;
( 2 )在上述叠状薄片左右两侧面部, 通过物理加工方法(例如激光加工)在外绝缘覆盖 层表面开槽使内部金属箔棵露, 形成如图 8C 所示具有三个物理加工开槽区 (上下两面各一 处、 右侧一处) 的叠状薄片;
( 3 )在上述薄片上下两面中间区域涂布阻镀膜 8 , 形成如图 8D所示的叠状薄片;
( 4 )将其整体电镀, 形成具有导电金属层 5、 如图 8E所示的叠状薄片;
最后, 将上述叠状薄条形片切割成具有规定尺寸、 如图 8A所示的单个表面贴装式元件。 类似于实施例 6与实施例 7, 这里, 在图 8C所示的形成物理加工开槽工序后, 亦可进行 以下工序:
在形成物理加工开槽工序所得薄片两侧面, 套上 U型薄壁金属槽后通过焊接等方式将 U 型金属槽与 PTC金属箔连接紧密; 最后, 再将上述薄条形片切割成具有规定尺寸单个表面贴 装型元件。 此时所得之元件结构上, 无上述图 8A所示的上下两层阻镀膜 8。
类似于上述各实施例的叠状表面贴装式 PTC特性热敏电阻创新型结构及其制造方法, 两 层、 三层或以上的叠状表面贴装式 PTC特性热敏电阻亦在本发明的保护范围之内。
釆用了上述的叠状表面贴装型热敏电阻及其制造方法, 其中的叠状表面贴装型热敏电阻 结构新颖、 性能优越、 产品合格率高而制造工艺独特, 釆用其制造方法, 无需在金属箔表面 进行蚀刻工序, 只要对形成的上下左右四面具有绝缘层的导电模块的两所述绝缘胶(或两所 述绝缘膜、 或一所述绝缘胶及一所述绝缘膜)进行物理加工 (例如激光气化) 工序, 使得金 属箔部分棵露出来, 分别与外面贴合的两电镀金属层连接即可。 对比传统工艺, 使用本发明 的上述叠状表面贴装型热敏电阻及制造方法有如下优点:
( 1 )经物理加工 (例如激光加工等)开槽后的有机颗粒物质易通过密封管道回收处理, 故利于环境保护, 不存在类似于蚀刻液的对环境污染严重的缺点;
( 2 )物理加工 (例如激光加工等)开槽成本(单层 PTC元件约 0.01元 /件, 多层 PTC 元件成本增加较少)相对于化学蚀刻成本(单层 PTC元件约 0.08元 /件, 多层 PTC元件成本 成倍增加) 更低, 从而节约大量生产成本;
( 3 )不易出现类似于蚀刻图形易产生漂移、 错位等异常缺陷, 物理加工(例如激光加工 等)开槽工艺更稳定;
( 4 )物理加工开槽精度高, 例如激光加工等直线精度可达 0.05mm, 激光加工线宽亦可
达 0.05mm, 成品率相对传统工艺更高;
( 5 )组成元件所需材料相对较少, 使得材料总成本较于传统结构材料成本少;
( 6 ) 由于材料相对较少, 使得制造工序较少, 造成总成品率相对较高;
( 7 ) 由于双毛面金属箔表层的粗糙度较大, 其与 PTC芯片结合附着力较大, 使得材料 结合更加紧密, 且材料相对较少, 故在热压等工序作业时, 产生图层的漂移、 错位等异常现 象几率较小, 使结构更加稳定可靠。
在此说明书中, 本发明已参照其特定的实施例作了描述。 但是, 很显然仍可以作出各种 修改和变换而不背离本发明的精神和范围。 因此, 说明书和附图应被认为是说明性的而非限 制性的。
Claims
1、 一种叠状表面贴装型热敏电阻, 其特征在于, 包括导电模块、 左导电金属层和右导电 金属层, 所述导电模块包括核心导电模块和绝缘层, 所述绝缘层包括上绝缘层、 下绝缘层、 左 绝缘层和右绝缘层,所述上绝缘层和所述下绝缘层分别贴合在所述核心导电模块的所述上下表 面上, 所述左绝缘层和所述右绝缘层分别贴合在所述核心导电模块的所述左右侧面上, 所述核 心导电模块包括一导电单元, 所述导电单元包括从上至下依次贴合的上金属箔、 具有 PTC特 性的导电性聚合物芯片和下金属箔,所述左导电金属层和所述右导电金属层分别贴合所述导电 模块左部和右部, 所述的左导电金属层局部穿设所述上绝缘层 /下绝缘层并与所述导电单元的 上金属箔 /下金属箔相连接, 所述右导电金属层局部穿设所述下绝缘层 /上绝缘层并与所述导电 单元的下金属箔 /上金属箔相连接。
2、 根据权利要求 1所述的叠状表面贴装型热敏电阻, 其特征在于, 所述的热敏电阻还包 括上阻镀膜和下阻镀膜,所述上阻镀膜和所述下阻镀膜分别贴合在所述导电模块上下表面用于 阻隔开所述左导电金属层和所述右导电金属层。
3、 一种制造权利要求 1所述的叠状表面贴装型热敏电阻的方法, 其特征在于, 包括以下 步骤:
( 1 )制造所述导电性聚合物芯片, 在所述导电性聚合物芯片上下表面分别贴合两金属箔, 即上金属箔和下金属箔, 从而形成导电单元;
( 2 )将所述导电单元直接作为所述核心导电模块;
( 3 )将所述绝缘层包覆所述核心导电模块的所述上下表面和所述左右侧面, 从而形成所 述导电模块;
( 4 )对所述绝缘层通过物理加工方法进行开槽, 分别使所述导电单元的两所述金属箔部 分棵露出;
( 5 )将所述左导电金属层和所述右导电金属层贴合在所述导电模块的所述左部和所述右 部, 并分别与所述导电单元的两所述金属箔连接; 或者, 在所述导电模块的上下表面的中间区 域分别贴合上阻镀膜和下阻镀膜, 然后进行整体电镀, 从而形成分别与所述导电单元的两所述 金属箔连接的所述左导电金属层和所述右导电金属层。
4、 根据权利要求 3所述的制造叠状表面贴装型热敏电阻的方法, 其特征在于, 在所述步 骤(1 ) 中, 所述导电性聚合物芯片是由至少一种晶体聚合物、 导电填充料以及加工助剂混合 后通过双螺杆挤出压延制成。
5、 根据权利要求 3所述的制造叠状表面贴装型热敏电阻的方法, 其特征在于, 通过在所 述核心导电模块的所述左右侧面上分别涂布绝缘胶, 从而形成所述左绝缘层和所述右绝缘层。
6、 根据权利要求 3所述的制造叠状表面贴装型热敏电阻的方法, 其特征在于, 在所述步 骤(4 ) 中, 所述物理加工方法包括但不局限于激光加工方法。
7、 根据权利要求 3所述的制造叠状表面贴装型热敏电阻的方法, 其特征在于, 在所述步 骤(2 )后, 在所述步骤(3 )之前, 还包括以下步骤:
( 21 )将所述核心导电模块切割成合适形状。
8、 一种叠状表面贴装型热敏电阻, 其特征在于, 包括导电模块、 左导电金属层和右导电 金属层, 所述导电模块包括核心导电模块和绝缘层, 所述绝缘层包括上绝缘层、 下绝缘层、 左 绝缘层和右绝缘层,所述上绝缘层和所述下绝缘层分别贴合在所述核心导电模块的所述上下表 面上, 所述左绝缘层和所述右绝缘层分别贴合在所述核心导电模块的所述左右侧面上, 所述核 心导电模块包括依次堆叠的至少两个导电单元, 两导电单元之间间隔一绝缘材料层, 所述导电 单元包括从上至下依次贴合的上金属箔、 具有 PTC特性的导电性聚合物芯片和下金属箔, 所 述左导电金属层和所述右导电金属层分别贴合所述导电模块左部和右部,所述左导电金属层局 部穿设所述上绝缘层和所述下绝缘层并分别与一所述导电单元的所述上金属箔和另一所述导 电单元的所述下金属箔均相连接,所述右导电金属层局部穿设所述右绝缘层并分别与一所述导 电单元的所述下金属箔和另一所述导电单元的所述上金属箔均相连接; 或者, 所述左导电金属 层局部穿设所述左绝缘层并分别与一所述导电单元的所述下金属箔和另一所述导电单元的所 述上金属箔均相连接,所述右导电金属层局部穿设所述上绝缘层和所述下绝缘层并分别与一所 述导电单元的所述上金属箔和另一所述导电单元的所述下金属箔均相连接。
9、 根据权利要求 8所述的叠状表面贴装型热敏电阻, 其特征在于, 所述导电单元的数目 是两个。
10、 根据权利要求 8所述的叠状表面贴装型热敏电阻, 其特征在于, 所述的热敏电阻还包 括上阻镀膜和下阻镀膜,所述上阻镀膜和所述下阻镀膜分别贴合在所述导电模块上下表面用于 阻隔开所述左导电金属层和所述右导电金属层。
11、 一种制造权利要求 8所述的叠状表面贴装型热敏电阻的方法, 其特征在于, 包括以下 步骤:
( 1 )制造所述导电性聚合物芯片, 在所述导电性聚合物芯片上下表面分别贴合两金属箔, 即上金属箔和下金属箔, 从而形成导电单元;
( 2 )釆用两个或两个以上所述导电单元, 依次堆叠, 两所述导电单元之间间隔所述绝缘
材料层, 从而形成所述核心导电模块;
( 3 )将所述绝缘层包覆所述核心导电模块的所述上下表面和所述左右侧面, 从而形成所 述导电模块;
( 4 )对所述绝缘层通过物理加工方法进行开槽, 分别使所述导电单元的两所述金属箔部 分棵露出;
( 5 )将所述左导电金属层和所述右导电金属层贴合在所述导电模块的所述左部和所述右 部, 并分别与所述导电单元的两所述金属箔连接; 或者, 在所述导电模块的上下表面的中间区 域分别贴合上阻镀膜和下阻镀膜, 然后进行整体电镀, 从而形成分别与所述导电单元的两所述 金属箔连接的所述左导电金属层和所述右导电金属层。
12、 根据权利要求 11所述的制造叠状表面贴装型热敏电阻的方法, 其特征在于, 在步骤 ( 1 ) 中, 所述导电性聚合物芯片是由至少一种晶体聚合物、 导电填充料以及加工助剂混合后 通过双螺杆挤出压延制成。
13、 根据权利要求 11所述的制造叠状表面贴装型热敏电阻的方法, 其特征在于, 在所述 步骤(3 ) 中, 所述绝缘层包括上绝缘层、 下绝缘层、 左绝缘层和右绝缘层, 所述上绝缘层和 所述下绝缘层分别贴合在所述核心导电模块的所述上下表面上,所述左绝缘层和所述右绝缘层 分别贴合在所述核心导电模块的所述左右侧面上。
14、 根据权利要求 13所述的制造叠状表面贴装型热敏电阻的方法, 其特征在于, 通过在 所述核心导电模块的所述左右侧面上分别涂布绝缘胶, 从而形成所述左绝缘层和所述右绝缘 层。
15、 根据权利要求 11所述的制造叠状表面贴装型热敏电阻的方法, 其特征在于, 在所述 步骤(4 ) 中, 所述物理加工方法包括但不局限于激光加工方法。
16、 根据权利要求 11所述的制造叠状表面贴装型热敏电阻的方法, 其特征在于, 在所述 步骤(2 )后, 在所述步骤(3 )之前, 还包括以下步骤:
( 21 )将所述核心导电模块切割成合适形状。
17、 一种叠状表面贴装型热敏电阻, 其特征在于, 包括导电模块、 彼此绝缘的左导电金属 层和右导电金属层, 所述的导电模块包括核心导电模块和绝缘层, 所述绝缘层包覆于所述的核 心导电模块的上表面和下表面, 所述的核心导电模块包括依次堆叠的至少两个具有 PTC特性 的导电性聚合物芯片, 且相邻的两个具有 PTC特性的导电性聚合物芯片之间均夹设有一中央 金属层, 所述的最上层的具有 PTC特性的导电性聚合物芯片的顶面贴覆有上金属层, 且所述 的最下层的具有 PTC特性的导电性聚合物芯片的底面贴覆有下金属层, 所述的左导电金属层
和右导电金属层分别贴合所述的导电模块左部和右部, 且所述的上金属层、 中央金属层和下金 属层依次按照奇偶间隔方式分别与所述的左导电金属层和右导电金属层相导通连接。
18、 根据权利要求 17所述的叠状表面贴装型热敏电阻, 其特征在于, 所述的绝缘层包括 上绝缘层和下绝缘层,所述的上绝缘层和下绝缘层分别贴覆于所述的核心导电模块的上表面和 下表面上。
19、 根据权利要求 18所述的叠状表面贴装型热敏电阻, 其特征在于, 所述的绝缘层还包 括左绝缘层和右绝缘层,所述的左绝缘层和右绝缘层分别贴覆于所述的核心导电模块的左侧面 和右侧面, 所述的左导电金属层贴合于所述的左绝缘层外侧, 且该左导电金属层局部穿设该左 绝缘层与所述的上金属层、 中央金属层和下金属层中的对应部分金属层相导通连接, 所述的右 导电金属层贴合于所述的右绝缘层外侧,且该右导电金属层局部穿设该右绝缘层与所述的上金 属层、 中央金属层和下金属层中的对应部分金属层相导通连接。
20、 根据权利要求 18所述的叠状表面贴装型热敏电阻, 其特征在于, 所述的具有 PTC特 性的导电性聚合物芯片的数量为偶数。
21、 根据权利要求 20所述的叠状表面贴装型热敏电阻, 其特征在于, 所述的绝缘层还包 括左绝缘层和右绝缘层,所述的左绝缘层和右绝缘层分别贴覆于所述的核心导电模块的左侧面 和右侧面, 所述的左导电金属层贴合于所述的左绝缘层外侧, 且该左导电金属层局部穿设该左 绝缘层与所述的中央金属层中的对应部分金属层相导通连接,所述的右导电金属层贴合于所述 的右绝缘层外侧,且该右导电金属层局部穿设该右绝缘层与所述的中央金属层中的对应部分金 属层相导通连接;所述的左导电金属层局部穿设所述的上绝缘层和下绝缘层并分别与所述的上 金属层和下金属层相导通连接。
22、 根据权利要求 18所述的叠状表面贴装型热敏电阻, 其特征在于, 所述的具有 PTC特 性的导电性聚合物芯片的数量为奇数。
23、 根据权利要求 22所述的叠状表面贴装型热敏电阻, 其特征在于, 所述的绝缘层还包 括左绝缘层和右绝缘层,所述的左绝缘层和右绝缘层分别贴覆于所述的核心导电模块的左侧面 和右侧面, 所述的左导电金属层贴合于所述的左绝缘层外侧, 且该左导电金属层局部穿设该左 绝缘层与所述的中央金属层中的对应部分金属层相导通连接,所述的右导电金属层贴合于所述 的右绝缘层外侧,且该右导电金属层局部穿设该右绝缘层与所述的中央金属层中的对应部分金 属层相导通连接;所述的左导电金属层局部穿设所述的上绝缘层并与所述的上金属层和相导通 连接, 所述的右导电金属层局部穿设所述的下绝缘层并与所述的下金属层相导通连接。
24、 根据权利要求 17所述的叠状表面贴装型热敏电阻, 其特征在于, 所述的热敏电阻还
包括上阻镀膜和下阻镀膜,所述的上阻镀膜和下阻镀膜分别贴覆于所述的导电模块上下表面且 绝缘阻隔所述的左导电金属层和右导电金属层。
25、 根据权利要求 17至 24中任一项所述的叠状表面贴装型热敏电阻, 其特征在于, 所述 的中央金属层为双毛面金属箔。
26、 根据权利要求 1724中任一项所述的叠状表面贴装型热敏电阻, 其特征在于, 所述的 上金属层和下金属层均为单毛面金属箔, 且该单毛面金属箔的毛面贴覆于所述的具有 PTC特 性的导电性聚合物芯片的相应表面。
27、 一种制造权利要求 17所述的叠状表面贴装型热敏电阻的方法, 其特征在于, 包括以 下步骤:
( 1 )制造所述的导电性聚合物芯片, 将两个或两个以上所述的导电性聚合物芯片依次堆 叠, 相邻的两个所述的导电性聚合物芯片之间间隔设置所述的中央金属层, 在最上层的导电性 聚合物芯片的顶面贴合上金属层, 在最下层的导电性聚合物芯片的底面贴合下金属层, 从而形 成所述的核心导电模块;
( 2 )将所述的绝缘层包覆于所述的核心导电模块的上表面、 下表面、 左侧面和右侧面, 从而形成所述导电模块;
( 3 )对所述的绝缘层通过物理加工方法进行开槽, 分别使所述的中央金属层、 上金属层 和下金属层部分棵露出;
( 4 )将所述左导电金属层和所述右导电金属层分别贴合在所述的导电模块的左部和右部, 且使得所述的上金属层、中央金属层和下金属层依次按照奇偶间隔方式分别与所述的左导电金 属层和右导电金属层相导通连接; 或者, 在所述导电模块的上下表面的中间区域分别贴合上阻 镀膜和下阻镀膜, 然后进行整体电镀, 从而形成所述的左导电金属层和所述右导电金属层, 且 使得所述的上金属层、中央金属层和下金属层依次按照奇偶间隔方式分别与所述的左导电金属 层和右导电金属层相导通连接。
28、 根据权利要求 27所述的制造叠状表面贴装型热敏电阻的方法, 其特征在于, 在步骤 ( 1 ) 中, 所述导电性聚合物芯片是由至少一种晶体聚合物、 导电填充料以及加工助剂混合后 通过双螺杆挤出压延制成。
29、 根据权利要求 27所述的制造叠状表面贴装型热敏电阻的方法, 其特征在于, 在所述 步骤(2 ) 中, 所述绝缘层包括上绝缘层、 下绝缘层、 左绝缘层和右绝缘层, 所述上绝缘层和 所述下绝缘层分别贴合在所述核心导电模块的所述上下表面上,所述左绝缘层和所述右绝缘层 分别贴合在所述核心导电模块的所述左右侧面上。
30、 根据权利要求 29所述的制造叠状表面贴装型热敏电阻的方法, 其特征在于, 通过在 所述核心导电模块的所述左右侧面上分别涂布绝缘胶, 从而形成所述左绝缘层和所述右绝缘 层。
31、 根据权利要求 27所述的制造叠状表面贴装型热敏电阻的方法, 其特征在于, 在所述 步骤(3 ) 中, 所述物理加工方法包括但不局限于激光加工方法。
32、 根据权利要求 27所述的制造叠状表面贴装型热敏电阻的方法, 其特征在于, 在所述 步骤(1 )后, 在所述步骤(2 )之前, 还包括以下步骤:
( 11 )将所述核心导电模块切割成合适形状。
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CN104392938B (zh) * | 2014-10-29 | 2017-04-19 | 禾邦电子(苏州)有限公司 | 半导体芯片封装方法 |
CN114999754B (zh) * | 2021-03-01 | 2023-06-02 | 天芯互联科技有限公司 | 一种热敏电阻的制作方法及热敏电阻 |
US11404186B1 (en) * | 2021-04-23 | 2022-08-02 | Fuzetec Technology Co., Ltd. | PTC circuit protection device |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01293503A (ja) * | 1988-05-20 | 1989-11-27 | Murata Mfg Co Ltd | 正の抵抗温度特性を有する半導体磁器 |
US5900800A (en) * | 1996-01-22 | 1999-05-04 | Littelfuse, Inc. | Surface mountable electrical device comprising a PTC element |
CN1342322A (zh) * | 1998-12-18 | 2002-03-27 | 伯恩斯公司 | 改进的导电聚合物器件及其制造方法 |
CN1447351A (zh) * | 2003-01-07 | 2003-10-08 | 上海维安热电材料股份有限公司 | 层片状高分子ptc热敏电阻器电极材料的制造方法 |
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Publication number | Priority date | Publication date | Assignee | Title |
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CA2190361A1 (en) * | 1994-05-16 | 1995-11-23 | Michael Zhang | Electrical devices comprising a ptc resistive element |
US5907272A (en) * | 1996-01-22 | 1999-05-25 | Littelfuse, Inc. | Surface mountable electrical device comprising a PTC element and a fusible link |
US6172591B1 (en) * | 1998-03-05 | 2001-01-09 | Bourns, Inc. | Multilayer conductive polymer device and method of manufacturing same |
CN1291775A (zh) | 2000-11-09 | 2001-04-18 | 上海维安热电材料股份有限公司 | 一种表面贴装用热敏电阻器的制造方法 |
US6480094B1 (en) * | 2001-08-21 | 2002-11-12 | Fuzetec Technology Co. Ltd. | Surface mountable electrical device |
CN2569298Y (zh) | 2002-09-11 | 2003-08-27 | 上海维安热电材料股份有限公司 | 一种表面贴装用高分子热敏电阻器 |
CN2591719Y (zh) | 2002-11-19 | 2003-12-10 | 上海维安热电材料股份有限公司 | 一种叠层表面贴装用高分子ptc热敏电阻器 |
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01293503A (ja) * | 1988-05-20 | 1989-11-27 | Murata Mfg Co Ltd | 正の抵抗温度特性を有する半導体磁器 |
US5900800A (en) * | 1996-01-22 | 1999-05-04 | Littelfuse, Inc. | Surface mountable electrical device comprising a PTC element |
CN1342322A (zh) * | 1998-12-18 | 2002-03-27 | 伯恩斯公司 | 改进的导电聚合物器件及其制造方法 |
CN1447351A (zh) * | 2003-01-07 | 2003-10-08 | 上海维安热电材料股份有限公司 | 层片状高分子ptc热敏电阻器电极材料的制造方法 |
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