WO2010032829A1

WO2010032829A1 - Method for manufacturing semiconductor light-emitting element and semiconductor light-emitting element

Info

Publication number: WO2010032829A1
Application number: PCT/JP2009/066375
Authority: WO
Inventors: 秀善堀江; 崇深田; 英隆天内
Original assignee: 三菱化学株式会社
Priority date: 2008-09-19
Filing date: 2009-09-18
Publication date: 2010-03-25
Also published as: JPWO2010032829A1

Abstract

A semiconductor light-emitting element, wherein the crystallinity of a substrate is improved, thereby suppressing optical loss and deterioration in the state of crystals. As a result, the semiconductor light-emitting element can endure increases in output and efficiency. A method for manufacturing a semiconductor light-emitting element wherein a semiconductor layer is arranged on a crystal growth surface of a substrate, said method being characterized by having a step wherein a crystal quality-improving layer is formed on the back surface of the substrate.

Description

Semiconductor light emitting device manufacturing method and semiconductor light emitting device

The present invention relates to a method for manufacturing a semiconductor light emitting device and a semiconductor light emitting device.
More specifically, the present invention relates to a method for manufacturing a semiconductor light emitting device that is excellent in light extraction efficiency and that reduces damage on the back surface of a crystal growth substrate, and a semiconductor light emitting device.

In recent years, development of semiconductor light emitting devices (hereinafter sometimes simply referred to as light emitting devices) using gallium nitride-based compound semiconductors such as GaN, AlGaN, and InGaN has been actively conducted.
Recently, a light emitting source that combines a light emitting element that emits blue light and a yellow phosphor that is excited by the light emitting element has been put into practical use as a light source of an illumination device that emits white light. However, since the light source obtains white light by mixing the blue light emitted from the light emitting element and the yellow light emitted from the yellow phosphor, the color rendering property is not so high.

Therefore, in order to obtain white illumination with higher color rendering properties, a light emitting source in which three color phosphors of a blue phosphor, a green phosphor and a red phosphor are combined with a light emitting element has been studied. In this light emitting source, for example, a light emitting element that emits near-ultraviolet light is used as the light emitting element. The blue phosphor, the green phosphor, and the red phosphor are excited by near-ultraviolet light emitted from the light emitting element, and wavelength-convert the near-ultraviolet light into blue light, green light, and red light, respectively. White light with high color rendering properties can be obtained by mixing three colors of light obtained by wavelength conversion.

However, in general, a light emitting element that emits near-ultraviolet light has lower luminous efficiency than a light emitting element that emits blue light. Therefore, light emitting elements that emit near-ultraviolet light are required to have higher output and higher efficiency.
A flip chip mount structure (flip chip structure) is known as an effective structure for increasing the output and efficiency of a light emitting element. In this structure, a predetermined semiconductor layer is deposited on a substrate, an n-side electrode and a p-side electrode for current injection are formed on the opposite side of the substrate, and light extraction is mainly performed on the substrate side or the substrate side surface where no electrode is formed. The direction. For this reason, since the light emitted from the light emitting element is not blocked and the electrode can be used as a light reflecting surface, the light extraction efficiency is improved.

In a light-emitting element having such a flip-chip structure, the substrate may be processed by polishing or the like from the back surface to form a light extraction surface after forming a laminated structure of semiconductor layers by crystal growth. Processing such as polishing is usually performed by mechanical processing such as polishing, dicing, or blasting, and various etching processes such as dry etching or photo-electrochemical etching. However, such mechanical treatment and etching treatment may cause physical or chemical damage to the back surface of the substrate, and thus the crystal state of the substrate may be deteriorated. Deterioration of the crystal state increases the optical loss of the substrate and decreases the light extraction effect, so that characteristics such as the total radiant flux are degraded. Therefore, a light-emitting element with less deterioration of the crystal state of the substrate is required. Note that the increase in the optical loss is remarkable especially at a wavelength of 430 nm or less, and therefore, in a light-emitting element having a center wavelength of 430 nm or less, there is a great demand for eliminating the deterioration of the crystal state.

In order to increase the output and efficiency of the light-emitting element, a desired light-emitting element structure is epitaxially grown on a conductive substrate, and one electrode is formed on the substrate. There has been proposed a structure of a so-called vertical conduction type light emitting element in which a current flows in the epitaxial growth direction by forming one electrode.
In such a vertical conduction type structure, when the thickness of the substrate is excessively large, the passage resistance of the light emitting element increases. Further, in the vertical conduction type light-emitting element structure, the crystal plane presented in the thinning process becomes an electrode formation surface, and therefore it is necessary to avoid an increase in contact resistance in this portion. Accordingly, even when a so-called vertical conduction type light emitting element is used, it is necessary to recover physical or chemical damage caused by mechanical processing or etching processing on the back surface of the substrate, as in the case of the flip chip type light emitting element.

As described above, in providing a light emitting device that can withstand the recent increase in output and efficiency, it is extremely important that the deterioration of the crystal state is small.
On the other hand, a technology for forming a light emitting device on a single crystal GaN or other nitride substrate to solve the problems of lattice mismatch and thermal expansion coefficient in a conventional gallium nitride compound semiconductor light emitting device formed on a sapphire substrate. Has been developed. However, the GaN single crystal substrate has a problem that the substrate surface is particularly damaged when the mechanical treatment or the etching treatment is performed, compared to the sapphire substrate.

On the other hand, for example, Patent Document 1 discloses a technique of performing chemical mechanical polishing (chemical mechanical polishing or CMP) on the back surface of a GaN substrate after performing the mechanical polishing.
Patent Document 2 discloses a method of polishing a group III-V nitride semiconductor with a slurry containing a substance having a sufficient chemical potential for breaking an ionic bond of molecules constituting the group III-V nitride semiconductor. It is disclosed.

In Patent Document 3, as a technique for removing damage on the N-side surface of a GaN substrate, an aqueous solution of a base (for example, KOH or NaOH) or an aqueous solution of an acid (for example, HF, H ₂ SO ₄ or H ₃ PO ₄ ). A technique for mild etching at a temperature below the boiling point of an aqueous solution is disclosed.
Further, in Patent Document 4, blue-violet light, purple light having a shape processing step for polishing a crystal growth substrate such as GaN from the back surface and a processing surface finishing step for finishing by dry etching such as RIE or ICP. A manufacturing method useful for a light-emitting diode having a short emission wavelength such as ultraviolet light is disclosed.

International Publication WO2005 / 099057 Pamphlet Japanese Unexamined Patent Publication No. 2008-98199 Japanese Unexamined Patent Publication No. 2004-530306 Japanese Unexamined Patent Publication No. 2005-302804

However, a method such as a method for removing damage by CMP requires a preparatory step such as attaching a wafer containing a semiconductor light emitting element to a dedicated jig, which is troublesome. In addition, since CMP requires several hours, resulting in high cost, it is not necessarily preferable in the manufacturing process.
Further, even when the processed surface is finished by dry etching or the like, the damage on the back surface of the substrate has not been sufficiently reduced. In particular, as a light-emitting device with a flip chip type structure for ensuring sufficient light extraction efficiency from a GaN substrate and a vertical conduction type structure for suppressing an increase in contact resistance of a conductive substrate, the back surface of the substrate is processed to a practical level. An effective way to do this has not been found.

An object of the present invention is to provide a light emitting device that improves the quality of the back surface of a substrate damaged by polishing or the like, increases light extraction efficiency, and can withstand higher output and higher efficiency, and a method for manufacturing the same. There is.

In order to achieve the above object, the gist of the present invention resides in the following [1] to [26].
[1] A method of manufacturing a semiconductor light emitting device in which a semiconductor layer is laminated on a crystal growth surface of a substrate,
(B) A method of manufacturing a semiconductor light emitting device, comprising a step of forming a crystal quality improving layer on the back surface of the substrate.
[2] Before the step (B),
(A) The method for manufacturing a semiconductor light-emitting element according to [1], including a step of processing a back surface of the crystal growth substrate.
[3] After the step (B),
(C) The method for producing a semiconductor light-emitting device according to [1] or [2], including a step of removing the crystal quality improving layer.
[4] The method for manufacturing a semiconductor light emitting device according to [1] to [3], wherein the step (B) includes forming the crystal quality improving layer using a gas species containing at least ammonia as a nitrogen raw material.
[5] The manufacturing of the semiconductor light emitting device according to [1] to [4], wherein the step (B) includes forming the crystal quality improving layer using a gas species containing at least N ₂ O as an oxygen source. Method.
[6] The step (B) includes forming the crystal quality improving layer so that the concentration of hydrogen atoms is 1 × 10 ²¹ atoms / cm ³ or more and 1 × 10 ²² atoms / cm ³ or less. [1] to [5] A method for producing a semiconductor light emitting device.
[7] The method for manufacturing a semiconductor light-emitting element according to [1] to [6], wherein the step (B) includes forming the crystal quality improving layer by a plasma CVD method.
[8] The method for manufacturing a semiconductor light emitting element according to the above [1] to [7], wherein the substrate is a nitride or an oxide.
[9] The method for manufacturing a semiconductor light emitting element according to the above [1] to [8], wherein the crystal quality improving layer contains one or more of nitride, oxide, and oxynitride.
[10] The nitride, oxide, or oxynitride contains any one or more elements of B, Al, Si, Ti, V, Cr, Mo, Hf, Ta, and W. [9 ] The manufacturing method of the semiconductor light-emitting device of.
[11] The method for manufacturing a semiconductor light-emitting element according to any one of [1] to [8], wherein the crystal quality improving layer includes an element that exhibits a termination effect.
[12] The method for producing a semiconductor light-emitting element according to [11], wherein the element that exhibits the termination effect is one or more of Si, Ge, Se, S, Al, P, and As.
[13] A semiconductor light emitting device in which a semiconductor layer is laminated on a crystal growth surface of a substrate,
A semiconductor light emitting device comprising a crystal quality improving layer on a back surface of the substrate.
[14] The semiconductor layer includes a buffer layer, a first conductivity type semiconductor layer including a first conductivity type cladding layer, an active layer structure, and a second conductivity type semiconductor layer including a second conductivity type cladding layer in this order. [13] The semiconductor light emitting device according to [13].
[15] The semiconductor light emitting device has a first conductivity type side electrode and a second conductivity type side electrode for injecting current into the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, respectively. The semiconductor light emitting device according to [13] or [14], wherein the first conductivity type side electrode and the second conductivity type side electrode both have a flip chip type structure facing the buffer layer and disposed on the same side .
[16] The semiconductor light emitting device includes a first conductivity type side electrode and a second conductivity type side electrode for injecting current into the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, respectively. [13] or [14] having the vertical conduction type structure in which one of the first conductivity type side electrode and the second conductivity type side electrode is disposed on the semiconductor layer and the other is disposed in contact with the substrate surface. ] A semiconductor light emitting device.
[17] The semiconductor light emitting device according to any one of [13] to [16], wherein the first conductive semiconductor layer, the active layer structure, and the second conductive semiconductor layer are nitride semiconductors.
[18] The semiconductor light emitting element according to the above [17], wherein the nitride semiconductor contains at least one element of In, Ga, Al, and B.
[19] The semiconductor light emitting device according to [13] to [18], wherein a central wavelength λ (nm) of light emitted from the active layer structure satisfies the following formula.
300 (nm) ≦ λ ≦ 430 (nm)
[20] The semiconductor light-emitting device according to any one of [13] to [19], wherein the concentration of hydrogen atoms in the crystal quality improving layer is 1 × 10 ²¹ atoms / cm ³ or more and 1 × 10 ²² atoms / cm ³ or less.
[21] The semiconductor light emitting device according to [13] to [20], wherein the substrate is a nitride or an oxide.
[22] The semiconductor light-emitting device according to any one of [13] to [21], wherein the crystal quality improving layer includes one or more of nitride, oxide, and oxynitride.
[23] The nitride, oxide, or oxynitride contains any one or more elements of B, Al, Si, Ti, V, Cr, Mo, Hf, Ta, and W. [22 ] A semiconductor light emitting device.
[24] The semiconductor light emitting device according to any one of [13] to [21], wherein the crystal quality improving layer includes an element that exhibits a termination effect.
[25] The semiconductor light-emitting element of [24], wherein the element that exhibits the termination effect is one or more of Si, Ge, Se, S, Al, P, and As.
[26] The semiconductor light emitting device of [13] to [25], wherein the crystal quality improving layer is removed.

According to the present invention, by forming a crystal quality improving layer on the back side of the substrate, the crystallinity of the substrate is improved, the crystal state is less deteriorated, the optical loss is less, and the semiconductor can withstand higher output and higher efficiency. A light-emitting element can be provided. In addition, it is possible to provide a semiconductor light emitting element that can withstand high output and high efficiency with low contact resistance in a conductive substrate.
Therefore, the light-emitting element of the present invention is particularly useful in the light-emitting element having the flip-chip structure or the vertical conduction structure.

In addition, the method for manufacturing a light-emitting element according to the present invention can be carried out in a short time with little effort such as preparation, so that manufacturing costs can be reduced.
In addition, as described in Patent Document 4, physical or chemical damage due to processing of a substrate is caused by light having a light emission wavelength of less than 470 nm (blue light, blue violet light, violet light, near ultraviolet light). , Ultraviolet light, etc.) is relatively easy to absorb. In particular, as described above, this absorption is significant in violet light, near ultraviolet light, and ultraviolet light having a center wavelength of 430 nm or less. The effect in the present invention is particularly remarkable when the emission wavelength and the center wavelength are present.

It is sectional drawing explaining an example of the manufacturing method of the light emitting element by one Embodiment of this invention. It is sectional drawing explaining an example of the manufacturing method of the light emitting element by one Embodiment of this invention. It is sectional drawing explaining an example of the manufacturing method of the light emitting element by one Embodiment of this invention. It is sectional drawing of the light emitting element by one Embodiment (flip chip type structure) of this invention. It is sectional drawing of the light emitting element by one Embodiment (vertical conduction type structure) of this invention. It is sectional drawing of the light emitting element by one Embodiment (vertical conduction type structure) of this invention.

Hereinafter, the present invention will be described in detail. However, the present invention is not limited to the following embodiments, and various modifications can be made without departing from the scope of the invention.
In this specification, the expression “stacked” or “overlapping” refers to the state in which objects are in direct contact with each other, as long as they do not depart from the spirit of the present invention. It may also refer to a spatially overlapping state when projected. In addition, the expression “above (below)” is not limited to the state in which objects are in direct contact with each other being placed above (below) the other, so long as it does not depart from the spirit of the present invention. Even if they are not in contact with each other, they may be used in a state where one is arranged above (below) the other. Furthermore, the expression “after (before, before)” means that even if an event occurs immediately after (before) another event, a third event is Even if it occurs after sandwiching (front), it is used for both. In addition to the expression “when the object is in direct contact”, the expression “in contact with” means that “the object and the object are not in direct contact” as long as they conform to the gist of the present invention. Even if it is in indirect contact via the third member ”,“ the part in which the object is in direct contact with the part in indirect contact through the third member is mixed In some cases, it means “if you are doing”.

Furthermore, in the present invention, “thin film crystal growth” means so-called MOCVD (Metal-Organic-Chemical-Vapor-Deposition), MBE (Molecular-Beam Epitaxy), plasma-assisted MBE, PLD (Pulsed-Laser-Deposition), PED (Pulsed-Electron-Deposition), Formation of thin film layers, amorphous layers, microcrystals, polycrystals, single crystals, or their laminated structures in crystal growth apparatuses such as PSD (Pulsed Sputtering Deposition), VPE (Vapor Phase Epitaxy), LPE (Liquid Phase Epitaxy) In addition to the heat treatment of the thin film layer, the carrier activation treatment by plasma treatment or the like, it is described as thin film crystal growth.

[1] Method for Manufacturing Semiconductor Light-Emitting Element The method for manufacturing a semiconductor light-emitting element of the present invention is as described above.
(B) It is essential to have a step of forming a crystal quality improving layer on the back surface of the substrate.
Unlike conventional methods of reducing surface irregularities by adding CMP or RIE to mechanical processing, by forming a substance that improves the crystal quality of the substrate, the crystallinity of the substrate is improved and the crystalline state is improved. Thus, it is possible to obtain a semiconductor light-emitting element that can withstand high output and high efficiency with little degradation of the optical loss, low optical loss, or low contact resistance in a conductive substrate.

Moreover, the preferable aspect of this invention is:
(A) processing the back surface of the substrate, and (B) forming a crystal quality improving layer on the back surface of the substrate.
Further, a more preferred embodiment of the present invention is
(A) a step of processing the back surface of the substrate;
(B) forming a crystal quality improving layer on the back surface of the substrate; and (C) removing the crystal quality improving layer.

Further, as a preferred embodiment of the present invention, a step of stacking a semiconductor layer may be provided before or after the steps (A) to (C). Moreover, before the said (B) process, the process of etching the back surface of the board | substrate processed by the said (A) process can also be provided arbitrarily.
Hereinafter, a preferred embodiment of the present invention will be described as an example, and will be described in detail in the order of steps.
[1-1] Step of Laminating Semiconductor Layer In the present invention, the step of laminating the semiconductor layer can be appropriately provided before or after the steps (A) to (C). Provide in front.

Hereinafter, an example of a process of stacking semiconductors will be described in the case of a semiconductor light emitting device having a flip chip structure. As shown in FIG. 1, first, a substrate 21 is prepared, and a buffer layer 22, a first conductivity type cladding layer 24, an active layer structure 25 and a second conductivity type cladding layer 26 are sequentially formed on the surface by thin film crystal growth. . The MOCVD method is desirably used for forming these thin film crystal layers. However, the MBE method, the PLD method, the PED method, the PSD method, the VPE method, the LPE method, and the like can also be used to form the entire thin film crystal layer or a part of the thin film crystal layer. These layer configurations can be appropriately changed according to the purpose of the element. Further, after the formation of the thin film crystal layer, various treatments such as formation of an insulating film may be performed. In this specification, the term “thin film crystal growth” includes heat treatment after the growth of the thin film crystal layer.

After the thin film crystal layer growth, it is preferable to form the second conductivity type side electrode 27 as shown in FIG. That is, it is desirable that the formation of the second conductivity type side electrode 27 in the planned second current injection region 35 is performed earlier than the formation of the first conductivity type side electrode 28. When the p-type electrode is formed after various processes are performed on the surface of the p-type cladding layer exposed on the surface when the second conductivity type is p-type as a desirable form, this is compared with GaN-based materials. This is because the hole concentration in the p-type cladding layer having a low effective activation rate is lowered by process damage. For this reason, it is desirable that the second conductivity type side electrode 27 is formed prior to other process steps (for example, a first conductivity type side electrode forming step described later) after the thin film crystal growth.

Similarly, when the layer on which the second conductivity type side electrode 27 is formed is the second conductivity type contact layer, the process damage to the second conductivity type semiconductor layer can be reduced.
Various film formation techniques such as sputtering, vacuum deposition, and plating can be applied to the formation of the second conductivity type side electrode 27. In order to obtain a desired shape, a lift-off method using a photolithography technique or a metal A place-selective vapor deposition using a mask or the like can be used as appropriate.

After forming the second conductivity type side electrode 27, as shown in FIG. 2, a part of the first conductivity type cladding layer 24 is exposed. In this step, it is preferable that the second conductivity type cladding layer 26, the active layer structure 25, and further part of the first conductivity type cladding layer 24 are removed by etching. The purpose of this etching is to expose the semiconductor layer in which the first conductivity type side electrode, which will be described later, injects carriers of the first conductivity type, so that another layer such as a clad layer is formed from two layers on the thin film crystal layer. If there is a contact layer, or if there is a contact layer, it may be etched including that layer.

The etching uses a known dry etching by a plasma etching method using Cl ₂ or the like using a nitride such as SiN _x , an oxide such as SiO _x , or an oxynitride such as SiO _x N _y as an etching mask. be able to.
Next, as shown in FIG. 3, the first conductivity type side electrode 28 is formed.
As the electrode material, when the first conductivity type is n-type, it is desirable that a material selected from Ti, Al, Ag and Mo, or all of them be included as constituent elements. Various film formation techniques such as sputtering, vacuum evaporation, plating, etc. can be applied to the film formation of the electrode material. In order to obtain an electrode shape, a lift-off method using a photolithography technique, a metal mask, or the like was used. Site selective vapor deposition or the like can be used as appropriate.

In this example, the first conductivity type side electrode 28 is formed in contact with the first conductivity type clad layer 24. However, when the first conductivity type side contact layer is formed, it can be formed in contact with the first conductivity type side contact layer. .
As described above, the step of stacking the semiconductors has been described in an example of the method for manufacturing the semiconductor light emitting device having the flip-chip type structure.

[1-2] (A) Step of processing the back surface of the substrate Next, for the purpose of obtaining the light extraction effect from the substrate or for the purpose of thinning the substrate, the substrate surface opposite to the surface on which the semiconductor is laminated ( The back surface is processed by mechanical processing such as polishing, dicing, or blasting, and various etching processes such as dry etching and photoelectrochemical etching.

[1-2-1] Mechanical Processing Known methods can be used for mechanical processing such as polishing, dicing, and blasting.
For example, in the case of a polishing process, polishing is performed according to the following procedure. A protective film such as a resist is formed on the surface on which the semiconductors are stacked, and is attached to the wafer attaching plate of the polishing apparatus using wax. Next, the back surface of the substrate is polished by a polishing disk using a slurry such as diamond having a diameter of about 0.1 to 50 μm. At this time, the substrate can be appropriately processed to a desired thickness and roughness. Thereafter, the wafer is removed from the wafer attaching plate of the polishing apparatus and cleaned, and the wax and protective film at the time of attaching are removed and dried.

In the case of dicing, a surface layer on the back surface of the substrate is cut with a dicer, so that roughening or various shapes can be formed on the back surface of the substrate. Further, it is possible to form a dividing groove for separating the light emitting elements. In this case, the blade used for cutting can be selected as appropriate, and the amount of biting into the back surface of the substrate can be set as appropriate.
Blasting is a method in which fine particle powder is sprayed onto the back surface of the substrate at a high pressure to scrape the surface layer on the back surface of the substrate. The fine particle powder is preferably a compound that does not have an undesirable chemical effect on the back surface of the substrate, and usually alumina, silicon carbide, or the like can be used. The particle diameter of the fine particle powder is usually about 10 to 100 μm. The blast pressure is usually about 0.3 to 0.7 MPa. The irradiation time is usually about 5 to 20 seconds. The type, particle diameter, blast pressure, and irradiation time of the fine particle powder can be appropriately set depending on the target substrate thickness or the degree of roughening.

[1-2-2] Etching Treatment Etching treatment can be used in place of the mechanical treatment, but can also be performed after the mechanical treatment. That is, in the semiconductor light emitting device of the present invention, before the formation of the crystal quality improving layer in the step (B), in order to reduce physical damage on the back surface of the substrate to some extent and perform more precise processing, The step of reducing the unevenness of the surface by etching can be arbitrarily provided.

As the etching, either dry etching or wet etching may be used, but dry etching using reactive ion etching (RIE) or photoelectrochemical etching is preferable.
RIE is preferable for processing the back surface of the substrate more precisely. When performing RIE, either a CCP type apparatus that is a capacitively coupled plasma excitation method or an ICP type apparatus that is an inductively coupled plasma excitation method may be used. The plasma excitation method can be selected as appropriate. However, when processing a relatively hard substrate material such as GaN or sapphire, a dry process using an ICP type apparatus that can excite a plasma species having a high plasma density and a high reactivity. Etching is preferred.

The source gas that is the source of the plasma species used for dry etching can be appropriately selected depending on the target material to be processed. For example, when processing a GaN substrate, a gas species containing Cl as a constituent element is used. A configuration in which Cl ₂ gas is included in a plurality of mixed gases is preferable. Examples of the gas species containing Cl as a constituent element include CCl ₄ , CF ₂ Cl ₂ , SiCl ₄ , and SiF ₂ Cl ₂ . As an example of a configuration in which Cl ₂ gas is contained in a plurality of mixed gases, a mixed gas of Cl ₂ and Ar can be given. These configurations may be further combined.

Wet etching is suitable for processing the back surface of the substrate more precisely. For wet etching, an etchant can be selected as appropriate depending on a target substrate. For example, when an N surface such as GaN is roughened, a method such as photoelectrochemical etching can be used. Photoelectrochemical etching is a method of performing etching using, for example, KOH, HCl, HF, or the like while irradiating light having energy greater than or equal to a band gap such as ultraviolet (UV).

[1-2-3] Processing at the time of substrate preparation Generally, a substrate is prepared through a process of cutting out from a bulk crystal with a wire saw or the like. In this cutting-out process, the surface on which the semiconductors are stacked is usually prepared so as to ensure sufficient crystal quality. On the other hand, various processing damages at the time of substrate production often remain on the back surface of the substrate. That is, even if the substrate is not processed for the purpose of obtaining the light extraction effect from the substrate described above or for the purpose of thinning the substrate, damage is often present on the back surface. Therefore, even when such a substrate is prepared as it is, since processing such as cutting is performed, it is assumed that step (A) is included in the present invention.
However, when a substrate is manufactured as a product, there are cases where various processing damages are completely removed not only on the surface on which the semiconductor is laminated but also on the back surface of the substrate. In this case, there is no room for the crystal quality improvement effect expected by the present invention, and such processing is not included in the “processing” defined in step (A).

[1-3] (B) Step of forming a crystal quality improving layer on the back surface of the substrate Next, a crystal quality improving layer is formed on the back surface of the substrate. The crystal quality improving layer refers to a layer having at least one of the following functions (a) and (b).
(A) Function for improving crystallinity on back surface of substrate (b) Function for recovering damage caused by processing treatment Further, the crystal quality improving layer can further function as (c) a protective layer during the process.
The crystal quality improvement layer is not particularly limited as long as it has at least one of the functions (a) and (b), but the crystal quality improvement mechanism may be, for example, as shown below.
(I) Suppressing the deviation from the microscopic stoichiometric composition, which is one of the causes of substrate damage, and improving its crystallinity.
(Ii) Terminating the dangling bonds (unbonded hands) of the elements constituting the damaged back surface of the substrate (termination effect), and exhibiting the crystal quality improvement effect.
For example, the stoichiometric composition state of the back surface of the substrate and the dangling bond termination state can be confirmed by XPS (X-ray photoelectron spectroscopy; X-ray photoelectron spectroscopy). For example, when the substrate is GaN and a thin SiNx film is formed as the crystal quality improving layer on the back surface of the substrate, the composition ratio of Ga and N is determined by measuring XPS after thinning the SiNx layer suitable for analysis. , Ga and N bonding states can be confirmed.

The mechanism of the improvement effect of the crystal quality improvement layer is not limited. For example, the object of the present invention can be achieved by appropriately selecting the material of the crystal quality improvement layer as follows.
[1-3-1] Quality Improvement Layer Containing Nitride, Oxide, Oxynitride In the substrate, an element having a high vapor pressure may be desorbed from the elements constituting the substrate due to the above-described processing. . For example, when processing or the like is performed on the back surface of a nitride substrate such as GaN or AlN, nitrogen escape occurs from the back surface of the substrate, which may cause quality damage.

Therefore, it is considered that the crystal quality improving layer is preferably supplied by activating the element having a high vapor pressure among the elements composing the substrate by a method such as plasma.
For example, when the crystal quality improving layer itself contains nitrogen, relatively active nitrogen is supplied to the backside of the substrate, so that the nitrogen backdrop caused by various element manufacturing processes occurs against the backside of the substrate. It is thought that it will be the source of all nitrogen, suppress the deviation from the microscopic stoichiometric composition, and improve its crystallinity. Furthermore, this improvement in crystallinity is expected regardless of the location against various damages that are unintentionally introduced not only on the back surface of the substrate but also on the side walls and surface of the device structure during the light emitting device fabrication process. The effect is that the PL (Photo Luminescence) emission intensity of the substrate or the thin film crystal layer formed thereon is improved, the EL (Electro Luminescence) emission intensity of the thin film crystal layer emitted from the substrate side, the carrier concentration Prominent in improvement. The crystal quality improving layer itself can also function as a protective layer during the process.

For example, when the substrate is a nitride, in order for the crystal quality improving layer to play the above role, the crystal quality improving layer preferably contains nitrogen and hydrogen. It is preferable to form by supplying both relatively active nitrogen and hydrogen as raw materials.
From this point of view, the material of the crystal quality improving layer can be appropriately changed according to the substrate, and usually preferably contains a nitride, an oxide, or an oxynitride. B, Al, Si, Ti, V It is further preferable to contain a nitride, oxide, or oxynitride containing one or more elements of any one of Cr, Mo, Hf, Ta, and W. Examples of such nitrides, oxides, and oxynitrides include AlN _x , AlO _x N _y , SiN _x , SiO _x N _y , TiN _x , TiO _x N _y , CrN _x , and CrO _x N _y. be able to. Of these, SiN _x and SiO _x N _y are very preferable. Note that x and y are arbitrary positive numbers.

As described above, for example, when the crystal quality improving layer contains nitride or oxynitride, it becomes a supply source of nitrogen to the backside of the substrate from which nitrogen loss has occurred, and the crystallinity of the backside of the substrate can be improved. Conceivable. Moreover, since the supply source of nitrogen is formed as a layer, for example, compared with a case where a method of supplementing nitrogen depletion by applying ammonia treatment to the surface of the thin film crystal layer is applied to the back surface of the substrate, It is considered that the function of improving the crystallinity of the back surface of the substrate stably over a long period can be maintained.

Similarly, when an oxide such as Al ₂ O ₃ or LiAlO ₃ is used for the substrate, for example, a crystal quality improving layer containing the oxide is formed, thereby improving the crystallinity of the back surface of the substrate as an oxygen supply source. It is considered possible.
In hexagonal crystals such as GaN, the proportion of elements with high vapor pressure exposed on the outermost surface differs depending on the crystal plane, but the effect of forming a crystal quality improvement layer is It is considered that the higher the vapor pressure element is exposed on the outermost surface, the larger. For example, when a GaN substrate is used, the crystal quality improvement effect is larger as the crystal plane has a higher ratio of nitrogen, which is an element having a high vapor pressure, exposed to the outermost surface. Therefore, the effect is expected in the order of c-plane, m-plane, and c + -plane.

[1-3-2] Quality improvement layer containing an element exhibiting a termination effect In addition, the substrate is formed by termination of dangling bonds (unbonded hands) existing at high density on the outermost surface to be processed by the above processing or the like. It is also considered that the optical loss of the substrate is reduced. In such a case, it is preferable that the crystal quality improving layer contains an element that significantly exhibits a termination effect. Examples of the element that exhibits the termination effect include Si, Ge, Se, S, Al, P, and As. Of these, Si, Ge, Se, and S are preferable, and Si is more preferable.

When the crystal quality improving layer contains the element as a simple substance, the element itself that exhibits the termination effect also has a certain amount of dangling bonds, and the dangling bonds on the substrate side existing on the processed substrate surface It is preferable that it is easy to combine. Therefore, in the case of a single element, the effect is considered to be exhibited to some extent whether it is polycrystalline or single crystal, but amorphous is most preferable.

A quality improvement layer containing an element that exhibits a termination effect is expected to be effective regardless of the crystal plane of the substrate.
[1-3-3] Method for Forming Crystal Quality Improvement Layer In order to form the crystal quality improvement layer, various film formation methods such as plasma CVD, ion plating, ion assisted vapor deposition, and ion beam sputtering are used. It is possible to use it. Hereinafter, the case where nitride or oxynitride is used for the crystal quality improvement layer will be described in detail.

As the raw material for forming the crystal quality improving layer, it is preferable to use a gas species containing at least ammonia as the nitrogen raw material, and it is preferable to use a gas species containing at least N ₂ O as the oxygen raw material.
For the crystal quality improving layer, various film forming methods such as a plasma CVD method, an ion plating method, an ion assist vapor deposition method, and an ion beam sputtering method can be used. A method that can be supplied as a relatively active raw material during the formation of the crystal quality improving layer is preferred.

In the present specification, the active raw material is used generically to mean that the raw material itself is radicalized, plasmaized, ionized, or atomized in some cases, and is not in a molecular, chemically stable state. ing.
For example, in the plasma CVD method, it is desirable to form SiN _x using ammonia (NH ₃ ) as a source gas. Here, NH ₃ is turned into plasma, and a crystal quality improving layer is formed while supplying relatively active nitrogen and hydrogen. Further, in the ion-assisted deposition method, it is possible to produce SiN _x by forming NH ₃ or the like into plasma using an ion gun while depositing a Si raw material. In the ion beam sputtering method, for example, SiN _x can be produced by sputtering NH ₃ or the like with an ion gun while sputtering a Si target with Ar or N ₂ . Also in the RF sputtering method, for example, it is possible to produce SiN _x while sputtering a SiN _x target with Ar or N ₂ and supplying N ₂ and H ₂ separately by plasma using an ion gun.

Among these methods of forming the crystal quality improving layer while supplying both relatively active nitrogen and hydrogen as raw materials, the plasma CVD method is most preferable. This is because the step coverage is good as compared with other film forming methods and the stress control in the film is easy, so that it is convenient to cover a desired portion of the light emitting element structure.
A film containing nitrogen and relatively little hydrogen may be a reactive sputtering method in which N ₂ gas is introduced, a Si target is sputtered with Ar or the like, and a SiN _x film is formed in N ₂ or Ar plasma. Although it can be formed, there is almost no effect of improving the quality of the back surface of the substrate, ie, suppressing the optical loss of the back surface of the substrate. On the other hand, in the film formed by introducing NH ₃ or the like as a raw material by a plasma CVD method or the like, and formed by independently supplying H ₂ and N ₂ plasma, the concentration of hydrogen atoms is high. This is because active nitrogen, which is considered to have an effect of suppressing the optical loss on the back surface of the substrate, is taken into the substrate and the quality improvement layer, so that active hydrogen derived from NH ₃ is also taken at the same time. The direct effect of active hydrogen is not always clear, but it cleans the backside of the substrate contaminated by various processes, terminates dangling bonds on the backside of the substrate, and reduces excessive internal stress in the film There seems to be an effect.

According to the experiments of the present inventors, a method in which either of relatively active nitrogen and hydrogen is not supplied as a raw material, for example, a reactive sputtering method in which N ₂ gas is introduced and a Si target is sputtered with Ar gas, etc. In the experiment, the experiment was repeated with various film formation methods and conditions, and the concentration of hydrogen atoms in the formed SiN _x film was measured. As a result, only hydrogen of the order of 10 ²⁰ atoms / cm ³ was detected from any film. Was not. This is considered to be hydrogen derived from moisture remaining in the film forming environment.

On the other hand, in a SiN _x film formed by a plasma CVD method in which relatively active nitrogen and hydrogen are supplied as raw materials, for example, NH ₃ or the like is introduced as a raw material, N ₂ and H ₂ are also independently supplied. Experiments were repeated under various film forming conditions for the SiN _x film that was supplied in plasma and deposited, and the concentration of hydrogen atoms in the SiN _x film was measured. As a result, even when the film forming conditions were changed, the concentration of hydrogen atoms was always 1 × 10 ²¹ atoms / cm ³ or more and 1 × 10 ²² atoms / cm ³ or less. This is because NH ₃ , which is one of the raw materials, or H ₂ and N ₂ is turned into plasma and contains both relatively active nitrogen and hydrogen, and this relatively active hydrogen is used as a raw material during film formation. As a proof of use, it is considered that it was incorporated into the SiN _x film.

Accordingly, the concentration of hydrogen atoms in the crystal quality improving layer is not particularly limited, but is preferably in the range of 1 × 10 ²¹ atoms / cm ³ or more and 1 × 10 ²² atoms / cm ³ or less, more preferably 2 × 10 ²¹ atoms / cm ^3. cm ³ or more in the range of 7 × 10 ²¹ atoms / cm ³ or less. Most preferably, it is in the range of 3 × 10 ²¹ atoms / cm ³ or more and 5 × 10 ²¹ atoms / cm ³ or less. Similar to hydrogen atoms, the concentration of nitrogen atoms in the crystal quality improving layer is not particularly limited, but is preferably in the range of 30 atomic% to 60 atomic%, more preferably in the range of 40 atomic% to 50 atomic%.

The hydrogen atom concentration in the film is measured by SIMS (Secondary Ion Mass Spectroscopy), the nitrogen atom concentration is measured by XPS (X-ray Photoelectron Spectroscopy), and the measurement error is ± 20% in the case of SIMS. In the case of XPS, it is considered to be about ± 30%. In any method, low energy ion milling is used in combination, the profile in the depth direction of the film is measured, and the concentration is obtained from these results.

Depending on the concentration of hydrogen atoms in the film, the characteristics of the SiN _x film that can be used as the crystal quality improving layer also appear in its refractive index. First, both relatively active nitrogen and hydrogen were supplied as raw materials to form a SiN _x film that could be used as a crystal quality improving layer. Specifically, when forming a film by a plasma CVD method using NH ₃ as a raw material, the experiment was repeated under various manufacturing methods and film forming conditions, and the refractive index of the SiN _x film was measured. As a result, even when the manufacturing conditions and film forming conditions were changed, the refractive index was 1.80 or more and 2.00 or less at a wavelength of 405 nm, and 1.75 or more and 1.95 or less at a wavelength of 633 nm. This is because NH _3, which is one of the raw materials, is turned into plasma and contains both relatively active nitrogen and hydrogen. As evidence that this relatively active hydrogen was used as the raw material during film formation, It is considered that hydrogen is taken into the SiN _x film and the film has a lower refractive index than when no active hydrogen is contained.

On the other hand, as described above, SiN formed in a method in which either of relatively active nitrogen and hydrogen is not supplied as a raw material, for example, reactive sputtering, in which N ₂ gas is introduced and Si target is sputtered with Ar gas. _{Although the x} film does not function as a crystal quality improving layer, such a film was repeatedly tested in various film forming methods and film forming conditions, and the refractive index of the formed SiN _x film was measured. As a result, the refractive index of the SiN _x film was greater than 2.00 and less than or equal to 2.15 at a wavelength of 405 nm, and greater than 1.95 and less than or equal to 2.10 at a wavelength of 633 nm.

Therefore, the refractive index of the crystal quality improving layer is not particularly limited to the following numbers, but preferably the refractive index at a wavelength of 405 nm is 1.80 or more and 2.00 or less, and is refracted at a wavelength of 633 nm. The rate is 1.75 or more and 1.95 or less.

The formation temperature of the crystal quality improving layer is not particularly limited, but the lower limit is preferably 150 ° C. or higher, more preferably 200 ° C. or higher, and most preferably 250 ° C. or higher. Moreover, the upper limit is preferably 450 ° C. or lower, more preferably 400 ° C. or lower, and most preferably 350 ° C. or lower. This is because if the temperature is too low, it is difficult to induce the necessary reaction, while if the temperature is too high, side reactions that are not expected are excessive.
[1-4] (C) Step of removing the crystal quality improving layer In the present invention, the semiconductor light emitting device can be put into practical use while the crystal quality improving layer is formed on the back surface of the substrate. When the quality improving layer is formed, the crystal quality on the back surface of the substrate is improved even when the quality improving layer is removed. Accordingly, a step of removing the crystal quality improving layer can be further provided. When the crystal quality improving layer is not transparent or when the extraction efficiency deteriorates due to the difference in refractive index between the substrate and the crystal quality improving layer, it is preferable to remove the crystal quality improving layer.

The removal of the crystal quality improvement layer may be all or a part, and can be appropriately set in consideration of functions other than the crystal quality improvement function (insulation, function as a protective film, etc.).
The method for removing the crystal quality improving layer is not particularly limited, but an etching technique such as dry etching or wet etching can be selected depending on the material of the selected crystal quality improving layer.
For example, in the SiNx crystal quality improving layer, wet etching using a hydrofluoric acid aqueous solution or a mixed solution of a hydrofluoric acid aqueous solution and an ammonium fluoride aqueous solution is suitable.

[1-5] Light-Emitting Element Separation Step Next, in order to separate each light-emitting element one by one, the substrate 21 is scratched by a diamond scribe at a position where the inter-device separation groove 13 is formed, and a laser scribe is performed. Ablation of a part of the substrate material by, for example, is performed.
After completion of the scribing, the light emitting element is divided into individual devices in a braking process, and is preferably mounted on the submount with a solder material or the like.

[2] Semiconductor light emitting device The semiconductor light emitting device of the present invention is a semiconductor light emitting device in which a semiconductor layer is laminated on a crystal growth surface of a substrate, and a crystal quality improving layer is provided on a part or all of the back surface of the substrate. It is an essential requirement that the crystal quality improving layer is once formed or partly or entirely removed. That is, the present invention corresponds to a semiconductor light emitting device having a history of forming a crystal quality improving layer on the back surface after processing the back surface of the substrate. Since the present invention has the above-mentioned requirements, the crystallinity of the substrate is improved, the crystal state is less deteriorated, the optical loss is reduced, or the contact resistance is reduced in the conductive substrate, and the output is increased and the efficiency is increased. It can have the characteristics that can withstand The crystal quality improving layer refers to a layer having at least one of the following functions (a) or (b).
(A) Function of improving crystallinity on back surface of substrate (b) Function of recovering damage caused by processing, etc. Preferably, it has the characteristics of the crystal quality improving layer described in [1-3] above.

Hereinafter, the semiconductor light emitting device of the present invention will be described in detail by taking preferred embodiments as examples. In addition, the semiconductor light-emitting device of this invention is not limited to the following aspects, The improved type in the range which does not change the summary of this invention shall be included in the range.
[2-1] Semiconductor Light-Emitting Element Having Flip Chip Structure A semiconductor light-emitting element (hereinafter simply referred to as a light-emitting element) according to an embodiment of the present invention is laminated on a substrate 21 and one surface of the substrate 21, as shown in FIG. A compound semiconductor thin film crystal layer (hereinafter also simply referred to as a thin film crystal layer). The compound semiconductor thin film crystal layer is composed of the buffer layer 22, the first conductivity type semiconductor layer including the first conductivity type cladding layer 24, the active layer structure 25, and the second conductivity type semiconductor layer including the second conductivity type cladding layer 26. The layers are laminated in this order from the 21st side. The present invention is characterized by having the crystal quality improving layer 30 on the back surface of the substrate 21, that is, on a part or all of the surface opposite to the thin film crystal layer. The crystal quality improving layer 30 may be partially or wholly removed after formation. Even when all of them are removed, as described above, a remarkable crystal quality improvement effect is achieved, so that it can be said to be a separate invention different from the conventional semiconductor light emitting device.

A second conductivity type side electrode 27 for current injection is disposed on a part of the surface of the second conductivity type cladding layer 26, and the second conductivity type cladding layer 26 and the second conductivity type side electrode 27 are in contact with each other. The part which becomes this becomes the 2nd current injection area | region 35 which inject | pours an electric current into a 2nd conductivity type semiconductor layer. In addition, a part of the compound semiconductor thin film crystal layer is removed from the second conductivity type clad layer 24 side to the middle of the first conductivity type clad layer 24 in the thickness direction, and is exposed to the removed portion. A first conductivity type side electrode 28 for current injection is disposed in contact with the conductivity type cladding layer 24. A portion where the first conductivity type cladding layer 24 and the first conductivity type side electrode 28 are in contact with each other serves as a first current injection region 36 for injecting a current into the first conductivity type semiconductor layer.

By arranging the second conductivity type side electrode 27 and the first conductivity type side electrode 28 as described above, both are arranged opposite to the buffer layer 22 and on the same side, and the light emitting element 10 is flip-chip type. The light emitting element 10 is configured.
The second conductivity type side electrode 27 and the first conductivity type side electrode 28 are respectively connected to the metal layer 41 on the submount 40 via the metal solder 42.

The first conductivity type side electrode 28 and the second conductivity type side electrode 27 do not spatially overlap each other. This means that the shadow does not overlap when the first conductivity type side electrode 28 and the second conductivity type side electrode 27 are projected onto the substrate surface as shown in FIG.
In the compound semiconductor thin film crystal layer, at least a portion of the second conductivity type semiconductor layer other than the contact portion with the second conductivity type side electrode 27 may be covered with an insulating film. In the example shown in FIG. 4, a part of the buffer layer 22, a portion excluding the first current injection region 36 of the first conductivity type semiconductor layer, the active layer structure 25, and a second current injection region 35 of the second conductivity type semiconductor layer. The portion except for is covered with an insulating film 31. That is, at least a part of the sidewall of the compound semiconductor thin film crystal layer having the buffer layer 22, the first conductivity type semiconductor layer, the active layer structure 25, and the second conductivity type semiconductor layer is covered with the insulating film 31.

When the light emitting element is flip-chip mounted, the insulating film 31 is made of mounting solder, conductive paste material, etc. “between the second conductivity type side electrode and the first conductivity type side electrode”, “active layer structure, etc. It also has a function of preventing an unintended short circuit from occurring around the side wall of the thin film crystal layer.
The insulating film 31 only needs to have at least a portion covering the second conductivity type semiconductor layer as described above. In this embodiment, the second conductivity type side electrode 27 is further connected to the second conductivity type semiconductor layer. The entire opposing surface is in contact with the second conductivity type semiconductor layer, and a part of the second conductivity type side electrode 27 arranged in contact with the second conductivity type semiconductor layer in this way is also the insulating film 31. Covering. Such a structure can be obtained by forming the insulating film 31 after forming the second conductivity type side electrode 27 on the second conductivity type cladding layer 26.

Furthermore, in this embodiment, the first conductivity type side electrode 28 is in contact with the first conductivity type semiconductor layer only at a part of the surface facing the first conductivity type semiconductor layer. A part of the insulating film 31 is interposed between the mold side electrode 28. Such a structure can be obtained by forming the first conductivity type side electrode after forming the insulating film 31 on the first conductivity type cladding layer 24.

With such a positional relationship between the insulating film and each electrode, the light emitting element 10 can be manufactured through a process with less process damage. In the present embodiment, as described above, the insulating film 31 is arranged in consideration of process damage, heat dissipation when flip chip mounting is performed, insulation, and the like.
The portion of the buffer layer 22 that is not covered with the insulating film 31 is preferably an undoped layer that is not doped. If the exposed portion is a highly insulating material, there is no fear of a short circuit due to the wraparound of the solder, and the light emitting element is highly reliable.

Below, each member and structure which comprise an apparatus are demonstrated in detail.
<Board>
The substrate 21 is preferably optically approximately transparent to the emission wavelength of the light emitting element 10, but the material and the like are not particularly limited. Here, “substantially transparent” means that there is no absorption with respect to the emission wavelength, or even if there is absorption, the light output is not reduced by 50% or more due to the absorption of the substrate 21.

The substrate 21 is preferably electrically insulating when the light emitting element 10 is a flip chip type. This is because when the light emitting element 10 is mounted, even if a solder material or the like adheres to the periphery of the substrate 21, current injection into the light emitting element 10 is not affected. On the other hand, when the light emitting element 10 is a vertical conduction type described later, the substrate 21 preferably has conductivity (FIG. 5).

As specific materials, for example, in order to grow a thin film crystal on an InAlGaN-based light emitting material or InAlBGaN-based material, sapphire (Al ₂ O ₃ ), SiC, GaN, LiGaO ₂ , LiAlO ₃ , ZnO, ScAlMgO _{4 is used.} Desirably, NdGaO ₃ and MgO are selected. In the present invention, nitrides and oxides are preferred as the crystal quality improvement effect is easily expected. Among the nitrides, GaN and AlN are preferred, and GaN is more preferred. Since GaN has an overwhelmingly higher refractive index than sapphire and the like, it is easy to influence the improvement of light extraction efficiency from the substrate according to the present invention, which is very preferable.

The substrate 21 may be subjected to chemical etching, heat treatment, or the like in advance in order to manufacture the light emitting element 10 using a crystal growth technique such as MOCVD or MBE. In addition, in relation to the buffer layer 22 to be described later, the surface of the substrate 21 on which the buffer layer 22 is laminated is intentionally processed so that the penetration generated at the interface between the thin film crystal layer and the substrate 21 is achieved. It is also possible not to introduce the transition near the active layer of the light emitting device.

The thickness of the substrate 21 is usually 100 μm or more and 3000 μm or less. In the present invention in which the effect of improving the crystal quality of the substrate can be expected, the thickness of the substrate 21 may be thick unlike the conventional one. When using a substrate having such a thickness, the area of the side wall is effectively increased compared to a light-emitting element having a thin substrate, so that even if the total radiant flux is the same, light extraction is possible. The effect can be functioned effectively. That is, it is preferable to expect an effect of improving the crystal quality of the substrate side wall because the amount of light extraction from the side wall can be increased. In the light emitting element of such a form, the thickness of the substrate 21 is preferably 150 μm or more, and more preferably 250 μm or more.

As described above, the substrate 21 of the present invention has the crystal quality improving layer 30 on the surface opposite to the surface on which the thin film crystal is grown, that is, a part or all of the back surface, or the crystal quality improving layer is once formed. After that, it is essential that a part or the whole is removed. The crystal quality improving layer 30 may be further formed on the side wall of the substrate.
As the crystal quality improving layer 30, those having the characteristics of the crystal quality improving layer described in [1-3] are preferable.

<Buffer layer>
The buffer layer 22 mainly grows a thin film crystal on the substrate 21 and suppresses transition, alleviates imperfection of the substrate crystal, and reduces various mismatches between the substrate crystal and a desired thin film crystal layer. Formed for the purpose of thin film crystal growth.
The buffer layer 22 is formed by thin film crystal growth. When an InAlGaN-based material, InAlBGaN-based material, InGaN-based material, AlGaN-based material, GaN-based material or the like, which is a desirable form in the present invention, is grown on a different substrate. The buffer layer 22 is particularly important because the lattice constant matching with the substrate 21 is not necessarily ensured. For example, when a thin film crystal layer is grown by metal organic vapor phase epitaxy (MOVPE method), a low temperature growth AlN layer near 600 ° C. is used as the buffer layer 22 or a low temperature growth GaN layer formed near 500 ° C. Can also be used. Further, when a thin film crystal is grown on the same type of substrate, the buffer layer 22 is important even when a material such as GaN, AlGaN, InGaN, or AlInGaN is grown on the GaN substrate. In this case, AlN, GaN, AlGaN, InAlGaN, InAlBGaN or the like grown at a high temperature of about 800 ° C. to 1000 ° C. can be used as the buffer layer 22. These layers are generally thin and about 5 to 40 nm.

The buffer layer 22 does not necessarily have to be a single layer, but is grown on the GaN buffer layer 22 grown at a low temperature at a temperature of about 1000 ° C. without doping to improve the crystallinity. You may make it have about several micrometers of layers. Actually, it is normal to have such a thick film buffer layer, and the thickness is about 0.5 to 7 μm. The buffer layer 22 may be doped with Si or the like, or may be formed by stacking a doped layer and an undoped layer in the buffer layer.

For the formation of the buffer layer 22, a lateral growth technique (ELO) which is a kind of so-called microchannel epitaxy can also be used, and thereby the density of threading transition generated between a substrate such as sapphire and an InAlGaN-based material. Can be significantly reduced.

<First conductivity type semiconductor layer and first conductivity type cladding layer>
In a typical embodiment of the present invention, a first conductivity type cladding layer 24 is present in contact with the buffer layer 22 as shown in FIG. The first conductivity type clad layer 24 functions together with the second conductivity type clad layer 26 described later to the active layer structure 25 described later to efficiently inject carriers and suppress overflow from the active layer structure. In addition, it has a function for realizing light emission in the quantum well layer with high efficiency. In addition, it contributes to confinement of light in the vicinity of the active layer structure, and has a function for realizing light emission in the quantum well layer with high efficiency. The first conductivity type semiconductor layer includes a layer doped to the first conductivity type, in addition to the above-mentioned layer having a cladding function, for improving the function of the device like a contact layer or for manufacturing reasons. . In a broad sense, the entire first conductivity type semiconductor layer may be considered as the first conductivity type cladding layer 24, and in that case, the contact layer and the like can also be regarded as a part of the first conductivity type cladding layer 24. .

Generally, the first conductivity type cladding layer 24 is a material having a refractive index smaller than an average refractive index of an active layer structure 25 described later and a material larger than an average band gap of the active layer structure 25 described later. It is desirable to consist of Furthermore, the first conductivity type clad layer 24 is generally made of a material that forms a so-called type I band lineup, particularly in relation to the barrier layer in the active layer structure 25. Under such guidelines, the material of the first conductivity type cladding layer 24 is appropriately selected in view of the substrate 21, the buffer layer 22, the active layer structure 25, and the like prepared for realizing a desired emission wavelength. can do.

For example, when c + plane GaN is used as the substrate 21 and GaN grown at a high temperature is used as the buffer layer 22, a GaN-based material, an AlGaN-based material, an AlGaInN-based material, an InAlBGaN-based material is used as the first conductivity type cladding layer 24. Alternatively, a multilayer structure thereof can be used.
The carrier concentration of the first conductivity type cladding layer 24 is preferably 1 × 10 ¹⁷ cm ⁻³ or more as a lower limit, more preferably 5 × 10 ¹⁷ cm ⁻³ or more, and most preferably 1 × 10 ¹⁸ cm ⁻³ or more. . The upper limit is preferably 5 × 10 ¹⁹ cm ⁻³ or less, more preferably 1 × 10 ¹⁹ cm ⁻³ or less, and most preferably 7 × 10 ¹⁸ cm ⁻³ or less. Here, when the first conductivity type is n-type, Si is most desirable as a dopant.

In the present invention, the thickness of the first conductivity type cladding layer 24 can be appropriately selected, and is usually 1 μm or more, preferably 3 μm or more, more preferably 4 μm or more. Moreover, it is 10 micrometers or less normally, Preferably it is 8 micrometers or less, More preferably, it is 7 micrometers or less. If the first conductivity type clad layer 24 is too thick, the crystal quality of the thin film crystal layer is degraded. If the first conductivity type cladding layer 24 is too thin, carriers cannot be sufficiently confined in the active layer structure.

The structure of the first conductivity type cladding layer 24 shows the first conductivity type cladding layer 24 composed of a single layer in the example of FIG. 4, but the first conductivity type cladding layer 24 is composed of two or more layers. It may be. In this case, for example, a GaN-based material and an AlGaN-based material, an InAlGaN-based material, or an InAlBGaN-based material can be used. The entire first conductivity type cladding layer 24 may be a superlattice structure as a laminated structure of different materials. Furthermore, it is possible to change the carrier concentration in the first conductivity type cladding layer 24.

In the portion of the first conductivity type cladding layer 24 in contact with the first conductivity type side electrode 28, the carrier concentration can be intentionally increased to reduce the contact resistance with the electrode.
A part of the first conductivity type cladding layer 24 is etched, and exposed side walls, etched portions, etc. of the first conductivity type cladding layer 24 are in contact with a first conductivity type side electrode 27 described later. A structure that is entirely covered with the insulating film 31 except for the first current injection region 36 to be realized is desirable.

In addition to the first conductivity type cladding layer 24, a different layer may exist as necessary as the first conductivity type semiconductor layer. For example, a contact layer for facilitating carrier injection may be included in the connection portion with the electrode. Each layer may be divided into a plurality of layers having different compositions or formation conditions.

<Active layer structure>
An active layer structure 25 is formed on the first conductivity type cladding layer 24. The active layer structure 25 emits light by recombination of electrons and holes (or holes and electrons) injected from the first conductivity type cladding layer 24 and the second conductivity type cladding layer 26 described later. A structure including a quantum well layer as a layer and also including a barrier layer disposed adjacent to the quantum well layer or disposed between the quantum well layer and the cladding layer. Here, in order to realize high output and high efficiency of the light-emitting element 10, when the number of quantum well layers in the active layer structure is W and the number of barrier layers is B, B = W + 1 is satisfied. It is desirable. That is, the relationship between the

clad layers

24 and 26 and the entire active layer structure 25 is formed as “first conductivity type clad layer, active layer structure, second conductivity type clad layer”. It is desirable for high output to be formed as “barrier layer, quantum well layer, barrier layer” or “barrier layer, quantum well layer, barrier layer, quantum well layer, barrier layer”.

Here, in order to express the quantum size effect and increase the luminous efficiency in the quantum well layer, the layer thickness is as thin as the de Broglie wavelength. For this reason, in order to achieve high output, it is desirable to provide not only a single quantum well layer but also a plurality of quantum well layers and separate them into an active layer structure. At this time, a layer that is separated while controlling the coupling between the quantum well layers is a barrier layer. In addition, it is desirable that the barrier layer exists for separation of the cladding layer and the quantum well layer. For example, when the cladding layer is made of AlGaN and the quantum well layer is made of InGaN, a form in which a barrier layer made of GaN exists between them is desirable. This is also desirable from the viewpoint of thin film crystal growth because it can be easily changed when the optimum temperature for crystal growth is different. When the clad layer is made of InAlGaN having the widest band gap and the quantum well layer is made of InAlGaN having the narrowest band gap, InAlGaN having an intermediate band gap can be used for the barrier layer. Furthermore, in general, the difference in the band gap between the cladding layer and the quantum well layer is larger than the difference in the band gap between the barrier layer and the quantum well layer, and considering the efficiency of carrier injection into the quantum well layer, The quantum well layer is preferably not directly adjacent to the cladding layer.

Quantum well layer should not be intentionally doped. On the other hand, it is desirable to dope the barrier layer to reduce the resistance of the entire system. In particular, the barrier layer is preferably doped with an n-type dopant, particularly Si. This is because Mg, which is a p-type dopant, easily diffuses in the device, and it is important to suppress the diffusion of Mg during high output operation. Therefore, Si is effective, and it is desirable that the barrier layer is doped with Si. However, it is desirable not to perform doping at the interface between the quantum well layer and the barrier layer.

<Second conductivity type semiconductor layer and second conductivity type cladding layer>
The second conductivity type cladding layer 26 efficiently injects carriers into the above-described active layer structure 25 together with the above-described first conductivity type cladding layer 24, and also suppresses overflow from the active layer structure 25, It has a function for realizing light emission in the quantum well layer with high efficiency. In addition, it contributes to confinement of light in the vicinity of the active layer structure, and has a function for realizing light emission in the quantum well layer with high efficiency. The second conductivity type semiconductor layer includes a layer doped to the second conductivity type in addition to the above-mentioned layer having a cladding function, for the purpose of improving the function of the device or for manufacturing reasons, like a contact layer. . In a broad sense, the entire second conductivity type semiconductor layer may be considered as the second conductivity type cladding layer 26, and in this case, the contact layer and the like can also be regarded as a part of the second conductivity type cladding layer 26. .

In general, the second conductivity type cladding layer 26 is a material having a refractive index smaller than the average refractive index of the active layer structure 25 described above, and a material larger than the average band gap of the active layer structure 25 described above. It is desirable to consist of Further, the second conductivity type clad layer 26 is generally made of a material that forms a so-called type I band lineup, particularly in relation to the barrier layer in the active layer structure 25. Under such guidelines, the material of the second conductivity type cladding layer 26 is appropriately selected in view of the substrate 21, the buffer layer 22, the active layer structure 25, and the like prepared for realizing a desired emission wavelength. can do. For example, when c + plane sapphire is used as the substrate 21 and GaN is used as the buffer layer 22, a GaN-based material, an AlGaN-based material, an AlGaInN-based material, an AlGaBInN-based material, or the like is used as the second conductivity type cladding layer 26. be able to. Further, a laminated structure of the above materials may be used. Also, the first conductivity type cladding layer 24 and the second conductivity type cladding layer 26 can be made of the same material.

The lower limit of the carrier concentration of the second conductivity type cladding layer is preferably 1 × 10 ¹⁷ cm ⁻³ or more, more preferably 4 × 10 ¹⁷ cm ⁻³ or more, and further preferably 5 × 10 ¹⁷ cm ⁻³ or more. × 10 ¹⁷ cm ⁻³ or more is most preferable. Preferably 7 × 10 ¹⁸ cm ^-3 or less as an upper limit, more preferably 3 × 10 ¹⁸ cm ^-3 or less, and most preferably 2 × 10 ¹⁸ cm ^-3 or less. Here, Mg is most desirable as the dopant when the second conductivity type is p-type.

The structure of the second conductivity type cladding layer 26 is an example of a single layer formed in the example of FIG. 4, but the second conductivity type cladding layer 26 is composed of two or more layers. May be. In this case, for example, a GaN-based material and an AlGaN-based material can be used. The entire second conductivity type cladding layer 26 may be a superlattice structure made of a laminated structure of different materials. Furthermore, it is possible to change the carrier concentration in the second conductivity type cladding layer 26.

In general, in a GaN-based material, when the n-type dopant is Si and the p-type dopant is Mg, the crystallinity of p-type GaN, p-type AlGaN, and p-type AlInGaN is n-type GaN, n It does not reach each of type AlGaN and n-type AlInGaN. Therefore, in device fabrication, it is desirable to implement a p-type cladding layer with poor crystallinity after crystal growth of the active layer structure 25. From this viewpoint, the first conductivity type is n-type and the second conductivity type is p. The type is desirable.

Also, it is desirable that the thickness of the p-type cladding layer with poor crystallinity (this corresponds to the second conductivity type cladding layer 26 in a desirable form) be thin to some extent. However, when it is extremely thin, the carrier injection efficiency is lowered, and therefore there is an optimum value. The thickness of the second-conductivity-type-side cladding layer 26 can be selected as appropriate, but is preferably 0.05 μm to 0.3 μm, and most preferably 0.1 μm to 0.2 μm.

In the portion of the second conductivity type clad layer 26 that is in contact with the second conductivity type side electrode 27, the carrier concentration can be intentionally increased to reduce the contact resistance with the electrode.
The exposed side walls of the second conductivity type cladding layer 26 are all covered with an insulating film 31 except for a second current injection region 35 that realizes contact with a second conductivity type side electrode 27 described later. It is desirable.

Furthermore, in addition to the second conductivity type cladding layer 26, a different layer may be present as necessary as the second conductivity type semiconductor layer. For example, a contact layer for facilitating carrier injection may be included in a portion in contact with the electrode. Each layer may be divided into a plurality of layers having different compositions or formation conditions.
The surface of the second conductivity type semiconductor layer may contain at least Mg and H.

In addition, unless it is contrary to the summary of this invention, you may form the layer which does not enter into the above-mentioned category as needed as a thin film crystal layer.
<Second conductivity type side electrode>
The second conductivity type side electrode 27 realizes a good ohmic contact with the second conductivity type nitride compound semiconductor, and when it is flip-chip mounted, it adheres well to the submount 40 by a solder material or the like. Is realized. For this purpose, the material can be selected as appropriate, and the second conductivity type side electrode 27 may be a single layer or a plurality of layers. In general, in order to achieve a plurality of purposes required for an electrode, a plurality of layer structures are usually employed.

Further, when the second conductivity type is p-type and the second conductivity type side electrode 27 side of the second conductivity type side cladding layer 26 is GaN, Ni, Pt are used as materials constituting the second conductivity type side electrode 27. , Pd, Mo, Au, or a material containing two or more elements thereof is preferable. This electrode may have a multilayer structure, and at least one layer is formed of a material containing the above element, and preferably each layer is made of a material containing the above element and having different constituent components (type and / or ratio). The electrode constituent material is preferably a single metal or an alloy.

The second conductivity type side electrode 27 may be in contact with any layer of the thin film crystal layer as long as the second conductivity type carrier can be injected. For example, when the second conductivity type side contact layer is provided, the second conductivity type side electrode 27 is in contact therewith. Formed as follows.
<First conductivity type side electrode>
The first conductivity type side electrode 28 achieves good ohmic contact with the first conductivity type nitride compound semiconductor, and when it is flip-chip mounted, it adheres well to the submount 40 or the like using a solder material or the like. For this purpose, materials can be selected as appropriate. The first conductivity type side electrode 28 may be a single layer or a plurality of layers. In general, in order to achieve a plurality of purposes required for an electrode, a plurality of layer structures are usually employed.

Suppose that the first conductivity type is n-type, the n-side electrode is preferably Ti, Al, Ag, Mo, or a material containing two or more elements thereof. This electrode may have a multilayer structure, and at least one layer is formed of a material containing the above element, and preferably each layer is made of a material containing the above element and having different constituent components (type and / or ratio). The electrode constituent material is preferably a single metal or an alloy. These are because the absolute value of the work function of these metals is small.

In the present invention, the first conductivity type side electrode 28 is formed in an area larger than the size of the first current injection region 36, and the first conductivity type side electrode 28 and the second conductivity type side electrode 27 are spatially separated. It is desirable that there is no overlap. This is because when the light-emitting element 10 is flip-chip mounted with solder or the like, the second conductivity type side electrode 27 and the first conductivity are secured while securing a sufficient area to ensure sufficient adhesion with the submount 40 or the like. This is important in order to ensure a sufficient distance to prevent an unintended short circuit due to a solder material or the like between the mold side electrode 28 and the like.

The first conductivity type side electrode 28 may be in contact with any layer of the thin film crystal layer as long as the first conductivity type carrier can be injected. For example, when the first conductivity type side contact layer is provided, the first conductivity type side electrode 28 is in contact therewith. Formed as follows.
In addition, as described above, physical or chemical damage due to the processing of the substrate is particularly caused by light having a relatively short wavelength with an emission wavelength of less than 470 nm (blue light, blue violet light, purple light, near ultraviolet light, ultraviolet light). Etc.) are relatively easy to absorb. In particular, as described above, this absorption is significant in violet light, near ultraviolet light, and ultraviolet light having a center wavelength of 430 nm or less. The effect of the present invention is remarkable when the light emitting element 10 has such a light emission wavelength. In this sense, it is desirable that the light emitting element 10 satisfies the following formula 1 when the center wavelength of light emitted from the active layer structure 25 is λ (nm). The effect of reducing the loss can be expressed more effectively.

300 nm ≦ λ ≦ 430 nm (Formula 1)
For example, in the case of a GaN substrate, light that has a shorter wavelength than light corresponding to the band gap (light having a shorter wavelength than the center wavelength λ of 363 nm) is absorbed without being physically or chemically damaged. Characteristics. On the other hand, in the case of light having a center wavelength λ longer than 363 nm, the longer the wavelength, the more transparent the GaN substrate becomes, so that extrinsic absorption such as physical or chemical damage tends to be relatively large. This tendency appears strongly when the wavelength λ is 390 nm or more. Therefore, the optical loss reducing effect of the present invention can be expressed more effectively because the center wavelength λ (nm) of the light preferably satisfies the following expression 2 and further satisfies the following expression 3. desirable.

363 nm ≦ λ ≦ 430 nm (Formula 2)
390 nm ≦ λ ≦ 430 nm (Formula 3)
<Submount>
The submount 40 has a metal layer, and has both functions of current injection and heat dissipation to the light-emitting element 10 that is flip-chip mounted. The base material of the submount 40 is preferably one of metal, AlN, SiC, diamond, BN, and CuW. These materials are preferable because they have excellent heat dissipation and can efficiently suppress the problem of heat generation that is unavoidable for the high-power light-emitting element 10. Al ₂ O ₃ , Si, glass and the like are also inexpensive and are widely used as a base material for the submount 40. When the submount base material is selected from metals, it is desirable to cover the periphery with a dielectric material having etching resistance.

The light emitting element 10 is bonded to the metal layer on the submount 40 by various solder materials and paste materials. In order to ensure sufficient heat dissipation for the high-output operation of the light-emitting element 10 and the high-efficiency light emission, it is particularly desirable to bond with metal solder. Examples of the metal solder include In, InAg, PbSn, SnAg, AuSn, AuGe, and AuSi. These solders are stable and can be appropriately selected in light of the operating temperature environment.

Note that the surface of the submount preferably has a high reflection characteristic with respect to light in the emission wavelength region of the light emitting element.
[2-2] Semiconductor Light-Emitting Element Having Vertical Conductive Structure A light-emitting element according to another embodiment of the present invention includes a substrate 21 and a compound semiconductor thin film crystal layer laminated on one of the substrates 21 as shown in FIG. (Hereinafter also simply referred to as a thin film crystal layer). The compound semiconductor thin film crystal layer includes a buffer layer 22, a first conductivity type semiconductor layer including a first conductivity type cladding layer 24, an active layer structure 25, a second conductivity type semiconductor layer including a second conductivity type cladding layer 26, and a contact. The layer 23 is configured by being laminated in this order from the substrate 21 side.

A second conductivity type side electrode 27 for current injection is disposed on a part of the surface of the contact layer 23, and a portion where the contact layer 23 and the second conductivity type side electrode 27 are in contact with each other is the second conductivity type. A second current injection region 35 for injecting a current into the semiconductor layer is formed.
In addition, a crystal quality improving layer 30 is disposed on the surface opposite to the thin film crystal layer of the substrate 21, that is, the back surface, and the first conductivity type side electrode 28 is disposed thereon. If the crystal quality improving layer 30 has conductivity, it may remain, but if it has an insulating property such as SiO _x or SiN _x , after formation, before the first conductivity type side electrode 28 is disposed. Further, it is preferable that a part or all of them are removed. Note that even when the entire structure is removed, as described above, a remarkable crystal quality improvement effect is achieved. Therefore, it can be said that this is a separate invention different from the conventional semiconductor light emitting device.

In the case of forming the crystal quality improving layer 30 in a part of the light emitting element 10 having the vertical conduction type structure, or removing the part thereof, as shown in FIG. It is preferable to dispose the crystal quality good layer 30 in a region corresponding to the region immediately below the electrode 27. This is due to the following mechanism.
In the light emitting device 10 of FIG. 6, the crystal quality improving layer 30 is disposed in a region corresponding to the region immediately below the second conductivity type side electrode 27, and portions other than the region corresponding to the region immediately below the second conductivity type side electrode 27 are formed. The crystal quality improving layer 30 is not formed or removed.

In this case, since the holes from the second conductivity type side electrode 27 and the electrons from the first conductivity type side electrode 28 are difficult to be injected into the active layer structure 36S existing immediately below the second conductivity type side electrode 27, The active layer structure 36S hardly emits light. The light emitted from the active layer structure 36S is shielded by the second conductivity type side electrode and is a part where it is difficult to expect the light extraction effect. Therefore, it is a disadvantage for the light emitting device 10 that the part is difficult to emit light. It is considered difficult. On the other hand, in the region 37 other than the region directly under the second conductivity type side electrode 27 where the light extraction effect is expected, the holes from the second conductivity type side electrode 27 and the first conductivity type side electrode 28 Since electrons are injected into the region 37, the current is concentrated. Therefore, in the structure of FIG. 6, light from the active layer structure 37 can be extracted efficiently.

By arranging the second conductivity type side electrode 27 and the first conductivity type side electrode 28 as described above, both are arranged on the opposite side across the substrate 21, and the light emitting element 10 is a so-called vertical conduction type. The light emitting device 10 is configured.
The vertical conduction type light emitting element can take out the first conductivity type side electrode and the second conductivity type side electrode from above and below, and etches a part of the laminated semiconductor layer to provide the first conductivity type side electrode. Therefore, the manufacturing process can be simplified.

For each member constituting the device, the member described in [2-1] (Flip chip type structure) may be appropriately changed and used. However, since the first conductivity type side electrode is provided on the rear surface of the substrate, the substrate 21 and the buffer layer 22 usually need to be of the first conductivity type. For example, when the first conductivity type is n-type, the substrate 21 and the buffer layer 22 are preferably doped with an n-type dopant. .

In device fabrication, it is desirable to implement a p-type cladding layer with poor crystallinity after crystal growth of the active layer structure 25. From this viewpoint, the first conductivity type is n-type and the second conductivity type is p-type. Case is desirable.
[2-3] Other Semiconductor Light Emitting Elements The crystal quality improving layer of the present invention exhibits its effect by being formed on the processed substrate back surface. As an application example, for example, by a laser lift-off method, It can also be used as a pretreatment for forming an electrode on the surface of the thin film crystal layer after peeling off the substrate.

Furthermore, the thin film crystal layer can be mounted on a supporting metal substrate and used to reduce optical loss on the light extraction surface side when a vertical conduction type device is formed.

The features of the present invention will be described more specifically with reference to the following examples. The materials, amounts used, ratios, processing details, processing procedures, and the like shown in the following examples can be changed as appropriate without departing from the spirit of the present invention. Therefore, the scope of the present invention should not be construed as being limited by the specific examples shown below.
Example 1
A c + plane GaN substrate is prepared in which the surface on which the semiconductor is laminated is secured so as to ensure sufficient crystal quality, and the processing damage at the time of substrate creation remains on the back surface of the substrate. An epitaxial layer having an LED structure was formed. Next, a p-side electrode was formed by a lift-off method, and an alloying process was performed to complete the p-side electrode. Next, an n-GaN layer for partially forming an n-side electrode was exposed by dry etching. Next, an n-side electrode patterned by a lift-off method was formed.

Next, a resist layer was formed as a protective film on the surface on which the epitaxial layer was formed, and was attached to the wafer attaching plate of the polishing apparatus using wax. Next, the back surface of the substrate was polished with a copper polishing machine using a diamond slurry having a weight average particle diameter of 3 μm. The wafer was removed from the wafer attaching plate of the polishing apparatus and cleaned, and the wax and protective film at the time of attaching were removed and dried. The substrate thickness after polishing was 303 μm. The emission peak wavelength was measured and found to be 415.3 nm. When the partial radiant flux at the time of injecting the current of 50 mA was measured, it was 1.75 mW.

Next, a crystal quality improving layer made of SiN _x was formed (deposited) on the c-plane (back surface) of the GaN substrate by plasma CVD. The substrate heating temperature at this time was 200 ° C. The SiN _x deposition conditions were a SiH ₄ flow rate of 5 sccm, an NH ₃ flow rate of 13 sccm, and an N ₂ flow rate of 225 sccm, a pressure of 45 Pa, and an RF power of 250 W. The film formation time was 17 minutes and 36 seconds. When the partial radiant flux after formation of the crystal quality improvement layer was measured in the same manner as before formation, an increase of 27.6% was confirmed as compared to before formation of the crystal quality improvement layer.

Subsequently, the crystal quality improving layer was removed by immersing in a solution having a ratio of 49% by weight of hydrogen fluoride containing hydrofluoric acid and 40% by weight of ammonium fluoride in a ratio of 1: 5 (weight ratio) for 30 minutes. Thereafter, when the partial radiant flux was measured, an increase of 24.8% was confirmed compared to before the formation of the crystal quality improvement layer (after the back surface polishing), and the improvement effect when the crystal quality improvement layer was formed was almost maintained. As a result.

(Example 2)
A semiconductor light emitting device was fabricated in the same manner as in Example 1 except that the substrate thickness after polishing was 404 μm and the conditions for forming the epitaxial layer were changed, and the partial radiant flux was measured to be 1.72 mW. The emission peak wavelength was measured and found to be 398.8 nm.
A crystal quality improving layer made of SiN _x was formed and removed by the same method as in Example 1. When the partial radiant flux at this time was measured, an increase of 11.1% was confirmed as compared with that before forming the crystal quality improving layer.

(Example 3)
A semiconductor light-emitting device was prepared in the same manner as in Example 2, and the partial radiant flux was measured to be 1.73 mW. Moreover, it was 400.8 nm when the light emission peak wavelength was measured. Next, a crystal quality improving layer made of SiN _x was formed by plasma CVD under the following conditions. That is, the substrate heating temperature was 200 ° C., the SiH ₄ flow rate was 5 sccm, the NH ₃ flow rate was 50 sccm, the N ₂ flow rate was 100 sccm, the pressure was adjusted to 45 Pa, and the RF power was 250 W. The film formation time was 17 minutes and 36 seconds. When the partial radiant flux after the formation of the crystal quality improvement layer was measured in the same manner as before the formation, an increase of 9.8% was confirmed as compared with that before the formation of the crystal quality improvement layer made of SiN _x .

The crystal quality improving layer was removed in the same manner as in Example 1. When the partial radiant flux at this time was measured, an increase of 5.7% was confirmed as compared with that before forming the crystal quality improving layer.
Example 4
A c + -plane GaN substrate is prepared in which the surface on which the semiconductors are laminated is secured to ensure sufficient crystal quality, and the processing damage at the time of substrate fabrication remains on the back surface of the substrate. An epitaxial layer having an LED structure was formed. Next, a p-side electrode was formed by a lift-off method, and an alloying process was performed to complete the p-side electrode. Next, an n-GaN layer for partially forming an n-side electrode was exposed by dry etching. Next, an n-side electrode patterned by a lift-off method was formed. The back surface of the substrate was completed as it was without polishing the back surface of the purchased c + -plane GaN substrate. The emission peak wavelength was measured and found to be 415.3 nm. When the partial radiant flux was measured when a current of 50 mA was injected at this time, it was 1.92 mW.

Next, a crystal quality improving layer made of SiN _x was formed (deposited) on the c-plane (back surface) of the GaN substrate by plasma CVD. The substrate heating temperature at this time was 300 ° C. The SiN _x deposition conditions were a SiH ₄ flow rate of 4 sccm, a NH ₃ flow rate of 12 sccm, a N ₂ flow rate of 220 sccm, a pressure of 45 Pa, and an RF power of 250 W. The film formation time was 17 minutes and 36 seconds. When the partial radiant flux after the formation of the crystal quality improvement layer was measured in the same manner as before the formation, an increase of 10.6% was confirmed as compared with that before the formation of the crystal quality improvement layer.

Subsequently, the crystal quality improving layer was removed by immersing in a solution having a ratio of 49% by weight of hydrogen fluoride containing hydrofluoric acid and 40% by weight of ammonium fluoride in a ratio of 1: 5 (weight ratio) for 5 minutes. Later, when the partial radiant flux was measured, an increase of 9.8% was confirmed compared to before the formation of the crystal quality improvement layer (after back surface polishing), and the improvement effect when the crystal quality improvement layer was formed was almost maintained. As a result.

(Comparative Example 1)
A semiconductor light-emitting device was prepared in the same manner as in Example 2, and the partial radiant flux was measured to be 1.72 mW. The emission peak wavelength was measured and found to be 398.8 nm. Next, it was exposed to NH ₃ plasma in a plasma CVD apparatus under the following conditions. That is, the substrate heating temperature was 200 ° C., the NH ₃ flow rate was 100 sccm, the pressure was 45 Pa, and the RF power was 100 W. The treatment time was 5 minutes.

When the partial radiant flux at this time was measured, a significant difference was not confirmed compared with before NH ₃ plasma treatment. That is, it was confirmed that the simple NH ₃ plasma treatment without forming the crystal quality improvement layer hardly shows the improvement effect.
(Comparative Example 2)
A semiconductor was prepared in the same manner as in Example 1 except that a c + -plane GaN substrate prepared so that sufficient crystal quality was secured on both the semiconductor lamination surface and the substrate back surface was not polished. A light emitting device was prepared and an SiN _x layer was formed. The partial radiant flux before the formation of the SiN _x layer was measured. Moreover, when the light emission peak wavelength was measured, it was 413.5 nm.

When the partial radiant flux after the formation of the SiN _x layer was measured, a significant difference was not confirmed as compared with that before the formation of the SiN _x layer, and it was recognized that there was almost no improvement effect.
Thus, since the SiN _x layer formed in Comparative Example 2 is formed on the back surface of the substrate prepared so as to ensure sufficient crystal quality, (a) a function of improving the crystallinity of the back surface of the substrate, And (b) a layer that does not have any function of recovering damage due to processing or the like, and does not correspond to the crystal quality improving layer of the present invention.
From the above, it has been confirmed that the present invention has a remarkable effect with respect to the substrate damaged by polishing such as in Examples 1 to 4.

This application is based on a Japanese patent application filed on September 19, 2008 (Japanese Patent Application No. 2008-241052), the contents of which are incorporated herein by reference.

10 Light emitting element
21 Substrate
22 Buffer layer
23 Contact Layer 24 First Conductive Clad Layer
25 Active layer structure
26 Second conductivity type cladding layer
27 Second conductivity type side electrode
28 First conductivity type side electrode
30 Crystal Quality Improvement Layer 31 Insulating Film 40 Submount

Claims

A method for manufacturing a semiconductor light emitting device in which a semiconductor layer is laminated on a crystal growth surface of a substrate,
(B) A method of manufacturing a semiconductor light emitting device, comprising a step of forming a crystal quality improving layer on the back surface of the substrate.
Before the step (B),
(A) The manufacturing method of the semiconductor light emitting element of Claim 1 which has the process of processing the back surface of the said crystal growth board | substrate.
After the step (B),
(C) The manufacturing method of the semiconductor light-emitting device according to claim 1, further comprising a step of removing the crystal quality improving layer.
4. The method for manufacturing a semiconductor light emitting element according to claim 1, wherein the step (B) includes forming the crystal quality improving layer using a gas species containing at least ammonia as a nitrogen raw material. 5. .
5. The semiconductor light emitting element according to claim 1, wherein the step (B) includes forming the crystal quality improving layer using a gas species containing at least N 2 O as an oxygen source. 6. Production method.
The step (B) includes forming the crystal quality improving layer so that the concentration of hydrogen atoms is 1 × 10 21 atoms / cm 3 or more and 1 × 10 22 atoms / cm 3 or less. The manufacturing method of the semiconductor light-emitting device of any one of these.
The method of manufacturing a semiconductor light emitting element according to claim 1, wherein the step (B) includes forming the crystal quality improving layer by a plasma CVD method.
The method for manufacturing a semiconductor light-emitting element according to claim 1, wherein the substrate is a nitride or an oxide.
9. The method of manufacturing a semiconductor light emitting element according to claim 1, wherein the crystal quality improving layer includes any one or more of a nitride, an oxide, and an oxynitride.
10. The nitride, oxide, or oxynitride according to claim 9, wherein the nitride, oxide, or oxynitride includes one or more elements selected from B, Al, Si, Ti, V, Cr, Mo, Hf, Ta, and W. A method for manufacturing a semiconductor light emitting device.
The method for manufacturing a semiconductor light-emitting element according to claim 1, wherein the crystal quality improvement layer includes an element that exhibits a termination effect.
The method for manufacturing a semiconductor light emitting element according to claim 11, wherein the element that exhibits the termination effect is at least one of Si, Ge, Se, S, Al, P, and As.
A semiconductor light emitting device in which a semiconductor layer is stacked on a crystal growth surface of a substrate,
A semiconductor light emitting device comprising a crystal quality improving layer on a back surface of the substrate.
The semiconductor layer includes a buffer layer, a first conductivity type semiconductor layer including a first conductivity type clad layer, an active layer structure, and a second conductivity type semiconductor layer including a second conductivity type clad layer stacked in this order. The semiconductor light-emitting device according to claim 13.
The semiconductor light emitting element has a first conductivity type side electrode and a second conductivity type side electrode for injecting current into the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, respectively, and the first conductivity type The semiconductor light emitting device according to claim 13 or 14, wherein both the mold side electrode and the second conductivity type side electrode have a flip chip type structure in which the mold side electrode and the second conductivity type side electrode are arranged on the same side as the buffer layer.
The semiconductor light emitting element has a first conductivity type side electrode and a second conductivity type side electrode for injecting current into the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, respectively, and the first conductivity type 15. The semiconductor light emitting device according to claim 13, wherein the semiconductor light emitting device has a vertical conduction type structure in which one of a mold side electrode and a second conductivity type side electrode is disposed on the semiconductor layer and the other is disposed in contact with the substrate surface. element.
17. The semiconductor light emitting device according to claim 13, wherein the first conductive semiconductor layer, the active layer structure, and the second conductive semiconductor layer are nitride semiconductors.
The semiconductor light emitting element according to claim 17, wherein the nitride semiconductor contains at least one element of In, Ga, Al, and B.
19. The semiconductor light emitting element according to claim 13, wherein a center wavelength λ (nm) of light emitted from the active layer structure satisfies the following formula.
300 (nm) ≦ λ ≦ 430 (nm)
20. The semiconductor light emitting element according to claim 13, wherein the concentration of hydrogen atoms in the crystal quality improving layer is 1 × 10 21 atoms / cm 3 or more and 1 × 10 22 atoms / cm 3 or less.
21. The semiconductor light emitting element according to claim 13, wherein the substrate is a nitride or an oxide.
The semiconductor light emitting element according to any one of claims 13 to 21, wherein the crystal quality improving layer includes at least one of nitride, oxide, and oxynitride.
The nitride, oxide, or oxynitride includes one or more elements selected from the group consisting of B, Al, Si, Ti, V, Cr, Mo, Hf, Ta, and W. Semiconductor light emitting device.
The semiconductor light emitting element according to any one of claims 13 to 21, wherein the crystal quality improving layer includes an element that exhibits a termination effect.
25. The semiconductor light emitting element according to claim 24, wherein the element that exhibits the termination effect is at least one of Si, Ge, Se, S, Al, P, and As.
26. The semiconductor light emitting element according to claim 13, wherein the crystal quality improving layer is removed.