WO2009131061A1 - Si(1-v-w-x)CwAlxNv基材の製造方法、エピタキシャルウエハの製造方法、Si(1-v-w-x)CwAlxNv基材およびエピタキシャルウエハ - Google Patents
Si(1-v-w-x)CwAlxNv基材の製造方法、エピタキシャルウエハの製造方法、Si(1-v-w-x)CwAlxNv基材およびエピタキシャルウエハ Download PDFInfo
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- WO2009131061A1 WO2009131061A1 PCT/JP2009/057719 JP2009057719W WO2009131061A1 WO 2009131061 A1 WO2009131061 A1 WO 2009131061A1 JP 2009057719 W JP2009057719 W JP 2009057719W WO 2009131061 A1 WO2009131061 A1 WO 2009131061A1
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- 239000000758 substrate Substances 0.000 title claims abstract description 228
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 44
- 238000000034 method Methods 0.000 claims abstract description 60
- 239000000463 material Substances 0.000 claims description 22
- 238000004549 pulsed laser deposition Methods 0.000 claims description 14
- 238000002441 X-ray diffraction Methods 0.000 claims description 12
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 54
- 229910010271 silicon carbide Inorganic materials 0.000 description 53
- 230000000052 comparative effect Effects 0.000 description 51
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- 230000007017 scission Effects 0.000 description 7
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- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 3
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 3
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- 229910052802 copper Inorganic materials 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
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Definitions
- the present invention relates to a method for producing a Si (1-vwx) C w Al x N v substrate, a method for producing an epitaxial wafer, a Si (1-vwx) C w Al x N v substrate, and an epitaxial wafer.
- Crystals are used as materials for semiconductor devices such as short-wavelength optical devices and power electronic devices. Such crystals are conventionally obtained by growing on a base substrate by a vapor phase growth method or the like.
- a Si (1-vwx) C w Al x N v base material has attracted attention as a base substrate used for growing such materials.
- a method for producing such a Si (1-vwx) C w Al x N v substrate for example, US Pat. No. 4,382,837 (Patent Document 1), US Pat. No. 6,086,672 (Patent Document 2) and Table 2005-506695 (Patent Document 3) may be mentioned.
- Patent Document 1 discloses that a raw material is heated at 1900 ° C. to 2020 ° C. to produce a (SiC) (1-x) (AlN) x crystal on Al 2 O 3 (sapphire). ing.
- a raw material is heated at 1810 ° C. to 2492 ° C. to grow (SiC) (1-x) (AlN) x crystals on SiC (silicon carbide) at 1700 ° C. to 2488 ° C.
- Patent Document 3 discloses that the temperature of the source gas is set to 550 ° C. to 750 ° C., and (SiC) (1-x) (AlN) x crystals are grown on Si (silicon).
- Patent Documents 1 and 2 a (SiC) (1-x) (AlN) x crystal is grown on an Al 2 O 3 substrate and a SiC substrate. Since the Al 2 O 3 substrate and the SiC substrate are chemically very stable materials, processing such as wet etching is difficult. Therefore, reducing the thickness of the Al 2 O 3 substrate and a SiC substrate, there is a problem that it is difficult, such as the removal of the Al 2 O 3 substrate and a SiC substrate.
- the temperature of the crystal growth surface is set to a high temperature of 1700 ° C. to 2488 ° C.
- the raw material is heated at 1900 ° C. to 2020 ° C. For this reason, although the surface temperature of the Al 2 O 3 substrate of Patent Document 1 is lower than the temperature of the raw material, it is as high as that of Patent Document 2.
- the temperature of the source gas is set to about 550 ° C. to 750 ° C.
- the surface temperature of the Si substrate in Patent Document 3 is a temperature exceeding at least 550 ° C.
- the (SiC) (1-x) (AlN) x crystal is grown at a high temperature exceeding 550 ° C. (SiC) to obtain the (1-x) (AlN) x crystals, (SiC) (1-x) after completion of growth (AlN) x crystals, by cooling to room temperature (SiC) (1-x) It is necessary to remove the (AlN) x crystal from the apparatus.
- the (SiC) (1-x) (AlN) x crystal and Al 2 O 3 , SiC and Si have different thermal expansion coefficients. For this reason, the (SiC) (1-x) (AlN) x crystal receives stress due to the difference in thermal expansion coefficient during cooling.
- Patent Documents 1 to 3 grow at a high temperature, a large stress is applied to the (SiC) (1-x) (AlN) x crystal. Therefore, there is a problem that cracks are likely to occur in the (SiC) (1-x) (AlN) x crystal.
- the present invention has been made in view of the above problems, and an object of the present invention is to produce a Si (1-vwx) C w Al x N v base material that suppresses generation of cracks and is easy to process.
- An epitaxial wafer manufacturing method, an Si (1-vwx) C w Al x N v substrate, and an epitaxial wafer are provided.
- the present inventor In order to suppress cracks occurring in the Si (1-vwx) C w Al x N v layer, the present inventor has determined that the temperature from the temperature at which the Si (1-vwx) C w Al x N v layer is grown to the room temperature. It was found that reducing the difference is effective. Accordingly, the present inventors have Si (1-vwx) C w Al x N v layer Si (1-vwx) for suppressing cracks occurring C w Al x N v layer intensive research as a result of the growth temperature of 550 It discovered that a crack could be suppressed by setting it as less than ° C.
- the production method of Si (1-vwx) C w Al x N v substrate according to the present invention includes the following steps. First, a Si substrate is prepared. The temperature of the Si (1-vwx) C w Al x N v layer (0 ⁇ v ⁇ 1, 0 ⁇ w ⁇ 1, 0 ⁇ x ⁇ 1, 0 ⁇ v + w + x ⁇ 1) on the Si substrate is less than 550 ° C. Grown in.
- the Si (1-vwx) C w Al x N v layer is grown at less than 550 ° C.
- the Si (1-vwx) C w Al x N v layer is grown and cooled to room temperature, the Si (1-vwx) C w Al x N v layer is affected by the difference in thermal expansion coefficient between the Si substrate and Si (1-vwx) C w Al x N v layer.
- a stress is applied to the (1-vwx) C w Al x N v layer.
- Si (1-vwx) C w Al x N v layer stress applied to the Si (1-vwx) C w Al x N v layer when the growth temperature is lower than 550 ° C. is, Si (1-vwx) to cause cracks in the C w Al x N v layer It is the size which can suppress. Therefore, it is possible to suppress the occurrence of cracks in the Si (1-vwx) C w Al x N v layer to be grown.
- a Si (1-vwx) C w Al x N v layer is grown on the Si substrate.
- the Si substrate has a high cleavage property and is easily etched with an acid. For this reason, the process for reducing the thickness of the Si substrate and the process for removing the Si substrate are easy. Accordingly, it is possible to manufacture a Si (1-vwx) C w Al x N v base material that is easy to process.
- the Si substrate is easy to process. For this reason, the Si substrate can be easily removed. Therefore, an Si (1-vwx) C w Al x N v base material having an Si (1-vwx) C w Al x N v layer that does not contain a Si substrate and suppresses the generation of cracks is easily manufactured. be able to.
- Si (1-vwx) C w Al x N v substrate manufacturing method preferably, in the growing step, Si (1-vwx) C w Al x N is performed by a pulsed laser deposition (PLD) method.
- PLD pulsed laser deposition
- the raw material of the Si (1-vwx) C w Al x N v layer is irradiated with a laser to generate plasma, and this plasma can be supplied onto the Si substrate. That is, the Si (1-vwx) C w Al x N v layer can be grown in a non-equilibrium state. Since this growth condition is not a stable state such as an equilibrium state, Si can bond to both C and N, and Al can bond to both C and N. Therefore, it is possible to grow a Si (1-vwx) C w Al x N v layer in which four elements of Si, C, Al and N are mixed.
- the method for producing an epitaxial wafer of the present invention produces an Si (1-vwx) C w Al x N v substrate by the method for producing an Si (1-vwx) C w Al x N v substrate described above. And an Al (1-yz) Ga y In z N layer (0 ⁇ y ⁇ 1, 0 ⁇ z ⁇ 1, 0 ⁇ y + z ⁇ 1) on the Si (1-vwx) C w Al x N v layer And a step of growing the substrate.
- the method for manufacturing an epitaxial wafer of the present invention it is possible to manufacture a Si (1-vwx) C w Al x N v layer in which generation of cracks is suppressed. Therefore, a good crystalline Al (1-yz) Gay y In z N layer can be grown on the Si (1-vwx) C w Al x N v layer.
- the lattice matching and the thermal expansion coefficient of the Al (1-yz) Ga y In z N layer have a small difference from the lattice matching and the thermal expansion coefficient of the Si (1-vwx) C w Al x N v layer. Therefore, the crystallinity of the Al (1-yz) Ga y In z N layer can be improved.
- the epitaxial wafer includes a Si substrate, the Si substrate is easy to process, and thus the Si substrate can be easily removed from the epitaxial wafer.
- the Si (1-vwx) C w Al x N v substrate of the present invention has an Si (1-vwx) C w Al x N v layer (0 ⁇ v ⁇ 1, 0 ⁇ w ⁇ 1, 0 ⁇ x ⁇ 1 , 0 ⁇ v + w + x ⁇ 1) Si (1-vwx) C w Al x N v substrate, wherein the Si (1-vwx) C w Al x N v layer is 1 mm or more in a 10 mm square region
- the number of cracks is 7 or less when 1> v + x> 0.5, 5 or less when 0.5 ⁇ v + x> 0.1, and 3 or less when 0.1 ⁇ v + x> 0.
- the Si (1-vwx) C w Al x N v substrate of the present invention it is low by being produced by the above-described method for producing the Si (1-vwx) C w Al x N v substrate of the present invention. It is obtained by growing a Si (1-vwx) C w Al x N v layer at a temperature. Therefore, it is possible to realize a Si (1-vwx) C w Al x N v substrate in which the number of cracks in the Si (1-vwx) C w Al x N v layer is reduced as described above.
- the Si (1-vwx) C w Al x N v base material preferably further comprises a Si substrate having a main surface, and the Si (1-vwx) C w Al x N v layer is formed on the main surface of the Si substrate. Is formed.
- Si (1-vwx) C w Al x N v layer when a small thickness, such as Si (1-vwx) of C w Al x N v substrate may further include a Si substrate if necessary Good. Since the Si substrate is easy to process, it is particularly advantageous when it is necessary to remove the Si substrate from the Si (1-vwx) C w Al x N v layer.
- the Si (1-vwx) C w Al x N v layer is preferably measured by an X-ray diffraction (XRD) method.
- XRD X-ray diffraction
- Si is bonded to both C and N, and Al is C and It is combined with any of N. Therefore, it is possible to grow a Si (1-vwx) C w Al x N v layer in which four elements of Si, C, Al and N are mixed. Therefore, a Si (1-vwx) C w Al x N v layer having a diffraction peak between the SiC diffraction peak and the AlN diffraction peak can be realized.
- Epitaxial wafer of the present invention the above and Si (1-vwx) C w Al x N v substrate according to any one, Si (1-vwx) C w Al x N v formed on the layer Al (1 -yz) Ga y In z N layer (0 ⁇ y ⁇ 1, 0 ⁇ z ⁇ 1, 0 ⁇ y + z ⁇ 1).
- the Al (1-yz) Ga y In z N layer is formed on the Si (1-vwx) C w Al x N v layer in which the generation of cracks is suppressed. For this reason, the crystallinity of the Al (1-yz) Ga y In z N layer can be improved. Further, when the epitaxial wafer is provided with a Si substrate, the Si substrate can be easily removed, so that the Si substrate can be easily removed from the epitaxial wafer.
- the Si substrate A Si (1-vwx) C w Al x N v layer is grown at a low temperature. Therefore, by suppressing the stress from being applied to the Si (1-vwx) C w Al x N v layer, the generation of cracks is suppressed and Si (1-vwx) C w Al x is easy to process. Nv substrate can be realized.
- the Si (1-vwx) C w Al x N v substrate according to the first embodiment of the present invention is a cross-sectional view schematically showing.
- the array of atoms constituting the Si (1-vwx) C w Al x N v layer according to the first embodiment of the present invention is a diagram schematically showing.
- the PLD device that can be used in the production of Si (1-vwx) C w Al x N v substrate according to the first embodiment of the present invention is a diagram schematically showing.
- a state in which the Si (1-vwx) C w Al x N v layer grown in an equilibrium state is a cross-sectional view schematically showing.
- a state in which the Si (1-vwx) C w Al x N v layer grown in an equilibrium state is a cross-sectional view schematically showing.
- Si (1-vwx) C w Al x N v substrate is a cross-sectional view schematically showing. It is sectional drawing which shows schematically the epitaxial wafer in Embodiment 3 of this invention. It is sectional drawing which shows roughly the epitaxial wafer in Embodiment 4 of this invention.
- FIG. 1 is a cross-sectional view schematically showing a Si (1-vwx) C w Al x N v substrate in the present embodiment.
- Si (1-vwx) C w Al x N v base material 10a in the present embodiment will be described.
- Si (1-vwx) C w Al x N v substrate 10a includes a Si substrate 11, Si Si formed on the main surface 11a of the substrate 11 (1- vwx) C w Al x N v layer 12 (0 ⁇ v ⁇ 1, 0 ⁇ w ⁇ 1, 0 ⁇ x ⁇ 1, 0 ⁇ v + w + x ⁇ 1).
- the composition ratio 1-vwx is the molar ratio of Si
- w is the molar ratio of C
- x is the molar ratio of Al
- V is the molar ratio of N.
- the crack of 1 mm or more means the total distance along the longitudinal direction in one continuous crack.
- FIGS. 2 to 4 are schematic diagrams showing diffraction peaks in the XRD method of the Si (1-vwx) C w Al x N v layer in the present embodiment.
- the Si (1-vwx) C w Al x N v layer 12 has a diffraction peak between the SiC diffraction peak and the AlN diffraction peak measured by the XRD method. ing.
- the diffraction peak of each material measured by the XRD method is a unique value.
- the tube voltage is 45 kV
- the tube current is 40 mA
- the measurement method is 2 ⁇ - ⁇
- the angular resolution is 0.001 deg step
- the diffraction peak of SiC (102) plane appears near 35.72 deg.
- the diffraction peak existing between the SiC diffraction peak and the AlN diffraction peak in the Si (1-vwx) C w Al x N v layer 12 is higher than the diffraction peak heights of SiC and AlN. And a case where the height is lower than the height of diffraction peaks of SiC and AlN, as shown in FIG. Further, as shown in FIG. 4, the Si (1-vwx) C w Al x N v layer 12 does not show SiC and AlN diffraction peaks, but only diffracts between the SiC diffraction peak and the AlN diffraction peak. You may have a peak.
- the diffraction peak existing between the SiC diffraction peak and the AlN diffraction peak is not a noise-like peak, but a mixture of Si, C, Al, and N. It has a height that indicates that a crystallized state exists.
- FIG. 5 is a diagram schematically showing the arrangement of atoms constituting Si (1-vwx) C w Al x N v in the present embodiment. Since it exists chemically and stably as SiC, Si is easy to bond with C and difficult to bond with N. Since AlN exists chemically and stably, Al is easily bonded to N and is not easily bonded to C. However, as shown in FIG. 5, in the Si (1-vwx) C w Al x N v layer 12, Si is bonded to both C and N, and Al is bonded to both C and N. . That is, the Si (1-vwx) C w Al x N v layer 12 does not aggregate as SiC or AlN, and Si, Al, C, and N are dispersed at the atomic level.
- FIG. 6 is a schematic diagram schematically showing a PLD apparatus that can be used for manufacturing a Si (1-vwx) C w Al x N v substrate in the present embodiment.
- the PLD apparatus 100 includes a vacuum chamber 101, a laser light source 102, a raw material 103, a stage 104, a pulse motor 105, a substrate holding unit 106, a heater (not shown), and a control.
- Unit 107 a reflection high-energy electron diffraction apparatus (RHEED) 108, and a gas supply unit 109.
- RHEED reflection high-energy electron diffraction apparatus
- a laser light source 102 is disposed outside the vacuum chamber 101.
- the laser light source 102 can emit laser light.
- a raw material 103 serving as a target can be disposed in the vacuum chamber 101 at a position where the laser light source 102 emits laser light.
- the raw material 103 can be placed on the stage 104.
- the pulse motor 105 can drive the stage 104.
- the substrate holding unit 106 can hold the Si substrate 11 as a base substrate.
- the heater heats the Si substrate 11 held by the substrate holding unit 106.
- the control unit 107 can control operations of the laser light source 102 and the pulse motor 105.
- the RHEED 108 can measure the thickness of the Si (1-vwx) C w Al x N v layer 12 grown on the Si substrate 11 by monitoring vibration.
- the gas supply unit 109 can supply gas into the vacuum chamber 101.
- the PLD device 100 may include various elements other than those described above, the illustration and description of these elements are omitted for convenience of description.
- the raw material 103 of the Si (1-vwx) C w Al x N v layer 12 is prepared.
- the raw material 103 for example, a sintered body in which SiC and AlN are mixed can be used.
- the composition v + x of the Si (1-vwx) C w Al x N v layer 12 can be controlled by the molar ratio of mixing SiC and AlN in the raw material 103.
- the raw material 103 thus prepared is set on the stage 104 shown in FIG.
- the Si substrate 11 is set on the surface of the substrate holding unit 106 installed in the vacuum chamber 101 at a position facing the raw material 103.
- the surface temperature of the Si substrate 11 is heated to less than 550 ° C.
- the surface temperature of the Si substrate 11 is less than 550 ° C., and preferably 540 ° C. or less. This heating is performed by, for example, a heater.
- the heating method of the Si substrate 11 is not particularly limited to the heater, and other methods such as passing an electric current may be used.
- the raw material 103 is irradiated with laser light emitted from the laser light source 102.
- the laser for example, a KrF (krypton fluoride) excimer laser having an emission wavelength of 248 nm, a pulse repetition frequency of 10 Hz, and an energy per pulse of 1 to 3 J / shot can be used.
- KrF (krypton fluoride) excimer laser having an emission wavelength of 248 nm, a pulse repetition frequency of 10 Hz, and an energy per pulse of 1 to 3 J / shot can be used.
- ArF argon fluoride
- the vacuum chamber 101 is evacuated to about 1 ⁇ 10 ⁇ 3 Torr to 1 ⁇ 10 ⁇ 6 Torr or less, for example. Thereafter, the inside of the vacuum chamber 101 is brought into an atmosphere of an inert gas such as argon (Ar) or nitrogen (N 2 ) by the gas supply unit 109. If the inside of the vacuum chamber 101 is a nitrogen atmosphere, nitrogen can be replenished during the growth of the Si (1-vwx) C w Al x N v layer 12. If the inside of the vacuum chamber is an inert gas atmosphere, only the raw material 103 is used when the Si (1-vwx) C w Al x N v layer 12 is grown, so that the value of v + x can be easily controlled.
- an inert gas such as argon (Ar) or nitrogen (N 2 )
- a laser having a short wavelength As described above.
- ablation plasma plural which is plasma accompanied by explosive particle emission from the solid, can be generated in the vacuum chamber 101.
- Ablation particles contained in the plasma move to the Si substrate 11 while changing its state due to recombination, collision with atmospheric gas, reaction, and the like. Each particle that reaches the Si substrate 11 diffuses through the Si substrate 11 and enters a site where it can be arranged, whereby the Si (1-vwx) C w Al x N v layer 12 is formed.
- the sites where each particle can be placed are as follows. Sites where Al atoms can be arranged are sites that bond with C atoms or N atoms. Sites where Si atoms can be arranged are sites that combine with C atoms or N atoms. The site where C atoms can be arranged is a site that binds to Al atoms or Si atoms. The site at which N atoms can be arranged is a site that binds to Al atoms or Si atoms.
- the thickness of the Si (1-vwx) C w Al x N v layer 12 to be grown can be monitored by vibration of the RHEED 108 attached to the vacuum chamber 101.
- Si (1-vwx) on the Si substrate 11 C w Al x N v layer 12 can be grown at temperatures below 550 °C, Si (1-vwx shown in FIG. 1 ) can be produced C w Al x N v substrate 10a.
- Si (1-vwx) C w Al x N v layer 12 by the PLD method has been described, but the present invention is not particularly limited thereto.
- Si (1-vwx ) can be obtained by methods such as MOCVD (Metal Organic Chemical Vapor Deposition) method using a pulse supply method, MBE (Molecular Beam Epitaxy) method using a gas source method, sputtering method, etc. )
- MOCVD Metal Organic Chemical Vapor Deposition
- MBE Molecular Beam Epitaxy
- the Si (1-vwx) C w Al x N v layer 12 is grown at a temperature below 550 ° C.
- the inventor has grown the Si (1-vwx) C w Al x N v layer 12 at a temperature below 550 ° C., so that it is cooled to room temperature after the Si (1-vwx) C w Al x N v layer 12 is grown.
- the effect of stress on the Si (1-vwx) C w Al x N v layer 12 due to the difference in thermal expansion coefficient between the Si (1-vwx) C w Al x N v layer 12 and the Si substrate 11 is reduced.
- the Si substrate 11 is used as a base substrate for the Si (1-vwx) C w Al x N v layer 12.
- the Si substrate 11 is the mainstream of current electronic materials, and processing techniques such as etching have been established.
- the Si substrate 11 has a high cleavage property and is easily etched with an acid. For this reason, the process for reducing the thickness of the Si substrate 11 and the process for removing the Si substrate can be easily performed.
- the Si (1-vwx) C w Al x N v base material 10a is used for producing a light emitting device, the cleavage property of the Si substrate is very important. Therefore, it is possible to manufacture an easy Si (1-vwx) C w Al x N v substrate 10a of workability.
- the Si (1-vwx) C w Al x N v layer 12 is formed using the Si substrate 11 as a base substrate. It was difficult to grow.
- the Si (1-vwx) C w Al x N v layer 12 is grown at a low temperature of less than 550 ° C., it is possible to suppress the Si substrate 11 from being deteriorated by heat. . Therefore, it becomes possible to grow the Si (1-vwx) C w Al x N v layer 12 on the Si substrate 11.
- a Si substrate 11 is used as a base substrate.
- the Si substrate 11 is less expensive than a SiC substrate, a sapphire substrate, or the like. Therefore, it is possible to reduce the cost required for manufacturing a Si (1-vwx) C w Al x N v substrate 10a.
- 1 mm or more cracks of 1 mm or more are 7 or less when 1> v + x> 0.5, 5 or less when 0.5 ⁇ v + x> 0.1, and 3 or less when 0.1 ⁇ v + x> 0.
- Si (1-vwx) C w Al x N v layer Si (1-vwx) equipped with a 12 C w Al x N v can be realized substrate 10a.
- the Si (1-vwx) C w Al x N v substrate 10a manufactured by the method of manufacturing the Si (1-vwx) C w Al x N v substrate 10a in the present embodiment is easy to process. Yes, crystallinity is improved.
- functional devices utilizing various magnetoresistance effects such as tunnel magnetoresistive elements and giant magnetoresistive elements, light emitting elements such as light emitting diodes and laser diodes, rectifiers, bipolar transistors, field effect transistors (FETs), spin FETs It can be suitably used for electronic elements such as HEMT (High Electron Mobility Transistor), temperature sensors, pressure sensors, radiation sensors, semiconductor sensors such as visible-ultraviolet light detectors, and SAW devices.
- HEMT High Electron Mobility Transistor
- the Si (1-vwx) C w Al x N v substrate 10a preferably, in the growing step, the Si (1-vwx) C w Al x N v layer 12 is grown by the PLD method. .
- the raw material 103 of the Si (1-vwx) C w Al x N v layer 12 is irradiated with a laser to generate plasma, and this plasma can be supplied onto the Si substrate 11. That is, the Si (1-vwx) C w Al x N v layer 12 can be grown in a non-equilibrium state. Since the non-equilibrium state is not as stable as the equilibrium state, Si can bond to both C and N, and Al can bond to both C and N. Therefore, as shown in FIG. 5, it is possible to grow a Si (1-vwx) C w Al x N v layer 12 in which four elements of Si, C, Al and N are mixed.
- FIGS. 7 and 8 are cross-sectional views schematically showing a state when the Si (1-vwx) C w Al x N v layer 12 is grown in an equilibrium state.
- the Si (1-vwx) C w Al x N v layer 112 When the Si (1-vwx) C w Al x N v layer 112 is grown in an equilibrium state, since SiC and AlN are stable, Si and C are bonded, and Al and N are bonded. Therefore, the Si (1-vwx) C w Al x N v layer 12 grows in a state where the SiC layer 112a and the AlN layer 112b are laminated in layers as shown in FIG. 7, or as shown in FIG. In many cases, the SiC layer 112a grows so that the agglomerated AlN layers 112b are scattered.
- Figure 9 shows the diffraction peak measured by XRD method Si (1-vwx) C w Al x N v layer when the Si (1-vwx) C w Al x N v layer grown in an equilibrium state It is a schematic diagram.
- the Si (1-vwx) C w Al x N v layer grown in this way is not a mixed crystal state of four elements of Si, C, Al and N as shown in FIGS.
- FIG. 9 when measured by the XRD method, as shown in FIG. 9, only the SiC diffraction peak and the AlN diffraction peak are detected, and there is no diffraction peak between the SiC diffraction peak and the AlN diffraction peak.
- a diffraction peak of an error such as noise occurs between the SiC diffraction peak and the AlN diffraction peak.
- the Si (1-vwx) C w Al x N v layer 12 is grown by the PLD method, as shown in FIG. 5, the Si, C, Al, and N mixed crystal state Si elements are present.
- the (1-vwx) C w Al x N v layer 12 can be grown.
- the Si (1-vwx) C w Al x N v layer 12 having a diffraction peak between the SiC diffraction peak and the AlN diffraction peak measured by the XRD method.
- Si (1-vwx) C w Al x N v base material 10a having the above can be manufactured.
- FIG. 10 is a cross-sectional view schematically showing a Si (1-vwx) C w Al x N v substrate according to the present embodiment.
- the Si (1-vwx) C w Al x N v substrate 10b in the present embodiment is different from the Si (1-vwx) C w Al x N v substrate 10a in the first embodiment. At least the Si substrate 11 is removed.
- Si (1-vwx) in this embodiment C w Al x N v a method for manufacturing the substrate 10b.
- the Si (1-vwx) C w Al x N v substrate 10a shown in FIG. 1 is produced according to the method for producing the Si (1-vwx) C w Al x N v substrate 10a in the first embodiment. .
- the Si substrate 11 is removed. Note that only the Si substrate 11 may be removed, or a part of the Si substrate 11 and the Si (1-vwx) C w Al x N v layer 12 including a surface in contact with the Si substrate 11 may be removed. .
- the removal method is not particularly limited, and for example, a chemical removal method such as etching, a mechanical removal method such as cutting, grinding, or cleavage can be used.
- Cutting means that at least the Si substrate 11 is mechanically removed from the Si (1-vwx) C w Al x N v layer 12 with a slicer having an outer peripheral edge of an electrodeposited diamond wheel. Grinding refers to scraping in the thickness direction by contacting the surface while rotating the grindstone.
- Cleaving means dividing the Si substrate 11 along the crystal lattice plane.
- the manufacturing method of the present Si (1-vwx) in the embodiment of C w Al x N v substrate 10b further comprising a step of removing the Si substrate 11. Since the Si substrate 11 is easily removed, for example, the Si (1-vwx) C w Al x N v base material 10b having only the Si (1-vwx) C w Al x N v layer 12 is easily manufactured. be able to.
- FIG. 11 is a cross-sectional view schematically showing an epitaxial wafer in the present embodiment. With reference to FIG. 11, epitaxial wafer 20a in the present embodiment will be described.
- the epitaxial wafer 20a includes the Si (1-vwx) C w Al x N v substrate 10a and the Si (1-vwx) C w Al x N v substrate 10a according to the first embodiment. And an Al (1-yz) Ga y In z N (0 ⁇ y ⁇ 1, 0 ⁇ z ⁇ 1, 0 ⁇ y + z ⁇ 1) layer 21 formed thereon.
- the epitaxial wafer 20a includes the Si substrate 11, the Si (1-vwx) C w Al x N v layer 12 formed on the Si substrate 11, and the Si (1-vwx) C w Al x N. and an Al (1-yz) Ga y In z N layer 21 formed on the v layer 12.
- the Si (1-vwx) C w Al x N v substrate 10a is manufactured according to the method for manufacturing the Si (1-vwx) C w Al x N v substrate 10a in the first embodiment.
- Al (1-yz) Ga A y In z N layer 21 is grown.
- the growth method is not particularly limited.
- MOCVD method, HVPE (Hydride Vapor Phase Epitaxy) method, MBE method, vapor phase growth method such as sublimation method, liquid phase growth method and the like can be adopted.
- the epitaxial wafer 20a shown in FIG. 11 can be manufactured.
- a step of removing the Si substrate 11 from the epitaxial wafer 20a may be further performed.
- Si (1-vwx) C w Al x N v Al (1-yz) on the substrate 10a Ga A y In z N layer 21 is formed.
- the Si (1-vwx) C w Al x N v substrate 10a the occurrence of cracks is suppressed. Therefore, it is possible to grow the Si (1-vwx) C w Al x N v good crystalline Al (1-yz) on layer 12 Ga y In z N layer 21.
- Al (1-yz) Ga y In z N layer is Si (1-vwx) C w Al x N v layer 21 difference in lattice matching of the differences and the thermal expansion coefficient is small, Al (1-yz ) The crystallinity of the Ga y In z N layer 21 can be improved. Furthermore, when the epitaxial wafer includes the Si substrate 11, the Si substrate 11 can be easily processed, and therefore the Si substrate 11 can be easily removed from the epitaxial wafer.
- FIG. 12 is a cross-sectional view schematically showing an epitaxial wafer in the present embodiment. With reference to FIG. 12, epitaxial wafer 20b in the present embodiment will be described.
- the epitaxial wafer 20b includes the Si (1-vwx) C w Al x N v substrate 10b and the Si (1-vwx) C w Al x N v substrate 10b according to the second embodiment. And an Al (1-yz) Ga y In z N (0 ⁇ y ⁇ 1, 0 ⁇ z ⁇ 1, 0 ⁇ y + z ⁇ 1) layer 21 formed thereon.
- the epitaxial wafer 20 b includes the Si (1-vwx) C w Al x N v layer 12 and the Al (1-yz) formed on the Si (1-vwx) C w Al x N v layer 12. And a Ga y In z N layer 21.
- the Si (1-vwx) C w Al x N v substrate 10b is manufactured according to the method for manufacturing the Si (1-vwx) C w Al x N v substrate 10b in the second embodiment.
- the epitaxial wafer 20b shown in FIG. 12 can be manufactured.
- Si (1-vwx) C w Al x N v Al (1-yz) on the substrate 10b Ga A y In z N layer 21 is formed.
- Si (1-vwx) C w Al x N v substrate 10b since the occurrence of cracks is suppressed, to grow a good crystallinity of Al (1-yz) Ga y In z N layer 21 it can.
- a raw material 103 of Si 0.05 C 0.05 (AlN) 0.9 layer 12 was prepared.
- This raw material 103 was prepared by the following method. Specifically, SiC powder and AlN powder were mixed and pressed. This mixture was placed in a vacuum vessel, the inside of the vacuum vessel was evacuated to 10 ⁇ 6 Torr, and the atmosphere was filled with high-purity Ar gas. The mixture was then fired at 2300 ° C. for 20 hours. Thereby, the raw material 103 was prepared. Then, this raw material 103 was set on the stage 104 shown in FIG.
- a Si substrate 11 was prepared as a base substrate.
- This Si substrate 11 had the (001) plane as the main surface 11a and had a size of 1 inch.
- the Si substrate 11 was set on the surface of the substrate holding unit 106 installed in the vacuum chamber 101 and at a position facing the raw material 103.
- the surface temperature of the Si substrate 11 was heated to 540 ° C. Thereafter, the raw material 103 was irradiated with laser light emitted from the laser light source 102.
- a laser a KrF excimer laser having an emission wavelength of 248 nm, a pulse repetition frequency of 10 Hz, and an energy per pulse of 1 to 3 J / shot was used.
- the inside of the vacuum chamber 101 was evacuated to 1 ⁇ 10 ⁇ 6 Torr, and then the inside of the vacuum chamber 101 was set to a nitrogen atmosphere.
- a Si 0.05 C 0.05 (AlN) 0.9 layer 12 having a thickness of 500 nm was grown by monitoring the vibration of the RHEED 108 attached to the vacuum chamber 101.
- the Si 0.05 C 0.05 (AlN) 0.9 substrate 10a shown in FIG. 1 was manufactured.
- Comparative Example 1 a Si 0.05 C 0.05 (AlN) 0.9 base material was basically produced in the same manner as Example 1 of the present invention. However, as a base substrate, sapphire having a main surface of (0001) plane instead of a Si substrate A substrate was used.
- Comparative Example 2 a Si 0.05 C 0.05 (AlN) 0.9 base material was produced basically in the same manner as in Example 1 of the present invention. However, instead of the Si substrate as the base substrate, the main surface was 6H— with a (0001) plane. A SiC substrate was used.
- the Si 0.05 C 0.05 (AlN) 0.9 base material of Comparative Example 2 using a SiC substrate as a base substrate did not have a good etching property of the SiC substrate, and thus the SiC substrate could not be sufficiently removed by etching.
- the embodiment above it was confirmed to be capable of processing by using a Si substrate to produce an easy Si (1-vwx) C w Al x N v substrate.
- Invention Example 2 was basically the same as Invention Example 1, but Si 0.05 C 0.05 Al 0.45 N 0.45 was grown using Si substrate 11 whose main surface is the (111) plane as the base substrate. I let you.
- Invention Example 3 was basically the same as Invention Example 2, but the grown Si (1-vwx) C w Al x N v layer 12 was Si 0.0005 C 0.0005 Al 0.4994 N 0.4996 . For this reason, the molar ratio of the AlN powder and SiC powder of the prepared raw material 103 was changed.
- Invention Example 4 was basically the same as Invention Example 2, but the grown Si (1-vwx) C w Al x N v layer 12 was Si 0.0005 C 0.0005 Al 0.4996 N 0.4994 .
- Invention Example 5 was basically the same as Invention Example 2, but the grown Si (1-vwx) C w Al x N v layer 12 was Si 0.0005 C 0.0005 Al 0.4995 N 0.4995 .
- Invention Example 6 was basically the same as Invention Example 2, but the grown Si (1-vwx) C w Al x N v layer 12 was Si 0.0006 C 0.0004 Al 0.4995 N 0.4995 .
- Invention Example 7 was basically the same as Invention Example 2, but the grown Si (1-vwx) C w Al x N v layer 12 was Si 0.0004 C 0.0006 Al 0.4995 N 0.4995 .
- Invention Example 8 was basically the same as Invention Example 2, but the grown Si (1-vwx) C w Al x N v layer 12 was Si 0.005 C 0.005 Al 0.495 N 0.495 .
- Invention Example 9 was basically the same as Invention Example 1, except that the grown Si (1-vwx) C w Al x N v layer 12 was Si 0.25 C 0.25 Al 0.25 N 0.25 .
- Invention Example 10 was basically the same as Invention Example 1, but the grown Si (1-vwx) C w Al x N v layer 12 was Si 0.45 C 0.45 Al 0.05 N 0.05 .
- Invention Example 11 was basically the same as Invention Example 2, but the grown Si (1-vwx) C w Al x N v layer 12 was Si 0.495 C 0.495 Al 0.005 N 0.005 .
- Invention Example 12 was basically the same as Invention Example 2, but the grown Si (1-vwx) C w Al x N v layer 12 was Si 0.4995 C 0.4995 Al 0.0004 N 0.0006 .
- Invention Example 13 was basically the same as Invention Example 2, but the grown Si (1-vwx) C w Al x N v layer 12 was Si 0.4995 C 0.4995 Al 0.0006 N 0.0004 .
- Invention Example 14 was basically the same as Invention Example 2, but the grown Si (1-vwx) C w Al x N v layer 12 was Si 0.4995 C 0.4995 Al 0.0005 N 0.0005 .
- Invention Example 15 was basically the same as Invention Example 2, but the grown Si (1-vwx) C w Al x N v layer 12 was Si 0.4996 C 0.4994 Al 0.0005 N 0.0005 .
- Invention Example 16 was basically the same as Invention Example 2, but the grown Si (1-vwx) C w Al x N v layer 12 was Si 0.49945 C 0.4996 Al 0.0005 N 0.0005 .
- Comparative Example 3 was basically the same as Inventive Example 2, but a Si 0.05 C 0.05 Al 0.45 N 0.45 layer was grown at a temperature of the main surface of the Si substrate of 550 ° C.
- Comparative Example 4 was basically the same as Inventive Example 2, but a Si 0.0005 C 0.0005 Al 0.4994 N 0.4996 layer was grown at a temperature of the main surface of the Si substrate of 550 ° C.
- Comparative Example 5 The comparative example 5 was basically the same as the inventive example 2, but the Si 0.0005 C 0.0005 Al 0.4996 N 0.4994 layer was grown at a temperature of the main surface of the Si substrate of 550 ° C.
- Comparative Example 6 was basically the same as Inventive Example 2, but a Si 0.0005 C 0.0005 Al 0.4995 N 0.4995 layer was grown at a temperature of the main surface of the Si substrate of 550 ° C.
- Comparative Example 7 was basically the same as Inventive Example 2, but a Si 0.0006 C 0.0004 Al 0.4995 N 0.4995 layer was grown at a temperature of the main surface of the Si substrate of 550 ° C.
- Comparative Example 8 was basically the same as Inventive Example 2, but a Si 0.0004 C 0.0006 Al 0.4995 N 0.4995 layer was grown at a temperature of the main surface of the Si substrate of 550 ° C.
- Comparative Example 9 was basically the same as Inventive Example 2, but a Si 0.005 C 0.005 Al 0.495 N 0.495 layer was grown at a temperature of the main surface of the Si substrate of 550 ° C.
- the comparative example 10 was basically the same as the inventive example 2, but the Si 0.25 C 0.25 Al 0.25 N 0.25 layer was grown at a temperature of the main surface of the Si substrate of 550 ° C.
- the comparative example 11 was basically the same as the inventive example 2, but the Si 0.45 C 0.45 Al 0.05 N 0.05 layer was grown at a temperature of the main surface of the Si substrate of 550 ° C.
- the comparative example 12 was basically the same as the inventive example 2, but the Si 0.495 C 0.495 Al 0.005 N 0.005 layer was grown at a temperature of 550 ° C. of the main surface of the Si substrate.
- the comparative example 13 was basically the same as the inventive example 2, but the Si 0.4995 C 0.4995 Al 0.0004 N 0.0006 layer was grown at a temperature of 550 ° C. of the main surface of the Si substrate.
- Comparative Example 14 was basically the same as Inventive Example 2, but the Si 0.4995 C 0.4995 Al 0.0006 N 0.0004 layer was grown at a temperature of the main surface of the Si substrate of 550 ° C.
- Comparative Example 15 was basically the same as Inventive Example 2, but the Si 0.4995 C 0.4995 Al 0.0005 N 0.0005 layer was grown at a temperature of the main surface of the Si substrate of 550 ° C.
- the comparative example 16 was basically the same as the inventive example 2, but the Si 0.4996 C 0.4994 Al 0.0005 N 0.0005 layer was grown at a temperature of the main surface of the Si substrate of 550 ° C.
- the comparative example 17 was basically the same as the inventive example 2, but the Si 0.4994 C 0.4996 Al 0.0005 N 0.0005 layer was grown at a temperature of the main surface of the Si substrate of 550 ° C.
- Comparative Example 18 was basically the same as Inventive Example 2, but the AlN layer was grown at a temperature of the main surface of the Si substrate of 540 ° C.
- Comparative Example 19 was basically the same as Example 2 of the present invention, but the AlN layer was grown at a temperature of the main surface of the Si substrate of 550 ° C.
- Comparative Example 20 Comparative Example 20 was basically the same as Inventive Example 2, but the SiC layer was grown at a temperature of the main surface of the Si substrate of 540 ° C.
- Comparative Example 21 was basically the same as Example 2 of the present invention, but the SiC layer was grown at a temperature of the main surface of the Si substrate of 550 ° C.
- the number of cracks in the v layer is 7 or less, and the Si (1-vwx) C w Al x N v layer is 5 or less, and the number of cracks in the v layer is 5 or less, and the Si (1 -vwx) It was found that the number of cracks in the C w Al x N v layer was 3 or less.
- the Si (1-vwx) C w Al x N v layer (0 ⁇ v ⁇ 1, 0 ⁇ w ⁇ 1, 0 ⁇ x ⁇ 1, 0 ⁇ v + w + x ⁇ 1) is generated in the Si (1-vwx) C w Al x N v layer (0 ⁇ v ⁇ 1, 0 ⁇ w ⁇ 1, 0 ⁇ x ⁇ 1, 0 ⁇ v + w + x ⁇ 1)). It was confirmed that the number of cracks could be reduced.
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Abstract
Description
図1は、本実施の形態におけるSi(1-v-w-x)CwAlxNv基材を概略的に示す断面図である。始めに、図1を参照して、本実施の形態におけるSi(1-v-w-x)CwAlxNv基材10aを説明する。
Si基板11は、現在のエレクトロニクス材料の主流であり、エッチングなどの加工の技術が確立されている。Si基板11は、へき開性が高く、酸によるエッチングが容易である。このため、Si基板11の厚みを薄くするための加工、Si基板を除去するための加工を容易に行なうことができる。たとえば発光デバイスを作成するためにSi(1-v-w-x)CwAlxNv基材10aを用いる場合には、Si基板のへき開性などは非常に重要である。したがって、加工性の容易なSi(1-v-w-x)CwAlxNv基材10aを製造することができる。
このため、Si基板11上にSi(1-v-w-x)CwAlxNv層12を成長することが可能になる。
図10は、本実施の形態におけるSi(1-v-w-x)CwAlxNv基材を概略的に示す断面図である。図10を参照して、本実施の形態におけるSi(1-v-w-x)CwAlxNv基材10bは、実施の形態1におけるSi(1-v-w-x)CwAlxNv基材10aから少なくともSi基板11が除去されている。
図11は、本実施の形態におけるエピタキシャルウエハを概略的に示す断面図である。
図11を参照して、本実施の形態におけるエピタキシャルウエハ20aについて説明する。
図12は、本実施の形態におけるエピタキシャルウエハを概略的に示す断面図である。
図12を参照して、本実施の形態におけるエピタキシャルウエハ20bについて説明する。
本発明例1では、基本的には、実施の形態1におけるSi(1-v-w-x)CwAlxNv基材10aの製造方法にしたがって、図6に示すPLD装置でSi(1-v-w-x)CwAlxNv基材10aを製造した。また、Si(1-v-w-x)CwAlxNv層12としてAlNの組成比であるx+v=0.9のSi0.05C0.05(AlN)0.9を製造した。
比較例1は、基本的には本発明例1と同様にSi0.05C0.05(AlN)0.9基材を製造したが、下地基板として、Si基板の代わりに、主表面が(0001)面のサファイア基板を用いた。
比較例2は、基本的には本発明例1と同様にSi0.05C0.05(AlN)0.9基材を製造したが、下地基板としてSi基板の代わりに、主表面が(0001)面の6H-SiC基板を用いた。
本発明例1、比較例1および比較例2のSi0.05C0.05(AlN)0.9基材の下地基板について、フッ化水素(HF)と硝酸(HNO3)との混合液、および水酸化カリウム(KOH)によるエッチング性と、へき開性とを各々調べた。
表1に示すように、下地基板としてSi基板を用いた本発明例1のSi0.05C0.05(AlN)0.9基材は、Si基板のエッチング性およびへき開性が良好であった。このため、Si基板の加工が容易であることが確認できた。
本発明例2では、基本的には本発明例1と同様であったが、下地基板として主表面が(111)面であるSi基板11を用いて、Si0.05C0.05Al0.45N0.45を成長させた。
本発明例3は、基本的には本発明例2と同様であったが、成長させたSi(1-v-w-x)CwAlxNv層12をSi0.0005C0.0005Al0.4994N0.4996とした。このため、準備した原料103のAlN粉末およびSiC粉末のモル比を変更した。
本発明例4は、基本的には本発明例2と同様であったが、成長させたSi(1-v-w-x)CwAlxNv層12をSi0.0005C0.0005Al0.4996N0.4994とした。
本発明例5は、基本的には本発明例2と同様であったが、成長させたSi(1-v-w-x)CwAlxNv層12をSi0.0005C0.0005Al0.4995N0.4995とした。
本発明例6は、基本的には本発明例2と同様であったが、成長させたSi(1-v-w-x)CwAlxNv層12をSi0.0006C0.0004Al0.4995N0.4995とした。
本発明例7は、基本的には本発明例2と同様であったが、成長させたSi(1-v-w-x)CwAlxNv層12をSi0.0004C0.0006Al0.4995N0.4995とした。
本発明例8は、基本的には本発明例2と同様であったが、成長させたSi(1-v-w-x)CwAlxNv層12をSi0.005C0.005Al0.495N0.495とした。
本発明例9は、基本的には本発明例1と同様であったが、成長させたSi(1-v-w-x)CwAlxNv層12をSi0.25C0.25Al0.25N0.25とした。
本発明例10は、基本的には本発明例1と同様であったが、成長させたSi(1-v-w-x)CwAlxNv層12をSi0.45C0.45Al0.05N0.05とした。
本発明例11は、基本的には本発明例2と同様であったが、成長させたSi(1-v-w-x)CwAlxNv層12をSi0.495C0.495Al0.005N0.005とした。
本発明例12は、基本的には本発明例2と同様であったが、成長させたSi(1-v-w-x)CwAlxNv層12をSi0.4995C0.4995Al0.0004N0.0006とした。
本発明例13は、基本的には本発明例2と同様であったが、成長させたSi(1-v-w-x)CwAlxNv層12をSi0.4995C0.4995Al0.0006N0.0004とした。
本発明例14は、基本的には本発明例2と同様であったが、成長させたSi(1-v-w-x)CwAlxNv層12をSi0.4995C0.4995Al0.0005N0.0005とした。
本発明例15は、基本的には本発明例2と同様であったが、成長させたSi(1-v-w-x)CwAlxNv層12をSi0.4996C0.4994Al0.0005N0.0005とした。
本発明例16は、基本的には本発明例2と同様であったが、成長させたSi(1-v-w-x)CwAlxNv層12をSi0.49945C0.4996Al0.0005N0.0005とした。
比較例3は、基本的には本発明例2と同様であったが、Si基板の主表面の温度が550℃でSi0.05C0.05Al0.45N0.45層を成長させた。
比較例4は、基本的には本発明例2と同様であったが、Si基板の主表面の温度が550℃でSi0.0005C0.0005Al0.4994N0.4996層を成長させた。
比較例5は、基本的には本発明例2と同様であったが、Si基板の主表面の温度が550℃でSi0.0005C0.0005Al0.4996N0.4994層を成長させた。
比較例6は、基本的には本発明例2と同様であったが、Si基板の主表面の温度が550℃でSi0.0005C0.0005Al0.4995N0.4995層を成長させた。
比較例7は、基本的には本発明例2と同様であったが、Si基板の主表面の温度が550℃でSi0.0006C0.0004Al0.4995N0.4995層を成長させた。
比較例8は、基本的には本発明例2と同様であったが、Si基板の主表面の温度が550℃でSi0.0004C0.0006Al0.4995N0.4995層を成長させた。
比較例9は、基本的には本発明例2と同様であったが、Si基板の主表面の温度が550℃でSi0.005C0.005Al0.495N0.495層を成長させた。
比較例10は、基本的には本発明例2と同様であったが、Si基板の主表面の温度が550℃で、Si0.25C0.25Al0.25N0.25層を成長させた。
比較例11は、基本的には本発明例2と同様であったが、Si基板の主表面の温度が550℃で、Si0.45C0.45Al0.05N0.05層を成長させた。
比較例12は、基本的には本発明例2と同様であったが、Si基板の主表面の温度が550℃で、Si0.495C0.495Al0.005N0.005層を成長させた。
比較例13は、基本的には本発明例2と同様であったが、Si基板の主表面の温度が550℃で、Si0.4995C0.4995Al0.0004N0.0006層を成長させた。
比較例14は、基本的には本発明例2と同様であったが、Si基板の主表面の温度が550℃で、Si0.4995C0.4995Al0.0006N0.0004層を成長させた。
比較例15は、基本的には本発明例2と同様であったが、Si基板の主表面の温度が550℃で、Si0.4995C0.4995Al0.0005N0.0005層を成長させた。
比較例16は、基本的には本発明例2と同様であったが、Si基板の主表面の温度が550℃で、Si0.4996C0.4994Al0.0005N0.0005層を成長させた。
比較例17は、基本的には本発明例2と同様であったが、Si基板の主表面の温度が550℃で、Si0.4994C0.4996Al0.0005N0.0005層を成長させた。
比較例18は、基本的には本発明例2と同様であったが、Si基板の主表面の温度が540℃で、AlN層を成長させた。
比較例19は、基本的には本発明例2と同様であったが、Si基板の主表面の温度を550℃で、AlN層を成長させた。
比較例20は、基本的には本発明例2と同様であったが、Si基板の主表面の温度が540℃で、SiC層を成長させた。
比較例21は、基本的には本発明例2と同様であったが、Si基板の主表面の温度が550℃で、SiC層を成長させた。
本発明例2~16および比較例3~21のSi(1-v-w-x)CwAlxNv層、AlN層およびSiC層の10mm四方の領域について、クラックの数を光学顕微鏡で測定した。クラックは、長手方向の総距離が1mm以上のものを1つとし、それ未満の長さのものはカウントしなかった。その結果を下記の表2に示す。
表2に示すように、540℃で成長させた本発明例2~8のv+x=0.9、0.999、0.99の組成のSi(1-v-w-x)CwAlxNv層のクラック数は7個であった。一方、550℃で成長させた比較例3~9のv+x=0.9、0.999、0.99の組成のSi(1-v-w-x)CwAlxNv層のクラック数は8個であった。
Claims (8)
- Si基板を準備する工程と、
前記Si基板上にSi(1-v-w-x)CwAlxNv層(0<v<1、0<w<1、0<x<1、0<v+w+x<1)を550℃未満の温度で成長させる工程とを備えた、Si(1-v-w-x)CwAlxNv基材の製造方法。 - 前記成長させる工程後に、前記Si基板を除去する工程をさらに備えた、請求項1に記載のSi(1-v-w-x)CwAlxNv基材の製造方法。
- 前記成長させる工程では、パルスレーザー堆積法により前記Si(1-v-w-x)CwAlxNv層を成長させる、請求項1または2に記載のSi(1-v-w-x)CwAlxNv基材の製造方法。
- 請求項1~3のいずれかに記載のSi(1-v-w-x)CwAlxNv基材の製造方法によりSi(1-v-w-x)CwAlxNv基材を製造する工程と、
前記Si(1-v-w-x)CwAlxNv層上にAl(1-y-z)GayInzN層(0≦y≦1、0≦z≦1、0≦y+z≦1)を成長させる工程とを備えた、エピタキシャルウエハの製造方法。 - Si(1-v-w-x)CwAlxNv層(0<v<1、0<w<1、0<x<1、0<v+w+x<1)を備えたSi(1-v-w-x)CwAlxNv基材であって、
前記Si(1-v-w-x)CwAlxNv層の10mm四方の領域において1mm以上のクラックが、1>v+x>0.5では7個以下、0.5≧v+x>0.1では5個以下、0.1≧v+x>0では3個以下であることを特徴とする、Si(1-v-w-x)CwAlxNv基材。 - 主表面を有するSi基板をさらに備え、
前記Si(1-v-w-x)CwAlxNv層は、前記Si基板の前記主表面上に形成されている、請求項5に記載のSi(1-v-w-x)CwAlxNv基材。 - 前記Si(1-v-w-x)CwAlxNv層は、X線回折法で測定されるSiCの回折ピークとAlNの回折ピークとの間に回折ピークを有する、請求項5または6に記載のSi(1-v-w-x)CwAlxNv基材。
- 請求項5~7のいずれかに記載のSi(1-v-w-x)CwAlxNv基材と、
前記Si(1-v-w-x)CwAlxNv層上に形成されたAl(1-y-z)GayInzN層(0≦y≦1、0≦z≦1、0≦y+z≦1)とを備えた、エピタキシャルウエハ。
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EP09735559.8A EP2302110B1 (en) | 2008-04-24 | 2009-04-17 | Method of manufacturing a si(1-v-w-x)cwalxnv substrate, method of manufacturing an epitaxial wafer, si(1-v-w-x)cwalxnv substrate, and epitaxial wafer |
US12/989,015 US8540817B2 (en) | 2008-04-24 | 2009-04-17 | Method of manufacturing a Si(1-v-w-x)CwAlxNv substrate, method of manufacturing an epitaxial wafer, Si(1-v-w-x)CwAlxNv substrate, and epitaxial wafer |
CN2009801143989A CN102016135B (zh) | 2008-04-24 | 2009-04-17 | 制造Si(1-v-w-x)CwAlxNv衬底的方法、制造外延晶片的方法、Si(1-v-w-x)CwAlxNv衬底以及外延晶片 |
KR1020107020566A KR101526632B1 (ko) | 2008-04-24 | 2009-04-17 | Si(1-v-w-x)CwAlxNv 기재의 제조 방법, 에피택셜 웨이퍼의 제조 방법, Si(1-v-w-x)CwAlxNv 기재 및 에피택셜 웨이퍼 |
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JP2009056913A JP2009280484A (ja) | 2008-04-24 | 2009-03-10 | Si(1−v−w−x)CwAlxNv基材の製造方法、エピタキシャルウエハの製造方法、Si(1−v−w−x)CwAlxNv基材およびエピタキシャルウエハ |
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US (1) | US8540817B2 (ja) |
EP (1) | EP2302110B1 (ja) |
JP (1) | JP2009280484A (ja) |
KR (1) | KR101526632B1 (ja) |
CN (1) | CN102016135B (ja) |
WO (1) | WO2009131061A1 (ja) |
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JP5621199B2 (ja) * | 2008-04-24 | 2014-11-05 | 住友電気工業株式会社 | Si(1−v−w−x)CwAlxNv基材の製造方法、エピタキシャルウエハの製造方法、Si(1−v−w−x)CwAlxNv基材およびエピタキシャルウエハ |
JP2009280903A (ja) * | 2008-04-24 | 2009-12-03 | Sumitomo Electric Ind Ltd | Si(1−v−w−x)CwAlxNv基材の製造方法、エピタキシャルウエハの製造方法、Si(1−v−w−x)CwAlxNv基材およびエピタキシャルウエハ |
Citations (2)
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US6086672A (en) * | 1998-10-09 | 2000-07-11 | Cree, Inc. | Growth of bulk single crystals of aluminum nitride: silicon carbide alloys |
JP2005506695A (ja) * | 2001-10-16 | 2005-03-03 | アリゾナ ボード オブ リージェンツ ア ボディー コーポレート アクティング オン ビハーフ オブ アリゾナ ステート ユニバーシティ | 四元ワイドバンドギャップ半導体の低温エピタキシャル成長 |
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US4382837A (en) * | 1981-06-30 | 1983-05-10 | International Business Machines Corporation | Epitaxial crystal fabrication of SiC:AlN |
JPS61291495A (ja) | 1985-06-18 | 1986-12-22 | Sharp Corp | 炭化珪素単結晶基板の製造方法 |
JPH067594B2 (ja) * | 1987-11-20 | 1994-01-26 | 富士通株式会社 | 半導体基板の製造方法 |
JPH04167477A (ja) | 1990-10-31 | 1992-06-15 | Toshiba Corp | 半導体素子 |
JP3754294B2 (ja) * | 2000-12-28 | 2006-03-08 | 株式会社東芝 | 炭化珪素単結晶基板の製造方法及び半導体装置の製造方法 |
US6911084B2 (en) * | 2001-09-26 | 2005-06-28 | Arizona Board Of Regents | Low temperature epitaxial growth of quaternary wide bandgap semiconductors |
KR100659579B1 (ko) * | 2004-12-08 | 2006-12-20 | 한국전자통신연구원 | 발광 소자 및 발광 소자의 제조방법 |
CN102130234A (zh) * | 2005-10-29 | 2011-07-20 | 三星电子株式会社 | 半导体器件的制造方法 |
US7371282B2 (en) * | 2006-07-12 | 2008-05-13 | Northrop Grumman Corporation | Solid solution wide bandgap semiconductor materials |
US20080277778A1 (en) * | 2007-05-10 | 2008-11-13 | Furman Bruce K | Layer Transfer Process and Functionally Enhanced Integrated Circuits Products Thereby |
JP2009280903A (ja) * | 2008-04-24 | 2009-12-03 | Sumitomo Electric Ind Ltd | Si(1−v−w−x)CwAlxNv基材の製造方法、エピタキシャルウエハの製造方法、Si(1−v−w−x)CwAlxNv基材およびエピタキシャルウエハ |
JP5621199B2 (ja) * | 2008-04-24 | 2014-11-05 | 住友電気工業株式会社 | Si(1−v−w−x)CwAlxNv基材の製造方法、エピタキシャルウエハの製造方法、Si(1−v−w−x)CwAlxNv基材およびエピタキシャルウエハ |
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- 2009-04-17 KR KR1020107020566A patent/KR101526632B1/ko not_active IP Right Cessation
- 2009-04-17 EP EP09735559.8A patent/EP2302110B1/en not_active Not-in-force
- 2009-04-17 CN CN2009801143989A patent/CN102016135B/zh not_active Expired - Fee Related
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US6086672A (en) * | 1998-10-09 | 2000-07-11 | Cree, Inc. | Growth of bulk single crystals of aluminum nitride: silicon carbide alloys |
JP2005506695A (ja) * | 2001-10-16 | 2005-03-03 | アリゾナ ボード オブ リージェンツ ア ボディー コーポレート アクティング オン ビハーフ オブ アリゾナ ステート ユニバーシティ | 四元ワイドバンドギャップ半導体の低温エピタキシャル成長 |
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ROUCKA, R. ET AL.: "Low-temperature growth of SiCAlN films of high hardness on Si(lll) substrates", APPL. PHYS. LETT., vol. 79, no. 18, 29 October 2001 (2001-10-29), pages 2880 - 2882, XP012029248 * |
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US8540817B2 (en) | 2013-09-24 |
KR20100133978A (ko) | 2010-12-22 |
EP2302110A1 (en) | 2011-03-30 |
JP2009280484A (ja) | 2009-12-03 |
US20110039071A1 (en) | 2011-02-17 |
EP2302110A4 (en) | 2013-06-05 |
KR101526632B1 (ko) | 2015-06-05 |
CN102016135B (zh) | 2013-01-02 |
CN102016135A (zh) | 2011-04-13 |
EP2302110B1 (en) | 2015-01-28 |
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