WO2009092209A1 - Procédé de commande d'écran à plasma - Google Patents

Procédé de commande d'écran à plasma Download PDF

Info

Publication number
WO2009092209A1
WO2009092209A1 PCT/CN2008/071855 CN2008071855W WO2009092209A1 WO 2009092209 A1 WO2009092209 A1 WO 2009092209A1 CN 2008071855 W CN2008071855 W CN 2008071855W WO 2009092209 A1 WO2009092209 A1 WO 2009092209A1
Authority
WO
WIPO (PCT)
Prior art keywords
electrode
sustain
discharge
period
address
Prior art date
Application number
PCT/CN2008/071855
Other languages
English (en)
Chinese (zh)
Inventor
Xiong Zhang
Jiajia Wen
Lanlan Yang
Yan TU
Lifeng Zhu
Baoping Wang
Qingyuan Lin
Original Assignee
Nanjing Huaxian High Technology Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nanjing Huaxian High Technology Co., Ltd. filed Critical Nanjing Huaxian High Technology Co., Ltd.
Publication of WO2009092209A1 publication Critical patent/WO2009092209A1/fr

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
    • G09G3/294—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for lighting or sustain discharge

Definitions

  • the invention relates to a driving method of a plasma display panel, in particular to a cyclic display driving method which combines the advantages of the prior art opposite discharge driving method and surface discharge driving method, in particular to a shadow mask plasma
  • the cyclic display driving method of the display panel is a driving method of a plasma display panel, in particular to a cyclic display driving method which combines the advantages of the prior art opposite discharge driving method and surface discharge driving method, in particular to a shadow mask plasma.
  • the structure of the shadow mask type plasma display panel currently used mainly includes a front substrate, a rear substrate, and a shadow mask.
  • the front substrate is a scan electrode, a dielectric layer and a protective layer formed on the surface of the dielectric layer from the glass substrate;
  • the rear substrate is an address electrode perpendicular to the scan electrode from the glass substrate, and the dielectric layer and the dielectric layer are formed on the dielectric layer.
  • the protective layer sandwiched between the front and rear substrates is a thin metal mesh plate comprising a mesh array processed from a conductive material such as iron or an alloy thereof.
  • the front substrate, the shadow mask and the rear substrate are assembled and sealed, and then filled with a predetermined working gas, such as various inert gases, to form a shadow mask plasma display panel.
  • the shadow mask type plasma display panel mainly adopts two working principles of a counter discharge and a surface discharge.
  • the working principle of the counter-discharge is as follows: first, a high-voltage narrow pulse or a ramp pulse erase signal is applied between the address electrode group and the scan electrode to erase the wall charge accumulated in the last discharge; and then add a scan electrode
  • the high pulse addressing voltage selects the row, and simultaneously applies a data pulse of the row on the address electrode.
  • the difference between the voltage amplitude of the data pulse and the scan voltage is higher than the ignition voltage between the scan electrode and the address electrode, and the trigger discharge is controlled.
  • a wall charge distribution corresponding to the desired display information is formed in the row; after the initial discharge of the entire screen image is completed line by line, a sustain pulse is applied between the scan electrode group and the address electrode to display the frame image.
  • This cycle allows you to display the image frame by frame.
  • the working principle of the surface discharge is as follows: First, a positive pulse is applied to the address electrode, and a negative pulse is applied to the scan electrode. When the voltage between the address electrode and the scan electrode is greater than the ignition voltage, discharge occurs first, and the sustain discharge is accumulated. The required wall charge, while the unit is in a lit state, and then a positive sustain pulse is alternately applied to the sustain electrode and the scan electrode, and the lit discharge cell is kept lit by the combination of the wall charge and the sustain pulse.
  • the counter-discharge structure is adopted, the discharge path is short, and the discharge area is far from the phosphor, so the discharge efficiency is low; the surface discharge is adopted. Structure, although the discharge path becomes long and the discharge efficiency is improved, the brightness of the surface discharge is weaker than that of the opposite discharge, and the sustain voltage required for the surface discharge is relatively high.
  • the existing surface discharge shadow mask plasma display panel and the opposite discharge shadow mask plasma display panel have some disadvantages.
  • the object of the present invention is to solve the problem that the conventional shadow mask plasma display panel has low parallel discharge efficiency, low surface discharge brightness and high maintenance voltage, and a combination of three electrodes is formed.
  • a cycle display driving method of a new shadow mask type plasma display panel which has advantages of discharge and surface discharge, and improved luminous efficiency and brightness.
  • a cyclic display driving method for a shadow mask type plasma display panel which is characterized in that a memory display mode is adopted, and a plurality of subfields are arranged in a time period for displaying one frame of image, each subfield consisting of an address period, a sustain period, and an erasure
  • the composition of the period, the addressing period completes the ignition of the pixels of the full screen in turn
  • each sustain period consists of three stages, the first stage mainly performs the opposite discharge between the scan electrode and the address electrode, and the second stage mainly scans.
  • the surface discharge between the electrode and the sustain electrode, the third stage mainly performs the opposite discharge between the sustain electrode and the address electrode, and realizes a cyclic discharge in a sustain period to maintain the gas discharge state at the pixel point that is ignited during the address period.
  • the erasing period uses an erase pulse to complete the neutralization of the charged particles in the discharge space and the erasing of the wall charges on the surface of the medium.
  • a positive voltage pulse is applied to the address electrode during the address period, and a negative voltage pulse is applied to the scan electrode and the sustain electrode, wherein the voltage amplitude of the scan electrode is either the same as or different from the voltage amplitude of the sustain electrode.
  • each sustain period consists of three stages.
  • the first stage scan electrode applies a positive voltage pulse, and the sustain electrode and the address electrode remain in a ground state, mainly performing a counter discharge between the scan electrode and the address electrode;
  • the two-stage sustain electrode applies a positive voltage pulse, the scan electrode and the address electrode remain in a ground state, mainly performing surface discharge between the scan electrode and the sustain electrode;
  • the third stage sustain electrode and the scan electrode apply a negative voltage pulse, and the address electrode remains grounded
  • the state mainly performs the opposite discharge between the sustain electrode and the address electrode, wherein the voltage amplitudes of the sustain electrode and the scan electrode are either the same or different.
  • the voltage pulse width of the first phase of each sustain period, the voltage pulse width of the second phase, and the voltage pulse width of the third phase are either the same or different.
  • the shadow mask can serve as a fourth electrode on which a voltage pulse waveform is applied.
  • the present invention proposes to use a shadow mask type cyclic discharge driving waveform to optimize the brightness and efficiency.
  • a shadow mask type cyclic discharge driving waveform Opposite discharge, surface discharge
  • the experimental results of the cyclic discharge show that the discharge intensity of the cyclic discharge is higher, and the discharge efficiency is between the surface discharge and the opposite discharge.
  • the discharge is expanded by the cyclic discharge, and the distance from the phosphor becomes smaller, thereby making the luminous efficiency and The brightness is optimized.
  • FIG. 1 is a schematic view showing the structure of a three-electrode shadow mask type plasma display panel.
  • Fig. 2 is a schematic diagram showing a conventional storage timing mode with eight subfields showing 256 levels of gray.
  • Fig. 3 is a schematic view showing the operation waveforms of the electrodes of the shadow mask type three-electrode surface discharge in a single subfield.
  • Fig. 4 is a schematic diagram showing the working waveforms of the respective electrodes of the shadow mask type three-electrode cyclic discharge in a single subfield.
  • Fig. 5 is a schematic diagram showing the working waveform of each electrode of a shadow mask type three-electrode cyclic discharge in a single subfield.
  • a cyclic display driving method for a shadow mask type plasma display panel adopts a memory display mode, and at least one subfield is arranged in a time for displaying one frame of image, and each subfield is composed of an address period, a sustain period and an erasing period.
  • the addressing period sequentially completes the ignition of each pixel of the full screen.
  • Each sustain period consists of three phases. The first phase performs the opposite discharge between the scan electrode and the address electrode, and the second phase performs the scan electrode and the sustain electrode.
  • the opposite phase between the sustain electrode and the address electrode is performed, and a cyclic discharge is realized in a sustain period, so that the pixel point that is ignited during the address period maintains the gas discharge state and emits light, and erases
  • the neutralization of the charged particles in the discharge space and the erasing of the wall charges on the surface of the medium are performed by using an erase pulse.
  • the front substrate 1 is a three-electrode shadow mask plasma display panel including a front substrate 1, a rear substrate 2, and a shadow mask 3, wherein the shadow mask 3 is packaged between the front and rear substrates 1, 2, and the front substrate 1 is mainly Formed by the front substrate glass substrate 4, the first electrode pair 5, 6, the dielectric layer 7, and the protective film 8, wherein the first electrode pairs 5, 6 are arranged in parallel on the front substrate glass substrate 4, which may be transparent conductive
  • An electrode composed of a film IT0 the electrode 5 is referred to as a sustain electrode, the electrode 6 is referred to as a scan electrode, the dielectric layer 7 is overlaid on the first electrode pair 5, 6, and the protective film 8 is overlying the dielectric layer 7;
  • 2 is mainly composed of a rear substrate glass substrate 9, a second electrode 10, and a dielectric layer 11, wherein the second electrode 10 is on the rear substrate glass substrate 9, the dielectric layer 11 is covered on the second electrode 10, and the second electrode 10 is usually
  • the column electrode group or the address electrode is perpendicular
  • Omm includes a conductive plate of an array of funnel-shaped mesh holes 12, and the upper opening 13 of the funnel-shaped mesh hole 12 opposite to the front substrate 1 has a lower opening 14 opposite to the rear substrate 2.
  • 10 to 20 times the area the opening width 15 of each funnel-shaped mesh hole 12 is 2 to 4 times the width of the lower opening 16; the first electrode pairs 5, 6 are arranged in parallel, respectively, and the funnel shape on the shadow mask 3
  • the two ends of the upper opening 13 of the mesh hole 12 correspond to each other, and the second electrode 10 corresponds to the lower opening 14 of the funnel-shaped mesh hole 12 on the shadow mask 3, and the lower opening width 16 of each mesh hole 12 is
  • the second electrode 10 has a width 17 of 1 to 2 times, the upper opening length 19 is 1.
  • the shadow mask 3, the first electrode pair 5, 6 covering the dielectric layer 7 and the protective layer 8, and the second electrode 10 covered with the dielectric layer 11 constitute a basic unit of a dielectric barrier type AC composite discharge type, in which the medium is blocked A visible light emitting region is provided in the basic unit of the AC composite discharge type.
  • a write pulse exceeding the ignition voltage is required to discharge the discharge space at the intersection of the surface electrode and the address electrode, that is, the selected pixel generates a gas discharge, and then is maintained by applying a continuous AC voltage.
  • the discharge state of the pixel during which the discharge gas continuously emits ultraviolet light, and the phosphor on the wall of the shadow mask mesh around the discharge discharge space emits light of a corresponding color, and the AC voltage itself is insufficient to sustain other discharges to cause other undischarged pixels.
  • a discharge is generated. If a three-electrode shadow mask plasma display is desired to perform a full-color motion picture such as a television or computer display terminal, a gray scale display mode is required.
  • Figure 2 shows a memory timing scheme with eight subfields that can display 256 levels of gray.
  • the motion picture is displayed at a speed of 60 frames per second, that is, one frame of still image is displayed every 16.6 milliseconds.
  • the storage timing mode with eight subfields divides the display time of one frame into eight subfields, each of which contains an address period, a sustain period, and an erase period.
  • Figure 3 shows the working waveform of each electrode of a shadow mask type three-electrode surface discharge in a single subfield.
  • the scan electrode is applied with a negative scan pulse V réelle, the positive data voltage V AW is applied to the address electrode, and the voltage difference between the two electrodes exceeds the ignition voltage, so that the selected pixel of the row enters the ignited state.
  • the sustain electrode is kept in a grounded state, and all the rows are scanned to complete the addressing of the entire screen pixel.
  • All the illuminated cells accumulate wall charges in the discharge space to prepare for sustaining the discharge; during the maintenance period, during maintenance A positive sustain pulse V s is alternately applied to the electrode and the scan electrode, and the address electrode maintains a ground state, and an alternating current sustaining action is generated for the discharge space of each pixel, and a sustain discharge is performed for the cell that is lit during the address period, and the address period is not.
  • the bright unit is still in a non-discharged state because it does not accumulate wall charges; during the erasing period, the space-charged particles in the last state of the discharge are neutralized by an erase pulse, which does not cause discharge of the unlit unit, and simultaneously wipes
  • the shadow mask can maintain the floating potential throughout the process, and the shadow mask can also be used as the fourth electrode to apply appropriate electric power. Waveform thereof.
  • Example 2 As shown in Figure 1, 4.
  • the three-electrode shadow mask plasma display panel shown in FIG. 1 includes a front substrate 1, a rear substrate 2, and a shadow mask 3, wherein the shadow mask 3 is packaged between the front and rear substrates 1, 2, and the front substrate 1 is mainly composed of The front substrate glass substrate 4, the first electrode pair 5, 6, the dielectric layer 7, and the protective film 8 are composed, wherein the first electrode pair 5, 6 is arranged in parallel on the front substrate glass substrate 4, which may be a transparent conductive film.
  • the electrode composed of IT0, the electrode 5 is referred to as a sustain electrode, the electrode 6 is referred to as a scan electrode, the dielectric layer 7 is overlaid on the first electrode pair 5, 6, and the protective film 8 is overlying the dielectric layer 7;
  • 0mm including a funnel-shaped net Conductive plate of array of cells 12, said funnel-shaped net
  • the area of the upper opening 13 of the hole 12 opposite to the front substrate 1 is 10 to 20 times the area of the lower opening 14 opposite to the rear substrate 2, and the opening width 15 of each of the funnel-shaped mesh holes 12 is 2 to the width of the lower opening 16. 4 times; the first electrode pairs 5, 6 are arranged in parallel, respectively corresponding to the two ends of the upper opening 13 of the funnel-shaped mesh hole 12 on the shadow mask 3, and the second electrode 10 and the funnel-shaped net on the shadow mask 3 5 ⁇ 2 ⁇
  • the lower opening length 18 is 1.
  • the first electrode pair 5, 6 has the same electrode width 20, and the upper opening length 20 is 1.25 ⁇ 5 times the parallel spacing 21 between the first electrode pairs 5, 6.
  • the mesh holes 12 and the first electrode pair 5, 6 and the second electrode 10 intersect perpendicularly.
  • the shadow mask 3, the first electrode pair 5, 6 covering the dielectric layer 7 and the protective layer 8, and the second electrode 10 covered with the dielectric layer 11 constitute a basic unit of a dielectric barrier type AC composite discharge type, in which the medium is blocked A visible light emitting region is provided in the basic unit of the AC composite discharge type.
  • a driving waveform as shown in FIG. 4 is applied to the scan electrodes and the sustain electrodes of the front substrate 1 and the address electrodes of the rear substrate 2.
  • the scan electrode applies a negative voltage pulse V wy
  • the sustain electrode applies a negative voltage pulse V wx
  • the address electrode applies a positive voltage pulse V a to generate a scan electrode and an address between the sustain electrode and the address electrode.
  • positive wall charges are accumulated on the dielectric layer near the scan electrode and the dielectric layer near the sustain electrode in the discharge space, and negative wall charges are accumulated on the dielectric layer near the address electrode, and the wall voltage formed by the wall charge is maintained.
  • each sustain period consists of three phases P1, P2, and P3.
  • the voltage pulse width of the PI phase is tl.
  • the scan electrodes apply positive voltage pulses V ys , pl , and the sustain electrodes and the address electrodes remain grounded.
  • the opposite discharge between the scan electrode and the address electrode is performed, negative wall charges are accumulated on the dielectric layer near the scan electrode, and positive wall charges are accumulated on the dielectric layer near the address electrode; the voltage pulse width of the P2 phase is t2,
  • the sustain electrode applies a positive voltage pulse V xs , p2 , and the scan electrode and the address electrode remain in a ground state, mainly performing surface discharge between the scan electrode and the sustain electrode, and a negative wall charge is accumulated on the dielectric layer near the sustain electrode, near the scan electrode.
  • the positive wall charge accumulates on the dielectric layer; the voltage pulse width of the P3 phase is t3, the address electrode remains grounded, the sustain electrode applies a negative voltage pulse Vxs , p3 , and the scan electrode
  • the negative voltage pulse v ys , p3 is applied to mainly perform the opposite discharge between the sustain electrode and the address electrode, the positive wall charge is accumulated on the dielectric layer near the sustain electrode, and the negative wall charge is accumulated on the dielectric layer near the address electrode.
  • the discharge space still accumulates wall charges and enters the erasing period. During the erasing period, the space-charged particles in the last state of the discharge are neutralized by an erase pulse, and the discharge of the unlit unit is not caused. Where tl, t2, and t3 have the same value.
  • the shadow mask maintains a floating potential throughout the process, and the shadow mask can also be used as a fourth electrode to apply a suitable voltage waveform thereon.
  • a driving waveform as shown in FIG. 5 is applied to the scanning electrodes and the sustain electrodes of the front substrate 1 and the address electrodes of the rear substrate 2, and the shadow mask employs a floating potential.
  • the scan electrode applies a negative voltage pulse V wy
  • the sustain electrode applies a negative voltage pulse V wx
  • the address electrode applies a positive voltage pulse V a to generate a scan electrode and an address electrode, between the sustain electrode and the address electrode.
  • each sustain period consists of three phases P1, P2, and P3.
  • the voltage pulse width of the PI phase is tl.
  • the scan electrode applies a positive voltage pulse V ys , pl , and the sustain electrode and the address electrode remain grounded.
  • the opposite discharge between the scan electrode and the address electrode is performed, negative wall charges are accumulated on the dielectric layer near the scan electrode, and positive wall charges are accumulated on the dielectric layer near the address electrode; the voltage pulse width of the P2 phase is t2,
  • the sustain electrode applies positive voltage pulses V xs , p2 , and the scan electrode and the address electrode remain in a ground state, mainly performing surface discharge between the scan electrode and the sustain electrode, and a negative wall charge is accumulated on the dielectric layer near the sustain electrode, near the scan electrode.
  • the positive wall charge is accumulated on the dielectric layer; the voltage pulse width of the P3 phase is t3, the address electrode remains grounded, the sustain electrode applies a negative voltage pulse Vxs , p3 , and the scan electrode applies a negative voltage pulse Vys , p3 , mainly The opposite discharge between the sustain electrode and the address electrode, the positive wall charge accumulated on the dielectric layer near the sustain electrode, near the address electrode.
  • the negative wall charge accumulates on the dielectric layer, and the wall space charges still accumulate in the discharge space after the end of the sustain period, entering the erasing period. During the erasing period, the space-charged particles in the last state of the discharge are neutralized by an erase pulse, and the discharge of the unlit unit is not caused.
  • the values of tl, t2, and t3 are different.
  • the shadow mask maintains a floating potential throughout the process, and the shadow mask can also be used as a fourth electrode to apply a suitable voltage waveform thereon.

Abstract

La présente invention concerne un procédé de commande d'écran à plasma (PDP) de type à masque perforé. Au moins un sous-champ est défini lors de l'affichage d'une image de trame. Chaque sous-champ comprend une période d'adresse, une période de maintien et une période d'effacement. Chaque période de maintien comprend trois phases. Dans la première phase, une décharge opposée est réalisée entre l'électrode de balayage et l'électrode d'adresse. Dans la deuxième phase, une décharge de surface est réalisée entre l'électrode de balayage et l'électrode de maintien. Dans la troisième phase, une décharge opposée est réalisée entre l'électrode de maintien et l'électrode d'adresse.
PCT/CN2008/071855 2008-01-24 2008-08-01 Procédé de commande d'écran à plasma WO2009092209A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN 200810018789 CN100530300C (zh) 2008-01-24 2008-01-24 荫罩式等离子体显示板的循环显示驱动方法
CN200810018789.8 2008-01-24

Publications (1)

Publication Number Publication Date
WO2009092209A1 true WO2009092209A1 (fr) 2009-07-30

Family

ID=39858685

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2008/071855 WO2009092209A1 (fr) 2008-01-24 2008-08-01 Procédé de commande d'écran à plasma

Country Status (2)

Country Link
CN (1) CN100530300C (fr)
WO (1) WO2009092209A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100530300C (zh) * 2008-01-24 2009-08-19 南京华显高科有限公司 荫罩式等离子体显示板的循环显示驱动方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1504982A (zh) * 2002-11-29 2004-06-16 松下电器产业株式会社 等离子显示装置及其驱动方法
KR20060011215A (ko) * 2004-07-29 2006-02-03 엘지전자 주식회사 플라즈마 디스플레이 패널의 서스테인 구동방법
CN1912971A (zh) * 2005-08-09 2007-02-14 Lg电子株式会社 等离子显示装置及其驱动方法
CN1913083A (zh) * 2006-08-15 2007-02-14 南京华显高科有限公司 表面放电型荫罩式等离子体显示板
CN101162561A (zh) * 2007-11-26 2008-04-16 南京华显高科有限公司 荫罩式等离子体显示板的复合显示驱动方法
CN101226718A (zh) * 2008-01-24 2008-07-23 南京华显高科有限公司 荫罩式等离子体显示板的循环显示驱动方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1504982A (zh) * 2002-11-29 2004-06-16 松下电器产业株式会社 等离子显示装置及其驱动方法
KR20060011215A (ko) * 2004-07-29 2006-02-03 엘지전자 주식회사 플라즈마 디스플레이 패널의 서스테인 구동방법
CN1912971A (zh) * 2005-08-09 2007-02-14 Lg电子株式会社 等离子显示装置及其驱动方法
CN1913083A (zh) * 2006-08-15 2007-02-14 南京华显高科有限公司 表面放电型荫罩式等离子体显示板
CN101162561A (zh) * 2007-11-26 2008-04-16 南京华显高科有限公司 荫罩式等离子体显示板的复合显示驱动方法
CN101226718A (zh) * 2008-01-24 2008-07-23 南京华显高科有限公司 荫罩式等离子体显示板的循环显示驱动方法

Also Published As

Publication number Publication date
CN101226718A (zh) 2008-07-23
CN100530300C (zh) 2009-08-19

Similar Documents

Publication Publication Date Title
KR101078083B1 (ko) 플라즈마 디스플레이 장치
JP2002287694A (ja) プラズマディスプレイパネルの駆動方法、駆動回路及び画像表示装置
JP3259766B2 (ja) プラズマディスプレイパネルの駆動方法
JP4541108B2 (ja) プラズマディスプレイ装置
US20010024092A1 (en) Plasma display panel and driving method thereof
JP3532317B2 (ja) Ａｃ型ｐｄｐの駆動方法
JP3468284B2 (ja) プラズマディスプレイパネルの駆動方法
JP2005338120A (ja) プラズマディスプレイパネルの駆動方法
JP4636857B2 (ja) プラズマディスプレイ装置
KR100330030B1 (ko) 플라즈마 디스플레이 패널 및 그 구동방법
JP3559136B2 (ja) プラズマディスプレイパネルの駆動方法
JP2003036052A (ja) プラズマディスプレイ装置
JP2003167547A (ja) 交流面放電型プラズマディスプレイパネルの駆動方法
JP2000510613A (ja) マイクログルーブを有するディスプレイ・パネル及び操作方法
JP2001272949A (ja) プラズマディスプレイパネルの駆動方法
JP2001210238A (ja) Ａｃ型プラズマディスプレイパネルおよびその駆動方法
WO2006106720A1 (fr) Procédé d’excitation de panneau d’affichage plasma ca
WO2009092209A1 (fr) Procédé de commande d'écran à plasma
JPH09259767A (ja) Ａｃ型ｐｄｐ及びその駆動方法
KR100730284B1 (ko) 위상차를 갖는 보조 펄스를 이용하는 플라즈마 디스플레이패널의 구동방법
KR100578832B1 (ko) 플라즈마 디스플레이 패널의 구동 방법 및 플라즈마 표시장치
JP2004012939A (ja) 表示装置及び表示パネルの駆動方法
JPH11143424A (ja) Ａｃ型プラズマディスプレイの駆動方法
KR100553207B1 (ko) 플라즈마 표시패널 및 그의 구동방법
KR100570659B1 (ko) 플라즈마 디스플레이 패널의 구동 방법 및 플라즈마 표시장치

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 08783848

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 08783848

Country of ref document: EP

Kind code of ref document: A1