WO2009075078A1 - ジッタ印加回路および試験装置 - Google Patents

ジッタ印加回路および試験装置 Download PDF

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Publication number
WO2009075078A1
WO2009075078A1 PCT/JP2008/003608 JP2008003608W WO2009075078A1 WO 2009075078 A1 WO2009075078 A1 WO 2009075078A1 JP 2008003608 W JP2008003608 W JP 2008003608W WO 2009075078 A1 WO2009075078 A1 WO 2009075078A1
Authority
WO
WIPO (PCT)
Prior art keywords
transmission path
jitter
signal transmission
contact point
application circuit
Prior art date
Application number
PCT/JP2008/003608
Other languages
English (en)
French (fr)
Inventor
Atsuo Sawara
Yuichi Miyaji
Original Assignee
Advantest Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corporation filed Critical Advantest Corporation
Publication of WO2009075078A1 publication Critical patent/WO2009075078A1/ja

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/31708Analysis of signal quality
    • G01R31/31709Jitter measurements; Jitter generators

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dc Digital Transmission (AREA)
  • Monitoring And Testing Of Transmission In General (AREA)

Abstract

 入力端から出力端へと信号を伝送する信号伝送路と、信号伝送路上を伝播する信号に重畳すべきジッタに応じたジッタ制御電圧を出力端子から出力するジッタ制御部と、信号伝送路上において、接点より入力端側に直列に接続されたバッファ回路と、信号伝送路上において、バッファ回路と接点との間に直列に接続された直列抵抗と、信号伝送路上の接点とジッタ制御部の出力端子との間に設けられ、ジッタ制御電圧に応じて容量が変化する可変容量ダイオードと、を備えるジッタ印加回路を提供する。
PCT/JP2008/003608 2007-12-13 2008-12-04 ジッタ印加回路および試験装置 WO2009075078A1 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/955,391 2007-12-13
US11/955,391 US20090158100A1 (en) 2007-12-13 2007-12-13 Jitter applying circuit and test apparatus

Publications (1)

Publication Number Publication Date
WO2009075078A1 true WO2009075078A1 (ja) 2009-06-18

Family

ID=40754895

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/003608 WO2009075078A1 (ja) 2007-12-13 2008-12-04 ジッタ印加回路および試験装置

Country Status (3)

Country Link
US (1) US20090158100A1 (ja)
TW (1) TW200931036A (ja)
WO (1) WO2009075078A1 (ja)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9025693B2 (en) * 2012-05-14 2015-05-05 Broadcom Corporation On-chip interferers for standards compliant jitter tolerance testing
US10530422B2 (en) * 2016-02-18 2020-01-07 International Business Machines Corporation Behavioural circuit jitter model
JP7217204B2 (ja) * 2019-06-28 2023-02-02 株式会社アドバンテスト 信号処理装置および信号処理方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002368827A (ja) * 2001-04-03 2002-12-20 Agilent Technol Inc データ依存ジッタ及びレベル・ノイズを注入するためのフィルタ
WO2003067273A1 (fr) * 2002-02-06 2003-08-14 Fujitsu Limited Procede de diagnostic de tolerance de gigue, et dispositif correspondant
JP2005091108A (ja) * 2003-09-16 2005-04-07 Advantest Corp ジッタ発生器及び試験装置
WO2005109019A1 (ja) * 2004-05-11 2005-11-17 Advantest Corporation タイミング発生器及び半導体試験装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000100098A (ja) * 1998-09-17 2000-04-07 Fujitsu Ltd サーボ情報書込方法及び記憶装置
WO2002103379A1 (fr) * 2001-06-13 2002-12-27 Advantest Corporation Instrument destine a tester des dispositifs semi-conducteurs et procede destine a tester des dispositifs semi-conducteurs
JP4251800B2 (ja) * 2001-11-08 2009-04-08 株式会社アドバンテスト 試験装置
JP4324941B2 (ja) * 2004-06-21 2009-09-02 由起 長岡 レーザー駆動装置、光学式ヘッド、および光ディスクドライブ装置
JP4425735B2 (ja) * 2004-07-22 2010-03-03 株式会社アドバンテスト ジッタ印加回路、及び試験装置
CN101194426A (zh) * 2005-06-06 2008-06-04 三菱电机株式会社 模/数转换装置和数/模转换装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002368827A (ja) * 2001-04-03 2002-12-20 Agilent Technol Inc データ依存ジッタ及びレベル・ノイズを注入するためのフィルタ
WO2003067273A1 (fr) * 2002-02-06 2003-08-14 Fujitsu Limited Procede de diagnostic de tolerance de gigue, et dispositif correspondant
JP2005091108A (ja) * 2003-09-16 2005-04-07 Advantest Corp ジッタ発生器及び試験装置
WO2005109019A1 (ja) * 2004-05-11 2005-11-17 Advantest Corporation タイミング発生器及び半導体試験装置

Also Published As

Publication number Publication date
US20090158100A1 (en) 2009-06-18
TW200931036A (en) 2009-07-16

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