WO2009066479A1 - 薄膜トランジスタ及びその製造方法 - Google Patents

薄膜トランジスタ及びその製造方法 Download PDF

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Publication number
WO2009066479A1
WO2009066479A1 PCT/JP2008/059258 JP2008059258W WO2009066479A1 WO 2009066479 A1 WO2009066479 A1 WO 2009066479A1 JP 2008059258 W JP2008059258 W JP 2008059258W WO 2009066479 A1 WO2009066479 A1 WO 2009066479A1
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WO
WIPO (PCT)
Prior art keywords
thin
film transistor
microcrystalline silicon
gate insulating
insulating layer
Prior art date
Application number
PCT/JP2008/059258
Other languages
English (en)
French (fr)
Inventor
Masaharu Nishiura
Original Assignee
Fuji Electric Holdings Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Holdings Co., Ltd. filed Critical Fuji Electric Holdings Co., Ltd.
Priority to TW097133444A priority Critical patent/TW200935521A/zh
Publication of WO2009066479A1 publication Critical patent/WO2009066479A1/ja

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H01L29/7866—Non-monocrystalline silicon transistors
    • H01L29/78663—Amorphous silicon transistors
    • H01L29/78669—Amorphous silicon transistors with inverted-type structure, e.g. with bottom gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Thin Film Transistor (AREA)

Abstract

微結晶シリコンにより構成されたチャネル層を備える薄膜トランジスタを安価に製造する方法を提供することを目的とする。薄膜トランジスタ（４００）の備えるイントリンシック微結晶シリコン層（４０４）は、次のように形成することができる。ゲート絶縁層（１０３）の形成後に、ゲート絶縁層（１０３）の表面を、予め定めた時間にわたり水素を流してプラズマ処理する。ついで、プラズマ処理を継続している間に、原料ガスを導入してイントリンシック微結晶シリコンにより構成されたイントリンシック微結晶シリコン層（４０４）をゲート絶縁層（１０３）上に形成する。微結晶シリコンは、いわば水素の海の中でシリコンが活性化されて凝集することにより形成されるということから、この方法は、ゲート絶縁層（１０３）の表面を水素で満たして活性化し、その状態でシリコンを導入するものである。
PCT/JP2008/059258 2007-11-22 2008-05-20 薄膜トランジスタ及びその製造方法 WO2009066479A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW097133444A TW200935521A (en) 2007-11-22 2008-09-01 Thin-film transistor and process for producing the thin-film transistor

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2007-303665 2007-11-22
JP2007303665 2007-11-22
JP2008019658 2008-01-30
JP2008-019658 2008-01-30

Publications (1)

Publication Number Publication Date
WO2009066479A1 true WO2009066479A1 (ja) 2009-05-28

Family

ID=40667311

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/059258 WO2009066479A1 (ja) 2007-11-22 2008-05-20 薄膜トランジスタ及びその製造方法

Country Status (3)

Country Link
KR (1) KR20100086934A (ja)
TW (1) TW200935521A (ja)
WO (1) WO2009066479A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011133873A (ja) * 2009-11-24 2011-07-07 Semiconductor Energy Lab Co Ltd 表示装置

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI445181B (zh) 2012-02-08 2014-07-11 E Ink Holdings Inc 薄膜電晶體

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0794749A (ja) * 1993-09-22 1995-04-07 Toshiba Corp 薄膜トランジスタの製造方法
JPH0897427A (ja) * 1994-07-27 1996-04-12 Sharp Corp 薄膜半導体素子および薄膜トランジスタ並びにその製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0794749A (ja) * 1993-09-22 1995-04-07 Toshiba Corp 薄膜トランジスタの製造方法
JPH0897427A (ja) * 1994-07-27 1996-04-12 Sharp Corp 薄膜半導体素子および薄膜トランジスタ並びにその製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011133873A (ja) * 2009-11-24 2011-07-07 Semiconductor Energy Lab Co Ltd 表示装置

Also Published As

Publication number Publication date
KR20100086934A (ko) 2010-08-02
TW200935521A (en) 2009-08-16

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