WO2009063612A1 - シンセサイザ、シンセサイザモジュール、およびこれを用いた受信装置、電子機器 - Google Patents

シンセサイザ、シンセサイザモジュール、およびこれを用いた受信装置、電子機器 Download PDF

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Publication number
WO2009063612A1
WO2009063612A1 PCT/JP2008/003256 JP2008003256W WO2009063612A1 WO 2009063612 A1 WO2009063612 A1 WO 2009063612A1 JP 2008003256 W JP2008003256 W JP 2008003256W WO 2009063612 A1 WO2009063612 A1 WO 2009063612A1
Authority
WO
WIPO (PCT)
Prior art keywords
synthesizer
frequency
output signal
oscillator
same
Prior art date
Application number
PCT/JP2008/003256
Other languages
English (en)
French (fr)
Inventor
Akihiko Namba
Takeshi Fujii
Yasunobu Tsukio
Original Assignee
Panasonic Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corporation filed Critical Panasonic Corporation
Priority to CN200880116277A priority Critical patent/CN101861701A/zh
Priority to US12/742,793 priority patent/US8466716B2/en
Priority to JP2009541038A priority patent/JP4683153B2/ja
Publication of WO2009063612A1 publication Critical patent/WO2009063612A1/ja

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L1/00—Stabilisation of generator output against variations of physical values, e.g. power supply
    • H03L1/02—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only
    • H03L1/022—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature
    • H03L1/027—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature by using frequency conversion means which is variable with temperature, e.g. mixer, frequency divider, pulse add/substract logic circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

比較器（４）の出力信号に基づいて発振信号を出力する発振器（５）と、発振器（５）の出力信号を制御部（７）からの制御に基づいて分周する分周器（６）と、予め設定した周波数と基準発振信号に基づく周波数との誤差を検出する温度センサ（８）とを備え、比較器（４）は、分周器（６）からの出力信号とＭＥＭＳ発振器（２）からの出力信号とを比較して比較結果を示す信号を発振器（５）に出力し、制御部（７）は、温度センサ（８）の出力信号に基づいて分周器（６）の分周比を変化させると共に、分周比を過去の値に保持した状態で分周比を変化させることでシンセサイザの位相雑音の劣化を抑えることができる。
PCT/JP2008/003256 2007-11-14 2008-11-11 シンセサイザ、シンセサイザモジュール、およびこれを用いた受信装置、電子機器 WO2009063612A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN200880116277A CN101861701A (zh) 2007-11-14 2008-11-11 合成器、合成器模块、以及具有该合成器的接收装置、电子设备
US12/742,793 US8466716B2 (en) 2007-11-14 2008-11-11 Synthesizer, synthesizer module, and reception device and electronic device using same
JP2009541038A JP4683153B2 (ja) 2007-11-14 2008-11-11 シンセサイザ、シンセサイザモジュール、およびこれを用いた受信装置、電子機器

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-295428 2007-11-14
JP2007295428 2007-11-14

Publications (1)

Publication Number Publication Date
WO2009063612A1 true WO2009063612A1 (ja) 2009-05-22

Family

ID=40638467

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/003256 WO2009063612A1 (ja) 2007-11-14 2008-11-11 シンセサイザ、シンセサイザモジュール、およびこれを用いた受信装置、電子機器

Country Status (5)

Country Link
US (1) US8466716B2 (ja)
JP (1) JP4683153B2 (ja)
CN (1) CN101861701A (ja)
TW (1) TW200931812A (ja)
WO (1) WO2009063612A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011091583A (ja) * 2009-10-21 2011-05-06 Nippon Dempa Kogyo Co Ltd 周波数シンセサイザ

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103138749B (zh) * 2011-11-24 2015-09-09 无锡辐导微电子有限公司 改进的频率校正方法和装置
WO2015126498A2 (en) 2013-12-02 2015-08-27 The Regents Of The University Of California Micromechanical frequency divider
JP6554956B2 (ja) * 2015-07-14 2019-08-07 富士通株式会社 位相検出回路および信号再生回路
US9991898B1 (en) * 2016-11-16 2018-06-05 Perceptia Devices, Inc. Fractional-N jitter attenuator
CN113890517A (zh) * 2021-09-29 2022-01-04 电子科技大学 一种模拟频率比较器

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1028051A (ja) * 1996-07-12 1998-01-27 Sony Corp リセットキャンセル回路
JP2000312149A (ja) * 1999-04-27 2000-11-07 Fujitsu Ltd 位相比較器及びその省電力動作制御方法及び半導体集積回路
JP2003069426A (ja) * 2001-08-23 2003-03-07 Matsushita Electric Ind Co Ltd 周波数シンセサイザー
WO2004084403A1 (ja) * 2003-03-17 2004-09-30 Seiko Epson Corporation 発振器の特性自動補償装置、特性自動補償方法、特性自動補償プログラム、及び測位信号受信機
JP2007175577A (ja) * 2005-12-27 2007-07-12 Seiko Epson Corp Ｍｅｍｓ振動子

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03209917A (ja) 1990-01-11 1991-09-12 Japan Radio Co Ltd Ｐｌｌ方式の周波数シンセサイザ
US7436227B2 (en) * 2003-05-02 2008-10-14 Silicon Laboratories Inc. Dual loop architecture useful for a programmable clock source and clock multiplier applications
US7830954B2 (en) * 2006-06-14 2010-11-09 Broadcom Corporation Method and apparatus for I/Q imbalance compensation

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1028051A (ja) * 1996-07-12 1998-01-27 Sony Corp リセットキャンセル回路
JP2000312149A (ja) * 1999-04-27 2000-11-07 Fujitsu Ltd 位相比較器及びその省電力動作制御方法及び半導体集積回路
JP2003069426A (ja) * 2001-08-23 2003-03-07 Matsushita Electric Ind Co Ltd 周波数シンセサイザー
WO2004084403A1 (ja) * 2003-03-17 2004-09-30 Seiko Epson Corporation 発振器の特性自動補償装置、特性自動補償方法、特性自動補償プログラム、及び測位信号受信機
JP2007175577A (ja) * 2005-12-27 2007-07-12 Seiko Epson Corp Ｍｅｍｓ振動子

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011091583A (ja) * 2009-10-21 2011-05-06 Nippon Dempa Kogyo Co Ltd 周波数シンセサイザ

Also Published As

Publication number Publication date
CN101861701A (zh) 2010-10-13
US8466716B2 (en) 2013-06-18
US20100271088A1 (en) 2010-10-28
JPWO2009063612A1 (ja) 2011-03-31
TW200931812A (en) 2009-07-16
JP4683153B2 (ja) 2011-05-11

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