Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
  • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
  • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
  • H01L21/3065—Plasma etching; Reactive-ion etching
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
  • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
  • H01J37/32—Gas-filled discharge tubes
  • H01J37/32431—Constructional details of the reactor
  • H01J37/3244—Gas supply means
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
  • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
  • H01J2237/32—Processing objects by plasma generation
  • H01J2237/33—Processing objects by plasma generation characterised by the type of processing
  • H01J2237/334—Etching
  • H01J2237/3343—Problems associated with etching
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02041—Cleaning
  • H01L21/02082—Cleaning product to be cleaned
  • H01L21/02087—Cleaning of wafer edges

Definitions

• a plasma etching chamber more particularly, a plasma etching chamber capable of removing a film remaining at an edge of a plasma dry-etched wafer and particles deposited around the edge of the wafer through plasma etching.
• a film stacked as a pattern is typically formed throughout the entire surface of the wafer to an edge of the wafer.
• residues produced during a dry cleaning process for plasma etching the entire top surface of the wafer are not completely removed but deposited as particles throughout the top, side and bottom surfaces of the wafer at the edge of the wafer.
• FIG. 5 is a partial cross-sectional view of a plasma etching chamber according to a related art.
• the conventional plasma etching chamber includes a wafer chuck
• a gas distribution plate 14 is disposed beneath the plate 13 so as to guide a reaction gas to an edge side of the wafer.
• a moving rod 15 is disposed on the plate 13 to allow the plate 13 to ascend and descend.
• the conventional plasma etching chamber has a problem that the pressure of the reaction gas at the edge of the wafer is not uniform in the process of guiding the reaction gas supplied to a space between the plate 13 and the gas distribution plate 14 to the edge of the wafer.
• the conventional etching chamber has a problem that the edge of the gas distribution plate 14 is contaminated by plasma. Disclosure of Invention Technical Problem
• a plasma etching chamber includes a gas distribution plate guiding a reaction gas to the edge of the wafer; a plate disposed to be spaced apart from the gas distribution plate; and bumper portions protruding on at least one of opposite surfaces of the gas distribution plate and the plate to allow the pressure of the reaction gas moving to the edge of the wafer to be uniform.
• the plasma etching chamber may further include upper and lower electrodes disposed to correspond to each other at the edge of the wafer with the wafer interposed therebetween.
• the bumper portions may be alternately formed on the gas distribution plate and the plate.
• the bumper portions may be formed at an edge of the gas distribution plate or the plate.
• the bumper portions may be formed in a ring shape.
• a predetermined space may be maintained between the gas distribution plate and the plate by spacers.
• the spacer may have a height of 1 mm.
• the bumper portion may have a height of 0.6 mm.
• the gas distribution plate may further include a shield ring covering bottom and side surfaces of the edge thereof.
• the width of the shield ring may be from about 15% to about 40% of the radius of the gas distribution plate.
• a plasma etching chamber includes a gas distribution plate having a recessed groove formed at a bottom surface thereof; a baffle disposed in an inside of the recessed groove of the gas distribution plate to be spaced apart from the gas distribution plate, and guiding an inert gas supplied to the recessed groove; and bumper portions protruding on at least one of opposite surfaces of the gas distribution plate and the baffle to allow the pressure of the inert gas to be uniform.
• a plasma etching chamber includes a gas dis- tribution plate guiding a reaction gas to the edge of the wafer; and a shield ring formed at an edge of the gas distribution plate to prevent contamination of the gas distribution plate.
• the width of the shield ring may be from about 15% to about 40% of the radius of the gas distribution plate.
• Yttrium may be coated on a surface of the shield ring.
• bumper portions are formed on a gas distribution plate or a plate, so that a film or particles deposited at an edge of a wafer can be uniformly removed. Further, the optimum width of a shield ring is maintained, so that an amount of residues coming into a space between the gas distribution plate and the shield ring can be reduced, and replacement cost of the gas distribution plate can be saved by decreasing contamination of the gas distribution plate.
• FIG. 1 is a partial cross-sectional view of a plasma etching chamber.
• FIG. 2 is a partial cross-sectional view of the plasma etching chamber after a moving rod descends.
• FIG. 3 is a partial enlarged view of portion A of Fig. 1.
• FIG. 4 is a schematic plan view of a gas distribution plate.
• FIG. 5 is a partial cross-sectional view of a plasma etching chamber according to a related art. Mode for the Invention
• FIG. 1 is a partial cross-sectional view of a plasma etching chamber.
• FIG. 2 is a partial cross-sectional view of the plasma etching chamber after a moving rod descends.
• FIG. 3 is a partial enlarged view of portion A of FIG. 1.
• FIG. 4 is a schematic plan view of a gas distribution plate.
• the plasma etching chamber 100 includes a chamber wall
• the plate includes an upper plate 22 and a lower plate 23.
• the lower plate 23 is disposed beneath a bottom surface of the upper plate 22, and a ring-shaped upper electrode 24 is disposed along an edge of the lower plate 23.
• the upper electrode 24 is fixed to the upper plate 22 by a first bolt 241.
• a gas distribution plate 25 is disposed beneath the upper and lower plates 22 and 23 while being spaced apart from the upper and lower plates 22 and 23 with a predetermined spacing.
• the gas distribution plate 25 guides a reaction gas to an edge of a wafer.
• the reaction gas is supplied to the space between the lower plate 23 and the gas distribution plate 25.
• the gas distribution plate 25 may be made of an insulating material such as alumina oxide (Al O ).
• the lower plate 23 may be provided optionally.
• the gas distribution plate 25 may be fixed directly to the upper plate 22.
• the gas distribution plate 25 may be fixed to a protruding portion of the upper plate 22.
• the upper plate 22 may be protruded downwardly by the thickness of the removed lower plate 23, or may not be protruded.
• a recessed groove 251 is formed at the center of a bottom surface of the gas distribution plate 25, and a baffle 26 is disposed in an inside of the recessed groove 251.
• the baffle 26 allows an inert gas (e.g., nitrogen gas) supplied to the center of the wafer to be distributed.
• the baffle 26 may be provided optionally.
• a shield ring 27 is formed at bottom and side surfaces of an edge of the gas distribution plate 25 so as to adsorb residues such as polymer, which may be produced when the wafer is etched.
• the shield ring 27 is fixed to the gas distribution plate 25 by a second bolt 252, and may be formed to have a dielectric constant different from that of the gas distribution plate 25.
• the shield ring 27 may be made of sintered yttrium having a dielectric constant of 11
• the gas distribution plate 25 may be made of alumina oxide having a dielectric constant of 8.4. The difference of dielectric constants results in decrease of the accumulation of electric charges by plasma discharge at an unnecessary portion.
• the width Ll of the shield ring 27 may be set to be from about 15% to about 40% of the radius L2 of the gas distribution plate 25. If the width Ll of the shield ring is smaller than 15%, the shield ring 27 may not cover the gas distribution plate 25 when high-density plasma is formed, and etching residues may come into a space between the gas distribution plate 25 and the shield ring 27. If the width Ll of the shield ring 27 exceeds 40%, the shield ring 27 may cover an unnecessary portion of gas distribution plate 25, and manufacturing cost may be increased.
• the radius L2 of the gas distribution plate 25 may be from about 290 mm to about 300 mm, and the width Ll of the shield ring 27 may be from about 45mm to about 116 mm.
• Yttrium may be coated on surfaces of the gas distribution plate 25 and the shield ring
• Yttrium has excellent polymer adsorption property and superior chemical resistance. Therefore, yttrium allows particles to be adsorbed and removed without chemical modification during a cleaning process.
• a ring-shaped lower electrode 28 is disposed below the upper electrode 24 while being spaced apart from the upper plate 24 at a predetermined space.
• a wafer chuck 32 is disposed inside the lower electrode 28 with an insulating ring 30 interposed between the wafer chuck 32 and the lower electrode 28.
• the wafer chuck 32 is electrically connected to a typical plasma oscillator (not shown) to receive a high frequency applied from the plasma oscillator while vacuum adsorbing a wafer loaded on the top surface of the wafer chuck 32.
• the external diameter of the upper electrode 24 may be identical to that of the lower electrode 28. Accordingly, the shape of generated plasma may be completely symmetrical, so that it is possible to be operated as a low-capacity plasma oscillator.
• the wafer chuck 32 is perfectly insulated from the lower electrode 28 through an insulating layer 34 disposed below the wafer chuck 32.
• the plasma etching chamber 100 includes bumper portions 36 disposed in the space between the lower plate 23 and the gas distribution plate 25, through which the reaction gas is supplied.
• the bumper portion 36 is formed to protrude with a height H smaller than that of the spacing between the lower plate 23 and the gas distribution plate 25.
• the spacing between the gas distribution plate 25 and the lower plate 23 may be 1 mm, and the height of the bumper portion 36 may be 0.6 mm.
• the bumper portions 36 allow the pressure of the reaction gas at the edge of the wafer to be uniform by blocking the flow of the reaction gas.
• the bumper portions 36 may be alternately formed on the lower plate 23 and the gas distribution plate 25 along the progress direction of the reaction gas (see the curved arrow in FIG. 3). This is to lengthen the flow path of the reaction gas, thereby extending the time during which the reaction gas remains in the space between the lower plate 23 and the gas distribution plate 25.
• the number of bumper portions 36 may be varied depending on the pressure of the reaction gas.
• the bumper portion 36 may be formed at the edge of the gas distribution plate 25 so as to protrude in a ring shape.
• a plurality of spacers 37 providing the space between the gas distribution plate 25 and the lower plate 25 may be formed on a top surface of the gas distribution plate 25 at a predetermined distance.
• the bumper portion 36 is formed to have a height smaller than that of the spacer 37.
• the bumper portion 36 may be formed in a ring shape, the shape is not limited thereto. That is, the bumper portion 36 may be formed with various shapes, including, e.g. a rectangular shape.
• the bumper portions 36 blocks the flow of the reaction gas so that the pressure of the reaction gas at the edge of the wafer is maintained uniform at all positions, thereby generating uniform plasma. Accordingly, an etching rate of particles becomes identical for all positions. Further, because the optimum width of the shield ring 27 is maintained, contamination of the gas distribution plate caused by the plasma may be effectively prevented.
• the bumper portions 36 are formed on the gas distribution plate
• the aforementioned bumper portions may be formed on at least one of opposite surfaces of the recessed groove 251 and the baffle
• a film or particles deposited at an edge of a wafer can be uniformly removed, and replacement cost of a gas distribution plate can be saved by decreasing contamination of the gas distribution plate.

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• Engineering & Computer Science (AREA)
• Physics & Mathematics (AREA)
• Plasma & Fusion (AREA)
• Chemical & Material Sciences (AREA)
• Analytical Chemistry (AREA)
• General Physics & Mathematics (AREA)
• Condensed Matter Physics & Semiconductors (AREA)
• Manufacturing & Machinery (AREA)
• Computer Hardware Design (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Power Engineering (AREA)
• Drying Of Semiconductors (AREA)
• Plasma Technology (AREA)
• Cleaning Or Drying Semiconductors (AREA)

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• 2007
  • 2007-11-09 KR KR1020070114335A patent/KR101380861B1/ko active IP Right Grant
• 2008
  • 2008-10-31 CN CN2008801151016A patent/CN101855712B/zh active Active
  • 2008-10-31 US US12/734,576 patent/US20110139371A1/en not_active Abandoned
  • 2008-10-31 JP JP2010533002A patent/JP5485904B2/ja active Active
  • 2008-10-31 WO PCT/KR2008/006442 patent/WO2009061104A1/en active Application Filing
  • 2008-11-06 TW TW097142923A patent/TWI502641B/zh active

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