WO2009044659A1 - パターン形成方法 - Google Patents

パターン形成方法 Download PDF

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Publication number
WO2009044659A1
WO2009044659A1 PCT/JP2008/067256 JP2008067256W WO2009044659A1 WO 2009044659 A1 WO2009044659 A1 WO 2009044659A1 JP 2008067256 W JP2008067256 W JP 2008067256W WO 2009044659 A1 WO2009044659 A1 WO 2009044659A1
Authority
WO
WIPO (PCT)
Prior art keywords
forming method
pattern forming
layer
silicon oxide
pattern
Prior art date
Application number
PCT/JP2008/067256
Other languages
English (en)
French (fr)
Inventor
Katsura Hirai
Original Assignee
Konica Minolta Holdings, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Konica Minolta Holdings, Inc. filed Critical Konica Minolta Holdings, Inc.
Priority to JP2009536021A priority Critical patent/JPWO2009044659A1/ja
Publication of WO2009044659A1 publication Critical patent/WO2009044659A1/ja

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/12—Deposition of organic active material using liquid deposition, e.g. spin coating
    • H10K71/13—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/60—Forming conductive regions or layers, e.g. electrodes
    • H10K71/611—Forming conductive regions or layers, e.g. electrodes using printing deposition, e.g. ink jet printing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/32105—Oxidation of silicon-containing layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Formation Of Insulating Films (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)

Abstract

　本発明は、絶縁層を、塗布層及びそのプラズマ処理によって形成して、かつ、表面エネルギーを利用し、電極、或いは有機半導体層のパターン化を行うパターン形成方法を提供する。本発明のパターン形成方法は、基体上に設けられた珪素を含有する層を、酸化処理することにより、表面に酸化珪素を含有する層を形成した後、前記酸化珪素に、酸化珪素に結合する表面処理材料のパターンを形成することを特徴とする。
PCT/JP2008/067256 2007-10-05 2008-09-25 パターン形成方法 WO2009044659A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009536021A JPWO2009044659A1 (ja) 2007-10-05 2008-09-25 パターン形成方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-261859 2007-10-05
JP2007261859 2007-10-05

Publications (1)

Publication Number Publication Date
WO2009044659A1 true WO2009044659A1 (ja) 2009-04-09

Family

ID=40526087

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/067256 WO2009044659A1 (ja) 2007-10-05 2008-09-25 パターン形成方法

Country Status (2)

Country Link
JP (1) JPWO2009044659A1 (ja)
WO (1) WO2009044659A1 (ja)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011054877A (ja) * 2009-09-04 2011-03-17 Konica Minolta Holdings Inc 薄膜トランジスタの製造方法
JP2011216647A (ja) * 2010-03-31 2011-10-27 Dainippon Printing Co Ltd パターン形成体の製造方法、機能性素子の製造方法および半導体素子の製造方法
JP2011233858A (ja) * 2010-04-09 2011-11-17 Dainippon Printing Co Ltd 薄膜素子用基板の製造方法、薄膜素子の製造方法、薄膜トランジスタの製造方法、薄膜素子、および薄膜トランジスタ
JP2012216676A (ja) * 2011-03-31 2012-11-08 Dainippon Printing Co Ltd 有機半導体素子の製造方法
JP2012216683A (ja) * 2011-03-31 2012-11-08 Dainippon Printing Co Ltd 有機半導体素子の製造方法
WO2013084676A1 (ja) * 2011-12-08 2013-06-13 東京エレクトロン株式会社 有機トランジスタ及びその製造方法
US9024312B2 (en) 2009-09-30 2015-05-05 Dai Nippon Printing Co., Ltd. Substrate for flexible device, thin film transistor substrate for flexible device, flexible device, substrate for thin film element, thin film element, thin film transistor, method for manufacturing substrate for thin film element, method for manufacturing thin film element, and method for manufacturing thin film transistor
WO2015098392A1 (ja) * 2013-12-26 2015-07-02 ウシオ電機株式会社 パターン形成体の製造方法
WO2015137022A1 (ja) * 2014-03-14 2015-09-17 ソニー株式会社 電子デバイス及びその製造方法
WO2020045078A1 (ja) * 2018-08-30 2020-03-05 株式会社ニコン トランジスタの製造方法
WO2020045064A1 (ja) * 2018-08-30 2020-03-05 株式会社ニコン トランジスタの製造方法
WO2020175170A1 (ja) * 2019-02-27 2020-09-03 国立研究開発法人物質・材料研究機構 金属配線を形成する方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003059940A (ja) * 2001-08-08 2003-02-28 Fuji Photo Film Co Ltd ミクロファブリケーション用基板、その製造方法および像状薄膜形成方法
JP2003234522A (ja) * 2001-10-10 2003-08-22 Seiko Epson Corp 薄膜形成方法、電子デバイスの形成方法
JP2003309266A (ja) * 2002-04-17 2003-10-31 Konica Minolta Holdings Inc 有機薄膜トランジスタ素子の製造方法
JP2005191437A (ja) * 2003-12-26 2005-07-14 Ricoh Co Ltd 半導体装置、その製造方法、および表示装置
JP2007043055A (ja) * 2005-07-08 2007-02-15 Sekisui Chem Co Ltd 薄膜トランジスタ及びゲート絶縁膜
WO2007111191A1 (ja) * 2006-03-24 2007-10-04 Konica Minolta Holdings, Inc. 有機半導体薄膜、有機薄膜トランジスタ及びその製造方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003059940A (ja) * 2001-08-08 2003-02-28 Fuji Photo Film Co Ltd ミクロファブリケーション用基板、その製造方法および像状薄膜形成方法
JP2003234522A (ja) * 2001-10-10 2003-08-22 Seiko Epson Corp 薄膜形成方法、電子デバイスの形成方法
JP2003309266A (ja) * 2002-04-17 2003-10-31 Konica Minolta Holdings Inc 有機薄膜トランジスタ素子の製造方法
JP2005191437A (ja) * 2003-12-26 2005-07-14 Ricoh Co Ltd 半導体装置、その製造方法、および表示装置
JP2007043055A (ja) * 2005-07-08 2007-02-15 Sekisui Chem Co Ltd 薄膜トランジスタ及びゲート絶縁膜
WO2007111191A1 (ja) * 2006-03-24 2007-10-04 Konica Minolta Holdings, Inc. 有機半導体薄膜、有機薄膜トランジスタ及びその製造方法

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011054877A (ja) * 2009-09-04 2011-03-17 Konica Minolta Holdings Inc 薄膜トランジスタの製造方法
US9024312B2 (en) 2009-09-30 2015-05-05 Dai Nippon Printing Co., Ltd. Substrate for flexible device, thin film transistor substrate for flexible device, flexible device, substrate for thin film element, thin film element, thin film transistor, method for manufacturing substrate for thin film element, method for manufacturing thin film element, and method for manufacturing thin film transistor
JP2011216647A (ja) * 2010-03-31 2011-10-27 Dainippon Printing Co Ltd パターン形成体の製造方法、機能性素子の製造方法および半導体素子の製造方法
US8440518B2 (en) 2010-03-31 2013-05-14 Dai Nippon Printing Co., Ltd. Method for manufacturing a pattern formed body, method for manufacturing a functional element, and method for manufacturing a semiconductor element
JP2011233858A (ja) * 2010-04-09 2011-11-17 Dainippon Printing Co Ltd 薄膜素子用基板の製造方法、薄膜素子の製造方法、薄膜トランジスタの製造方法、薄膜素子、および薄膜トランジスタ
JP2012216676A (ja) * 2011-03-31 2012-11-08 Dainippon Printing Co Ltd 有機半導体素子の製造方法
JP2012216683A (ja) * 2011-03-31 2012-11-08 Dainippon Printing Co Ltd 有機半導体素子の製造方法
WO2013084676A1 (ja) * 2011-12-08 2013-06-13 東京エレクトロン株式会社 有機トランジスタ及びその製造方法
WO2015098392A1 (ja) * 2013-12-26 2015-07-02 ウシオ電機株式会社 パターン形成体の製造方法
JP2015126139A (ja) * 2013-12-26 2015-07-06 ウシオ電機株式会社 パターン形成体の製造方法
WO2015137022A1 (ja) * 2014-03-14 2015-09-17 ソニー株式会社 電子デバイス及びその製造方法
WO2020045078A1 (ja) * 2018-08-30 2020-03-05 株式会社ニコン トランジスタの製造方法
WO2020045064A1 (ja) * 2018-08-30 2020-03-05 株式会社ニコン トランジスタの製造方法
JPWO2020045064A1 (ja) * 2018-08-30 2021-08-10 株式会社ニコン トランジスタの製造方法
JP7107374B2 (ja) 2018-08-30 2022-07-27 株式会社ニコン トランジスタの製造方法
WO2020175170A1 (ja) * 2019-02-27 2020-09-03 国立研究開発法人物質・材料研究機構 金属配線を形成する方法
KR20210100125A (ko) * 2019-02-27 2021-08-13 코쿠리츠켄큐카이하츠호징 붓시쯔 자이료 켄큐키코 금속 배선을 형성하는 방법
JPWO2020175170A1 (ja) * 2019-02-27 2021-09-30 国立研究開発法人物質・材料研究機構 金属配線を形成する方法
JP7117047B2 (ja) 2019-02-27 2022-08-12 国立研究開発法人物質・材料研究機構 金属配線を形成する方法
KR102629707B1 (ko) 2019-02-27 2024-01-29 코쿠리츠켄큐카이하츠호징 붓시쯔 자이료 켄큐키코 금속 배선을 형성하는 방법

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