WO2009037738A1 - 引出し配線方法、引出し配線プログラムおよび引出し配線装置 - Google Patents

引出し配線方法、引出し配線プログラムおよび引出し配線装置 Download PDF

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Publication number
WO2009037738A1
WO2009037738A1 PCT/JP2007/068086 JP2007068086W WO2009037738A1 WO 2009037738 A1 WO2009037738 A1 WO 2009037738A1 JP 2007068086 W JP2007068086 W JP 2007068086W WO 2009037738 A1 WO2009037738 A1 WO 2009037738A1
Authority
WO
WIPO (PCT)
Prior art keywords
pull
out wiring
substrate
chip
bga
Prior art date
Application number
PCT/JP2007/068086
Other languages
English (en)
French (fr)
Inventor
Toshiyasu Sakata
Eiichi Konno
Original Assignee
Fujitsu Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to PCT/JP2007/068086 priority Critical patent/WO2009037738A1/ja
Priority to JP2009532973A priority patent/JP4841672B2/ja
Publication of WO2009037738A1 publication Critical patent/WO2009037738A1/ja
Priority to US12/659,697 priority patent/US8484840B2/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
    • H05K1/0231—Capacitors or dielectric substances
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/394—Routing
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0005—Apparatus or processes for manufacturing printed circuits for designing circuits by computer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10507—Involving several components
    • H05K2201/10545—Related components mounted on both sides of the PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10734—Ball grid array [BGA]; Bump grid array
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49004—Electrical device making including measuring or testing of device or component part
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49128—Assembling formed circuit to base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49147—Assembling terminal to base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49169—Assembling electrical component directly to terminal or elongated conductor

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Geometry (AREA)
  • General Physics & Mathematics (AREA)
  • Evolutionary Computation (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Electromagnetism (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

　基板設計装置は、基板上に形成されるビアの形成位置と、ＢＧＡが配置される基板上の領域に対応した基板裏面に配置されるチップ部品のフットプリントの位置が一致する場合には、チップ部品とＢＧＡとをチップオンホールを用いて接続することが出来るものと判定する。そして、チップ部品とＢＧＡとをチップオンホールを用いて接続できるものと判定した場合には、基板裏面に配置されるチップ部品のフットプリントにまで至るようにして、ＢＧＡが配置される基板上の領域にビアを形成してチップオンホールを実行する。
PCT/JP2007/068086 2007-09-18 2007-09-18 引出し配線方法、引出し配線プログラムおよび引出し配線装置 WO2009037738A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
PCT/JP2007/068086 WO2009037738A1 (ja) 2007-09-18 2007-09-18 引出し配線方法、引出し配線プログラムおよび引出し配線装置
JP2009532973A JP4841672B2 (ja) 2007-09-18 2007-09-18 引出し配線方法、引出し配線プログラムおよび引出し配線装置
US12/659,697 US8484840B2 (en) 2007-09-18 2010-03-17 Leading wiring method, leading wiring program, and leading wiring apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/068086 WO2009037738A1 (ja) 2007-09-18 2007-09-18 引出し配線方法、引出し配線プログラムおよび引出し配線装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/659,697 Continuation US8484840B2 (en) 2007-09-18 2010-03-17 Leading wiring method, leading wiring program, and leading wiring apparatus

Publications (1)

Publication Number Publication Date
WO2009037738A1 true WO2009037738A1 (ja) 2009-03-26

Family

ID=40467571

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/068086 WO2009037738A1 (ja) 2007-09-18 2007-09-18 引出し配線方法、引出し配線プログラムおよび引出し配線装置

Country Status (3)

Country Link
US (1) US8484840B2 (ja)
JP (1) JP4841672B2 (ja)
WO (1) WO2009037738A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011003129A (ja) * 2009-06-22 2011-01-06 Fujitsu Ltd プリント回路板設計支援プログラム、プリント回路板設計支援方法、およびプリント回路板設計支援装置

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8479134B2 (en) * 2009-12-23 2013-07-02 Cadence Design Systems, Inc. Method and system for specifying system level constraints in a cross-fabric design environment
US8527929B2 (en) * 2009-12-23 2013-09-03 Cadence Design Systems, Inc. Method and system for optimally connecting interfaces across multiple fabrics

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002270992A (ja) * 2001-03-14 2002-09-20 Fujitsu Ltd 配線装置

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05266143A (ja) 1992-03-18 1993-10-15 Nec Corp 引き出しパターン配線方式
JP3150527B2 (ja) 1994-04-04 2001-03-26 富士通株式会社 プリント配線板の改造支援装置
JPH08227428A (ja) 1995-02-20 1996-09-03 Matsushita Electric Ind Co Ltd プリント基板ｃａｄ装置
JP3898787B2 (ja) 1996-10-29 2007-03-28 松下電器産業株式会社 実装設計装置
JP2000250948A (ja) * 1999-02-25 2000-09-14 Matsushita Electric Ind Co Ltd 配線引き出し設計装置及び配線引き出しが施された多層基板
JP2002334124A (ja) 2001-05-11 2002-11-22 Nec Corp プリント配線板における配線幅調整装置及び配線幅調整方法
JP3990250B2 (ja) * 2002-10-10 2007-10-10 株式会社東芝 自動設計システム、及び自動設計方法
TW200520201A (en) * 2003-10-08 2005-06-16 Kyocera Corp High-frequency module and communication apparatus
JP4284235B2 (ja) * 2004-06-07 2009-06-24 富士通株式会社 配線選択方法及び装置、配線選択プログラム及び配線選択プログラムを記録したコンピュータ読取可能な記録媒体、並びに、遅延改善方法
JP4303170B2 (ja) 2004-06-24 2009-07-29 株式会社日立製作所 多層プリント配線板の配線設計システム
JP2006094448A (ja) 2004-09-27 2006-04-06 Toshiba Corp 音楽再生装置、移動型通話装置、音楽再生システム、及びこの操作方法
JP2008140886A (ja) * 2006-11-30 2008-06-19 Shinko Electric Ind Co Ltd 配線基板及びその製造方法
US7519927B1 (en) * 2008-07-02 2009-04-14 International Business Machines Corporation Wiring methods to reduce metal variation effects on launch-capture clock pairs in order to minimize cycle-time overlap violations

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002270992A (ja) * 2001-03-14 2002-09-20 Fujitsu Ltd 配線装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011003129A (ja) * 2009-06-22 2011-01-06 Fujitsu Ltd プリント回路板設計支援プログラム、プリント回路板設計支援方法、およびプリント回路板設計支援装置

Also Published As

Publication number Publication date
JPWO2009037738A1 (ja) 2011-01-06
US20100170083A1 (en) 2010-07-08
US8484840B2 (en) 2013-07-16
JP4841672B2 (ja) 2011-12-21

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