WO2009019744A1 - アナログデジタル変換セル及びアナログデジタル変換器 - Google Patents

アナログデジタル変換セル及びアナログデジタル変換器 Download PDF

Info

Publication number
WO2009019744A1
WO2009019744A1 PCT/JP2007/065240 JP2007065240W WO2009019744A1 WO 2009019744 A1 WO2009019744 A1 WO 2009019744A1 JP 2007065240 W JP2007065240 W JP 2007065240W WO 2009019744 A1 WO2009019744 A1 WO 2009019744A1
Authority
WO
WIPO (PCT)
Prior art keywords
analog
digital
digital code
conversion cell
outputs
Prior art date
Application number
PCT/JP2007/065240
Other languages
English (en)
French (fr)
Inventor
Kunihiko Gotoh
Takeshi Takayama
Original Assignee
Fujitsu Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to PCT/JP2007/065240 priority Critical patent/WO2009019744A1/ja
Priority to JP2009526353A priority patent/JP4756095B2/ja
Priority to PCT/JP2008/053430 priority patent/WO2009019902A1/ja
Publication of WO2009019744A1 publication Critical patent/WO2009019744A1/ja
Priority to US12/698,853 priority patent/US7986258B2/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0675—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy
    • H03M1/069—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy by range overlap between successive stages or steps
    • H03M1/0695—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy by range overlap between successive stages or steps using less than the maximum number of output states per stage or step, e.g. 1.5 per stage or less than 1.5 bit per stage type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/34—Analogue value compared with reference values
    • H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
    • H03M1/44—Sequential comparisons in series-connected stages with change in value of analogue signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

　第１の基準電圧及び第２の基準電圧を基にアナログ入力信号ＶＩを比較し、前記アナログ入力信号ＶＩの大きさに応じて３値の第１のデジタルコードＤＡを出力する比較回路（２０３）と、定数ＫＡが１＜ＫＡ＜２の条件を満たす小数であり、ＤＢ０が定数であり、前記第１のデジタルコードＤＡを基にＤＢ＝ＤＡ×ＫＡ＋ＤＢ０で表される３値の第２のデジタルコードＤＢを出力する第１のロジック演算回路（２０３）と、Ａ及びＶＲが定数であり、前記第１のデジタルコードＤＡ及び前記アナログ入力信号ＶＩを基に、ＶＯ＝Ａ×（ＶＩ－ＤＡ×ＫＡ×（ＶＲ／２））で表されるアナログ出力信号ＶＯを出力するアナログ演算回路（２０１）とを有することを特徴とするアナログデジタル変換セルが提供される。
PCT/JP2007/065240 2007-08-03 2007-08-03 アナログデジタル変換セル及びアナログデジタル変換器 WO2009019744A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
PCT/JP2007/065240 WO2009019744A1 (ja) 2007-08-03 2007-08-03 アナログデジタル変換セル及びアナログデジタル変換器
JP2009526353A JP4756095B2 (ja) 2007-08-03 2008-02-27 アナログデジタル変換セル及びアナログデジタル変換器
PCT/JP2008/053430 WO2009019902A1 (ja) 2007-08-03 2008-02-27 アナログデジタル変換セル及びアナログデジタル変換器
US12/698,853 US7986258B2 (en) 2007-08-03 2010-02-02 Analog-digital conversion cell and analog-digital converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/065240 WO2009019744A1 (ja) 2007-08-03 2007-08-03 アナログデジタル変換セル及びアナログデジタル変換器

Publications (1)

Publication Number Publication Date
WO2009019744A1 true WO2009019744A1 (ja) 2009-02-12

Family

ID=40340992

Family Applications (2)

Application Number Title Priority Date Filing Date
PCT/JP2007/065240 WO2009019744A1 (ja) 2007-08-03 2007-08-03 アナログデジタル変換セル及びアナログデジタル変換器
PCT/JP2008/053430 WO2009019902A1 (ja) 2007-08-03 2008-02-27 アナログデジタル変換セル及びアナログデジタル変換器

Family Applications After (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/053430 WO2009019902A1 (ja) 2007-08-03 2008-02-27 アナログデジタル変換セル及びアナログデジタル変換器

Country Status (2)

Country Link
US (1) US7986258B2 (ja)
WO (2) WO2009019744A1 (ja)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110224701B (zh) * 2019-07-08 2024-02-09 湖南国科微电子股份有限公司 一种流水线结构adc

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004343292A (ja) * 2003-05-14 2004-12-02 Oki Electric Ind Co Ltd パイプライン型アナログ・ディジタル変換器
JP2006074549A (ja) * 2004-09-03 2006-03-16 Olympus Corp パイプライン型ａ／ｄ変換器

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6784824B1 (en) * 2002-08-29 2004-08-31 Xilinx, Inc. Analog-to-digital converter which is substantially independent of capacitor mismatch
US7002504B2 (en) * 2003-05-05 2006-02-21 Maxim Integrated Products, Inc. Dynamic element matching in high speed data converters
KR100560945B1 (ko) * 2003-11-26 2006-03-14 매그나칩 반도체 유한회사 온-칩 기준전압 발생장치를 구비하는 반도체 칩

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004343292A (ja) * 2003-05-14 2004-12-02 Oki Electric Ind Co Ltd パイプライン型アナログ・ディジタル変換器
JP2006074549A (ja) * 2004-09-03 2006-03-16 Olympus Corp パイプライン型ａ／ｄ変換器

Also Published As

Publication number Publication date
US20100134337A1 (en) 2010-06-03
WO2009019902A1 (ja) 2009-02-12
US7986258B2 (en) 2011-07-26

Similar Documents

Publication Publication Date Title
EP2993789A1 (en) Efficient analog to digital converter
US20140184434A1 (en) Analog/digital converter
CN109787633B (zh) 带斩波稳定的适用于混合型adc结构的σδadc
US8952836B2 (en) Pipeline analog-to-digital converter
CN102082573A (zh) 模数转换电路和方法
US20140002291A1 (en) Analog to digital conversion architecture and method with input and reference voltage scaling
CN102545901A (zh) 基于逐次比较量化器的二阶前馈Sigma-Delta调制器
CN101674084A (zh) 模-数转换器
CN105227186A (zh) 模数转换器以及流水线模数转换器
WO2021091947A8 (en) Current operative analog to digital converter (adc)
CN102916701B (zh) 乘法数模转换器以及流水线模数转换器
CN104682958B (zh) 一种带噪声整形的并行逐次逼近模数转换器
KR20090032700A (ko) 파이프라인 아날로그-디지털 컨버터 및 그의 구동 방법
Khalapure et al. Design of 5-bit flash ADC using multiple input standard cell gates for large input swing
CN109462402B (zh) 混合型流水线adc结构
CN103840833A (zh) 一种红外焦平面阵列读出电路的模数转换电路
WO2009019744A1 (ja) アナログデジタル変換セル及びアナログデジタル変換器
CN104348489A (zh) 前馈式三角积分调制器
US8704695B2 (en) Analog-to-digital converter
Grimaldi et al. A 10-bit 5kHz level-crossing ADC
Hwang et al. A range-scaled 13b 100MS/s 0.13 μm CMOS SHA-free ADC based on a single reference
TW200638684A (en) Application circuit and method for shaping noise
TW200505170A (en) Analog-to-digital converting circuit and image processing circuit cyclically repeating AD conversion
Thirunakkarasu et al. A radix-3 SAR analog-to-digital converter
Rahul et al. Two-Step Flash ADC Using Standard Cell Based Flash ADCs

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 07791914

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 07791914

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: JP