WO2008155848A1 - 計算機、ｔｌｂ制御方法およびｔｌｂ制御プログラム - Google Patents

計算機、ｔｌｂ制御方法およびｔｌｂ制御プログラム Download PDF

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Publication number
WO2008155848A1
WO2008155848A1 PCT/JP2007/062462 JP2007062462W WO2008155848A1 WO 2008155848 A1 WO2008155848 A1 WO 2008155848A1 JP 2007062462 W JP2007062462 W JP 2007062462W WO 2008155848 A1 WO2008155848 A1 WO 2008155848A1
Authority
WO
WIPO (PCT)
Prior art keywords
tlb
address
computer
micro
tlb control
Prior art date
Application number
PCT/JP2007/062462
Other languages
English (en)
French (fr)
Inventor
Masanori Doi
Original Assignee
Fujitsu Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to EP07767300A priority Critical patent/EP2169556A4/en
Priority to CN200780053345.1A priority patent/CN101681308B/zh
Priority to PCT/JP2007/062462 priority patent/WO2008155848A1/ja
Priority to JP2009520202A priority patent/JP4998554B2/ja
Priority to KR1020097026129A priority patent/KR101078277B1/ko
Publication of WO2008155848A1 publication Critical patent/WO2008155848A1/ja
Priority to US12/654,303 priority patent/US8190853B2/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/652—Page size control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/68—Details of translation look-aside buffer [TLB]
    • G06F2212/681—Multi-level TLB, e.g. microTLB and main TLB

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

　仮想アドレスと絶対アドレスとの対応を示す複数のアドレス変換対をページテーブルとして保持するメインＴＬＢと、メインＴＬＢに保持されるページテーブルの一部を保持するマイクロＴＬＢとを備える。また、マイクロＴＬＢには、ＴＬＢ仮想アドレス[６３：１３]とＴＬＢ絶対アドレス[４６：１３]とが対応付けて登録されている。このような構成において、計算機は、マイクロＴＬＢに登録する際に、８Ｋまたは４ＭのページサイズにチョップしてマイクロＴＬＢに登録する。そして、アドレス変換要求を受信すると、計算機は、マイクロＴＬＢに登録されている８Ｋまたは４Ｍのいずれかのページサイズにあわしてアドレスを検索するので、アドレス比較条件を削減し、処理性能を向上させることが可能である。
PCT/JP2007/062462 2007-06-20 2007-06-20 計算機、ｔｌｂ制御方法およびｔｌｂ制御プログラム WO2008155848A1 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
EP07767300A EP2169556A4 (en) 2007-06-20 2007-06-20 COMPUTER, TLB CONTROL METHOD, AND TLB CONTROL PROGRAM
CN200780053345.1A CN101681308B (zh) 2007-06-20 2007-06-20 计算机及tlb控制方法
PCT/JP2007/062462 WO2008155848A1 (ja) 2007-06-20 2007-06-20 計算機、ｔｌｂ制御方法およびｔｌｂ制御プログラム
JP2009520202A JP4998554B2 (ja) 2007-06-20 2007-06-20 演算処理装置、情報処理装置及び演算処理装置の制御方法
KR1020097026129A KR101078277B1 (ko) 2007-06-20 2007-06-20 계산기, 어드레스 변환 버퍼 제어 방법 및 컴퓨터 판독 가능한 기록 매체
US12/654,303 US8190853B2 (en) 2007-06-20 2009-12-16 Calculator and TLB control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/062462 WO2008155848A1 (ja) 2007-06-20 2007-06-20 計算機、ｔｌｂ制御方法およびｔｌｂ制御プログラム

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/654,303 Continuation US8190853B2 (en) 2007-06-20 2009-12-16 Calculator and TLB control method

Publications (1)

Publication Number Publication Date
WO2008155848A1 true WO2008155848A1 (ja) 2008-12-24

Family

ID=40156014

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/062462 WO2008155848A1 (ja) 2007-06-20 2007-06-20 計算機、ｔｌｂ制御方法およびｔｌｂ制御プログラム

Country Status (6)

Country Link
US (1) US8190853B2 (ja)
EP (1) EP2169556A4 (ja)
JP (1) JP4998554B2 (ja)
KR (1) KR101078277B1 (ja)
CN (1) CN101681308B (ja)
WO (1) WO2008155848A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
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WO2011084542A1 (en) * 2009-12-15 2011-07-14 Qualcomm Incorporated Apparatuses, systems, and methods for reducing translation lookaside buffer (tlb) lookups

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US10037228B2 (en) 2012-10-25 2018-07-31 Nvidia Corporation Efficient memory virtualization in multi-threaded processing units
US10169091B2 (en) * 2012-10-25 2019-01-01 Nvidia Corporation Efficient memory virtualization in multi-threaded processing units
US10310973B2 (en) 2012-10-25 2019-06-04 Nvidia Corporation Efficient memory virtualization in multi-threaded processing units
US9405703B2 (en) * 2014-06-04 2016-08-02 Advanced Micro Devices, Inc. Translation lookaside buffer
CN107766259B (zh) * 2016-08-23 2021-08-20 华为技术有限公司 页表缓存的访问方法、页表缓存、处理器芯片和存储单元
US10776281B2 (en) * 2018-10-04 2020-09-15 International Business Machines Corporation Snoop invalidate filter for distributed memory management unit to reduce snoop invalidate latency
US11675710B2 (en) * 2020-09-09 2023-06-13 Apple Inc. Limiting translation lookaside buffer searches using active page size

Citations (2)

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JPS5817586A (ja) * 1981-07-24 1983-02-01 Fujitsu Ltd アドレス変換制御方式
JPH05225064A (ja) 1992-02-10 1993-09-03 Hitachi Ltd アドレス変換装置及びバッファ記憶制御装置

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DE3583870D1 (de) 1984-01-25 1991-10-02 Matsushita Electric Ind Co Ltd Magnetmessaufnehmer.
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JPH04311233A (ja) * 1991-04-09 1992-11-04 Nec Corp アドレス変換装置
JPH0546483A (ja) * 1991-08-14 1993-02-26 Toshiba Corp 仮想アドレス変換方式
US5386527A (en) 1991-12-27 1995-01-31 Texas Instruments Incorporated Method and system for high-speed virtual-to-physical address translation and cache tag matching
US5465337A (en) * 1992-08-13 1995-11-07 Sun Microsystems, Inc. Method and apparatus for a memory management unit supporting multiple page sizes
JPH06202954A (ja) * 1992-12-28 1994-07-22 Fujitsu Ltd タグ比較回路及びこれを用いたトランスレーション・ルック・アサイド・バッファ
US5526504A (en) * 1993-12-15 1996-06-11 Silicon Graphics, Inc. Variable page size translation lookaside buffer
JPH08329687A (ja) * 1995-06-05 1996-12-13 Hitachi Ltd 半導体集積回路
US5907867A (en) * 1994-09-09 1999-05-25 Hitachi, Ltd. Translation lookaside buffer supporting multiple page sizes
US5946716A (en) * 1996-05-30 1999-08-31 Hewlett-Packard Company Sectored virtual memory management system and translation look-aside buffer (TLB) for the same
US6493812B1 (en) * 1999-12-17 2002-12-10 Hewlett-Packard Company Apparatus and method for virtual address aliasing and multiple page size support in a computer system having a prevalidated cache
JP2002132581A (ja) * 2000-10-25 2002-05-10 Mitsubishi Electric Corp メモリ管理機構
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JP4311233B2 (ja) 2003-03-05 2009-08-12 コニカミノルタホールディングス株式会社 静電潜像現像用トナーとトナーの製造方法及び画像形成方法
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Publication number Priority date Publication date Assignee Title
JPS5817586A (ja) * 1981-07-24 1983-02-01 Fujitsu Ltd アドレス変換制御方式
JPH05225064A (ja) 1992-02-10 1993-09-03 Hitachi Ltd アドレス変換装置及びバッファ記憶制御装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011084542A1 (en) * 2009-12-15 2011-07-14 Qualcomm Incorporated Apparatuses, systems, and methods for reducing translation lookaside buffer (tlb) lookups

Also Published As

Publication number Publication date
EP2169556A4 (en) 2010-10-13
US8190853B2 (en) 2012-05-29
CN101681308A (zh) 2010-03-24
KR101078277B1 (ko) 2011-10-31
EP2169556A1 (en) 2010-03-31
KR20100013324A (ko) 2010-02-09
JPWO2008155848A1 (ja) 2010-08-26
JP4998554B2 (ja) 2012-08-15
CN101681308B (zh) 2014-08-13
US20100106936A1 (en) 2010-04-29

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