WO2008140254A1 - Procédé de fabrication d'un substrat semi-conducteur ayant une couche de gan - Google Patents

Procédé de fabrication d'un substrat semi-conducteur ayant une couche de gan Download PDF

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Publication number
WO2008140254A1
WO2008140254A1 PCT/KR2008/002682 KR2008002682W WO2008140254A1 WO 2008140254 A1 WO2008140254 A1 WO 2008140254A1 KR 2008002682 W KR2008002682 W KR 2008002682W WO 2008140254 A1 WO2008140254 A1 WO 2008140254A1
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WIPO (PCT)
Prior art keywords
gan
thin film
substrate
metal
semiconductor substrate
Prior art date
Application number
PCT/KR2008/002682
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English (en)
Inventor
Kwang-Woo Kwon
Ig-Hyeon Kim
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Ninex Co., Ltd.
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Filing date
Publication date
Application filed by Ninex Co., Ltd. filed Critical Ninex Co., Ltd.
Publication of WO2008140254A1 publication Critical patent/WO2008140254A1/fr

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Classifications

    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/18—Epitaxial-layer growth characterised by the substrate
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/403—AIII-nitrides
    • C30B29/406—Gallium nitride
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02378—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/0242—Crystalline insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02647—Lateral overgrowth
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds

Definitions

  • the present invention relates to a manufacturing process of a gallium nitride (GaN) semiconductor substrate to grow a GaN single crystal thin film on a substrate, and more particularly, to a manufacturing process of a GaN semiconductor substrate capable of growing a GaN single crystal film with a minimized amount of crystal defects on a heterogeneous single crystal substrate.
  • GaN gallium nitride
  • a gallium nitride (GaN) semiconductor film is a material used to manufacture a semiconductor device such as a light-emitting diode (LED) , a light- receiving diode, a field-effect transistor (FET), and the like.
  • the GaN film In order to use the GaN film for the semiconductor device, the GaN film has to be formed to have a single crystal type with a reduced amount of crystal defects.
  • a GaN semiconductor substrate formed by growing GaN on a heterogeneous single crystal substrate as a thin film is generally used.
  • a buffer layer forming technique to an aluminum oxide (Al 2 O 3 ) or silicon carbide (SiC) single crystal substrate that has a different lattice constant from that of the GaN, a GaN single crystal thin film is formed on a single crystal substrate.
  • portions of GaN are covered by a silicon oxide layer or a nitride layer, and GaN to be re- grown on exposed portions of the GaN are re-grown and combined on the silicon oxide layer by lateral growth.
  • a growth mask covers dislocation at a lower portion, so that an amount of dislocation in a thin film can be reduced.
  • the dislocation existing in the exposed GaN cannot be covered but continuously exists when the GaN layer is grown.
  • an exposed GaN that is not covered by a mask is etched to expose a heterogeneous single crystal substrate, and on side walls of the GaN right below the mask, GaN is re- grown to be combined with the GaN on the mask by lateral growth, so that an amount of dislocation can be significantly reduced.
  • the c plane sapphire substrate has a stripe or dot shape having a side surface in a (11-20) direction.
  • the mask having the aforementioned shape is generally patterned by exposure, development, and etching processes using photosensitive polymer.
  • the pendeo-epitaxy is one of methods of enabling GaN growth on a Si single crystal substrate.
  • a Si substrate and GaN have a significant difference between lattice constants and thermal expansion degrees thereof. Therefore, as a thickness of the GaN layer formed on the Si substrate increases, cracks and crystal defects increasingly occur.
  • the Si substrate having a diameter of 300 mm can be produced under a mass production. Therefore, the Si substrate has advantages of productivity and large sizes, and low costs for sizes are needed. Therefore, the inventor proposes a method of manufacturing a GaN thin film having good characteristics by using the Si substrate .
  • the present invention provides a method of manufacturing a gallium nitride (GaN) semiconductor substrate capable of easily growing a GaN thin film with good quality on a heterogeneous single crystal substrate .
  • the present invention also provides a method of manufacturing a GaN semiconductor substrate capable of simplifying a manufacturing process and improving productivity by forming a micro pattern without photolithography.
  • the present invention also provides a method of manufacturing a GaN semiconductor substrate for an economical and productive GaN light-emitting device by forming a GaN film with good quality and a reduced amount of crystal defects on a silicon (Si) substrate.
  • a method of manufacturing a gallium nitride (GaN) semiconductor substrate including steps of: (a) forming a GaN thin film on a substrate; (b) forming a dislocation blocking mask layer on the GaN thin film; (c) forming a metal thin film by depositing a predetermined metal on the dislocation blocking mask layer; (d) converting the metal thin film to metal particles by performing heat treatment at a predetermined temperature; (e) etching and patterning on the dislocation blocking mask layer and the GaN thin film by using the metal particles as a mask; (f) removing the metal particles; and (g) forming a GaN layer by re-growing GaN on a result obtained in the step (f) to form the GaN layer with a reduced amount of crystal defects on the substrate.
  • the substrate is a substrate which is a heterogeneous single crystal substrate and made of one of aluminum oxide (Al 2 O 3 ) , silicon carbide (SiC), and Si.
  • Al 2 O 3 aluminum oxide
  • SiC silicon carbide
  • etching and patterning may be performed on the Si substrate into a predetermined depth in addition to on the dislocation blocking mask layer and the GaN thin film by using the metal particles as a mask.
  • metal of the metal thin film may be one of gold (Au), platinum (Pt), stannum (Sn), silver
  • the metal particles have irregular shapes and distributions, and sides of the metal particles may be less than 1 ⁇ m .
  • sizes of the metal particles are determined by a thickness of the metal thin film, a type of metal, and a heat treatment temperature of the metal. According to a heat treatment atmosphere, oxidation and nitriding may be partially performed.
  • the dislocation blocking mask layer may be a silicon oxide layer or a silicon nitride layer.
  • the GaN semiconductor substrate manufactured in the method may be used for a substrate using a GaN light-emitting diode (LED) or an electric device.
  • LED GaN light-emitting diode
  • GaN gallium nitride
  • GaN thin film growth with a reduced amount of crystal defects can be implemented on a silicon (Si) substrate, so that a light-emitting diode (LED) can be manufactured on the GaN thin film.
  • a GaN semiconductor substrate of a Si substrate which can be used to manufacture a GaN LED can be provided. Therefore, production of the LEDs can be increased by using the Si substrate having a size of greater than 2 inches and therefore costs of the diodes can be reduced.
  • FIGS. Ia to If are cross-sectional views sequentially illustrating a manufacturing process of a gallium nitride (GaN) semiconductor substrate according to an embodiment of the present invention.
  • FIG. 2 is an electron microscope image of a metal thin film which is deposited on a silicon oxide layer and heat-treated to form particles in the manufacturing process of the GaN semiconductor substrate according to the embodiment of the present invention .
  • FIG. 3 is an electron microscope image of a cross- section of the GaN semiconductor substrate on which a flat GaN film is formed according to the embodiment of the present invention.
  • FIG. 4 is a cross-sectional view schematically illustrating a GaN light-emitting diode (LED) device formed on a GaN semiconductor substrate according to the embodiment of the present invention.
  • LED light-emitting diode
  • FIGS. 5a to 5f are cross-sectional views sequentially illustrating a manufacturing process of a GaN semiconductor substrate according to another embodiment .
  • FIG. 6 is a cross-sectional view schematically illustrating a GaN LED device manufactured on the GaN semiconductor substrate according to the embodiment of the present invention.
  • FIGS. Ia to If are cross- sectional views sequentially illustrating the manufacturing process of the GaN semiconductor substrate according to an embodiment of the present invention .
  • a GaN thin film 110 is grown to have a predetermined thickness on a heterogeneous single crystal substrate 100.
  • the heterogeneous single crystal substrate 100 is a substrate made of aluminum oxide (AI 2 O3) or silicon carbide (SiC), and the GaN thin film is grown on the substrate 100 by using a general metal organic chemical vapor deposition (MOCVD) .
  • the thickness of the grown GaN thin film 110 may be 200 nm or more or less.
  • the grown GaN thin film 110 may be or may not be doped, and the GaN thin film may include materials such as aluminum (Al) or indium
  • dislocation mask layer 120 is formed on the GaN thin film 110.
  • the dislocation blocking mask layer 120 is formed by depositing a silicon oxide layer or a silicon nitride layer.
  • the silicon oxide layer is exemplified in the following description.
  • a thickness of the dislocation blocking mask layer 120 may range from several ⁇ m to tens of nm. In order to re-grow the GaN in the following operations, the thickness may be 200 nm.
  • a metal thin film 130 is formed on the dislocation blocking mask layer 120.
  • stannum (Sn), In, zinc (Zn), silver (Ag) having relatively low melting points or gold (Au) and platinum (Pt) that readily form particles may be used.
  • the metal thin film may be made of one of Au, Pt, Sn, Ag, Zn, and In.
  • the thickness of the metal thin film is determined according to the needed size of the metal particle.
  • the metal thin film 130 is heat-treated at a predetermined temperature to form metal particles 132.
  • sizes of the metal particles generated by heat-treating the metal thin film 130 increase. Therefore, by controlling the thickness of the metal thin film 130, the sizes of the metal particles 132 can be controlled.
  • the heat-treatment performed on the metal thin film is
  • the sizes of the particles can be controlled.
  • the metal particles have irregular shapes and distributions, and a size of a metal particle may be smaller than 1 ⁇ m .
  • the size of the metal particle depends on the thickness of the metal thin film, a type of the metal, and the heat-treatment temperature .
  • etching is performed on the dislocation blocking mask layer 120, that is, the silicon oxide layer, to pattern the dislocation blocking mask layer 120 by using the metal particles 132 as a mask.
  • the etching method may be a dry etching.
  • an etching rate of the silicon oxide layer for the metal particles 132 is high, so that etching the silicon oxide layer to expose the GaN thin film 110 under the silicon oxide layer can be performed.
  • etching is performed on the exposed GaN thin film 110 to pattern the GaN thin film 110.
  • the patterned silicon oxide layer that is the dislocation blocking mask layer 122 in addition to the metal particles 132 serve as masks for the etching of the GaN thin film 110.
  • portions of the GaN thin film under the patterned silicon oxide layer that is the dislocation blocking mask layer 122 are not removed but portions of the exposed GaN thin film without the silicon oxide layer are removed.
  • reactive plasma gas mainly including chlorine CI 2 and boron trichloride BCl 3 is used to perform the etching on the GaN thin film 110, an enough etching speed to perform the etching on the silicon oxide layer can be implemented.
  • the etching can be performed until the lower substrate is exposed.
  • the thickness of the GaN thin film to be etched the thickness of the silicon oxide layer that is to serve as masks is controlled.
  • wet etching is performed on the remaining metal particles 132.
  • an etchant according to strong acid or metal is used. The etchant removes the metal particles but does not remove the silicon oxide layer.
  • FIG. 3 is an electron microscope image of a cross- section of the GaN semiconductor substrate on which a flat GaN film is formed by re-growing the GaN on the substrate according to the embodiment of the present invention.
  • FIG. 4 is a cross-sectional view of a light-emitting diode (LED) device 40 formed on a GaN film 410 grown on a sapphire substrate 400 according to the embodiment of the present invention.
  • LED light-emitting diode
  • the LED device 40 formed on the GaN film 410 has a GaN thin film having an active layer 430 with a multiple quantum well structure between an n-GaN layer 420 and a p-GaN layer 440. A portion of the GaN thin film is removed to expose the n-GaN layer 420. On a surface of the remaining p-GaN layer 440, a transparent electrode 450 is formed, and negative and positive electrodes 422 and 452 are formed on the exposed n-GaN layer 420 and the transparent electrode 450, respectively.
  • FIGS. 5a to 5f are cross-sectional views sequentially illustrating operations of manufacturing the GaN semiconductor substrate according to the current embodiment.
  • the method of manufacturing the GaN semiconductor substrate according to the embodiment of the present invention relates to a method of forming a GaN film having a reduced amount of crystal defects on a Si substrate .
  • operations (a) and (b) of FIG. 5 are the same as in the manufacturing method according to the aforementioned embodiment.
  • a dislocation blocking mask layer 520 is formed thereon.
  • a metal thin film 530 is formed by depositing a metal on the dislocation blocking mask layer 520, and heat-treatment is performed to enable the metal thin film to form metal particles 532.
  • etching is performed on the dislocation blocking mask layer 520 by using the metal particles as a mask to form a pattern having random circles having a radius of less than 1 [M. Thereafter, by using the metal particles and the patterned oxide particles as a mask, etching is performed on the GaN thin film 510.
  • portions of the Si substrate 500 are removed into a predetermined depth dl so that GaN with much defects which is re-grown on the exposed Si substrate during re-growth of the GaN thin film in the following operations can be blocked by GaN without defects which is re-grown on side walls of the GaN 512 below the mask particles 522.
  • wet-etching is performed to remove the metal particles, and the GaN is re-grown by using the patterned GaN thin film 512 as a seed to form a GaN film 540 with a reduced amount of crystal defects on the Si substrate 502 of which the portions are removed.
  • the GaN meets the GaN on the other side by lateral growth so that pores 550 are formed at a lower portion of the GaN film 540.
  • FIG. 6 is a cross-sectional view illustrating a GaN LED device manufactured by applying a semiconductor substrate having a GaN film 610 grown on a Si substrate 600 according to the embodiment of the present invention.
  • an LED 60 formed on the GaN film 610 grown on the Si substrate 600 that is a conductive substrate according to the current embodiment has a construction in which an active layer 630 having a multiple quantum well structure is formed between an n-GaN layer 620 and a p-GaN layer 640.
  • a negative electrode 662 is formed at a bottom surface of the Si substrate 600 by using conductivity of the Si substrate 600, and a positive electrode 652 is formed on a transparent electrode 650 formed on a surface of the p-GaN layer 640.
  • the GaN substrate manufactured by using the aforementioned manufacturing method includes a semiconductor substrate, a first GaN thin film formed on a surface of the semiconductor substrate, a number of pores formed at the center portion of the first GaN thin film or at an area where the first GaN thin film and the semiconductor substrate meet each other, a dislocation blocking mask layer formed and patterned on a surface of the first GaN thin film, a second GaN layer formed by single- crystal-growing GaN by using the surface of the first GaN thin film exposed by patterning the dislocation blocking mask layer as a seed.
  • the semiconductor substrate may be made of AI 2 O 3 or SiC.
  • the dislocation blocking mask layer may be finally formed in operations of depositing a predetermined metal on the dislocation blocking mask layer to form a metal thin film, performing heat treatment on the metal thin film to form metal particles, performing etching and patterning on the dislocation blocking mask layer and the first GaN thin film by using the formed metal particles as a mask, and removing the metal particles.
  • a type of the metal particles, a temperature of the heat-treatment, the sizes of the metal particles may be changed.
  • the method of manufacturing the semiconductor substrate according to the present invention enables gallium nitride (GaN) thin film growth on the silicon (Si) substrate with a reduced amount of crystal defects.
  • GaN gallium nitride
  • Si silicon
  • LED can be formed on the GaN thin film manufactured according to the present invention.
  • the GaN semiconductor substrate having the Si substrate which can be used to manufacture the GaN LED can be provided according to the present invention, so that production of the LEDs can be increased by using the Si substrates having sizes of two or more inches.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Metallurgy (AREA)
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  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Led Devices (AREA)

Abstract

La présente invention porte sur un procédé de fabrication d'un substrat semi-conducteur de nitrure de gallium (GaN) capable de former un film de GaN avec une quantité réduite de défauts cristallins sur un substrat monocristallin hétérogène. Le procédé consistant : à former un film mince de GaN, une couche de masque de blocage de dislocation et un film mince métallique sur un substrat monocristallin hétérogène ; à effectuer un traitement thermique sur le film mince métallique pour former des particules métalliques ; à effectuer une gravure et une formation de motifs sur la couche de masque de blocage de dislocation et le film mince de GaN à l'aide des particules métalliques en tant que masque ; et à former un film de GaN avec une quantité réduite de défauts cristallins sur le substrat monocristallin hétérogène par une nouvelle croissance de GaN à l'aide du film mince de GaN à motif en tant qu'ensemencement. Par conséquent, des micromotifs peuvent être formés sans photolithographie supplémentaire et le film de GaN avec une quantité réduite de défauts cristallins peut être formé à l'aide des motifs, de telle sorte que le substrat semi-conducteur de GaN ayant le film de GaN avec une bonne qualité peut être facilement formé à des coûts inférieurs.
PCT/KR2008/002682 2007-05-14 2008-05-14 Procédé de fabrication d'un substrat semi-conducteur ayant une couche de gan WO2008140254A1 (fr)

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KR20070046723A KR100878512B1 (ko) 2007-05-14 2007-05-14 ＧａＮ 반도체 기판 제조 방법
KR10-2007-0046723 2007-05-14

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JP2012142473A (ja) * 2011-01-05 2012-07-26 Shogen Koden Kofun Yugenkoshi 光電素子及びその製造方法
CN103614769A (zh) * 2013-10-25 2014-03-05 中国电子科技集团公司第五十五研究所 一种基于原位刻蚀的氮化镓同质外延方法
CN103647008A (zh) * 2013-12-31 2014-03-19 中国科学院半导体研究所 生长半极性GaN厚膜的方法
CN104078335A (zh) * 2014-06-30 2014-10-01 中国科学院上海微系统与信息技术研究所 一种用于HVPE生长GaN单晶的复合籽晶模板及方法
US9171810B2 (en) * 2013-11-21 2015-10-27 Nxp B.V. Electronic device incorporating a randomized interconnection layer having a randomized conduction pattern

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TWI419367B (zh) 2010-12-02 2013-12-11 Epistar Corp 光電元件及其製造方法
KR101643213B1 (ko) * 2010-12-23 2016-08-10 에피스타 코포레이션 광전소자 및 그 제조방법
KR101286771B1 (ko) * 2011-08-22 2013-07-16 고려대학교 산학협력단 유기 발광 소자 및 그 제조 방법
KR101373398B1 (ko) * 2012-04-18 2014-04-29 서울바이오시스 주식회사 고효율 발광다이오드 제조방법
KR101448870B1 (ko) * 2012-11-28 2014-10-13 한국기계연구원 나노/마이크로 하이브리드 구조물 제조방법

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US20060154451A1 (en) * 2005-01-07 2006-07-13 Samsung Corning Co., Ltd. Epitaxial growth method
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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012142473A (ja) * 2011-01-05 2012-07-26 Shogen Koden Kofun Yugenkoshi 光電素子及びその製造方法
CN103614769A (zh) * 2013-10-25 2014-03-05 中国电子科技集团公司第五十五研究所 一种基于原位刻蚀的氮化镓同质外延方法
CN103614769B (zh) * 2013-10-25 2016-03-16 中国电子科技集团公司第五十五研究所 一种基于原位刻蚀的氮化镓同质外延方法
US9171810B2 (en) * 2013-11-21 2015-10-27 Nxp B.V. Electronic device incorporating a randomized interconnection layer having a randomized conduction pattern
CN103647008A (zh) * 2013-12-31 2014-03-19 中国科学院半导体研究所 生长半极性GaN厚膜的方法
CN104078335A (zh) * 2014-06-30 2014-10-01 中国科学院上海微系统与信息技术研究所 一种用于HVPE生长GaN单晶的复合籽晶模板及方法

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