WO2008123234A1 - アクティブマトリックス基板及びその製造方法 - Google Patents

アクティブマトリックス基板及びその製造方法 Download PDF

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Publication number
WO2008123234A1
WO2008123234A1 PCT/JP2008/055540 JP2008055540W WO2008123234A1 WO 2008123234 A1 WO2008123234 A1 WO 2008123234A1 JP 2008055540 W JP2008055540 W JP 2008055540W WO 2008123234 A1 WO2008123234 A1 WO 2008123234A1
Authority
WO
WIPO (PCT)
Prior art keywords
active matrix
matrix substrate
adhesive layer
forming
base
Prior art date
Application number
PCT/JP2008/055540
Other languages
English (en)
French (fr)
Inventor
Masahiro Hanmura
Hironori Ohmori
Original Assignee
Zeon Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zeon Corporation filed Critical Zeon Corporation
Priority to JP2009509110A priority Critical patent/JP5182287B2/ja
Publication of WO2008123234A1 publication Critical patent/WO2008123234A1/ja

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Liquid Crystal (AREA)
  • Adhesives Or Adhesive Processes (AREA)

Abstract

【課題】湿熱下での長時間使用時においてもTFT動作が安定しており、しかも簡便に製造可能なアクティブマトリックス基板及びその製造方法を提供する。 【解決手段】薄膜トランジスタを含む導電体回路を基材上に形成してなるアクティブマトリックス基板であって、導電体回路が形成された基材表面上に、シランカップリング剤からなる密着剤層と、プロトン性極性基を有する環状オレフィン系重合体の架橋体からなる有機保護膜とを、順次積層してなるアクティブマトリックス基板。(1)導電体回路が形成された基材表面上にシランカップリング剤により密着剤層を形成する工程、(2)工程(1)で形成された密着剤層上にプロトン性極性基を有する環状オレフィン系重合体を含む感放射線性樹脂組成物により樹脂膜を形成する工程、及び(3)工程(2)で形成された樹脂膜を架橋して有機保護膜を形成する工程を有するアクティブマトリックス基板の製造方法。
PCT/JP2008/055540 2007-03-30 2008-03-25 アクティブマトリックス基板及びその製造方法 WO2008123234A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009509110A JP5182287B2 (ja) 2007-03-30 2008-03-25 アクティブマトリックス基板及びその製造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007095352 2007-03-30
JP2007-095352 2007-03-30

Publications (1)

Publication Number Publication Date
WO2008123234A1 true WO2008123234A1 (ja) 2008-10-16

Family

ID=39830727

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/055540 WO2008123234A1 (ja) 2007-03-30 2008-03-25 アクティブマトリックス基板及びその製造方法

Country Status (3)

Country Link
JP (1) JP5182287B2 (ja)
TW (1) TW200844562A (ja)
WO (1) WO2008123234A1 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010199390A (ja) * 2009-02-26 2010-09-09 Nippon Zeon Co Ltd 薄膜トランジスタの製造方法、及び薄膜トランジスタ並びに表示装置
JP2011077450A (ja) * 2009-10-01 2011-04-14 Fujifilm Corp 薄膜トランジスタ及び薄膜トランジスタの製造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1048607A (ja) * 1996-08-02 1998-02-20 Sharp Corp 表示素子用基板およびその製造方法並びにその製造装置
WO2005073310A1 (ja) * 2004-01-30 2005-08-11 Zeon Corporation 樹脂組成物、その製造方法及び樹脂膜
JP2006186175A (ja) * 2004-12-28 2006-07-13 Nippon Zeon Co Ltd 電子部品用樹脂膜形成材料及びそれを用いた積層体

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1048607A (ja) * 1996-08-02 1998-02-20 Sharp Corp 表示素子用基板およびその製造方法並びにその製造装置
WO2005073310A1 (ja) * 2004-01-30 2005-08-11 Zeon Corporation 樹脂組成物、その製造方法及び樹脂膜
JP2006186175A (ja) * 2004-12-28 2006-07-13 Nippon Zeon Co Ltd 電子部品用樹脂膜形成材料及びそれを用いた積層体

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010199390A (ja) * 2009-02-26 2010-09-09 Nippon Zeon Co Ltd 薄膜トランジスタの製造方法、及び薄膜トランジスタ並びに表示装置
JP2011077450A (ja) * 2009-10-01 2011-04-14 Fujifilm Corp 薄膜トランジスタ及び薄膜トランジスタの製造方法

Also Published As

Publication number Publication date
JPWO2008123234A1 (ja) 2010-07-15
JP5182287B2 (ja) 2013-04-17
TW200844562A (en) 2008-11-16

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