WO2008120352A1 - 情報処理装置、エラー処理方法 - Google Patents
情報処理装置、エラー処理方法 Download PDFInfo
- Publication number
- WO2008120352A1 WO2008120352A1 PCT/JP2007/056858 JP2007056858W WO2008120352A1 WO 2008120352 A1 WO2008120352 A1 WO 2008120352A1 JP 2007056858 W JP2007056858 W JP 2007056858W WO 2008120352 A1 WO2008120352 A1 WO 2008120352A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- parts
- processing
- processing apparatus
- information processing
- error
- Prior art date
Links
- 230000010365 information processing Effects 0.000 title abstract 3
- 238000003672 processing method Methods 0.000 title 1
- 238000001514 detection method Methods 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1658—Data re-synchronization of a redundant component, or initial sync of replacement, additional or spare unit
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
- G06F11/165—Error detection by comparing the output of redundant processing systems with continued operation after detection of the error
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
- G06F11/1687—Temporal synchronisation or re-synchronisation of redundant processing components at event level, e.g. by interrupt or result of polling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
- G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Hardware Redundancy (AREA)
Abstract
互いに同期動作を行うことができる2つの処理部を有する情報処理装置であって、2つの処理部へ同一の信号を出力することができる共通部と、処理部毎に備えられ、対応する処理部で発生したエラーを検出する検出部と、2つの処理部からの出力を比較する比較部と、検出部による検出結果と比較部による比較結果とに基づいて、処理部から共通部への信号の制御を行い、2つの検出部により同時に同種のエラーが検出された場合、共通部のエラーと判定する制御部とを備えた。
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP11163540A EP2372554B1 (en) | 2007-03-29 | 2007-03-29 | Information processing device and error processing method |
AT07740296T ATE537502T1 (de) | 2007-03-29 | 2007-03-29 | Informationsverarbeitungsvorrichtung und fehlerverarbeitungsverfahren |
JP2009507343A JP4629793B2 (ja) | 2007-03-29 | 2007-03-29 | 情報処理装置、エラー処理方法 |
PCT/JP2007/056858 WO2008120352A1 (ja) | 2007-03-29 | 2007-03-29 | 情報処理装置、エラー処理方法 |
EP07740296A EP2141596B1 (en) | 2007-03-29 | 2007-03-29 | Information processing apparatus and error processing method |
US12/554,318 US8078920B2 (en) | 2007-03-29 | 2009-09-04 | Information processing device and error processing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2007/056858 WO2008120352A1 (ja) | 2007-03-29 | 2007-03-29 | 情報処理装置、エラー処理方法 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/554,318 Continuation US8078920B2 (en) | 2007-03-29 | 2009-09-04 | Information processing device and error processing method |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2008120352A1 true WO2008120352A1 (ja) | 2008-10-09 |
Family
ID=39807945
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2007/056858 WO2008120352A1 (ja) | 2007-03-29 | 2007-03-29 | 情報処理装置、エラー処理方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US8078920B2 (ja) |
EP (2) | EP2141596B1 (ja) |
JP (1) | JP4629793B2 (ja) |
AT (1) | ATE537502T1 (ja) |
WO (1) | WO2008120352A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2010103562A1 (ja) * | 2009-03-09 | 2010-09-16 | 富士通株式会社 | 情報処理装置、情報処理装置の制御方法、及び情報処理装置の制御プログラム |
JP2020096314A (ja) * | 2018-12-14 | 2020-06-18 | Necプラットフォームズ株式会社 | システム及び暗号化処理方法 |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5299281B2 (ja) * | 2007-09-25 | 2013-09-25 | 富士通株式会社 | 情報処理装置及び制御方法 |
DE102010048352B3 (de) * | 2010-10-13 | 2012-04-26 | Fujitsu Technology Solutions Intellectual Property Gmbh | Schnittstellenüberwachungsvorrichtung für einen Schnittstellenanschluss und Verwendung einer Schnittstellenüberwachungsvorrichtung |
US10649829B2 (en) * | 2017-07-10 | 2020-05-12 | Hewlett Packard Enterprise Development Lp | Tracking errors associated with memory access operations |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04153838A (ja) * | 1990-10-18 | 1992-05-27 | Fujitsu Ltd | 二重化システムのエラーチェック回路 |
JP2004046599A (ja) | 2002-07-12 | 2004-02-12 | Nec Corp | フォルトトレラントコンピュータ装置、その再同期化方法及び再同期化プログラム |
JP2006510117A (ja) * | 2002-12-19 | 2006-03-23 | インテル コーポレイション | 高信頼性プロセッサ用オンダイ機構 |
JP4153838B2 (ja) | 2003-07-04 | 2008-09-24 | 株式会社東芝 | 画像形成装置の機能及び性能制限装置 |
Family Cites Families (34)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4965717A (en) * | 1988-12-09 | 1990-10-23 | Tandem Computers Incorporated | Multiple processor system having shared memory with private-write capability |
US5295258A (en) * | 1989-12-22 | 1994-03-15 | Tandem Computers Incorporated | Fault-tolerant computer system with online recovery and reintegration of redundant components |
JPH04302332A (ja) | 1991-03-29 | 1992-10-26 | Toshiba Corp | 2重化cpuシステムの同期化方式 |
FR2686991A1 (fr) * | 1992-02-05 | 1993-07-30 | Sextant Avionique | Procede, systeme et processeur de communication entre une pluralite de sous-ensembles d'un equipement. |
US5809533A (en) * | 1993-02-18 | 1998-09-15 | Unisys Corporation | Dual bus system with multiple processors having data coherency maintenance |
JPH07271626A (ja) * | 1994-03-28 | 1995-10-20 | Toshiba Corp | ディジタル制御システム |
FR2721122B1 (fr) * | 1994-06-14 | 1996-07-12 | Commissariat Energie Atomique | Unité de calcul à pluralité de calculateurs redondants. |
EP0729097A1 (en) * | 1995-02-07 | 1996-08-28 | Sun Microsystems, Inc. | Method and apparatus for run-time memory access checking and memory leak detection of a multi-threaded program |
KR100234504B1 (ko) * | 1995-09-18 | 1999-12-15 | 포만 제프리 엘 | 선택된 고장에 대한 고장정보를 포착하는 집적회로의 테스트 방법 및 내장된 자기 테스트 장치 |
DE19809089A1 (de) * | 1998-02-25 | 1999-08-26 | Siemens Ag | Synchronisations- und/oder Datenaustauschverfahren für sichere, hochverfügbare Rechner und hierzu geeignete Einrichtung |
FR2797964B1 (fr) * | 1999-08-23 | 2002-03-29 | Thomson Csf Sextant | Dispositif de controle securise de commutation de donnees |
US6543016B1 (en) * | 1999-11-04 | 2003-04-01 | Agere Systems Inc. | Testing content-addressable memories |
JP4302332B2 (ja) | 2000-05-19 | 2009-07-22 | 理想科学工業株式会社 | 感熱孔版原紙の製版方法、製版装置及び孔版印刷版 |
JP2002014943A (ja) | 2000-06-30 | 2002-01-18 | Nippon Telegr & Teleph Corp <Ntt> | 耐故障性システム及びその故障検出方法 |
DE10040389A1 (de) * | 2000-08-18 | 2002-03-07 | Infineon Technologies Ag | Hochgeschwindigkeitsprozessor |
JP3537087B2 (ja) * | 2000-09-29 | 2004-06-14 | Necエレクトロニクス株式会社 | 半導体装置及び半導体装置の検査方法 |
FR2819598B1 (fr) * | 2001-01-16 | 2003-04-11 | Thomson Csf | Dispositif de synchronisation tolerant aux pannes pour reseau informatique temps reel |
US7065672B2 (en) * | 2001-03-28 | 2006-06-20 | Stratus Technologies Bermuda Ltd. | Apparatus and methods for fault-tolerant computing using a switching fabric |
US7194556B2 (en) * | 2001-03-30 | 2007-03-20 | Intel Corporation | Method and apparatus for high accuracy distributed time synchronization using processor tick counters |
GB2377024A (en) * | 2001-06-29 | 2002-12-31 | Motorola Inc | Fault tolerant measurment data outputting system |
EP1376356A1 (en) * | 2002-06-26 | 2004-01-02 | Fujitsu Siemens Computers, LLC | Error reporting network in multiprocessor computer |
JP3640187B2 (ja) * | 2002-07-29 | 2005-04-20 | 日本電気株式会社 | マルチプロセッサシステムの障害処理方法、マルチプロセッサシステム及びノード |
JP4155088B2 (ja) * | 2003-04-18 | 2008-09-24 | 日本電気株式会社 | 情報処理装置 |
JP2005165807A (ja) * | 2003-12-04 | 2005-06-23 | Hitachi Ltd | プロセッサ多重化システムにおける動作比較方式 |
US8799706B2 (en) * | 2004-03-30 | 2014-08-05 | Hewlett-Packard Development Company, L.P. | Method and system of exchanging information between processors |
GB0411054D0 (en) * | 2004-05-18 | 2004-06-23 | Ricardo Uk Ltd | Fault tolerant data processing |
JP4168403B2 (ja) * | 2004-12-21 | 2008-10-22 | 日本電気株式会社 | フォールトトレラントシステム、これで用いる制御装置、アクセス制御方法、及び制御プログラム |
JP3897047B2 (ja) * | 2005-01-31 | 2007-03-22 | 横河電機株式会社 | 情報処理装置および情報処理方法 |
US8595557B2 (en) * | 2005-02-23 | 2013-11-26 | International Business Machines Corporation | Method and apparatus for verifying memory testing software |
JP4330547B2 (ja) * | 2005-03-17 | 2009-09-16 | 富士通株式会社 | 情報処理システムの制御方法、情報処理システム、情報処理システムの制御プログラム、冗長構成制御装置 |
JP4667092B2 (ja) * | 2005-03-17 | 2011-04-06 | 富士通株式会社 | 情報処理装置、情報処理装置におけるデータ制御方法 |
JP4667093B2 (ja) * | 2005-03-17 | 2011-04-06 | 富士通株式会社 | 二重化記憶装置及び二重化記憶装置の制御方法 |
US7350007B2 (en) * | 2005-04-05 | 2008-03-25 | Hewlett-Packard Development Company, L.P. | Time-interval-based system and method to determine if a device error rate equals or exceeds a threshold error rate |
US8826288B2 (en) * | 2005-04-19 | 2014-09-02 | Hewlett-Packard Development Company, L.P. | Computing with both lock-step and free-step processor modes |
-
2007
- 2007-03-29 AT AT07740296T patent/ATE537502T1/de active
- 2007-03-29 WO PCT/JP2007/056858 patent/WO2008120352A1/ja active Application Filing
- 2007-03-29 EP EP07740296A patent/EP2141596B1/en not_active Not-in-force
- 2007-03-29 EP EP11163540A patent/EP2372554B1/en not_active Not-in-force
- 2007-03-29 JP JP2009507343A patent/JP4629793B2/ja not_active Expired - Fee Related
-
2009
- 2009-09-04 US US12/554,318 patent/US8078920B2/en not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04153838A (ja) * | 1990-10-18 | 1992-05-27 | Fujitsu Ltd | 二重化システムのエラーチェック回路 |
JP2004046599A (ja) | 2002-07-12 | 2004-02-12 | Nec Corp | フォルトトレラントコンピュータ装置、その再同期化方法及び再同期化プログラム |
JP2006510117A (ja) * | 2002-12-19 | 2006-03-23 | インテル コーポレイション | 高信頼性プロセッサ用オンダイ機構 |
JP4153838B2 (ja) | 2003-07-04 | 2008-09-24 | 株式会社東芝 | 画像形成装置の機能及び性能制限装置 |
Non-Patent Citations (1)
Title |
---|
See also references of EP2141596A4 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2010103562A1 (ja) * | 2009-03-09 | 2010-09-16 | 富士通株式会社 | 情報処理装置、情報処理装置の制御方法、及び情報処理装置の制御プログラム |
JP5278530B2 (ja) * | 2009-03-09 | 2013-09-04 | 富士通株式会社 | 情報処理装置、情報処理装置の制御方法、及び情報処理装置の制御プログラム |
US8677179B2 (en) | 2009-03-09 | 2014-03-18 | Fujitsu Limited | Information processing apparatus for performing error process when controllers in synchronization operation detect error simultaneously |
JP2020096314A (ja) * | 2018-12-14 | 2020-06-18 | Necプラットフォームズ株式会社 | システム及び暗号化処理方法 |
Also Published As
Publication number | Publication date |
---|---|
US8078920B2 (en) | 2011-12-13 |
EP2372554B1 (en) | 2013-03-20 |
EP2372554A2 (en) | 2011-10-05 |
EP2141596A4 (en) | 2010-10-27 |
EP2141596A1 (en) | 2010-01-06 |
ATE537502T1 (de) | 2011-12-15 |
JP4629793B2 (ja) | 2011-02-09 |
JPWO2008120352A1 (ja) | 2010-07-15 |
EP2141596B1 (en) | 2011-12-14 |
EP2372554A3 (en) | 2012-01-18 |
US20100077262A1 (en) | 2010-03-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2018045241A3 (en) | DETECTION OF ANOMALIES IN MULTIVARIATED DATA | |
WO2010005800A3 (en) | Posture state detection using selectable system control parameters | |
WO2006013560A3 (en) | Emergency situation detector | |
WO2017160657A3 (en) | Footwear with motorized lacing and gesture control | |
WO2008120352A1 (ja) | 情報処理装置、エラー処理方法 | |
PT1764694E (pt) | Processo e sistema de controlo de computadores protegidos | |
WO2009027667A3 (en) | Scanning systems for security and medical scanners having means to control the radiation source | |
WO2009069184A1 (ja) | 音処理装置、補正装置、補正方法及びコンピュータプログラム | |
WO2009005141A1 (ja) | 物体領域検出装置、物体領域検出システム、物体領域検出方法及びプログラム | |
WO2006062959A3 (en) | System and method for enhanced error detection in memory peripherals | |
WO2009158370A3 (en) | Loop control system and method | |
WO2006029290A3 (en) | Application of abnormal event detection technology to olefins recovery trains | |
WO2008036592A3 (en) | Neutron detection based on coincidence signal | |
DE502005003436D1 (de) | Verbesserung der Verständlichkeit von Sprache enthaltenden Audiosignalen | |
WO2007127764A3 (en) | Automated analysis of collected field data for error detection | |
EP1835310A3 (de) | Lichtgitter | |
WO2010129102A3 (en) | Digital transcription system utilizing small aperture acoustical sensors | |
WO2009004984A1 (ja) | Mtシステムによる凝集像自動判定方法、装置、プログラムおよび記録媒体 | |
WO2006083475A8 (en) | Dual sensing intrusion detection method and system with state-level fusion | |
AU2003304669A1 (en) | Two step activation of phone | |
IN2012DN02970A (ja) | ||
WO2011059842A3 (en) | Techniques for phase detection | |
EP2741235A3 (en) | Methods and robots for adjusting object detection parameters, object recognition parameters, or both object detection parameters and object recognition parameters | |
TW200943232A (en) | Digital signal pattern detection and classification using kernel fusion | |
WO2013003235A3 (en) | Lamp failure detector |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 07740296 Country of ref document: EP Kind code of ref document: A1 |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2009507343 Country of ref document: JP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2007740296 Country of ref document: EP |
|
NENP | Non-entry into the national phase |
Ref country code: DE |