WO2008120352A1 - 情報処理装置、エラー処理方法 - Google Patents

情報処理装置、エラー処理方法 Download PDF

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Publication number
WO2008120352A1
WO2008120352A1 PCT/JP2007/056858 JP2007056858W WO2008120352A1 WO 2008120352 A1 WO2008120352 A1 WO 2008120352A1 JP 2007056858 W JP2007056858 W JP 2007056858W WO 2008120352 A1 WO2008120352 A1 WO 2008120352A1
Authority
WO
WIPO (PCT)
Prior art keywords
parts
processing
processing apparatus
information processing
error
Prior art date
Application number
PCT/JP2007/056858
Other languages
English (en)
French (fr)
Inventor
Atsushi Morozawa
Takaharu Ishizuka
Toshikazu Ueki
Makoto Hataida
Yuka Hosokawa
Takeshi Owaki
Takashi Yamamoto
Daisuke Itou
Original Assignee
Fujitsu Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to EP11163540A priority Critical patent/EP2372554B1/en
Priority to AT07740296T priority patent/ATE537502T1/de
Priority to JP2009507343A priority patent/JP4629793B2/ja
Priority to PCT/JP2007/056858 priority patent/WO2008120352A1/ja
Priority to EP07740296A priority patent/EP2141596B1/en
Publication of WO2008120352A1 publication Critical patent/WO2008120352A1/ja
Priority to US12/554,318 priority patent/US8078920B2/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1658Data re-synchronization of a redundant component, or initial sync of replacement, additional or spare unit
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1629Error detection by comparing the output of redundant processing systems
    • G06F11/165Error detection by comparing the output of redundant processing systems with continued operation after detection of the error
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1675Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1687Temporal synchronisation or re-synchronisation of redundant processing components at event level, e.g. by interrupt or result of polling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1629Error detection by comparing the output of redundant processing systems
    • G06F11/1641Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)

Abstract

 互いに同期動作を行うことができる2つの処理部を有する情報処理装置であって、2つの処理部へ同一の信号を出力することができる共通部と、処理部毎に備えられ、対応する処理部で発生したエラーを検出する検出部と、2つの処理部からの出力を比較する比較部と、検出部による検出結果と比較部による比較結果とに基づいて、処理部から共通部への信号の制御を行い、2つの検出部により同時に同種のエラーが検出された場合、共通部のエラーと判定する制御部とを備えた。
PCT/JP2007/056858 2007-03-29 2007-03-29 情報処理装置、エラー処理方法 WO2008120352A1 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
EP11163540A EP2372554B1 (en) 2007-03-29 2007-03-29 Information processing device and error processing method
AT07740296T ATE537502T1 (de) 2007-03-29 2007-03-29 Informationsverarbeitungsvorrichtung und fehlerverarbeitungsverfahren
JP2009507343A JP4629793B2 (ja) 2007-03-29 2007-03-29 情報処理装置、エラー処理方法
PCT/JP2007/056858 WO2008120352A1 (ja) 2007-03-29 2007-03-29 情報処理装置、エラー処理方法
EP07740296A EP2141596B1 (en) 2007-03-29 2007-03-29 Information processing apparatus and error processing method
US12/554,318 US8078920B2 (en) 2007-03-29 2009-09-04 Information processing device and error processing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/056858 WO2008120352A1 (ja) 2007-03-29 2007-03-29 情報処理装置、エラー処理方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/554,318 Continuation US8078920B2 (en) 2007-03-29 2009-09-04 Information processing device and error processing method

Publications (1)

Publication Number Publication Date
WO2008120352A1 true WO2008120352A1 (ja) 2008-10-09

Family

ID=39807945

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/056858 WO2008120352A1 (ja) 2007-03-29 2007-03-29 情報処理装置、エラー処理方法

Country Status (5)

Country Link
US (1) US8078920B2 (ja)
EP (2) EP2141596B1 (ja)
JP (1) JP4629793B2 (ja)
AT (1) ATE537502T1 (ja)
WO (1) WO2008120352A1 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010103562A1 (ja) * 2009-03-09 2010-09-16 富士通株式会社 情報処理装置、情報処理装置の制御方法、及び情報処理装置の制御プログラム
JP2020096314A (ja) * 2018-12-14 2020-06-18 Necプラットフォームズ株式会社 システム及び暗号化処理方法

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* Cited by examiner, † Cited by third party
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JP5299281B2 (ja) * 2007-09-25 2013-09-25 富士通株式会社 情報処理装置及び制御方法
DE102010048352B3 (de) * 2010-10-13 2012-04-26 Fujitsu Technology Solutions Intellectual Property Gmbh Schnittstellenüberwachungsvorrichtung für einen Schnittstellenanschluss und Verwendung einer Schnittstellenüberwachungsvorrichtung
US10649829B2 (en) * 2017-07-10 2020-05-12 Hewlett Packard Enterprise Development Lp Tracking errors associated with memory access operations

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JPH04153838A (ja) * 1990-10-18 1992-05-27 Fujitsu Ltd 二重化システムのエラーチェック回路
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010103562A1 (ja) * 2009-03-09 2010-09-16 富士通株式会社 情報処理装置、情報処理装置の制御方法、及び情報処理装置の制御プログラム
JP5278530B2 (ja) * 2009-03-09 2013-09-04 富士通株式会社 情報処理装置、情報処理装置の制御方法、及び情報処理装置の制御プログラム
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JP2020096314A (ja) * 2018-12-14 2020-06-18 Necプラットフォームズ株式会社 システム及び暗号化処理方法

Also Published As

Publication number Publication date
US8078920B2 (en) 2011-12-13
EP2372554B1 (en) 2013-03-20
EP2372554A2 (en) 2011-10-05
EP2141596A4 (en) 2010-10-27
EP2141596A1 (en) 2010-01-06
ATE537502T1 (de) 2011-12-15
JP4629793B2 (ja) 2011-02-09
JPWO2008120352A1 (ja) 2010-07-15
EP2141596B1 (en) 2011-12-14
EP2372554A3 (en) 2012-01-18
US20100077262A1 (en) 2010-03-25

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