WO2008114430A1 - 積層型パッケージ要素、積層型パッケージ要素の端子形成方法、積層型パッケージ、及び、積層型パッケージの形成方法 - Google Patents

積層型パッケージ要素、積層型パッケージ要素の端子形成方法、積層型パッケージ、及び、積層型パッケージの形成方法 Download PDF

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Publication number
WO2008114430A1
WO2008114430A1 PCT/JP2007/055717 JP2007055717W WO2008114430A1 WO 2008114430 A1 WO2008114430 A1 WO 2008114430A1 JP 2007055717 W JP2007055717 W JP 2007055717W WO 2008114430 A1 WO2008114430 A1 WO 2008114430A1
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WIPO (PCT)
Prior art keywords
stacked package
semiconductor chip
forming
stacked
side face
Prior art date
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PCT/JP2007/055717
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English (en)
French (fr)
Inventor
Masato Ikeda
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Kabushiki Kaisha Nihon Micronics
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Publication date
Application filed by Kabushiki Kaisha Nihon Micronics filed Critical Kabushiki Kaisha Nihon Micronics
Priority to KR1020097010096A priority Critical patent/KR101125144B1/ko
Priority to JP2009505029A priority patent/JP5052597B2/ja
Priority to PCT/JP2007/055717 priority patent/WO2008114430A1/ja
Priority to US12/523,245 priority patent/US8125067B2/en
Publication of WO2008114430A1 publication Critical patent/WO2008114430A1/ja
Priority to US13/241,724 priority patent/US8486759B2/en

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Abstract

 各半導体チップへの回路の割り当てや各半導体チップの接続用端子の位置の自由度が高い半導体チップモジュールを提供する。  本発明は、表面に設けられている回路パターンと連結する接続用端子の一部が側面に設けられている、複数の半導体チップを重ね合わせて結合した半導体チップモジュールに関する。各半導体チップにおける側面の接続用端子部分が、配線パターンによって相互に接続されている。半導体チップにおける接続用端子は、表面から側面へ至るものであり、導電材をミスト状にして吹きかけることを適用して形成されたものである。
PCT/JP2007/055717 2007-03-20 2007-03-20 積層型パッケージ要素、積層型パッケージ要素の端子形成方法、積層型パッケージ、及び、積層型パッケージの形成方法 WO2008114430A1 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
KR1020097010096A KR101125144B1 (ko) 2007-03-20 2007-03-20 적층형 패키지 요소, 적층형 패키지 요소의 단자 형성방법, 적층형 패키지, 및 적층형 패키지의 형성방법
JP2009505029A JP5052597B2 (ja) 2007-03-20 2007-03-20 積層型パッケージ要素の端子形成方法、及び、積層型パッケージの形成方法
PCT/JP2007/055717 WO2008114430A1 (ja) 2007-03-20 2007-03-20 積層型パッケージ要素、積層型パッケージ要素の端子形成方法、積層型パッケージ、及び、積層型パッケージの形成方法
US12/523,245 US8125067B2 (en) 2007-03-20 2007-03-20 Method for forming terminal of stacked package element and method for forming stacked package
US13/241,724 US8486759B2 (en) 2007-03-20 2011-09-23 Method for forming terminal of stacked package element and method for forming stacked package

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PCT/JP2007/055717 WO2008114430A1 (ja) 2007-03-20 2007-03-20 積層型パッケージ要素、積層型パッケージ要素の端子形成方法、積層型パッケージ、及び、積層型パッケージの形成方法

Related Child Applications (2)

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US12/523,245 A-371-Of-International US8125067B2 (en) 2007-03-20 2007-03-20 Method for forming terminal of stacked package element and method for forming stacked package
US13/241,724 Division US8486759B2 (en) 2007-03-20 2011-09-23 Method for forming terminal of stacked package element and method for forming stacked package

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Cited By (2)

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JP2010067732A (ja) * 2008-09-10 2010-03-25 Konica Minolta Holdings Inc 配線形成方法
JP2013520786A (ja) * 2010-02-22 2013-06-06 ジャコブ,アンドレアス 半導体モジュールを製造するための方法およびシステム

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Publication number Priority date Publication date Assignee Title
TWI535653B (zh) * 2014-04-30 2016-06-01 國立臺灣大學 利用電漿處理石墨烯之裝置與方法、及其應用
KR102381754B1 (ko) 2020-09-29 2022-04-01 주식회사 에아가이아 실내 실탄사격장 벤틸레이션 시스템

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US8486759B2 (en) 2013-07-16
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US8125067B2 (en) 2012-02-28
JP5052597B2 (ja) 2012-10-17

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