WO2007139098A1 - Electronic component and method for manufacturing same - Google Patents

Electronic component and method for manufacturing same Download PDF

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Publication number
WO2007139098A1
WO2007139098A1 PCT/JP2007/060884 JP2007060884W WO2007139098A1 WO 2007139098 A1 WO2007139098 A1 WO 2007139098A1 JP 2007060884 W JP2007060884 W JP 2007060884W WO 2007139098 A1 WO2007139098 A1 WO 2007139098A1
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WIPO (PCT)
Prior art keywords
frame
circuit board
electronic component
assembly
frame body
Prior art date
Application number
PCT/JP2007/060884
Other languages
French (fr)
Japanese (ja)
Inventor
Yoichi Matsuoka
Toshinori Nakahara
Keiko Takigawa
Akihisa Matsumoto
Original Assignee
Sanyo Electric Co., Ltd.
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Publication date
Application filed by Sanyo Electric Co., Ltd. filed Critical Sanyo Electric Co., Ltd.
Priority to EP07744304A priority Critical patent/EP2023413A1/en
Priority to JP2008517940A priority patent/JP4841627B2/en
Priority to US12/301,283 priority patent/US20090154176A1/en
Publication of WO2007139098A1 publication Critical patent/WO2007139098A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58—Optical field-shaping elements
    • H01L33/60—Reflective elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483—Containers
    • H01L33/486—Containers adapted for surface mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/53—Means to assemble or disassemble
    • Y10T29/5313—Means to assemble electrical device

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Led Device Packages (AREA)

Abstract

In an electronic component (1), a frame (3) composed of a conductor is fixed on a circumference portion on the upper surface of a circuit board (2). The circuit board (2) and the frame (3) have a side surface (41) composed of a same surface, and the circuit board (2) is provided with terminal sections (16, 17) exposed on the side surface (41). The frame (3) has an empty space (22) over a lower surface facing the circuit board (2) and a side surface (20). The empty space (22) may be filled with an insulating material.

Description

明 細 書  Specification
電子部品及びその製造方法  Electronic component and manufacturing method thereof
技術分野  Technical field
[0001] 本発明は、回路基板の上面に枠体を固定した電子部品とその製造方法に関し、詳 しくは、スィッチ内照明、 LEDディスプレイ、ノ ックライト光源、光プリンターヘッド、力 メラフラッシュ等の光源として用いられる表面実装型 LEDに好適な電子部品及びそ の製造方法に関する。  TECHNICAL FIELD [0001] The present invention relates to an electronic component in which a frame is fixed on the upper surface of a circuit board and a method for manufacturing the same, and more particularly, a light source such as an in-switch illumination, an LED display, a knock light source, an optical printer head, and a power flash. The present invention relates to an electronic component suitable for a surface-mounted LED used as a manufacturing method and a manufacturing method thereof.
背景技術  Background art
[0002] 従来の電子部品として特許文献 1には表面実装型 LEDが開示されている。図 8は この表面実装型 LEDを示す断面図である。表面実装型 LEDは絶縁基板 101の上 面側と下面側に電極 102、 103を備えている。電極 102、 103はスルホール 104によ り導通される。絶縁基板 101の開孔下には電極 105が設けられ、電極 105には LED 素子 106が導電材料で実装される。 LED素子 106の表側電極と電極 102は金属細 線 107により接続される。  [0002] Patent Document 1 discloses a surface-mounted LED as a conventional electronic component. FIG. 8 is a cross-sectional view showing this surface-mounted LED. The surface-mount type LED includes electrodes 102 and 103 on the upper surface side and the lower surface side of the insulating substrate 101. The electrodes 102 and 103 are conducted through the through hole 104. An electrode 105 is provided under the opening of the insulating substrate 101, and an LED element 106 is mounted on the electrode 105 with a conductive material. The front electrode of the LED element 106 and the electrode 102 are connected by a metal thin wire 107.
[0003] 表面実装型 LEDの周部には枠体である反射枠 108が設けられる。反射枠 108は 一般に榭脂を材料とした絶縁材料で構成され、絶縁基板 101の電極 102、 105上に 接着剤 110により固定される。反射枠 108の開孔部には透光性榭脂 109が充填され る。これにより、 LED素子 106及び金属細線 107が封止される。  [0003] A reflection frame 108, which is a frame body, is provided on the periphery of the surface-mounted LED. The reflection frame 108 is generally made of an insulating material made of resin, and is fixed on the electrodes 102 and 105 of the insulating substrate 101 by an adhesive 110. The opening portion of the reflection frame 108 is filled with a translucent resin 109. Thereby, the LED element 106 and the thin metal wire 107 are sealed.
[0004] また、放熱のために反射枠 108を金属部材で構成した表面実装型 LEDが知られ ている。この表面実装型 LEDは図 9に示すように、有極性電極の短絡防止のために 電極 102、 105の表面に絶縁膜 111が施されている。  [0004] In addition, a surface-mounted LED in which the reflection frame 108 is made of a metal member for heat dissipation is known. As shown in FIG. 9, this surface-mount type LED has an insulating film 111 on the surfaces of the electrodes 102 and 105 to prevent short-circuiting of the polar electrodes.
[0005] 特許文献 1 :特開平 7— 235696号公報 (第 8図）  Patent Document 1: Japanese Patent Laid-Open No. 7-235696 (FIG. 8)
発明の開示  Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0006] この種の電子部品は一つの基板に複数の素子を形成しておき、ダイシングソ一等 のダイシング装置によって個々の部品に分離することによって製造される。図 9の H 部に示すように、反射枠 108が金属部材カも成る電子部品をダイシングソ一によつて 個々の部品に分割すると、反射枠 108の下方に金属のバリ（切くず） 112が生じる。こ のバリ 112がその下側に位置する有極性の電極 102、 105に接触すると、電気回路 に短絡回路を形成する要因になる。 [0006] This type of electronic component is manufactured by forming a plurality of elements on a single substrate and separating them into individual components by a dicing apparatus such as a dicing machine. As shown in part H of Fig. 9, an electronic component whose reflecting frame 108 is also a metal member is attached by a dicing saw. When divided into individual parts, a metal burr 112 is generated below the reflection frame 108. When the burr 112 contacts the polar electrodes 102 and 105 located below the burr 112, it causes a short circuit in the electric circuit.
[0007] そこで本発明は、金属材料を含む枠体による短絡回路の形成を防止できる電子部 品を提供することを目的とする。 Therefore, an object of the present invention is to provide an electronic component that can prevent the formation of a short circuit by a frame body containing a metal material.
課題を解決するための手段  Means for solving the problem
[0008] 上記目的を解決するために本発明は、回路基板の上面の周部に枠体を固定した 電子部品であって、前記回路基板及び前記枠体は同一面から成る側面を有し、前 記回路基板は前記側面に露出する端子部を有するとともに、前記枠体は前記回路 基板に面した下面と前記側面との間に跨る空所を有することを特徴としている。  In order to solve the above-mentioned object, the present invention provides an electronic component in which a frame is fixed to a peripheral portion of the upper surface of a circuit board, and the circuit board and the frame have side surfaces formed from the same surface, The circuit board has a terminal portion exposed on the side surface, and the frame body has a space extending between a lower surface facing the circuit board and the side surface.
[0009] この構成〖こよると、回路基板上に固定される枠体と回路基板表面に形成される端子 部とは端子部が露出する電子部品の側面において空所によって離れて配置される。 これにより、枠体が金属力 成る場合に切断によって発生するバリによる端子部と枠 体との短絡が空所により防止される。また、回路基板を構成する絶縁基板が薄型化さ れた場合に、回路基板の固定に用いる半田ペーストの高さよりも空所の高さ (深さ）を 高くすることによって、半田付けによる絶縁不良を防止することができる。  According to this configuration, the frame fixed on the circuit board and the terminal part formed on the surface of the circuit board are arranged apart from each other by a space on the side surface of the electronic component where the terminal part is exposed. As a result, short-circuit between the terminal portion and the frame due to burrs generated by cutting when the frame is made of metal force is prevented by the void. In addition, when the insulating substrate that constitutes the circuit board is made thinner, the insulation defect due to soldering is increased by making the height (depth) of the void higher than the height of the solder paste used to fix the circuit board. Can be prevented.
[0010] また本発明は上記構成の電子部品において、前記端子部は前記回路基板の前記 枠体力ゝら離れた側の面に形成されることを特徴としている。  [0010] Further, the present invention is characterized in that in the electronic component configured as described above, the terminal portion is formed on a surface of the circuit board on a side away from the frame body force.
[0011] また本発明は上記構成の電子部品にお!/ヽて、絶縁体から成る被覆材料を前記空 所に充填したことを特徴として 、る。  [0011] Further, the present invention is characterized in that the above-described electronic component is filled with a coating material made of an insulator in the space.
[0012] また本発明は上記構成の電子部品において、前記枠体は前記空所に面した表面 を前記枠体よりも硬度の高 、所定厚みの被覆材料で覆われることを特徴として 、る。  [0012] In the electronic component having the above-described configuration, the frame body is characterized in that the surface facing the void is covered with a coating material having a higher hardness and a predetermined thickness than the frame body.
[0013] また本発明は上記構成の電子部品にお 、て、前記被覆材料は前記枠体を化成処 理して成ることを特徴としている。この構成によると、例えば枠体がアルミニウム力も成 る場合はアルマイト処理によって形成されるアルマイトにより空所の表面が覆われる。  [0013] Further, the present invention is characterized in that, in the electronic component configured as described above, the coating material is formed by subjecting the frame to a chemical conversion treatment. According to this configuration, for example, when the frame also has an aluminum force, the surface of the void is covered with anodized formed by anodizing.
[0014] また本発明は上記構成の電子部品において、前記枠体に囲まれた内部に LED素 子を配置し、前記 LED素子の出射光を前記枠体により反射する表面実装型 LEDか ら成ることを特徴としている。 [0015] また本発明は、電極の端子部を有した回路基板が複数形成される回路基板集合 体を供給する工程と、複数の枠体を有した枠体集合体を形成する工程と、前記回路 基板集合体と前記枠体集合体とを固定する工程と、固定された前記回路基板集合 体及び前記枠体集合体を前記枠体及び前記端子部上で切断して分割する工程とを 備えた電子部品の製造方法であって、前記回路基板集合体及び前記枠体集合体の 切断面に沿うとともに切断幅よりも広い幅の溝を前記枠部の前記回路基板集合体に 面した側に形成する工程を前記回路基板集合体と前記枠体集合体を固定する工程 の前に設けたことを特徴として 、る。 [0014] Further, the present invention is an electronic component having the above-described configuration, and includes a surface-mounted LED in which an LED element is disposed inside the frame body, and light emitted from the LED element is reflected by the frame body. It is characterized by that. [0015] The present invention also includes a step of supplying a circuit board assembly in which a plurality of circuit boards having electrode terminal portions are formed, a step of forming a frame body assembly having a plurality of frames, A step of fixing the circuit board assembly and the frame assembly; and a step of cutting and fixing the fixed circuit board assembly and the frame assembly on the frame and the terminal portion. A method of manufacturing an electronic component, wherein a groove having a width that is along a cut surface of the circuit board assembly and the frame assembly and wider than the cut width is formed on a side of the frame portion facing the circuit board assembly. The forming step is provided before the step of fixing the circuit board assembly and the frame assembly.
[0016] この構成によると、回路基板集合体には複数の回路基板が形成され、枠体集合体 には複数の枠体が形成される。枠部には一面に溝が形成され、枠体集合体は溝を 回路基板集合体に面して回路基板集合体上に固定される。一体化された枠体集合 体及び回路基板集合体は溝上をダイシングソ一等により切断して複数の枠部及び回 路基板に分割される。回路基板の切断面には枠部の切断面と同一面内に端子部が 露出する。また、溝幅が切断しろよりも広いため、枠部の回路基板に面した下面と切 断面との間に残留した溝により空所が形成される。切断面内では枠部と端子部とが 空所によって離れて配置される。これにより、枠体が金属から成る場合に切断によつ て発生するバリによる端子部と枠体との短絡が空所により防止される。  [0016] According to this configuration, a plurality of circuit boards are formed in the circuit board assembly, and a plurality of frames are formed in the frame assembly. A groove is formed on one surface of the frame portion, and the frame assembly is fixed on the circuit board assembly with the groove facing the circuit board assembly. The integrated frame assembly and circuit board assembly are cut into a plurality of frame portions and circuit boards by cutting the grooves with a dicing saw or the like. The terminal part is exposed on the cut surface of the circuit board in the same plane as the cut surface of the frame part. Further, since the groove width is wider than the cutting width, a void is formed by the groove remaining between the lower surface of the frame portion facing the circuit board and the cut surface. Within the cut plane, the frame and terminal are spaced apart by a void. As a result, when the frame is made of metal, a short circuit between the terminal portion and the frame due to burrs generated by cutting is prevented by the void.
[0017] また本発明は上記構成の電子部品の製造方法において、前記溝に絶縁体力 成 る被覆材料を充填する工程を備えたことを特徴として 、る。  [0017] Further, the present invention is characterized in that in the method for manufacturing an electronic component having the above-described configuration, a step of filling the groove with a coating material capable of forming an insulator is provided.
[0018] また本発明は上記構成の電子部品の製造方法において、前記溝の表面を前記枠 体よりも硬度の高い所定厚みの被覆材料で覆う工程を備えたことを特徴としている。 発明の効果  [0018] Further, the present invention is characterized in that in the method for manufacturing an electronic component having the above-described configuration, a step of covering the surface of the groove with a coating material having a predetermined thickness higher in hardness than the frame body is provided. The invention's effect
[0019] 本発明によると、枠体は回路基板に面した下面と側面との間に跨る空所を有するの で、枠体に金属材料が含まれる場合に金属バリに起因する短絡回路の形成を防止 することができる。従って、電子部品の動作を安定なものとすることができる。また、回 路基板の絶縁基板が薄くなつて半田ペーストを塗布した箇所に回路基板が固定され る場合は、半田ペーストの厚さよりも高い空所を設けることにより、半田付けによる絶 縁不良を防止することができる。 [0020] また本発明によると、端子部は回路基板の枠体力 離れた側の面に形成されるの で、端子部と枠部とをより離して配置することができる。従って、金属バリによる短絡を より確実に防止することができる。 [0019] According to the present invention, since the frame body has a space extending between the lower surface and the side surface facing the circuit board, formation of a short circuit due to metal burrs when the frame body contains a metal material. Can be prevented. Therefore, the operation of the electronic component can be stabilized. Also, if the circuit board is fixed at a location where the insulating substrate of the circuit board is thin and the solder paste is applied, a space higher than the thickness of the solder paste is provided to prevent insulation failure due to soldering. can do. [0020] According to the present invention, since the terminal portion is formed on the surface of the circuit board on the side away from the frame body force, the terminal portion and the frame portion can be arranged further apart. Therefore, a short circuit due to a metal burr can be prevented more reliably.
[0021] また本発明によると、絶縁体力 成る被覆材料を空所に充填したので、端子部と枠 体との絶縁性をより向上するとともに、金属ノ リの発生をより低減することができる。 [0021] According to the present invention, since the coating material having an insulating force is filled in the voids, the insulation between the terminal portion and the frame can be further improved, and the generation of metal dust can be further reduced.
[0022] また本発明によると、枠体は空所に面した表面を枠体よりも硬度の高い所定厚みの 被覆材料で覆われるので、金属ノ リの発生をより低減することができる。 [0022] According to the present invention, since the frame body is covered with the coating material having a predetermined thickness that is harder than the frame body, the surface facing the void can be further reduced.
[0023] また本発明によると、被覆材料は枠体を化成処理して成るので、枠体よりも硬度の 高 、被覆材料を容易に形成することができる。 [0023] According to the present invention, since the coating material is formed by chemical conversion of the frame, the coating material can be easily formed with higher hardness than the frame.
図面の簡単な説明  Brief Description of Drawings
[0024] [図 1]本発明の第 1実施形態の電子部品を示す斜視断面図 FIG. 1 is a perspective sectional view showing an electronic component according to a first embodiment of the present invention.
[図 2]本発明の第 1実施形態の電子部品を示す上面図  FIG. 2 is a top view showing the electronic component of the first embodiment of the present invention.
[図 3]本発明の第 1実施形態の電子部品を示す下面図  FIG. 3 is a bottom view showing the electronic component of the first embodiment of the present invention.
[図 4]本発明の第 1実施形態の電子部品の被膜を省略した下面図  FIG. 4 is a bottom view in which the coating of the electronic component of the first embodiment of the present invention is omitted.
[図 5]本発明の第 1実施形態の電子部品の製造方法の一例を示す工程図  FIG. 5 is a process chart showing an example of a method for manufacturing an electronic component according to the first embodiment of the present invention.
[図 6]本発明の第 2実施形態の電子部品を示す斜視断面図  FIG. 6 is a perspective sectional view showing an electronic component according to a second embodiment of the present invention.
[図 7]本発明の第 3実施形態の電子部品を示す斜視断面図  FIG. 7 is a perspective sectional view showing an electronic component according to a third embodiment of the present invention.
[図 8]従来の電子部品を示す断面図  [Figure 8] Cross-sectional view showing a conventional electronic component
[図 9]従来の他の電子部品を示す断面図  [Figure 9] Sectional view showing another conventional electronic component
符号の説明  Explanation of symbols
[0025] 1 表面実装型 LED [0025] 1 Surface-mount LED
2 回路基板  2 Circuit board
3 枠体  3 Frame
4 電極 (無極性）  4 electrodes (Nonpolar)
5、 6 電極 (有極性）  5, 6 electrodes (polar)
7、 106 LED素子  7, 106 LED element
8、 9、 107 金属細線  8, 9, 107 Metal wire
10 開孔 11 透光性樹脂 10 Opening 11 Translucent resin
12 絶縁基板  12 Insulating substrate
13、 14 貫通孔  13, 14 Through hole
15 電極 (放熱用）  15 electrodes (for heat dissipation)
16、 17 電極 (配線用)  16, 17 electrodes (for wiring)
18 くぼみ  18 Recess
19 被膜  19 Coating
20 側面  20 sides
21 カット面  21 Cut surface
22 空所  22 void
23 被覆材料  23 Coating material
24 絶縁層  24 Insulation layer
25 接着剤  25 Adhesive
26 アルミニウム薄板  26 Aluminum sheet
27 枠体集合体  27 Frame assembly
28 溝  28 groove
29 基板集合体  29 Board assembly
30 ダイシングソー  30 Dicing saw
41 側面  41 side
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0026] 以下に本発明の実施形態を図面を参照して説明する。図 1は第 1実施形態の電子 部品である表面実装型 LED (発光ダイオード） 1を示す斜視断面図である。図 2は表 面実装型 LED1の透光性榭脂 11を省略した状態を示す上面図である。図 3は表面 実装型 LED1を示す下面図である。図 4は図 3の被膜 19 (ハッチング部）を省略した 状態を示す下面図である。  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a perspective sectional view showing a surface-mounted LED (light emitting diode) 1 which is an electronic component of the first embodiment. FIG. 2 is a top view showing a state where the translucent resin 11 of the surface-mounted LED 1 is omitted. FIG. 3 is a bottom view showing the surface-mounted LED 1. FIG. 4 is a bottom view showing a state in which the film 19 (hatched portion) in FIG. 3 is omitted.
[0027] 表面実装型 LED1は回路基板 2の上面に枠体 3を固定した構造になっている。枠 体 3は上下に貫通する開孔 10が形成され、回路基板 2の周部に配される。開口 10内 には無極性の電極 4及び有極性の電極 5、 6が配される。電極 4、 5、 6は回路基板 2 の絶縁基板 12の上面側に形成される。電極 5は正負の一方の極性を有し、電極 6は 他方の極性を有する。電極 5は後述する複数の各 LED素子 7に対応して電極 5R、 5 G、 5Bを有している。電極 6は各 LED素子 7に対応して電極 6R、 6G、 6Bを有してい る。電極 4は電極 5、 6と電気的に分離されて極性を持たない無極性（中性）になって いる。 The surface mount LED 1 has a structure in which a frame 3 is fixed to the upper surface of a circuit board 2. The frame body 3 is formed with an opening 10 penetrating in the vertical direction, and is arranged on the peripheral portion of the circuit board 2. A nonpolar electrode 4 and polar electrodes 5 and 6 are arranged in the opening 10. Electrodes 4, 5, and 6 are circuit boards 2 The insulating substrate 12 is formed on the upper surface side. Electrode 5 has one polarity, positive and negative, and electrode 6 has the other polarity. The electrode 5 has electrodes 5R, 5G, and 5B corresponding to a plurality of LED elements 7 to be described later. The electrode 6 has electrodes 6R, 6G, and 6B corresponding to each LED element 7. Electrode 4 is electrically separated from electrodes 5 and 6 and is nonpolar (neutral) having no polarity.
[0028] 正負の極性を持つ複数の電極 5 (5R、 5G、 5B)、 6 (6R、 6G、 6B)は枠体 3の開孔 10内の回路基板 2の上面に配置される。無極性の電極 4は枠体 3の開孔 10内の電 極 5、 6以外の領域に配置されるとともに、枠体 3の下面と回路基板 2との間に配置さ れる。即ち、電極 4は電極 5、 6とその周囲の絶縁溝を除いて回路基板 2の上面のほ ぼ全面を覆うように広範囲にわたって形成されて 、る。  A plurality of electrodes 5 (5R, 5G, 5B), 6 (6R, 6G, 6B) having positive and negative polarities are arranged on the upper surface of the circuit board 2 in the opening 10 of the frame 3. The nonpolar electrode 4 is disposed in a region other than the electrodes 5 and 6 in the opening 10 of the frame 3 and is disposed between the lower surface of the frame 3 and the circuit board 2. That is, the electrode 4 is formed over a wide range so as to cover almost the entire upper surface of the circuit board 2 except for the electrodes 5 and 6 and the surrounding insulating grooves.
[0029] 無極性の電極 4上には回路素子としての LED素子 7が搭載される。 LED素子 7の 一方の電極は金属細線 8により有極性の電極 5に接続される。 LED素子 7の他方の 電極は金属細線 9により有極性の電極 6に接続される。開孔 10には透光性榭脂 11 が充填され、透光性榭脂 11により LED素子 7及び金属細線 8、 9が封止される。  An LED element 7 as a circuit element is mounted on the nonpolar electrode 4. One electrode of the LED element 7 is connected to the polar electrode 5 by a thin metal wire 8. The other electrode of the LED element 7 is connected to the polar electrode 6 by a thin metal wire 9. The opening 10 is filled with a translucent resin 11, and the LED element 7 and the thin metal wires 8 and 9 are sealed with the translucent resin 11.
[0030] 回路基板 2の絶縁基板 12には電極 4の下方に貫通孔 13が設けられ、電極 5、 6の 下方に貫通孔 14が設けられる。絶縁基板 12の下面側には電極 15、 16、 17が形成 される。電極 16は各 LED素子 7に対応して電極 16R、 16G、 16Bを有している。電 極 17は各 LED素子 7に対応して電極 17R、 17G、 17Bを有している。貫通孔 13を 介して電極 4と電極 15とが接続される。貫通孔 14を介して電極 5R、 5G、 5Bと電極 1 6R、 16G、 16Bとが接続される。また、貫通孔 14を介して電極 6R、 6G、 6Bと電極 1 7R、 17G、 17Bとが接続される。  The insulating substrate 12 of the circuit board 2 is provided with a through hole 13 below the electrode 4 and a through hole 14 below the electrodes 5 and 6. Electrodes 15, 16, and 17 are formed on the lower surface side of the insulating substrate 12. The electrode 16 has electrodes 16R, 16G, and 16B corresponding to the LED elements 7. Electrode 17 has electrodes 17R, 17G, and 17B corresponding to each LED element 7. The electrode 4 and the electrode 15 are connected through the through hole 13. The electrodes 5R, 5G, 5B and the electrodes 16R, 16G, 16B are connected through the through hole 14. Further, the electrodes 6R, 6G, 6B and the electrodes 17R, 17G, 17B are connected through the through hole 14.
[0031] 図 4において有極性の電極 5、 6と接続された電極 16 (16R、 16G、 16B)、 17 (17 R、 17G、 17B)と、無極性の電極 4と接続された電極 15をクロスハッチングによって 示している。有極性の電極 5、 6と接続された電極 16 (16R、 16G、 16B)、 17 (17R、 17G、 17B)は主に配線用で有極性の電極として機能しする。無極性の電極 4と接続 された電極 15は主に放熱用で無極性の電極として機能する。  In FIG. 4, electrodes 16 (16R, 16G, 16B), 17 (17R, 17G, 17B) connected to the polar electrodes 5, 6 and an electrode 15 connected to the nonpolar electrode 4 are connected. This is indicated by cross-hatching. The electrodes 16 (16R, 16G, 16B) and 17 (17R, 17G, 17B) connected to the polar electrodes 5 and 6 are mainly used for wiring and function as polar electrodes. The electrode 15 connected to the nonpolar electrode 4 is mainly for heat dissipation and functions as a nonpolar electrode.
[0032] 放熱用の電極 15には絶縁基板 12に設けた貫通孔 13の平面形状が反映されたく ぼみ 18が形成される。くぼみ 18によって回路基板 2の裏面には幾何学的な模様が 形成されている。放熱用の電極 15を多数の貫通孔 13を介して無極性の電極 4と直 接接続して ヽるので、 LED素子 7で発生した熱を放熱用の電極 15を介して効率的に 放熱することができる。これにより、 LED素子 7の放熱が促進されるため、 LED素子 7 の温度上昇による発光効率の低下を低減して電流量に比例した高い輝度を得ること ができる。従って、表面実装型 LED 1の機能性の向上及び寿命の向上の効果が得ら れる。 A recess 18 reflecting the planar shape of the through-hole 13 provided in the insulating substrate 12 is formed in the heat radiation electrode 15. Recess 18 creates a geometric pattern on the back of circuit board 2. Is formed. Since the heat dissipation electrode 15 is directly connected to the nonpolar electrode 4 through a large number of through holes 13, the heat generated in the LED element 7 is efficiently dissipated through the heat dissipation electrode 15. be able to. As a result, the heat dissipation of the LED element 7 is promoted, so that a decrease in light emission efficiency due to the temperature rise of the LED element 7 can be reduced and a high luminance proportional to the amount of current can be obtained. Therefore, the effects of improving the functionality and life of the surface-mounted LED 1 can be obtained.
[0033] 尚、配線用の電極 16、 17は図 3に示すように、端子部分を除いて絶縁性の被膜 19 で被覆されて 、る。放熱用の電極 15は絶縁性の被膜 19で一部を被覆することもでき るが、放熱性を高めるために絶縁性の被膜 19で被覆することなく全て露出されてい る。  As shown in FIG. 3, the wiring electrodes 16 and 17 are covered with an insulating film 19 except for the terminal portions. The heat radiation electrode 15 can be partially covered with the insulating film 19, but is entirely exposed without being covered with the insulating film 19 in order to improve heat dissipation.
[0034] 配線用の電極 16、 17の端子部分は、半田などの導電材料で別の回路基板の端子 部分に固定される。放熱用の電極 15も半田などの導電材料で別の回路基板の端子 部分やヒートシンク部に固定される。  [0034] The terminal portions of the wiring electrodes 16, 17 are fixed to a terminal portion of another circuit board with a conductive material such as solder. The heat dissipation electrode 15 is also fixed to a terminal portion of another circuit board or a heat sink portion with a conductive material such as solder.
[0035] 枠体 3は熱伝導性に優れる材料で構成され、本実施形態ではアルミニウムを用い ているがマグネシウムやその他の金属材料を用いることもできる。また、金属材料以 外にも榭脂表面やセラミック表面に金属材料を被膜した部材、複数の金属材料ゃセ ラミック材料を榭脂ゃ金属などの接着材料で連結した部材、榭脂に金属を分散させ た部材などを用いることもできる。  [0035] The frame 3 is made of a material having excellent thermal conductivity. In this embodiment, aluminum is used, but magnesium or other metal materials can also be used. In addition to metal materials, members coated with a metal material on the surface of a resin or ceramic, members made of multiple metal materials or ceramic materials connected with an adhesive material such as a resin, and metal dispersed in the resin It is also possible to use such a member.
[0036] 電極 16、 17の端子部が露出する側の表面実装型 LED1の側面 41は図 1に示すよ うに枠体 3の側面 20と同一面力も成り、枠体 3の下部には溝力も成る空所 22が形成 される。空所 22は枠体 3の側面 20と下面に跨るカット面 21により形成される。カット面 21による空所 22は断面形状が 1/4円になっているが、絶縁距離を保つことができ れば断面形状を三角形や四角形等の他の形状にしてもよい。  [0036] The side surface 41 of the surface-mounted LED 1 on the side where the terminal portions of the electrodes 16 and 17 are exposed has the same surface force as the side surface 20 of the frame 3 as shown in FIG. A void 22 is formed. The void 22 is formed by a cut surface 21 straddling the side surface 20 and the lower surface of the frame 3. The space 22 formed by the cut surface 21 has a cross-sectional shape of 1/4 circle. However, the cross-sectional shape may be other shapes such as a triangle or a quadrangle as long as the insulation distance can be maintained.
[0037] カット面 21によって枠体 3の側面 20と下面に跨る角部分に形成される空所 22には 被覆材料 23が充填される。被覆材料 23は絶縁材料から成るが、他の実施形態とし て後述するように、空所 22を充填せずに所定厚みでカット面 21に被覆材料 23を形 成する場合は導電性の材料にしてもよい。また、カット面 21を被覆することなく露出し ておいてもよい。 [0038] 枠体 3はその下面が無極性の電極 4に直接接するように、接着剤 25によって回路 基板 2〖こ固定される。回路基板 2の上面の外周部には接着剤 25を無極性の電極 4の 上面とほぼ同一面内に配置するためのくぼみが形成される。このくぼみに接着剤 25 を収めているので、接着剤 25の厚みによって枠体 3と回路基板 2の直接接触が妨げ られることを防止することができる。接着剤 25配置用のくぼみの下面側は絶縁榭脂 等の絶縁層 24で覆われて 、る。 [0037] A coating material 23 is filled in a void 22 formed in a corner portion between the side surface 20 and the lower surface of the frame 3 by the cut surface 21. The covering material 23 is made of an insulating material. However, as will be described later in another embodiment, when the covering material 23 is formed on the cut surface 21 with a predetermined thickness without filling the space 22, it is made of a conductive material. May be. Further, the cut surface 21 may be exposed without being covered. [0038] The circuit board 2 is fixed by an adhesive 25 so that the lower surface of the frame 3 is in direct contact with the nonpolar electrode 4. On the outer periphery of the upper surface of the circuit board 2, a recess is formed for disposing the adhesive 25 in substantially the same plane as the upper surface of the nonpolar electrode 4. Since the adhesive 25 is housed in the recess, it is possible to prevent the direct contact between the frame 3 and the circuit board 2 from being hindered by the thickness of the adhesive 25. The lower surface side of the recess for arranging the adhesive 25 is covered with an insulating layer 24 such as insulating resin.
[0039] このように構成された表面実装型 LED1の電極 4、 5、 6、 15、 16、 17には、 Cu、 Fe 、 Al、などの導電性、放熱性の良い金属や合金を用いる。また、電極 4、 5、 6、 15、 1 6、 17の表面には Ni、 Au、 Ag、 Pd、 Snメツキやこれらを複数積層させたメツキを行う 事が好ましい。また、 LED素子 7の各電極と電極 5、 6とを電気的に接続する金属細 線 8、 9には Ag、 Au、 A1等が用いられる。  [0039] For the electrodes 4, 5, 6, 15, 16, and 17 of the surface-mounted LED 1 configured as described above, a metal or alloy having good conductivity and heat dissipation such as Cu, Fe, and Al is used. Further, it is preferable to perform Ni, Au, Ag, Pd, Sn plating or a method of stacking a plurality of these on the surfaces of the electrodes 4, 5, 6, 15, 16, 16, and 17. Further, Ag, Au, A1, or the like is used for the metal wires 8 and 9 that electrically connect each electrode of the LED element 7 and the electrodes 5 and 6.
[0040] 上記構成の表面実装型 LED1において、有極性の電極 5、 6に電極 16、 17の端子 部を通じて所定の電圧を加えると、金属細線 8、 9を通じて LED素子 7に電流が流れ る。これにより、 LED素子 7が固有の波長で発光する。 LED素子 7から出射された光 は透光性榭脂 11を通じて外部に取り出される。  In the surface-mounted LED 1 having the above configuration, when a predetermined voltage is applied to the polar electrodes 5 and 6 through the terminal portions of the electrodes 16 and 17, a current flows to the LED element 7 through the metal thin wires 8 and 9. Thereby, the LED element 7 emits light with a unique wavelength. Light emitted from the LED element 7 is extracted to the outside through the translucent resin 11.
[0041] LED素子 7は複数設けられ、 3原色である赤、緑、青の各発光ダイオードを用いる ことができる。これ以外に、 2色、あるいは、 1色の発光ダイオードを用いてもよぐ 4色 以上の発光ダイオードを用いることもできる。 LED素子 7が複数の発光色を有してこ れらが同時に発光する場合は、各色が混色されて透光性榭脂 11を通じて外部に取 り出される。  [0041] A plurality of LED elements 7 are provided, and light emitting diodes of three primary colors, red, green, and blue, can be used. In addition, it is possible to use light emitting diodes of four colors or more, which may use light emitting diodes of two colors or one color. When the LED element 7 has a plurality of emission colors and emits light at the same time, the colors are mixed and taken out through the translucent resin 11.
[0042] また、透光性榭脂 11の上面を一部を凹欠する加工や上面に別部材を付加すること によって上面形状を半円柱状や半球状に形成してもよい。これにより、 LED素子 7か ら発せられる光が集光され、上方への光の出射効率がさらに向上する。  [0042] Further, the upper surface of the translucent resin 11 may be formed into a semi-cylindrical shape or a hemispherical shape by processing a part of the upper surface of the translucent resin 11 or adding another member to the upper surface. As a result, the light emitted from the LED element 7 is condensed, and the light emission efficiency upward is further improved.
[0043] 図 5の（1)〜（9)は表面実装型 LED 1の代表的な製造工程を示す工程図である。  [0043] (1) to (9) of FIG. 5 are process diagrams showing typical manufacturing processes of the surface-mounted LED 1. FIG.
ここで、回路基板 2や枠体 3の構造は一部を省略して簡素化した表現としている。図 5 (1)に示す第 1工程ではアルミニウム製の薄板 26が供給される。アルミニウム製の薄 板 26の厚さは、 0. 5mmから 2mm、あるいは 0. 5mmから 3mmの範囲の厚さから選 択される。 [0044] 図 5 (2)に示す第 2工程ではアルミニウム製の薄板 26には上下に貫通したすり鉢状 の開孔 10が X方向と Y方向（図 1参照）にマトリックス状に複数形成される。開孔 10は エッチングやドリルカ卩ェ等によって形成することができる。開孔 10が形成されたアルミ ニゥム製の薄板 26は複数の枠体 3 (図 1参照）が形成された枠体集合体 27を構成す る。 Here, the structure of the circuit board 2 and the frame 3 is simplified by omitting a part thereof. In the first step shown in FIG. 5 (1), an aluminum thin plate 26 is supplied. The thickness of the aluminum sheet 26 is selected from a thickness ranging from 0.5 mm to 2 mm, or from 0.5 mm to 3 mm. [0044] In the second step shown in Fig. 5 (2), a plurality of mortar-shaped openings 10 penetrating vertically are formed in a matrix in the X and Y directions (see Fig. 1) in the aluminum thin plate 26. . The opening 10 can be formed by etching or drilling. The aluminum thin plate 26 in which the openings 10 are formed constitutes a frame assembly 27 in which a plurality of frames 3 (see FIG. 1) are formed.
[0045] 枠体集合体 27は X方向の切断予定線と、 X方向に対して所定角度で交差した Y方 向の切断予定線とに沿って後述するように切断される。上記例では図 5の紙面と平行 な方向を X方向とし、紙面に直交する方向を Y方向（図中、円の中心にドットを含む記 号によって Y方向の切断予定線を示して 、る）として！/、る。  [0045] The frame aggregate 27 is cut as described later along a planned cutting line in the X direction and a planned cutting line in the Y direction that intersects the X direction at a predetermined angle. In the above example, the direction parallel to the paper surface in FIG. 5 is the X direction, and the direction perpendicular to the paper surface is the Y direction (in the figure, the cut line in the Y direction is indicated by a symbol including a dot at the center of the circle) As! /
[0046] 図 5 (3)に示す第 3工程では開孔 10が形成されたアルミニウムの薄板 26の下面に 、 Y方向の切断予定線と一致する溝 28が所定の深さで形成される。溝 28は後述する 切断幅よりも幅が広くなつている。溝 28はエッチングによる化学力卩ェゃダイシングソ 一による機械カ卩ェなど、種々の公知の方法によって形成することができる。溝 28の深 さは薄板 26を貫通しな 、深さであればょ 、。  In the third step shown in FIG. 5 (3), a groove 28 having a predetermined depth is formed on the lower surface of the aluminum thin plate 26 in which the opening 10 is formed, which coincides with the planned cutting line in the Y direction. The groove 28 is wider than the cutting width described later. The groove 28 can be formed by various known methods such as chemical force by etching or mechanical cleaning by a dicing machine. The depth of the groove 28 should not penetrate through the thin plate 26.
[0047] 図 5 (4)に示す第 4工程では第 3工程で形成された溝 28に被覆材料 23を充填する 。溝 28を完全に塞ぐ場合は被覆材料 23としてレジスト等の絶縁材料を用いる。  In the fourth step shown in FIG. 5 (4), the coating material 23 is filled into the groove 28 formed in the third step. When the groove 28 is completely closed, an insulating material such as a resist is used as the covering material 23.
[0048] 図 5 (5)に示す第 5工程では回路基板集合体 29が供給される。この回路基板集合 体 29は X、 Y方向の切断予定線に沿って切断されることによって複数の回路基板 2 ( 図 1参照）が形成されることになる。  [0048] In the fifth step shown in FIG. 5 (5), the circuit board assembly 29 is supplied. The circuit board assembly 29 is cut along the planned cutting lines in the X and Y directions, thereby forming a plurality of circuit boards 2 (see FIG. 1).
[0049] 図 5 (6)に示す第 6工程では枠体集合体 27と回路基板集合体 29が切断予定線を 一致して固定される。枠体集合体 27と回路基板集合体 29の固定は絶縁性の接着剤 25によって行われる。絶縁の不要な箇所において導電性の接着剤や半田等の導電 接合材を用いて固定してもよぐその他の固定手段を用いてもょ ヽ。  [0049] In the sixth step shown in Fig. 5 (6), the frame assembly 27 and the circuit board assembly 29 are fixed with their planned cutting lines aligned. The frame assembly 27 and the circuit board assembly 29 are fixed by an insulating adhesive 25. Use other fixing means in place where insulation is not required, using conductive adhesives such as conductive adhesive or solder.
[0050] 図 5 (7)に示す第 7工程では回路基板集合体 29に LED素子 7を搭載し、ワイヤー ボンドによって金属細線 8、 9の配線が行われる。  [0050] In the seventh step shown in FIG. 5 (7), the LED element 7 is mounted on the circuit board assembly 29, and the fine metal wires 8 and 9 are wired by wire bonding.
[0051] 図 5 (8)に示す第 8工程では LED素子 7や金属細線 8、 9を埋めるように光を透過す る透光性榭脂 11が開孔 10に充填され、透光性榭脂 11を硬化する。  [0051] In the eighth step shown in FIG. 5 (8), a transparent resin 11 that transmits light is filled in the opening 10 so as to fill the LED element 7 and the fine metal wires 8 and 9, so that the transparent glass Cures fat 11.
[0052] 図 5 (9)に示す第 9工程ではダイシングソー 30を用いて、 X方向と Y方向の切断予 定線に沿って枠体集合体 27及び回路基板集合体 29が切断される。これにより、複 数の表面実装型 LED1が分離して得られる。 [0052] In the ninth step shown in FIG. 5 (9), a dicing saw 30 is used to cut the X and Y directions. The frame assembly 27 and the circuit board assembly 29 are cut along the fixed line. As a result, a plurality of surface-mounted LEDs 1 can be obtained separately.
[0053] このようにして、前述の図 1〜図 4に示す電子部品としての表面実装型 LED1が製 造される。表面実装型 LED 1は上面が数 mm角で、厚さが 0. 3〜3mm程度のサイズ に形成される。この表面実装型 LED1は 4側面がダイシングソー 30によって同時に 切断されるので、回路基板 2とそれに固定された枠体 3は同一面力 成る 4つの側面 41 (共通側面）を持つ。 In this manner, the surface-mounted LED 1 as the electronic component shown in FIGS. 1 to 4 is manufactured. The surface-mounted LED 1 has a top surface of several mm square and a thickness of about 0.3 to 3 mm. Since this surface-mounted LED 1 has four side surfaces cut simultaneously by a dicing saw 30, the circuit board 2 and the frame 3 fixed thereto have four side surfaces 41 (common side surfaces) having the same surface force.
[0054] 尚、枠体 3や LED素子 7がー列に配列したものをダイシングソー 30で個々に切断 する場合は、対面する 2側面がダイシングソー 30によって同時に切断される。従って 、回路基板 2とそれに固定された枠体 3は同一面力 成る対面した 2つの側面 (共通 側面）を持つことになる。  When the frame 3 and the LED elements 7 arranged in a row are cut individually by the dicing saw 30, the two facing sides are cut simultaneously by the dicing saw 30. Therefore, the circuit board 2 and the frame 3 fixed thereto have two facing side surfaces (common side surfaces) having the same surface force.
[0055] ダイシングソー 30により切断する第 9工程において、表面実装型 LED1は有極性 の電極 5、 6に接続された端子部が引き出される側の側面が形成される。この時、金 属製の枠体 3の切断面 (枠体 3の側面 20)の下縁に沿って切断による金属バリが発 生することがある。しかしながら、第 3工程において形成した溝 28による空所 22の存 在によって、枠体 3と回路基板 2との間に所定の距離が確保されている。このため、金 属バリが回路基板 2の電極 5、 6に導通する端子部に接触することが未然に防止され る。  In the ninth step of cutting with the dicing saw 30, the surface-mounted LED 1 is formed with a side surface on the side from which the terminal portion connected to the polar electrodes 5 and 6 is drawn. At this time, metal burrs may be generated by cutting along the lower edge of the cut surface of the metal frame 3 (side surface 20 of the frame 3). However, a predetermined distance is secured between the frame body 3 and the circuit board 2 due to the presence of the void 22 formed by the groove 28 formed in the third step. For this reason, it is possible to prevent the metal burr from coming into contact with the terminal portion that conducts to the electrodes 5 and 6 of the circuit board 2.
[0056] 空所 22のみでも枠体 3と回路基板 2の絶縁距離が確保されるが、空所 22に絶縁性 の被覆材料 23を充填することによって絶縁が強化されるとともに金属バリの発生も抑 制される。空所 22に絶縁性の被覆材料 23を塗布してもよい。また、空所 22と対面す る回路基板 2の上面には絶縁層 24が形成され、さらにその上に絶縁性の接着剤 25 が位置している。このため、金属バリによる影響をより確実に排除することができる。  [0056] Although the insulation distance between the frame 3 and the circuit board 2 is secured only in the void 22, the insulation is strengthened by filling the void 22 with the insulating coating material 23, and metal burrs are also generated. Suppressed. An insulating covering material 23 may be applied to the void 22. In addition, an insulating layer 24 is formed on the upper surface of the circuit board 2 facing the space 22, and an insulating adhesive 25 is positioned thereon. For this reason, the influence by a metal burr | flash can be excluded more reliably.
[0057] また、回路基板 2の有極性の電極 5、 6に接続された端子は、回路基板 2の下面に 配置されている。このため、枠体 3の下面と端子とをより離れて配置して金属バリの接 触の危険性を回避することができる。更に、回路基板 2の上面の枠体 3を搭載する領 域を無極性の電極 4としているので、仮に金属ノ リが回路基板 2の上面に接触しても 回路に与える影響は殆どない。 [0058] また、 LED素子 7で発生した熱は回路基板 2の上下の面で効果的に放熱される。ま ず、回路基板 2の上面では無極性の電極 4と、電極 4に直接接している金属製の枠 体 3とによって広範囲に放熱される。回路基板 2の下面では電極 4に絶縁基板の貫通 孔 13を通して直接接続された電極 15を通じて広範囲に放熱される。 Further, the terminals connected to the polar electrodes 5 and 6 of the circuit board 2 are arranged on the lower surface of the circuit board 2. For this reason, the lower surface of the frame 3 and the terminals can be arranged further apart to avoid the risk of metal burr contact. Furthermore, since the non-polar electrode 4 is used for the area in which the frame 3 on the upper surface of the circuit board 2 is mounted, even if the metal scrap contacts the upper surface of the circuit board 2, there is almost no influence on the circuit. Further, the heat generated in the LED element 7 is effectively radiated on the upper and lower surfaces of the circuit board 2. First, heat is widely dissipated on the upper surface of the circuit board 2 by the nonpolar electrode 4 and the metal frame 3 that is in direct contact with the electrode 4. On the lower surface of the circuit board 2, heat is radiated over a wide range through the electrode 15 directly connected to the electrode 4 through the through hole 13 of the insulating substrate.
[0059] 図 4に示すように、表面実装型 LED1の下面に形成した放熱用の電極 15は下面の 中央部からその両側の端まで延びて ヽるので広 ヽ面積となって ヽる。放熱用の電極 15の面積は、正負の極性を持つ電極 5、 6と接続されて下面に位置する電極 16、 17 の総面積よりも広 、面積として 、る。  [0059] As shown in FIG. 4, the heat radiation electrode 15 formed on the lower surface of the surface-mounted LED 1 extends from the center of the lower surface to the ends on both sides thereof, and thus has a large area. The area of the heat radiation electrode 15 is larger than the total area of the electrodes 16 and 17 connected to the electrodes 5 and 6 having positive and negative polarities and located on the lower surface.
[0060] 枠体 3は開孔 10の周囲に上側に向けて広がった内周面を備えている。枠体 3の内 周面によって LED素子 7から発せられた光が反射される。従って、枠体 3の内周面は 反射面として機能し、光の利用効率を高めることができる。  The frame 3 is provided with an inner peripheral surface that spreads upward around the opening 10. The light emitted from the LED element 7 is reflected by the inner peripheral surface of the frame 3. Therefore, the inner peripheral surface of the frame 3 functions as a reflecting surface, and the light use efficiency can be increased.
[0061] 次に、図 6は第 2実施形態の電子部品である表面実装型 LED1を示す斜視図であ る。説明の便宜上、前述の図 1〜図 4に示す第 1実施形態と同様の部分には同一の 符号を付している。本実施形態は第 1実施形態に対して空所 22に充填していた被覆 材料 23 (図 1参照）を省略した点が異なっている。その他の構成は第 1実施形態と同 様である。  Next, FIG. 6 is a perspective view showing a surface-mounted LED 1 which is an electronic component of the second embodiment. For convenience of explanation, the same reference numerals are given to the same parts as those in the first embodiment shown in FIGS. This embodiment is different from the first embodiment in that the covering material 23 (see FIG. 1) filled in the void 22 is omitted. Other configurations are the same as those of the first embodiment.
[0062] 本実施形態は前述の図 5に示す表面実装型 LED1の製造工程において、第 4ェ 程の榭脂充填工程を省略することで実施することができる。被覆材料 23が省略され るため第 1実施形態に比して絶縁性が低下するが、空所 22によって枠体 3と回路基 板 2との絶縁距離を確保して充分実用に供することができる、  This embodiment can be implemented by omitting the fourth resin filling step in the manufacturing process of the surface-mounted LED 1 shown in FIG. Since the covering material 23 is omitted, the insulation is reduced as compared with the first embodiment, but the space 22 can secure the insulation distance between the frame 3 and the circuit board 2 and can be sufficiently put into practical use. ,
[0063] 前述の図 5の第 3工程における溝 28の形成時に、溝 28の深さを回路基板 2の厚さ よりも浅くしてもよい。しかし、溝 28の深さを回路基板 2の厚さと同じかそれよりも深く すると、絶縁性が向上するためより望ましい。また、溝 28の深さは枠体 3を貫通しない 深さに設定すればよい。メタルマスクなどを用いて半田ペーストを塗布した箇所に回 路基板 2が固定される場合は、この半田ペーストの厚さ（高さ）よりも高 深く）なるよう に溝 28の深さを設定するとよい。これにより、半田の影響を防ぐことができ、より好まし い。  When forming the groove 28 in the third step of FIG. 5 described above, the depth of the groove 28 may be made shallower than the thickness of the circuit board 2. However, it is more desirable to make the depth of the groove 28 equal to or deeper than the thickness of the circuit board 2 because the insulation is improved. The depth of the groove 28 may be set to a depth that does not penetrate the frame 3. If the circuit board 2 is fixed at the location where the solder paste is applied using a metal mask, etc., the depth of the groove 28 is set so that it is deeper than the thickness (height) of the solder paste. Good. This can prevent the influence of solder and is more preferable.
[0064] 次に、図 7は第 3実施形態の電子部品である表面実装型 LED1を示す斜視図であ る。説明の便宜上、前述の図 1〜図 4に示す第 1実施形態と同様の部分には同一の 符号を付している。本実施形態は第 1実施形態に対して空所 22に充填していた被覆 材料 23 (図 1参照）を所定の厚さの被膜にした点が異なっている。その他の構成は第 1実施形態と同様である。 Next, FIG. 7 is a perspective view showing a surface-mounted LED 1 which is an electronic component of the third embodiment. The For convenience of explanation, the same reference numerals are given to the same parts as those in the first embodiment shown in FIGS. This embodiment is different from the first embodiment in that a coating material 23 (see FIG. 1) filled in the void 22 is formed into a coating having a predetermined thickness. Other configurations are the same as those in the first embodiment.
[0065] 空所 22と被覆材料 23によって絶縁距離が確保できるので、第 1実施形態と同等の 絶縁性を確保することができる。被覆材料 23は第 1実施形態と同様に絶縁材料とし てもよく、導電性の材料としてもよい。  [0065] Since the insulation distance can be ensured by the void 22 and the covering material 23, it is possible to ensure insulation equivalent to that of the first embodiment. The covering material 23 may be an insulating material as in the first embodiment, or may be a conductive material.
[0066] 枠体 3を構成する材料よりも被覆材料 23を硬質な材料とすると、バリの発生を抑制 できるためより好ましい。被覆材料 23として導電性の材料を用いる場合は、枠体 3の 金属ノ リの発生を抑制できる金属材料を用いることができる。このような金属材料とし て、ニッケル、クロム、チタン等の硬質金属材料を用いることができる。  [0066] It is more preferable that the coating material 23 be a harder material than the material constituting the frame 3 because the generation of burrs can be suppressed. When a conductive material is used as the covering material 23, a metal material that can suppress the generation of metal dust of the frame 3 can be used. As such a metal material, a hard metal material such as nickel, chromium, or titanium can be used.
[0067] また、枠体 3の主材料がアルミニウムやマグネシウム等力 成る場合は、枠体 3の表 面を化成処理 (アルマイト処理)して絶縁体カゝら成る被覆材料 23を形成してもよ ヽ。 例えば、枠体 3がアルミニウムの場合は一般的なアルマイト処理後のビッカース硬度（ Hv)は 200〜250になり、硬質アルマイト処理後のビッカース硬度（Ην)は 400〜45 0になる。従って、アルマイト部分を被覆材料 23として利用することができる。  [0067] Further, when the main material of the frame 3 is made of aluminum or magnesium or the like, the coating material 23 made of the insulator body may be formed by subjecting the surface of the frame 3 to a chemical conversion treatment (alumite treatment). Yo ヽ. For example, when the frame 3 is aluminum, the Vickers hardness (Hv) after a general anodizing treatment is 200 to 250, and the Vickers hardness (Ην) after a hard anodizing treatment is 400 to 450. Therefore, the alumite portion can be used as the coating material 23.
[0068] また、アルマイトの一般的な膜厚は 20 μ m程度であるが、 100 μ m程度まで厚膜ィ匕 することが可能である。このため、被覆材料 23として厚膜のアルマイトを用いることに よって、絶縁効果や金属ノ リ予防の効果をより高くすることができる。  [0068] Although the general film thickness of anodized is about 20 μm, it can be thickened to about 100 μm. For this reason, by using thick anodized as the coating material 23, the insulating effect and the effect of preventing metal dust can be further enhanced.
[0069] 第 1〜第 3実施形態において、複数の LED素子 7を用いた電子部品について説明 しているが、本発明はこれに以外にも適用することができる。例えば、 1つの LED素 子 7のみを用いた表面実装型 LED力 成る電子部品にも適用することができる。また 、 LED素子以外にもチップ抵抗や ICなどの抵抗成分を有する回路素子を発熱素子 として配置した電子部品についても本発明を適用することができる。  [0069] In the first to third embodiments, an electronic component using a plurality of LED elements 7 has been described. However, the present invention can be applied to other applications. For example, it can also be applied to electronic components with surface-mounted LED power using only one LED element 7. Further, the present invention can also be applied to an electronic component in which a circuit element having a resistance component such as a chip resistor or an IC is disposed as a heating element in addition to the LED element.
産業上の利用可能性  Industrial applicability
[0070] 本発明によると、回路基板の上面に枠体を固定した電子部品及びその製造方法に 利用することができる。より詳しくは、スィッチ内照明、 LEDディスプレイ、ノ ックライト 光源、光プリンターヘッド、カメラフラッシュ等の光源として用いられる表面実装型 LE Dに利用することができる。 [0070] According to the present invention, it can be used for an electronic component having a frame fixed to the upper surface of a circuit board and a method for manufacturing the same. More specifically, surface mount LEs used as light sources in switch interior lighting, LED displays, knocklight light sources, optical printer heads, camera flashes, etc. Can be used for D.

Claims

請求の範囲 The scope of the claims
[1] 回路基板の上面の周部に導体力 成る枠体を固定した電子部品であって、前記回 路基板及び前記枠体は同一面から成る側面を有し、前記回路基板は前記側面に露 出する端子部を有するとともに、前記枠体は前記回路基板に面した下面と前記側面 との間に跨る空所を有することを特徴とする電子部品。  [1] An electronic component in which a frame body having a conductor force is fixed to a peripheral portion of an upper surface of a circuit board, wherein the circuit board and the frame body have side surfaces formed on the same surface, and the circuit board is disposed on the side surface. An electronic component comprising: a terminal portion that is exposed; and the frame body having a space extending between a lower surface facing the circuit board and the side surface.
[2] 前記端子部は前記回路基板の前記枠体から離れた側の面に形成されることを特徴 とする請求項 1に記載の電子部品。  2. The electronic component according to claim 1, wherein the terminal portion is formed on a surface of the circuit board that is away from the frame.
[3] 絶縁体から成る被覆材料を前記空所に充填したことを特徴とする請求項 1または請 求項 2に記載の電子部品。 [3] The electronic component according to [1] or [2], wherein the void is filled with a coating material made of an insulator.
[4] 前記枠体は前記空所に面した表面を前記枠体よりも硬度の高! ヽ所定厚みの被覆 材料で覆われることを特徴とする請求項 1または請求項 2に記載の電子部品。 [4] The electronic component according to [1] or [2], wherein a surface of the frame body facing the void is covered with a coating material having a hardness higher than that of the frame body and a predetermined thickness. .
[5] 前記被覆材料は前記枠体を化成処理して成ることを特徴とする請求項 4に記載の 電子部品。 5. The electronic component according to claim 4, wherein the coating material is formed by chemical conversion of the frame.
[6] 前記枠体に囲まれた内部に LED素子を配置し、前記 LED素子の出射光を前記枠 体により反射する表面実装型 LEDから成ることを特徴とする請求項 1に記載の電子 部品。  6. The electronic component according to claim 1, wherein the electronic component comprises a surface-mounted LED in which an LED element is disposed inside the frame body, and light emitted from the LED element is reflected by the frame body. .
[7] 電極の端子部を有した回路基板が複数形成される回路基板集合体を供給するェ 程と、複数の枠体を有した枠体集合体を形成する工程と、前記回路基板集合体と前 記枠体集合体とを固定する工程と、固定された前記回路基板集合体及び前記枠体 集合体を前記枠体及び前記端子部上で切断して分割する工程とを備えた電子部品 の製造方法であって、前記回路基板集合体及び前記枠体集合体の切断面に沿うと ともに切断幅よりも広い幅の溝を前記枠部の前記回路基板集合体に面した側に形成 する工程を前記回路基板集合体と前記枠体集合体を固定する工程の前に設けたこ とを特徴とする電子部品の製造方法。  [7] A step of supplying a circuit board assembly in which a plurality of circuit boards having electrode terminal portions are formed, a step of forming a frame body assembly having a plurality of frames, and the circuit board assembly And the step of fixing the frame assembly and the step of cutting and dividing the fixed circuit board assembly and the frame assembly on the frame and the terminal portion. A groove having a width wider than the cutting width is formed on the side of the frame portion facing the circuit board assembly along the cut surfaces of the circuit board assembly and the frame assembly. An electronic component manufacturing method, characterized in that a step is provided before the step of fixing the circuit board assembly and the frame assembly.
[8] 前記溝に絶縁体カゝら成る被覆材料を充填する工程を備えたことを特徴とする請求 項 7に記載の電子部品の製造方法。  8. The method of manufacturing an electronic component according to claim 7, further comprising a step of filling the groove with a coating material made of an insulator.
[9] 前記溝の表面を前記枠体よりも硬度の高い所定厚みの被覆材料で覆う工程を備え たことを特徴とする請求項 7に記載の電子部品の製造方法。  9. The method of manufacturing an electronic component according to claim 7, further comprising a step of covering the surface of the groove with a coating material having a predetermined thickness that is harder than the frame.
PCT/JP2007/060884 2006-05-31 2007-05-29 Electronic component and method for manufacturing same WO2007139098A1 (en)

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