WO2007113139A1 - Procédé de pose de composants, pouvant être mis en contact électrique, sur un support d'interconnexion et système de montage approprié à ce procédé - Google Patents

Procédé de pose de composants, pouvant être mis en contact électrique, sur un support d'interconnexion et système de montage approprié à ce procédé Download PDF

Info

Publication number
WO2007113139A1
WO2007113139A1 PCT/EP2007/052803 EP2007052803W WO2007113139A1 WO 2007113139 A1 WO2007113139 A1 WO 2007113139A1 EP 2007052803 W EP2007052803 W EP 2007052803W WO 2007113139 A1 WO2007113139 A1 WO 2007113139A1
Authority
WO
WIPO (PCT)
Prior art keywords
components
self
organization
support member
carrier
Prior art date
Application number
PCT/EP2007/052803
Other languages
German (de)
English (en)
Inventor
Stefan Fiedler
Klaus-Peter Galuschki
Jens-Christian Holst
Bernhard Markus Schachtner
Ralf Schmidt
Original Assignee
Siemens Aktiengesellschaft
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Aktiengesellschaft filed Critical Siemens Aktiengesellschaft
Priority to CN2007800118444A priority Critical patent/CN101416301B/zh
Publication of WO2007113139A1 publication Critical patent/WO2007113139A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • H05K3/3478—Applying solder preforms; Transferring prefabricated solder patterns
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68318—Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68354—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to support diced chips prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68363—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/11332—Manufacturing methods by local deposition of the material of the bump connector in solid form using a powder
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/11334—Manufacturing methods by local deposition of the material of the bump connector in solid form using preformed bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13139—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13147—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a temporary auxiliary member not forming part of the bonding apparatus
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/95053—Bonding environment
    • H01L2224/95085—Bonding environment being a liquid, e.g. for fluidic self-assembly
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/9512—Aligning the plurality of semiconductor or solid-state bodies
    • H01L2224/95143—Passive alignment, i.e. self alignment, e.g. using surface energy, chemical reactions, thermal equilibrium
    • H01L2224/95144—Magnetic alignment, i.e. using permanent magnetic parts in the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/9512—Aligning the plurality of semiconductor or solid-state bodies
    • H01L2224/95143—Passive alignment, i.e. self alignment, e.g. using surface energy, chemical reactions, thermal equilibrium
    • H01L2224/95145—Electrostatic alignment, i.e. polarity alignment with Coulomb charges
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01019—Potassium [K]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01058—Cerium [Ce]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1032—III-V
    • H01L2924/10329—Gallium arsenide [GaAs]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/146—Mixed devices
    • H01L2924/1461—MEMS
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0147—Carriers and holders
    • H05K2203/016—Temporary inorganic, non-metallic carrier, e.g. for processing or transferring
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/041—Solder preforms in the shape of solder balls
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/048—Self-alignment during soldering; Terminals, pads or shape of solder adapted therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0756—Uses of liquids, e.g. rinsing, coating, dissolving
    • H05K2203/0776—Uses of liquids not otherwise provided for in H05K2203/0759 - H05K2203/0773
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the invention relates to a method for placing e- lektrisch contactable devices with a mounting side on a circuit board, wherein the desired arrangement of the components is generated by a process of self-organization by the components fixed with their Montagesei ⁇ te back facing on a support member who ⁇ , for which purpose the rear sides of the components and the O- ber Colour of the carrier component triggering surface areas previously with the self-assembly of the components provided, the carrier component with the mounting sides of the Bauele ⁇ elements relative to the circuit substrate are aligned and is placed on the latter and the components on the Scarf ⁇ tion carrier to be attached.
  • Components for example, a film for further contacting of the components on the backs of the components are placed on ⁇ .
  • un ⁇ is ter the manifold active principles a combination selects excluded that the particular selectivity of certain surfaces ⁇ areas at certain to be placed components ensures that compatibility between other surface ay not be given ⁇ chen Symposiumen to a Ensure unambiguous placement of components.
  • the individual components must also be provided with doctorsnberei ⁇ chen different functional principles, if, for example, their polarity in the electrical Kon- takt ist attention must be paid attention. This is the only way to prevent the components from being placed on the carrier component in a wrong orientation.
  • the invention also is based on the idea takes place, in addition to the process mounting a support member len available to stel ⁇ on which elements of the process of self organization of Bauele-.
  • the components are deliberately fastened with their back ⁇ sides on the support member, the holding forces must be sufficient due to the self-assembly process, so that the support member can be handled easily in the further assembly process.
  • This is in fact Concluding the self-assembly of the components mounted on the scarf ⁇ tion carrier, so that the components come to rest with their mounting sides on the circuit board (circuit carrier and support member must not be flat forms, but have only matched geometries).
  • an attachment of the components is accomplished on the circuit substrate, which can be done on the one hand by a provisional fixation, for example with a Unterglallmaterial between the components and the circuit carrier or by an electrical connection of the components on the circuit substrate, for example with solder material or conductive adhesive.
  • the main advantage of this procedure is that the surface of the circuit substrate does not have to be modified for a process of self-organization. Therefore, an unrestricted freedom of design for the surface of the circuit carrier advantageously arises because the conditions given by the design of the circuit carrier need not be taken into account for the process of self-organization.
  • the used spinachbau ⁇ part which is only used for temporary assembly of the components taking advantage of the process of self-organization, be optimally prepared for this task, since apart from the arrangement of the components no further design specifications must be observed in the design.
  • the carrier component is preferably prepared for the process of self-organization such that the attachment and detachment of the provisionally placed components takes place by a reversible process (more on this in the following). This results in a further advantage in the use of a carrier component, since a preparation of the carrier component for the temporarily placed components must be performed only once and then repeated Mon ⁇ daily processes on several circuit carriers of a series can follow. According to the prior art, each circuit carrier must be prepared for the process of self-assembly.
  • Circuit carrier completed by the soldering process, so that the support member in this process step, the position of the construction ⁇ elements still stabilized on the circuit substrate.
  • soldering solder particles of a solder ⁇ be applied by a further process of self-organization of the contact surfaces of the components before the support member is placed on the circuit substrate material.
  • the further process of self-assembly can be carried out in egg nem separate process step, so that the components to ⁇ on the support member reliably be provided with a well-defined amount of solder material.
  • the processes of self-organization for the components and the solder particles are carried out in one operation. As a result, the efficiency of the method can be advantageously increased, whereby a higher economic efficiency he ⁇ is enough.
  • solder particles are applied from a brazing material by a further process of self-organization on provided for the components contact surfaces of the circuit substrate before the support member is placed on the circuit board.
  • This has the advantage that the process of self-Orga ⁇ tion for the solder material in each case separated from the carrier component is performed and the process for placing the components denartiger on the support member with respect various ⁇ components can be made more complex.
  • the application of particles made of a solder material is a relatively simple process of self-organization, since they have an indefinite geometry and must not be present in a specific orientation on the circuit board.
  • circuit carrier (as in the prior art) must be prepared for the self-assembly process for application of the solder material, this process of self-organization is much easier to implement, thereby limiting the conditions of the circuit carrier is less effective than in the self-organized placement of components that may even be different from each other.
  • solder particles are applied to the contact surfaces.
  • the amount of applied solder can be pre-geous ren particularly fine Dosie ⁇ because the amount of solder ge ⁇ is precisely defined by the area of the contact surfaces.
  • a process of self-organization in which only one layer of solder particles can be deposited, ie the solder particles can not be attached to one another, can be carried out particularly easily.
  • solder particles have a substantially uniform size, the geometry of the solder deposit is produced by way of advantageous ⁇ predetermined particularly accurately.
  • the amount of solder to be applied per contact surface is then also specified very precisely.
  • the invention relates to a mounting system for the production of component-mounted circuit carriers.
  • this mounting system allow insertion of components on the circuit substrate with a process of self-assembly, the components must in this mounting system on the one hand and the substrate to which the construction ⁇ elements to be deposited on the other hand be prepared process of self-organization for the Pro ⁇ . According to the above This is done by a suitable preparation of surface areas on the components and the associated substrate, whereby the mounting system is formed.
  • a further object of the invention is therefore to provide a mounting system for the production of circuit boards equipped with components, in which the boundary conditions predetermined by the circuit carrier to be equipped and the components to be equipped can be observed to a comparatively large extent.
  • the mounting system consists of one on the adapted to be equipped circuit carrier support member for the to be mounted devices and to assembly plants ⁇ -bridging elements, with the side facing away from the mounting side backs of the components and the surface of the Carrier components are provided with surface areas that allow a self-organized arrangement of the components on the support member, taking into account the required assembly of the circuit substrate, with various components for fixation on the support member are seen ⁇ before, with a uniqueness of the placement of the components on the support member characterized It is ensured that an active principle of self-organization is provided for the surface areas of each type of components and the associated surface areas on the carrier component, which selectively be is the principle of self-organization of all other types of components.
  • the circuit carriers With the mounting system the benefits already mentioned the invention shown SEN process are achieved.
  • the circuit carriers it is possible in the manufacture of the mounting system the circuit carriers to be equipped only to the extent that on the support component, the components must be arranged in ge ⁇ nau order, which is required for the Bestü ⁇ ckung of the circuit carrier (circuit substrate must not be flat).
  • the surfaces which enable the self-assembly of the components on the carrier component it is not necessary to take account of the circuit carrier to be assembled. It must be ensured only a complication-free interaction between the support member and the components.
  • the mounting system consisting of carrier component and components (prepared for carrying out the process of self-assembly) can be sold as such, with the circuit carriers that are to be equipped with this mounting system, can come from any source.
  • the carrier component can advantageously also serve for a plurality of assemblies of scarf ⁇ tion carriers when the process of self-assembly of the components on the support member is configured reversible.
  • FIG. 1 to 4 selected steps of exporting ⁇ approximately examples of the method according to the invention, in which figure 1 shows an embodiment of the invention
  • FIG. 1 the first method step for placing electrically contactable components 11 is shown in FIG 1 not shown circuit carrier 12 (see Figure 4) shown.
  • circuit carrier 12 see Figure 4
  • a support member 13 is used, with surfaces 13 on the components 11 and on the support member 13 having complimentary surface areas initiating the process of self-assembly.
  • the components 11 and the support member 13 are placed in a container 16, which is filled, for example, with water (wherein the through Surface regions 14a, 14b become effective processes of self-organization in water).
  • the process of self-organization results in that the ge ⁇ desired arrangement of the components on the ger 11 GmbHungsträ ⁇ 12 is generated without the components 11 thereto a ⁇ would be handled individually.
  • the process of self-organization can be assisted by moving the container, facilitating the transport of the components 11 to the surface 15.
  • solder particles 17 can be applied to contact surfaces 18a by a further process of self-organization. If this process of self-organization is to take place simultaneously with the former, then the two processes must not be compatible with one another so that the solder particles 17 are repelled by the surface regions 14b of the carrier component 13 in the manner indicated by the double arrows 19. Similarly, the solder particles may 17 not attach to the surface regions 14a ⁇ to the Bauele elements, which are intended for the surface portions 14b of the support member. However, the O- Surface of the contact surfaces 18a and the solder particles 17, so that the spherical solder particles are placed at the intended location.
  • solder particles 17 can be applied to the circuit substrate 12 in a separate step. This step also takes place in a container 16 filled with water.
  • the solder particles 17 are deposited according to the already explained the mechanism on the contact surfaces 18b of Heidelbergungsträ ⁇ gers on. Accordingly, the addition of solder particles 17 according to FIG. 1 becomes superfluous.
  • the solder particles 17 have a size that they are sufficient as Lotde ⁇ pot for Kunststoffbumps, in particular for the flip-chip mounting. This means that exactly one solder particle is deposited on each contact surface 18a or 18b.
  • FIG. 2 also shows an alternative with solder particles 17 a, the solder particles having a substantially smaller diameter than the solder particles 17. Therefore, these can be deposited on the contact surfaces 18b in the form of a monolayer, wherein advantageously solder deposits with a substantial lower volume can be generated.
  • the illustration of the solder particles 17a used as an alternative is omitted in FIGS. 1, 3 and 4, wherein the method is otherwise to be carried out analogously with solder deposits produced in this way.
  • the solder particles 17a may have, instead of a spherical shape even when ⁇ play, cylindrical or irregular shapes, it being advantageous when the solder particles having substantially the same size as a whole, because so monolayers are formed with a constant thickness.
  • Self-organization on the spontaneous formation of ordered structures at interfaces in the exemplary embodiment solid, conceivable, however, is also solid-gaseous or liquid-gas).
  • An energetic minimum is achieved when the desired form of self-organization is achieved.
  • the individual, self-organizing components arrange themselves in the desired manner due to repulsive and attractive forces, said forces being of shape, surface properties, charge, polarity, magnetic moment or mass or even other arbitrary coded information.
  • the contact surfaces are made of gold, silver or copper.
  • the thiol groups of different molecules are chemically attached to them can be.
  • a hydrogen atom is split off from the thiol group and a metal thiolate compound is formed.
  • Examples of possible thiols are the alkanethiones which have an alkane chain at the end of which is the thiol group.
  • the solder particles are provided, for example, with a wax layer, then a bond between the alkane chains, which now determine the surface properties of the contact surface and the surface of the solder particles due to the particular lipophilic properties of these substances, is greatly promoted, for which reason self-organized attachment the solder particle occurs on the contact surfaces.
  • the Alkanothiole can of course also with their long-chain alkane moiety in a first process step are stored in the wax surface of the solder particles at ⁇ so that they attach, when introduced into the container 16 to the contact surfaces 18a, which need not be further prepared in this case.
  • the alkanethiols may also be applied to suitable metal surfaces on the back side 20 of the devices 11, thus providing a means of coupling to other oligonucleotides.
  • each COM ⁇ -complementary pairs can be selected, wherein one partner of the components 11 can be applied to the contact surfaces 14b of the support member and the other partner on the contact surfaces 14a on the rear sides twentieth As a result, the self-organized placement of the components 11 on the
  • Carrier component 13 ensured.
  • a plurality of complementary pairs may be selected from oligonucleotides allow the self-organized placement of components only in one orientation.
  • FIG. 3 shows how the carrier component 13 with the provisionally attached components 11 and its mounting side 21 are placed on the circuit carrier 12 first.
  • the solder particles ⁇ Untitled 17 thereby buildin at the contact surfaces 18a or 18b ⁇ .
  • a contact results merely by resting the components 11 on the circuit carrier 12.
  • the carrier component 13 can first for stabilizing the components and for increasing the contact pressure due to the weight on the components
  • soldering process has been carried out which has made solder joints 22 from the solder particles 17, which produce a material bond with the contact surfaces 18a and 18b.
  • the carrier plate 13 can be removed.
  • the heat generated due to the soldering process has also led to a solution of the preliminary connection between the support member 13 and the components 11.
  • the bond between the carrier component 13 and the components 11 is of lesser strength than the solder joints

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

L'invention concerne un procédé de pose de composants (11), pouvant être mis en contact électrique, sur un composant support (13). Selon l'invention, ces composants sont posés temporairement par un procédé d'auto-organisation dans une disposition prédéterminée de telle façon qu'éventuellement après l'application de particules d'apport de brasage (17) sur les surfaces de contact (18a), les composants peuvent être déposés à l'aide du composant support (13) sur un support d'interconnexion non représenté. Cela permet de réaliser un brasage de telle façon qu'une pluralité de composants difficiles à manipuler individuellement puissent avantageusement être montés dans une étape de production sur le support d'interconnexion. Le procédé de pose selon l'invention est donc avant tout adapté à de très petits composants.
PCT/EP2007/052803 2006-03-31 2007-03-23 Procédé de pose de composants, pouvant être mis en contact électrique, sur un support d'interconnexion et système de montage approprié à ce procédé WO2007113139A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2007800118444A CN101416301B (zh) 2006-03-31 2007-03-23 将电接触元件放置在电路载体上的方法和适于实施该方法的安装系统

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102006016275.7 2006-03-31
DE102006016275A DE102006016275B4 (de) 2006-03-31 2006-03-31 Verfahren zum Platzieren von elektrisch kontaktierbaren Bauelementen auf einem Schaltungsträger

Publications (1)

Publication Number Publication Date
WO2007113139A1 true WO2007113139A1 (fr) 2007-10-11

Family

ID=38180479

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2007/052803 WO2007113139A1 (fr) 2006-03-31 2007-03-23 Procédé de pose de composants, pouvant être mis en contact électrique, sur un support d'interconnexion et système de montage approprié à ce procédé

Country Status (3)

Country Link
CN (1) CN101416301B (fr)
DE (1) DE102006016275B4 (fr)
WO (1) WO2007113139A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102009050426B3 (de) * 2009-10-22 2011-03-31 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zum ausgerichteten Aufbringen von Bauteilen auf einem Trägersubstrat und ein Verfahren zur Herstellung eines Trägersubstrats dafür und ein Verfahren zur Bestückung eines Zielsubstrats damit.
DE102021206898A1 (de) 2021-06-30 2023-01-05 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung eingetragener Verein Anordnung und Verfahren zur Herstellung einer Halbleiteranordnung

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040142575A1 (en) * 2002-07-25 2004-07-22 Brewer Peter D. Large area printing method for integrating device and circuit components
US20050064696A1 (en) * 2003-09-19 2005-03-24 Larson Charles E. Methods relating to forming interconnects and resulting assemblies
WO2005091354A1 (fr) * 2004-03-22 2005-09-29 Tamura Corporation Composition de brasage et procede de formation de perles de soudure avec ladite composition
WO2006030674A1 (fr) * 2004-09-15 2006-03-23 Matsushita Electric Industrial Co., Ltd. Procédé de montage de puces à protubérances et élément de montage de puces à protubérances

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6569382B1 (en) * 1991-11-07 2003-05-27 Nanogen, Inc. Methods apparatus for the electronic, homogeneous assembly and fabrication of devices
US6089853A (en) * 1997-12-24 2000-07-18 International Business Machines Corporation Patterning device for patterning a substrate with patterning cavities fed by service cavities
DE102004058201A1 (de) * 2004-12-02 2006-06-22 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zur Übertragung von Bauelementen auf eine Oberfläche

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040142575A1 (en) * 2002-07-25 2004-07-22 Brewer Peter D. Large area printing method for integrating device and circuit components
US20050064696A1 (en) * 2003-09-19 2005-03-24 Larson Charles E. Methods relating to forming interconnects and resulting assemblies
WO2005091354A1 (fr) * 2004-03-22 2005-09-29 Tamura Corporation Composition de brasage et procede de formation de perles de soudure avec ladite composition
EP1729334A1 (fr) * 2004-03-22 2006-12-06 Tamura Corporation Composition de brasage et procede de formation de perles de soudure avec ladite composition
WO2006030674A1 (fr) * 2004-09-15 2006-03-23 Matsushita Electric Industrial Co., Ltd. Procédé de montage de puces à protubérances et élément de montage de puces à protubérances
EP1796156A1 (fr) * 2004-09-15 2007-06-13 Matsushita Electric Industrial Co., Ltd. Procede de montage de puces a protuberances et element de montage de puces a protuberances

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102009050426B3 (de) * 2009-10-22 2011-03-31 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zum ausgerichteten Aufbringen von Bauteilen auf einem Trägersubstrat und ein Verfahren zur Herstellung eines Trägersubstrats dafür und ein Verfahren zur Bestückung eines Zielsubstrats damit.
DE102021206898A1 (de) 2021-06-30 2023-01-05 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung eingetragener Verein Anordnung und Verfahren zur Herstellung einer Halbleiteranordnung
DE102021206898B4 (de) 2021-06-30 2023-02-09 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung eingetragener Verein Anordnung und Verfahren zur Herstellung einer Halbleiteranordnung

Also Published As

Publication number Publication date
DE102006016275A1 (de) 2007-10-18
CN101416301A (zh) 2009-04-22
DE102006016275B4 (de) 2013-12-19
CN101416301B (zh) 2011-12-14

Similar Documents

Publication Publication Date Title
DE69533336T2 (de) Testkarte und ihre anwendung
DE102008045735B4 (de) Gestapelte Halbleiterchips
DE102008039388B4 (de) Gestapelte Halbleiterchips und Herstellungsverfahren
EP0328161A2 (fr) Procédé de fabrication d'un corps présentant une microstructure à plans multiples
WO2007017401A2 (fr) Procede pour integrer des nanostructures fonctionnelles dans des circuits micro-electriques et nano-electriques
DE69731208T2 (de) Verfahren zur herstellung einer integrierten schal tungsanordnung
WO2005115072A2 (fr) Support a elements spheriques a braser et procede pour equiper des substrats de contacts spheriques
DE102009050426B3 (de) Verfahren zum ausgerichteten Aufbringen von Bauteilen auf einem Trägersubstrat und ein Verfahren zur Herstellung eines Trägersubstrats dafür und ein Verfahren zur Bestückung eines Zielsubstrats damit.
EP1240529A2 (fr) Procede de fabrication de structures micro-mecaniques
EP1508166A2 (fr) Composant electronique comprenant des contacts de surface exterieurs et procede de production de ce composant
DE10325559B3 (de) Verfahren und Vorrichtung zum Herstellen eines Systems mit einer an einer vorbestimmten Stelle einer Oberfläche eines Substrats aufgebrachten Komponente
WO1998039230A9 (fr) Procede de fabrication et de magasinage de microcomposants, magasin et procede de montage pour microcomposants
DE19581457C1 (de) Verfahren zum Manipulieren von Mikro-Bauteilen und Vorrichtung zur Durchführung des Verfahrens
EP2572380B1 (fr) Procédé de fabrication d'empilements de puces ainsi que support pour la mise en ouvre du procédé
WO2007113139A1 (fr) Procédé de pose de composants, pouvant être mis en contact électrique, sur un support d'interconnexion et système de montage approprié à ce procédé
WO2022012903A1 (fr) Élément de connexion, procédé de fabrication d'un élément de connexion, ensemble comprenant un élément de connexion et deux pièces reliées par ce dernier ainsi que procédé de connexion de deux pièces reliées par un élément de connexion
WO2006007819A1 (fr) Substrat pourvu de pistes conductrices et fabrication de pistes conductrices sur des substrats pour des composants semi-conducteurs
WO2008040307A2 (fr) Procédé de fabrication d'un agencement de composants optoélectroniques et agencement de composants optoélectroniques
DE102008027115A1 (de) Kontaktstruktur, elektronisches Bauelement mit einer Kontaktstruktur und Verfahren zu deren Herstellung
DE102006016276B3 (de) Verfahren zum Aufbringen von Lotpartikeln auf Kontaktflächen sowie hierfür geeignete Lotpartikel und Bauteile mit Kontaktflächen
DE19823876B4 (de) Mit unterschiedlichen Verbindungen beladenes Bauteil (Biochip) sowie Verfahren zu dessen Herstellung
EP1711044B1 (fr) Méthode pour transférer des composants électriques sur une surface
DE10238587B4 (de) Verfahren zur Herstellung einer Verbundvorrichtung
WO2020229013A1 (fr) Structure de support multi-puce
EP1464080B1 (fr) Procede pour produire un dispositif d'interconnexion

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 07727277

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 200780011844.4

Country of ref document: CN

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 07727277

Country of ref document: EP

Kind code of ref document: A1