WO2007111329A1 - 情報コードの読取装置及び読取方法 - Google Patents
情報コードの読取装置及び読取方法 Download PDFInfo
- Publication number
- WO2007111329A1 WO2007111329A1 PCT/JP2007/056374 JP2007056374W WO2007111329A1 WO 2007111329 A1 WO2007111329 A1 WO 2007111329A1 JP 2007056374 W JP2007056374 W JP 2007056374W WO 2007111329 A1 WO2007111329 A1 WO 2007111329A1
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- WO
- WIPO (PCT)
- Prior art keywords
- display
- period
- noise
- information code
- synchronization signal
- Prior art date
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- 238000000034 method Methods 0.000 title claims abstract description 45
- 230000001360 synchronised effect Effects 0.000 claims abstract description 10
- 238000001514 detection method Methods 0.000 claims description 22
- 230000004044 response Effects 0.000 abstract description 4
- 238000003384 imaging method Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 11
- 235000019557 luminance Nutrition 0.000 description 8
- 239000000758 substrate Substances 0.000 description 6
- 230000005540 biological transmission Effects 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 3
- 238000000605 extraction Methods 0.000 description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000000725 suspension Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0412—Digitisers structurally integrated in a display
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B43—WRITING OR DRAWING IMPLEMENTS; BUREAU ACCESSORIES
- B43K—IMPLEMENTS FOR WRITING OR DRAWING
- B43K19/00—Non-propelling pencils; Styles; Crayons; Chalks
- B43K19/003—Chalks
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B43—WRITING OR DRAWING IMPLEMENTS; BUREAU ACCESSORIES
- B43L—ARTICLES FOR WRITING OR DRAWING UPON; WRITING OR DRAWING AIDS; ACCESSORIES FOR WRITING OR DRAWING
- B43L1/00—Repeatedly-usable boards or tablets for writing or drawing
- B43L1/04—Blackboards
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/0304—Detection arrangements using opto-electronic means
- G06F3/0317—Detection arrangements using opto-electronic means in co-operation with a patterned surface, e.g. absolute position or relative movement detection for an optical mouse or pen positioned with respect to a coded surface
- G06F3/0321—Detection arrangements using opto-electronic means in co-operation with a patterned surface, e.g. absolute position or relative movement detection for an optical mouse or pen positioned with respect to a coded surface by optically sensing the absolute position with respect to a regularly patterned surface forming a passive digitiser, e.g. pen optically detecting position indicative tags printed on a paper sheet
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0416—Control or interface arrangements specially adapted for digitisers
- G06F3/0418—Control or interface arrangements specially adapted for digitisers for error correction or compensation, e.g. based on parallax, calibration or alignment
- G06F3/04184—Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/06—Handling electromagnetic interferences [EMI], covering emitted as well as received electromagnetic radiation
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
- G09G3/2022—Display of intermediate tones by time modulation using two or more time intervals using sub-frames
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
Definitions
- the present invention relates to an information code reading device for reading an information code displayed on a display.
- the veg display device that reads only the coordinate information on the pen-type input indicator side sends a synchronization signal synchronized with the execution period of the subfield group for displaying the coordinate information to the pen-type input indicator. Supply to the vessel.
- Patent Document 1 Japanese Patent Laid-Open No. 08-115057
- An object of the present invention is to provide an information code reading apparatus and reading method capable of reading an information code displayed on the display without increasing the circuit scale of the display device.
- An information code reader is an information code reader for reading an information code displayed on a display in a predetermined section within each frame display period, Noise detection means for detecting noise emitted from the display camera, synchronization detection means for generating a synchronization signal synchronized with the frame display period based on the noise, and the display according to the synchronization signal; Means for restoring the information code from a photographed image signal obtained by photographing the display screen.
- the information code reading method is an information code reading method for reading an information code displayed on a display in a predetermined section in each frame display period.
- FIG. 1 is a diagram showing a schematic configuration of an electronic blackboard provided with an electronic chalk according to the present invention.
- FIG. 2 is a diagram showing a part of an array of pixel cells P and pixel blocks PB in the PDP 100 shown in FIG.
- FIG. 3 is a diagram showing an example of a light emission drive sequence when driving the PDP 100.
- FIG. 4 is a diagram showing a light emission pattern when a main image display drive process (subfields SF1 to SF8) is executed according to the light emission drive sequence shown in FIG.
- FIG. 5 is a diagram showing an example of a blackboard image displayed on the PDP 100.
- FIG. 6 is a diagram showing an internal configuration of an electronic choke 9 according to the present invention.
- FIG. 7 is a diagram showing an example of an internal configuration of a frame synchronization detection circuit 93 shown in FIG.
- FIG. 8 A diagram showing an example of a noise form in a PDP that generates noise NZP in the blanking period BT.
- each frame display period in the plasma display panel includes a period in which display driving is performed by a plurality of subfields and a blanking period. Therefore, on the reading device side, the noise has the same length as the blanking period.
- FIG. 1 is a diagram showing a configuration of an electronic black board provided with an electronic choke as an information code reading device according to the present invention.
- a plasma display panel 100 (hereinafter referred to as “PDP 100”) as an electronic blackboard body includes a transparent front substrate (not shown) that bears the blackboard surface and a rear substrate (not shown). Prepare. There is a discharge space filled with a discharge gas between the front substrate and the rear substrate. A plurality of row electrodes each extending in the horizontal direction (lateral direction) of the display surface are formed on the front substrate. On the other hand, on the rear substrate, a plurality of column electrodes extending in the vertical direction (longitudinal direction) of the display surface are formed. Pixel cells are formed at the intersections (including the discharge space) between each row electrode and column electrode. The pixel cell is a pixel cell P that emits red light as shown in FIG.
- It consists of three types of pixel cell P that emits G and blue light.
- blackboard surface image data memory 1 blackboard surface image data representing a blackboard surface (for example, black color) to be displayed on the entire screen of the PDP 100 is stored in advance.
- Blackboard image data Mori 1 sequentially reads out the above blackboard surface image data and uses this as blackboard surface image data D.
- the image superimposing circuit 2 includes a blackboard surface image indicated by the blackboard surface image data D and an external input.
- Pixel data PD is generated for each pixel cell P, and an image obtained by superimposing the image shown above is supplied to each of the SF pixel drive data generation circuit 3 and the drive control circuit 4.
- the blackboard display cancellation signal is supplied from the drive control circuit 4 (described later)
- the image superimposing circuit 2 and the trace image data signal are displayed as the external input image data signal D.
- Pixel data PD indicating an image superimposed on the image indicated by D for each pixel cell P
- the SF pixel drive data generation circuit 3 performs, for each pixel data PD, each pixel cell in each of subfields SF1 to SF8 (described later) according to the luminance level indicated by the pixel data PD. Pixel drive data GD1 to GD8 that should be set to one of the lighting mode and the non-lighting mode are generated and supplied to the address driver 5.
- coordinate data indicating the coordinate position in the screen of the PDP 100 where the pixel block is located is stored in advance.
- PB area surrounded by a thick line frame
- the coordinates on the screen of PDP 100 in that pixel block PB The coordinate data indicating the position is stored in the coordinate data memory 6 in association with each other.
- the coordinate data memory 6 reads out the powerful coordinate data and supplies it to the two-dimensional code conversion circuit 7.
- the two-dimensional code conversion circuit 7 generates the coordinate data corresponding to each pixel block PB.
- the two-dimensional code conversion circuit 7 Convert to (n X m) -bit 2D code. Then, the two-dimensional code conversion circuit 7 associates each bit of the two-dimensional code with each of the (n X m) pixel cells P in the pixel block PB, and the bit associated with each pixel cell P.
- the pixel drive data GDO corresponding to the pixel cell P is supplied to the address driver 5.
- the drive control circuit 4 is based on the light emission drive sequence as shown in FIG. 3 based on the subfield method, and within the display period of one frame (or one field), the two-dimensional code.
- the display driving process and the main image display driving process are sequentially executed.
- the drive control circuit 4 sequentially executes the address process W and the sustain process I in each of the eight subfields SF1 to SF8 as shown in FIG.
- the drive control circuit 4 executes the reset process R prior to the address process W as long as the subfield SF1 is longer.
- the drive control circuit 4 sequentially executes the reset process R, the address process W, and the sustain process I in the sub-field SFO as shown in FIG. Note that a blanking period BT having a predetermined period length is provided after the main image display driving process.
- the drive control circuit 4 generates various control signals for driving the PDP 100 as follows by executing the reset process R, the address process W, and the sustain process I, and generates an address driver 5 and a row electrode driver 8. Supply to each of the.
- the row electrode driver 8 applies a reset pulse to be initialized to the lighting mode state to all the pixel cells P of the PDP 100 to all the row electrodes of the PDP 100. To do.
- the address driver 5 in response to execution of the address process W, the address driver 5 generates a pixel data pulse having a voltage corresponding to the pixel drive data GD corresponding to the subfield SF to which the address process W belongs. That is, for example, the address driver 5 generates a pixel data pulse corresponding to the pixel drive data GDI in the address process W of the subfield SF1, and the pixel driver corresponding to the pixel drive data GD2 in the address process W of the subfield SF2. Generate data pulses.
- the address driver 5 when the pixel drive data GD indicating that the pixel cell P is set to the lighting mode state is supplied, the address driver 5 generates a high-voltage pixel data pulse while When pixel drive data GD indicating that the state is set is supplied, a low-voltage pixel data pulse is generated.
- the row electrode driver 8 sequentially applies the scan pulse to each row electrode of the PDP 100 in synchronization with the application timing of the pixel data pulse group for each display line.
- each pixel cell P for one display line belonging to the row electrode to which the scan pulse is applied is set in a state (lighting mode or light-off mode) corresponding to the pixel data pulse. Determined.
- the row electrode driver 8 causes the pixel cell P in the above-described lighting mode state for the light emission period allocated to the subfield SF to which the sustain process I belongs. Sustain pulses that should be discharged only repeatedly are applied to all the row electrodes of the PDP100. In the embodiment shown in FIG. 3, the minimum light emission period is assigned to the subfield SFO! /.
- Pixel cells P emit light in the sustain process I of each of the subfields SF (indicated by white circles) continuous from the subfield SF1. That is, according to the luminance level indicated by the pixel data PD, the pixel cell P emits light by any one of nine light emission patterns as shown in FIG. At this time, the intermediate luminance corresponding to the total light emission period within one frame display period is visually recognized. That is, according to the nine light emission patterns as shown in FIG.
- an image representing the blackboard surface as shown in FIG. 5 (a) is displayed on the entire screen of the PDP 100.
- the light emission period assigned to tin process I is set to a short time so that the lighting and extinguishing patterns based on the two-dimensional code cannot be seen.
- the electronic choke 9 extracts lighting and extinguishing patterns based on the two-dimensional code from the photographed image signal obtained by photographing the display screen of the PDP 100 in units of pixel blocks PB as shown in FIG. Then, a coordinate signal indicating the coordinate position corresponding to the turn-on / off pattern is wirelessly transmitted.
- FIG. 6 is a diagram showing an example of the internal configuration of the electronic choke 9.
- an objective lens 90 takes in display light irradiated from the screen of the PDP 100 in the area unit of each pixel block PB, and passes this through an optical filter 89 that cuts red and green components.
- the noise sensor 92 is a pulse that becomes a logic level 1 when it detects noise, that is, emission of infrared, ultraviolet, or electromagnetic waves, that is, the screen force of the PDP 100 is also released with the discharge generated in each pixel cell P in the PDP 100.
- Noise detection signal NZ is generated and supplied to the frame synchronization detection circuit 93. At this time, various discharges are generated during the execution period of the subfields SFO to SF8 within one frame (or one field) display period.
- the frame synchronization detection circuit 93 is an image capture that is at a logic level 1 only during the execution period of the sustain process I of the subfield SFO shown in FIG. 3 and at a logic level 0 during the other periods.
- Signal CV is generated and supplied to the image sensor 91.
- FIG. 7 is a diagram showing an example of the internal configuration of the powerful frame synchronization detection circuit 93.
- a timer 930 counts the number of pulses of a clock signal (not shown) having a predetermined frequency from an initial value 0, and sends an elapsed time signal indicating an elapsed time corresponding to the counted value to the comparator 931.
- Supply. Comparator 931 generates a frame synchronization signal FS having a logic level 1 as shown in FIG. 3 when the time indicated by the strong elapsed time signal is the same as the blanking period BT as shown in FIG. Is supplied to the delay circuit 932.
- the delay circuit 932 generates a powerful frame synchronization signal FS as a reset process of the subfield SFO as shown in FIG. R and address process W is delayed by the time T spent in the power W, and the force is also generated by the pulse generator 933
- the pulse generation circuit 933 generates an image capture signal as shown in FIG. 3 that becomes a logical level 1 over the time spent in the sustain process I of the subfield SFO in accordance with the frame synchronization signal supplied from the delay circuit 932.
- CV is generated and supplied to the image sensor 91.
- the image sensor 91 shown in FIG. 6 takes the display light supplied from the objective lens 90 only while the logic level 1 image take-in signal CV as shown in FIG. 3 is supplied.
- the corresponding image signal is supplied to the image processing circuit 94 as a photographed image signal SG. That is, the image sensor 91 displays the lighting and extinguishing patterns displayed by executing the two-dimensional code display driving process (subfield SF 0), that is, the lighting and extinguishing patterns corresponding to the two-dimensional code indicating the coordinate position of the pixel block ⁇ .
- the photographed image signal SG to be represented is supplied to the image processing circuit 94.
- the pen pressure sensor 95 provided at the tip of the electronic choke 9 generates a drawing execution signal indicating that drawing is being performed on the blackboard surface while the tip is pressed against the screen of the PDP 100. This is supplied to the image processing circuit 94.
- the image processing circuit 94 takes the captured image signal SG supplied from the image sensor 91 and supplies it to the coordinate information extraction circuit 96 only while a powerful drawing execution signal is supplied.
- the image processing circuit 94 determines that the external light is strong and suppresses this when the luminance level indicated by the captured image signal SG is higher than the predetermined luminance and biased toward the luminance side.
- Power offset signal is supplied to the image sensor 91. At this time, the image sensor 91 performs contrast adjustment according to the offset signal on the captured image signal SG.
- the coordinate information extraction circuit 96 corresponds to the lighting and extinguishing patterns in the pixel block 2 in units of ⁇ ⁇ ⁇ ⁇ as shown in FIG. 2 based on the photographed image signal supplied from the image processing circuit 94. Generate dimension code. Then, the coordinate information extraction circuit 96 reads the coordinate data corresponding to the two-dimensional code that matches the two-dimensional code from the coordinate two-dimensional code memory 97, and uses this as the coordinate data ZD as the wireless transmission circuit 98. To supply. The wireless transmission circuit 98 modulates the powerful coordinate data ZD and wirelessly transmits it.
- the receiving circuit 10 shown in FIG. 1 receives the transmission wave from the electronic choke 9 and demodulates it to restore the coordinate data ZD and supply it to the trace image data generation circuit 11.
- the trace image data generation circuit 11 generates image data representing a straight line or a curve that sequentially traces on each coordinate position indicated by the coordinate data ZD sequentially supplied from the reception circuit 10, and this is generated as the trace image data. Supplied to image superimposing circuit 2 as signal D
- the powerful trace image data signal D is converted to the above blackboard image data D.
- the electronic choke 9 as described above first detects noise (indicated by NZ in FIG. 3) such as infrared rays, ultraviolet rays, or electromagnetic waves that are also emitted from the screen force of the PDP 100.
- noise indicated by NZ in FIG. 3
- the electronic choke 9 generates a frame synchronization signal (FS) having a logic level 1 when detecting a section where noise is interrupted over the predetermined period (BT), and the subfield SFO is generated based on the frame synchronization signal.
- the image capture signal (CV) indicating the duration of the sustain process I is generated.
- the electronic choke 9 restores the coordinate position information (ZD) indicated by the two-dimensional code from the captured image signal captured in accordance with the captured image capture signal (CV), and wirelessly transmits this.
- the electronic choke 9 self-generates a synchronization signal synchronized with the driving operation for each frame performed in the PDP 100 based on the noise radiated from the screen of the PDP 100. . Therefore, according to the electronic choke 9, it is possible to read only the information code displayed only in the predetermined section (SFO) in each frame (field) display period in accordance with the self-generated synchronization signal as described above. This eliminates the need for a circuit for transmitting a synchronization signal on the display device side.
- the operation when the present invention is applied to the PDP in which the noise radiated from the screen stops over the blanking period BT as shown in FIG. 3 has been described. Some of them generate noise NZP within the blanking period BT, as shown in Figure 8. Therefore, for such a PDP, the electronic choke 9 performs the following operation.
- the frame synchronization detection circuit 93 detects a section in which the noise is interrupted over the first period tl as shown in FIG. 8 according to the noise detection signal NZ. Then, after detecting the section in which the noise is interrupted over the first period tl, the duration of the first detected noise NZP is shorter than the second period t2 as shown in FIG. A frame synchronization signal (FS) having a logic level 1 as shown in FIG. 8 is generated according to the detection timing. At this time, as shown in FIG. 8, both the first period tl and the second period t2 are shorter than the blanking period BT.
- FS frame synchronization signal
- a plasma display panel (PDP100) is used as a display device, but the present invention is not limited to this! /.
- any display may be employed as long as the display screen force noise is generated (or stopped) in a cycle synchronized with the frame (or field) display period.
- a circuit for sending a synchronization signal is provided on the reading device side.
- a display device can be used.
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- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Human Computer Interaction (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of Gas Discharge Display Tubes (AREA)
- Drawing Aids And Blackboards (AREA)
- Position Input By Displaying (AREA)
- Transforming Electric Information Into Light Information (AREA)
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/294,687 US20100164912A1 (en) | 2006-03-27 | 2007-03-27 | Information code reading apparatus and reading method |
JP2008507506A JP4541438B2 (ja) | 2006-03-27 | 2007-03-27 | 情報コードの読取装置及び読取方法 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006-084375 | 2006-03-27 | ||
JP2006084375 | 2006-03-27 |
Publications (1)
Publication Number | Publication Date |
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WO2007111329A1 true WO2007111329A1 (ja) | 2007-10-04 |
Family
ID=38541246
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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PCT/JP2007/056374 WO2007111329A1 (ja) | 2006-03-27 | 2007-03-27 | 情報コードの読取装置及び読取方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US20100164912A1 (ja) |
JP (1) | JP4541438B2 (ja) |
WO (1) | WO2007111329A1 (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009199050A (ja) * | 2008-02-25 | 2009-09-03 | Samsung Sdi Co Ltd | プラズマディスプレイ装置 |
US8558816B2 (en) | 2008-12-01 | 2013-10-15 | Samsung Sdi Co., Ltd. | Plasma display device |
WO2016163315A1 (ja) * | 2015-04-09 | 2016-10-13 | 株式会社ワコム | アクティブスタイラス及びセンサコントローラを用いた方法、システム、センサコントローラ、及びアクティブスタイラス |
KR20200059594A (ko) * | 2018-11-21 | 2020-05-29 | (주) 이즈커뮤니케이션즈 | 입력 장치의 판별 기능을 갖춘 컴퓨터 입력 시스템 |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW201209655A (en) * | 2010-08-17 | 2012-03-01 | Acer Inc | Touch control system and method |
US9851817B2 (en) | 2014-06-23 | 2017-12-26 | Lg Display Co., Ltd. | Optical touch display device and driving method thereof |
KR102338710B1 (ko) * | 2014-06-23 | 2021-12-14 | 엘지디스플레이 주식회사 | 광학 터치 디스플레이 장치 및 이의 구동방법 |
CN104835185B (zh) * | 2015-04-13 | 2018-02-06 | 北京印刷学院 | 一种三维码的编解码方法和多媒体传输系统 |
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JPH08115057A (ja) * | 1994-10-14 | 1996-05-07 | Pioneer Electron Corp | 平面表示装置の駆動方法 |
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JPH11225346A (ja) * | 1998-02-05 | 1999-08-17 | Hitachi Ltd | ディスプレイモニタ画像検査方法とその装置 |
JP2004005415A (ja) * | 2002-04-19 | 2004-01-08 | Sharp Corp | 入力装置および入出力一体型表示装置 |
-
2007
- 2007-03-27 US US12/294,687 patent/US20100164912A1/en not_active Abandoned
- 2007-03-27 WO PCT/JP2007/056374 patent/WO2007111329A1/ja active Application Filing
- 2007-03-27 JP JP2008507506A patent/JP4541438B2/ja not_active Expired - Fee Related
Patent Citations (1)
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JPH08115057A (ja) * | 1994-10-14 | 1996-05-07 | Pioneer Electron Corp | 平面表示装置の駆動方法 |
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009199050A (ja) * | 2008-02-25 | 2009-09-03 | Samsung Sdi Co Ltd | プラズマディスプレイ装置 |
US8093810B2 (en) | 2008-02-25 | 2012-01-10 | Samsung Sdi Co., Ltd. | Plasma display device |
US8558816B2 (en) | 2008-12-01 | 2013-10-15 | Samsung Sdi Co., Ltd. | Plasma display device |
WO2016163315A1 (ja) * | 2015-04-09 | 2016-10-13 | 株式会社ワコム | アクティブスタイラス及びセンサコントローラを用いた方法、システム、センサコントローラ、及びアクティブスタイラス |
JP6082172B1 (ja) * | 2015-04-09 | 2017-02-15 | 株式会社ワコム | アクティブスタイラス及びセンサコントローラを用いた方法、システム、センサコントローラ、及びアクティブスタイラス |
JP2017068873A (ja) * | 2015-04-09 | 2017-04-06 | 株式会社ワコム | アクティブスタイラス |
US10055036B2 (en) | 2015-04-09 | 2018-08-21 | Wacom Co., Ltd. | Downlink signal transmission timing control method in which active stylus and sensor controller are used, system, sensor controller, and active stylus |
US10942598B2 (en) | 2015-04-09 | 2021-03-09 | Wacom Co., Ltd. | Active stylus downlink signal transmission timing control relative to sensor controller |
US11347346B2 (en) | 2015-04-09 | 2022-05-31 | Wacom Co., Ltd. | Active stylus downlink signal transmission timing control relative to sensor controller |
US11556204B2 (en) | 2015-04-09 | 2023-01-17 | Wacom Co., Ltd. | Active stylus downlink signal transmission timing control relative to sensor controller |
KR20200059594A (ko) * | 2018-11-21 | 2020-05-29 | (주) 이즈커뮤니케이션즈 | 입력 장치의 판별 기능을 갖춘 컴퓨터 입력 시스템 |
KR102169626B1 (ko) | 2018-11-21 | 2020-10-23 | (주)이즈커뮤니케이션즈 | 입력 장치의 판별 기능을 갖춘 컴퓨터 입력 시스템 |
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JP4541438B2 (ja) | 2010-09-08 |
US20100164912A1 (en) | 2010-07-01 |
JPWO2007111329A1 (ja) | 2009-08-13 |
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