WO2007105564A1 - ジッタ測定装置、電子デバイス、及び試験装置 - Google Patents
ジッタ測定装置、電子デバイス、及び試験装置 Download PDFInfo
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- WO2007105564A1 WO2007105564A1 PCT/JP2007/054450 JP2007054450W WO2007105564A1 WO 2007105564 A1 WO2007105564 A1 WO 2007105564A1 JP 2007054450 W JP2007054450 W JP 2007054450W WO 2007105564 A1 WO2007105564 A1 WO 2007105564A1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31708—Analysis of signal quality
- G01R31/31709—Jitter measurements; Jitter generators
Definitions
- Jitter measurement device electronic device, and test device
- the present invention relates to a jitter measurement apparatus, an electronic device, and a test apparatus.
- the present invention relates to a jitter measurement apparatus, an electronic device, and a test apparatus.
- the present invention relates to a jitter measurement apparatus, an electronic device, and a test apparatus.
- a device that converts jitter in the time direction of a signal under test into a voltage signal and outputs it can be considered.
- the jitter amount (timing fluctuation) of the signal to be measured is converted into a voltage amount by a conversion coefficient (jitter gain) inherent to the jitter measuring device.
- the jitter gain in the jitter measuring instrument be known. If the jitter gain is known, the amount of jitter on the time axis can be determined by dividing the voltage value output by the jitter measuring device by the jitter gain.
- a jitter measuring device for measuring jitter of a signal under measurement, which is substantially constant for each predetermined edge of the signal under measurement.
- a pulse generator that outputs a pulse having a pulse width and outputs as a demodulated signal obtained by demodulating jitter of a signal to be measured, a direct current component detection unit that detects a direct current component of the demodulated signal output by the pulse generator, and a direct current
- a jitter measuring instrument comprising: an adjusting unit for adjusting the pulse width of a pulse output from the pulse generator based on the direct current component of the demodulated signal detected by the component detecting unit.
- an electronic device provided with the jitter measurement device according to the first aspect.
- an electronic device provided with a jitter measuring instrument for measuring the jitter of a signal under measurement, the jitter measuring instrument being substantially constant for each predetermined edge of the signal under measurement.
- a pulse generator that outputs a pulse having a pulse width of 1 k and outputs it as a demodulated signal obtained by demodulating the jitter of the signal under test; and a direct current component detection unit that detects a direct current component of the demodulated signal output by the pulse generator.
- the electronic device has an output terminal for outputting the DC component of the demodulated signal detected by the DC component detection unit to the adjustment unit provided outside the electronic device, and the level of the DC component of the demodulation signal and set in advance.
- an electronic device including: an input terminal for inputting a control signal to be output into the inside of the electronic device; and adjusting a pulse width of a pulse output from the pulse generator.
- the jitter of the signal to be measured can be measured with high accuracy even when temperature change or the like occurs. Therefore, the device under test 600 can be tested with high accuracy.
- FIG. 1 is a view showing an example of the configuration of a test apparatus 100 and an electronic device 200.
- FIG. 2 is a diagram showing an example of the operation of the test apparatus 100 described in FIG.
- FIG. 3 is a diagram showing an example of the waveform of an output signal input to the demodulator 230 and a demodulated signal output from the demodulator 230.
- FIG. 4 is a diagram showing an example of the waveform of a k-th cycle demodulated signal.
- FIG. 5 is a flowchart showing an example of the process of calibration step S440.
- Fig. 6 shows the difference between VDC and VL using the demodulated signal output from the demodulator 230 when the clock to which the periodic jitter of the sine wave is applied is input to the demodulator 230 as the output signal. It shows the results of simulation (Matlab) for the gain G of the demodulator 230 while changing it.
- FIG. 7 is a diagram showing an example of the configuration of a demodulator 230.
- FIG. 8 is a diagram showing another example of the configuration of the demodulator 230.
- FIG. 9 is a view showing another example of the configuration of the electronic device 200.
- FIG. 10 shows another example of the configuration of the electronic device 200.
- FIG. 11 is a view showing another example of the configuration of the electronic device 200.
- FIG. 12 shows another example of the configuration of the test apparatus 100.
- FIG. 13 is a diagram showing an example of the configuration of a jitter measurement apparatus 400 according to an embodiment of the present invention.
- FIG. 14 is a view showing another configuration example of the jitter measurement apparatus 400.
- FIGS. 15A and 15B are diagrams showing configuration examples of the adjustment unit 440.
- FIG. 16 is a view showing another configuration example of the jitter measurement apparatus 400.
- FIG. 17 is a view showing another configuration example of the jitter measurement apparatus 400.
- FIG. 18 is a view showing another configuration example of the jitter measurement apparatus 400.
- FIG. 19A is a diagram showing an example of the configuration of an integrator 260.
- FIG. 19B is a timing chart showing an example of the operation of the integrator 260.
- FIG. 20 is a view showing an example of the configuration of a test apparatus 500 according to another embodiment of the present invention.
- FIG. 1 is a view showing an example of the configuration of a test apparatus 100 and an electronic device 200.
- the electronic device 200 is a device such as a semiconductor circuit, and is phase- or frequency-demodulated. To generate a measured signal.
- the signal to be measured may be, for example, a signal output from the electronic device 200 to the outside and may be a signal transmitted inside the electronic device 200.
- the test apparatus 100 determines the quality of the electronic device 200 based on the signal to be measured.
- Electronic device 200 includes an operation circuit 210, a demodulator 230, and a package unit 220.
- the operating circuit 210 is a circuit to be evaluated or tested, and outputs an output signal based on the circuit operation.
- the operation circuit 210 may be a logic circuit or an analog circuit that generates other signals such as a PLL circuit that generates a clock signal.
- the demodulator 230 receives an output signal from the operation circuit 210, and outputs a demodulated signal obtained by demodulating a phase modulation component or a frequency modulation component of the output signal as a signal under test. For example, the demodulator 230 extracts the low frequency modulation component from the output signal obtained by modulating the high frequency carrier signal with the low frequency modulation component.
- the package unit 220 has an operation circuit 210 and a demodulator 230 provided therein.
- the package portion 220 is formed of ceramic, resin or the like, and isolates the operation circuit 210 and the demodulator 230 from the outside.
- the package portion 220 has terminals for electrically connecting the inside and the outside of the electronic device 200.
- the package unit 220 may have a terminal for outputting an output signal generated by the operating circuit 210 and a terminal for outputting a signal generated by the demodulator 230.
- the package unit 220 may have an output terminal common to the operation circuit 210 and the demodulator 230! //.
- the electronic device 200 can output a modulation component with a low frequency measured signal. Therefore, even when the signal to be measured is measured outside the package unit 220, it is possible to measure the phase modulation component or the frequency modulation component with high accuracy such that the deterioration of the signal is small.
- the test apparatus 100 includes a measurement unit 110, a determination unit 120, and a calibration device 300.
- the measurement unit 110 measures the modulation component based on the demodulated signal output from the electronic device 200.
- the measurement unit 110 may measure the modulation component by sampling the demodulation signal.
- the measurement unit 110 may calculate the amount of jitter in the output signal output from the operation circuit 210 based on the sampling result. In this case, the output signal The contained modulation component corresponds to the jitter component.
- the determination unit 120 determines the quality of the electronic device 200 based on the measurement result in the measurement unit 110. For example, the judging unit 120 judges the quality of the electronic device 200 based on the jitter amount measured by the measuring unit 110! ,.
- the calibration device 300 performs calibration on the demodulator 230. Since the demodulator 230 has a gain according to the circuit characteristics between the input and the output, the demodulated signal input to the test apparatus 100 has the gain of the demodulator 230 in the modulation component included in the output signal output from the operation circuit 210. Multiplied by Therefore, the calibration apparatus 300 adjusts the gain of the demodulator 230 to a predetermined gain, and causes the measuring unit 110 to measure the modulation component with high accuracy.
- the calibration apparatus 300 has a DC component detection unit 310, a gain calculation unit 320, a calibration unit 330, and a control unit 340.
- the direct current component detection unit 310 detects a direct current component of the demodulated signal output from the electronic device 200.
- the direct current component detection unit 310 may detect the average voltage of the demodulated signal as the direct current component of the demodulated signal.
- the DC component detection unit 310 may branch and receive the demodulation signal input to the measurement unit 110.
- the gain calculation unit 320 calculates the gain in the demodulator 230 based on the DC component detected by the DC component detection unit 310.
- the calibration unit 330 performs calibration on the demodulator 230 based on the gain calculated by the gain calculation unit 320.
- the calibration may be performed directly on the demodulator 230 and may be calibrated indirectly on the demodulator 230 by correcting the measured value measured by the test apparatus 100 based on the gain.
- the calibration unit 330 in the present example calculates a correction value to be multiplied by the measured value of the demodulated signal based on the gain, and notifies the determination unit 120 of the correction value. For example, the calibration unit 330 calculates the reciprocal of the gain as the correction value.
- the determination unit 120 reduces the influence of the gain in the demodulator 230 by correcting the measurement value measured by the measurement unit 110 based on the correction value.
- Control unit 340 controls electronic device 200 to output a demodulated signal.
- the electronic device 200 may be a circuit that outputs an output signal to the outside during actual operation, and outputs a demodulation signal to the outside when testing the electronic device 200.
- the control unit 340 causes the electronic device 200 to output a demodulated signal when the electronic device 200 is tested.
- FIG. 2 is a diagram showing an example of the operation of the test apparatus 100 described in FIG.
- the control unit 340 causes the electronic device 200 to output a demodulated signal.
- the measurement unit 110 measures the demodulated signal.
- the calibration apparatus 300 calculates the gain in the demodulator 230.
- the calibration device 300 also performs calibration based on the gain.
- the calibration apparatus 300 calculates the gain based on the DC component of the demodulated signal.
- the calibration device 300 also notifies the determination unit 120 of a correction value based on the gain.
- the determination unit 120 determines the quality of the electronic device 200 based on the jitter amount of the demodulated signal measured by the measurement unit 110. For example, the judging unit 120 judges the quality of the electronic device 200 by comparing the jitter amount measured by the measuring unit 110 with a predetermined judgment value! ,.
- FIG. 3 is a diagram showing an example of the waveform of an output signal input to the demodulator 230 and a demodulated signal output from the demodulator 230.
- the output signal has a shift with respect to the carrier period (0, ⁇ , 2 ⁇ , ⁇ ) due to frequency modulation or phase modulation, and the timing of the pulse in each cycle. Also, the time intervals between each pulse are different from one another.
- the demodulator 230 outputs a demodulated signal by outputting a pulse of a predetermined pulse width W in accordance with the edge of the output signal.
- the demodulator 230 outputs the pulse for each rising edge S of the output signal.
- Demodulator 230 may include a pulse generator that generates the pulse.
- the pulse generator can be easily configured, for example, by combining a delay circuit and a logic circuit. By such an operation, the demodulator 230 generates a demodulated signal by extracting information (modulation component) of the edge position of the output signal.
- FIG. 4 is a diagram showing an example of the waveform of a k-th cycle demodulated signal.
- VH indicates a voltage value when the demodulated signal indicates logical value 1
- VL indicates a voltage value when demodulated signal indicates logical value 0.
- T indicates the average period of the demodulated signal
- J k indicates the period jitter amount of the kth period.
- the average voltage of the kth period of the demodulated signal is given by the following equation.
- the period jitter can be measured by measuring the demodulated signal.
- the measurement unit 110 may measure periodic jitter by measuring the average voltage of the demodulated signal.
- the timing jitter can be determined by integrating the periodic jitter.
- the measurement unit 110 may measure timing jitter of the demodulated signal based on a signal obtained by integrating the demodulated signal. In this case, the measuring unit 110 is preferably notified in advance of the gain of the integration circuit. By dividing the timing jitter by the gain of the integrating circuit, it is possible to eliminate the influence of variations in the integrating circuit. From equation (4), the gain G in the demodulator 230 is given by the following equation as a proportional coefficient of the average voltage and the periodic jitter.
- the pulse width W varies due to process variation, temperature, and the like, the value of the gain G also varies for each electronic device 200.
- the calibration device 300 calibrates the variation.
- Equation (4) The first term on the right side of (4) is proportional to the period jitter Jk ', and the time-averaged value is zero. Therefore, the second term on the right side of equation (4) becomes the DC component VDC of the demodulated signal, and equation (4) is transformed into the following equation.
- the gain G of the demodulator 230 is as follows.
- G VL-VDC
- the DC component detection unit 310 may measure the voltage values VL and VDC. When the voltage value VL is known, the DC component detection unit 310 may measure the voltage value VDC.
- Gain calculation section 320 calculates gain G based on the measurement result of DC component detection section 310 using equation (7).
- the calibration unit 330 notifies the determination unit 120 of a correction coefficient based on the gain G.
- the periodic jitter component (modulation component) of the demodulated signal is amplified in proportion to the gain G of the demodulator 230. Therefore, by dividing the measurement value of the period jitter in the measurement unit 110 by the gain G, the period jitter of the output signal input to the demodulator 230 can be measured. As a result, it is possible to measure the jitter while excluding the influence of the process variation on the demodulator 230 and the like.
- Gain variations due to process variations do not depend on the frequency of the signal, and calibration based on DC components can eliminate the effects of process variations.
- the calibration unit 330 may apply the correction value calculated based on the DC component to all frequency bands.
- the calibration may be performed at any timing before the start of the test or during the determination of the quality of the test starting power of the electronic device 200.
- the calibration apparatus 300 may calculate the gain in parallel.
- FIG. 5 is a flowchart showing an example of the process of the calibration step S440.
- the control unit 340 determines whether or not the voltage value VL when the demodulation signal indicates the logic value 0 is known (S 442). If the VL is known, the process of S448 is performed. If the VL is not known, the control unit 340 causes the demodulator 230 to output a signal of logic 0 (S444). That is, the control unit 340 causes the demodulator 230 to output a signal whose voltage value is fixed to VL. Then, the direct current component detection unit 310 measures the voltage value VL of the signal output from the demodulator 230 (S446).
- control unit 340 causes demodulator 230 to output a demodulated signal.
- the direct current component detection unit 310 detects the direct current component of the demodulated signal (S448).
- the DC component detection unit 310 may detect the average voltage of the demodulated signal as the DC component.
- the gain calculation unit 320 calculates the gain G of the demodulator 230 based on the voltage value VL of the logic value 0 and the voltage value VDC of the direct current component (S 450).
- the calibration unit 330 performs calibration based on the gain (S452).
- FIG. 6 shows the change in the difference between VDC and VL using the demodulated signal output from demodulator 230 when the clock to which the periodic jitter of the sine wave is applied is input to demodulator 230 as the output signal.
- the gain G of the demodulator 230 is obtained by simulation (Matlab) Show the result.
- the difference between VDC and VL is 0.2V, 0.4V, 0.6V, 0.8V,
- FIG. 7 is a diagram showing an example of the configuration of the demodulator 230.
- the demodulator 230 in this example includes a delay unit 232 and a phase detection unit 234.
- the delay unit 232 receives the output signal output from the operation circuit 210, and generates a delay signal obtained by delaying the output signal by a predetermined delay time.
- the delay time in the delay unit 232 is approximately equal to the above-described pulse width W.
- the phase detection unit 234 receives the output signal output from the operation circuit 210 and the delay signal output from the delay unit 232, and outputs a pulse having a pulse width corresponding to the phase difference between the output signal and the delay signal. , Generate a demodulated signal.
- the phase detection unit 234 may be, for example, an exclusive OR circuit. Since the phase difference is approximately equal to the delay time in the delay unit 232, the pulse width of the demodulated signal is approximately equal to the delay time.
- the delay time in the delay unit 232 can be externally controlled.
- the control unit 300 may adjust the gain of the demodulator 230 by controlling the delay time of the delay unit 232. As shown in equation (5), the gain of the demodulator 230 can be adjusted by adjusting the delay time in the delay section 232, that is, the pulse width W of the demodulation signal.
- the calibration device 300 may adjust the delay time in the delay unit 232 so that the gain of the demodulator 230 becomes the optimum value (maximum value).
- the measurement unit 110 measures the demodulated signal after the calibration device 300 adjusts the delay time.
- the configuration of the demodulator 230 is not limited to the configuration shown in FIG.
- it may further include a frequency divider for dividing the output signal and inputting it to the delay unit 232 and the phase detection unit 234.
- it may further include an inverter that determines the output of the delay unit 232.
- the phase detection unit 234 may be an AND circuit.
- phase detector 234 may be a phase frequency detector.
- FIG. 8 is a diagram showing another example of the configuration of demodulator 230.
- the demodulator 230 in this example includes a delay unit 232 and a mixer 236.
- the delay unit 232 receives the output signal output from the operation circuit 210, and generates a delay signal obtained by delaying the output signal by a predetermined delay time.
- the delay unit 232 generates a delay signal obtained by delaying the output signal by 1Z4 cycle.
- the mixer 236 multiplies the output signal by the delay signal to generate a demodulated signal.
- a delayed signal g (t) obtained by delaying the signal by 1Z4 period is expressed by the following equation.
- ⁇ indicates the period of the carrier component of the output signal.
- the demodulation signal output from mixer 236 is a signal obtained by multiplying the signals shown in equations (8) and (9), the demodulation signal v (t) is expressed by the following equation.
- V ( ⁇ ) sm 2 ⁇ 0 ⁇ + ⁇ ( ⁇ ) + ⁇ ⁇ t--sm A 0 (t)-Ai ⁇ 4
- the demodulation signal v (t) is expressed by the following equation by removing the first term on the right side of Equation (10) using a low pass filter.
- equation (11) can be approximated by the following equation
- the timing jitter of the output signal can be demodulated by adding the variation amount for each 1Z4 period.
- the demodulator 230 may further include a low pass filter that removes the first term on the right side of Equation (10). Also, the correction unit may calculate the correction value based on the gain of the demodulator 230.
- FIG. 9 is a diagram showing another example of the configuration of the electronic device 200. As shown in FIG.
- the electronic device 200 in this example further includes an output unit 240 in addition to the configuration of the electronic device 200 shown in FIG.
- Other components may have the same functions as the components denoted by the same reference numerals in FIG.
- the output unit 240 receives an output signal output from the operation circuit 210 and a demodulation signal output from the demodulator 230, selects one of them, and outputs the selected signal to the outside. For example, the output unit 240 outputs an output signal to the outside during actual operation of the electronic device 200, and outputs a demodulation signal to the outside when testing the electronic device 200. In addition, the output unit 240 may normally output the output signal to the outside, and may output the demodulation signal to the outside when there is an instruction to output the demodulation signal from the outside.
- FIG. 10 is a view showing another example of the configuration of the electronic device 200.
- the electronic device 200 in this example includes a plurality of operation circuits 210, a switching unit 250, and a demodulator 230.
- the plurality of operation circuits 210 respectively generate output signals.
- the switching unit 250 switches the force for inputting any one of the output signals of the plurality of operation circuits 210 to the demodulator 230.
- the switching unit 250 may receive an instruction from the test apparatus 100 which of the operation circuits 210 is to be tested, and select an output signal according to the instruction.
- the demodulator 230 demodulates the input output signal and outputs a demodulated signal.
- the demodulator 230 may output the demodulated signal to the outside through the output unit 240 as shown in FIG. 9 and may output the demodulated signal to the outside without passing through the output unit 240.
- FIG. 11 is a view showing another example of the configuration of the electronic device 200.
- the electronic device 200 in this example further includes an integrator 260 in addition to the configuration of the electronic device 200 shown in FIG.
- Other components have the same functions as the components denoted by the same reference numerals in FIG. You may
- the integrator 260 integrates the demodulated signal output from the demodulator 230.
- the integrator 260 may be a capacitor that is charged with a predetermined charge current while the demodulated signal exhibits a logic 1 and discharged with a predetermined discharge current while the demodulated signal exhibits a logic 0.
- the integrated value of the demodulation signal can be detected by the voltage value of the capacitor.
- the output unit 240 selects either the output signal output from the operation circuit 210, the demodulated signal output from the demodulator 230, or the signal output from the integrator 260, and outputs the selected signal to the outside. For example, the output unit 240 selects the output signal during actual operation of the electronic device 200, selects the demodulation signal when measuring the periodic jitter of the output signal, and selects the timing jitter of the output signal. The output signal may be selected.
- the calibration unit 330 be notified of the gain of the integrator 260 in advance. Since the modulation component of the signal output from the integrator 260 is amplified by the gains of the demodulator 230 and the integrator 260, the calibration unit 330 adds the gain of the measured demodulator 230 to the gain of the integrator 260. Furthermore, it is preferable to perform calibration based on it.
- FIG. 12 is a view showing another example of the configuration of the test apparatus 100.
- the test apparatus 100 in this example has a configuration of the test apparatus 100 shown in FIG. 1 and further includes an integrator 130 and a switching unit 140.
- the electronic device 200 may not include the integrator 260 described in FIG.
- the integrator 130 integrates the demodulated signal output from the electronic device 200.
- the switching unit 140 selects either the demodulation signal or the output signal of the integrator 130 and inputs the selected signal to the measuring unit 110 and the direct current component detection unit 310.
- the switching unit 140 may select the demodulation signal when measuring the periodic jitter of the output signal, and may select the output signal of the integrator 130 when measuring the timing jitter of the output signal.
- the switching unit 140 may select a demodulation signal.
- the calibration unit 330 be notified of the gain of the integrator 130 in advance!
- FIG. 13 is a diagram showing an example of the configuration of a jitter measurement apparatus 400 according to an embodiment of the present invention.
- the jitter measuring apparatus 400 is an apparatus for measuring the jitter of a signal under test, and A pulse generator 410, a first filter 420, a DC component detection unit 430, and an adjustment unit 440 are provided.
- the pulse generator 410 outputs a pulse having a substantially constant pulse width for each predetermined edge of the signal under test, and outputs it as a demodulated signal obtained by demodulating the jitter of the signal under test. For example, the pulse generator 410 outputs a pulse having a substantially constant pulse width at each rising edge of the signal to be measured.
- the pulse generator 410 may have the same function and configuration as the demodulator 230 described in connection with FIG.
- the pulse generator 410 in this example has a variable delay circuit 412 and a logic circuit 414.
- the variable delay circuit 412 branches and receives the signal to be measured, and outputs a delay signal obtained by delaying the signal to be measured by a set delay amount.
- the logic circuit 414 outputs a pulse based on the signal under test and the delay signal, and outputs it as a demodulated signal.
- the logic circuit 414 may be a circuit that outputs an exclusive OR of the signal under test and the delay signal.
- the pulse generator 410 outputs a pulse having a pulse width substantially equal to the amount of delay in the variable delay circuit 412 in response to both the rising edge and the falling edge of the signal under test.
- the logic circuit 414 may be a circuit that outputs a logical product of the signal under test and the signal obtained by inverting the delay signal.
- the pulse generator 410 outputs a pulse having a pulse width substantially equal to the delay amount in the variable delay circuit 412 in response to the rising edge of the measurement signal.
- Such a configuration makes it possible to output a demodulated signal in which the period jitter of the signal under test is demodulated. For example, the fluctuation of the average voltage for each period of the signal under measurement in the demodulated signal corresponds to the period jitter of the signal under measurement.
- the first filter 420 averages and outputs the waveform of the demodulated signal output from the pulse generator 410.
- the first filter 420 may be a low pass filter that removes and passes frequency components higher than a predetermined cutoff frequency with respect to the demodulated signal. By such processing, the waveform of the demodulated signal can be averaged and output as a signal indicating periodic jitter.
- the cutoff frequency of the first filter 420 may be set to a frequency that can detect the average voltage fluctuation of the demodulated signal, for example, for each cycle of the signal under test.
- DC component detection unit 430 branches and receives the demodulated signal output from pulse generator 410. And detect the DC component of the demodulated signal.
- the direct current component detection unit 430 may remove a component of a frequency higher than a predetermined cutoff frequency with respect to the demodulation signal.
- the direct current component detection unit 430 in the present example has a second filter 432.
- Second filter 432 receives the demodulated signal and passes the DC component of the demodulated signal.
- the second filter 432 may be a low pass filter that removes and passes frequency components higher than a predetermined cutoff frequency to the demodulated signal.
- the cut-off frequency of the second filter 432 is smaller than the cut-off frequency of the first filter 420.
- the cutoff frequency of the first filter 420 is the maximum of the jitter component that is smaller than the carrier frequency of the signal under measurement. The frequency may be greater than the frequency.
- the cutoff frequency of the second filter 432 may be lower than the maximum frequency of the jitter component.
- the cutoff frequency of the second filter 432 is preferably sufficiently smaller than the response frequency of the feedback loop U ,.
- the adjusting unit 440 adjusts the pulse width of the pulse output from the pulse generator 410 based on the DC component of the demodulated signal detected by the DC component detecting unit 430. For example, the adjustment unit 44 adjusts the pulse width of the pulse output from the pulse generator 410 so that the DC component of the demodulation signal substantially matches the reference value set in advance. For example, the adjustment unit 440 adjusts the pulse width by controlling the amount of delay in the variable delay circuit 412 by negative feedback based on the difference between the level of the direct current component of the demodulated signal and the reference value. .
- the direct current component of the demodulated signal depends on the gain of pulse generator 410. For this reason, during measurement of the signal to be measured, the pulse generation unit 410 is dynamically controlled to match the DC component of the demodulated signal with the reference value, thereby preventing the jitter gain fluctuation in the pulse generator 410. be able to.
- the period jitter of the signal under test can be determined by dividing the amount of fluctuation of the average voltage output from the first filter 420 by the reference value.
- the jitter gain of the pulse generator 410 may be set to a desired value by setting the reference value to a value according to the desired jitter gain.
- the reference value may be a value preset by the user according to the desired jitter gain.
- FIG. 14 is a diagram showing another configuration example of the jitter measurement apparatus 400.
- Jitter measurement apparatus 400 in this example differs from jitter measurement apparatus 400 described in FIG. 13 in that direct-current component detection unit 430 branches and receives the demodulated signal output from first filter 420.
- Other functions and configurations may be identical to the jitter measuring device 400 described in FIG.
- the demodulation signal received by the direct current component detection unit 430 has a high frequency component already removed by the first filter 420, so the second filter 432 can be designed more easily.
- Transmission path 446 electrically connects the output terminal of differential amplifier 442 to the control terminal of variable delay circuit 412.
- the variable delay circuit 412 may be a circuit that generates a delay amount according to the voltage input to the control terminal.
- Capacitor 444 is provided between transmission path 446 and the ground potential.
- Adjustment unit 440 shown in FIG. 15B further includes differential circuit 456 and resistors (448, 450, 452, 454) in addition to the configuration of adjustment unit 440 shown in FIG. 15A.
- Difference circuit 456 is provided between DC component detection unit 430 and differential amplifier 442, and the difference between the level of the DC component of the demodulated signal output from DC component detection unit 430 and the predetermined level V , DC of demodulated signal
- the differential amplifier 442 It supplies to the differential amplifier 442 as the level of the component.
- the predetermined level V is
- the difference circuit 456 subtracts the level V corresponding to the offset component from the level of the DC component of the demodulated signal output from the DC component detection unit 430, and supplies the result to the differential amplifier 442
- the demodulated signal shows L logic
- the bell V may be generated by a pulse generator 410. Also, the logic circuit 414 power level V
- the power supply voltage on the negative side that defines the output level of the L logic of the logic circuit 414 may be supplied to the difference circuit 456.
- Resistance 448 is used as a transmission path for supplying level V to the negative input terminal of difference circuit 456.
- the resistor 450 is provided between the positive input terminal of the direct current component detection unit 430 and the difference circuit 456. Also, the resistor 454 is provided between the output terminal and the negative input terminal of the differential circuit 456. Further, the resistor 452 is provided between the positive input terminal of the differential circuit 456 and the ground potential.
- FIG. 16 is a diagram showing another configuration example of the jitter measurement apparatus 400.
- the jitter measurement apparatus 400 in this example may have two series resistances (458, 460) in addition to the configuration of any of the jitter measurement apparatus 400 shown in FIG. 13 or FIG. 16 in FIG. 16 shows a configuration in which two series resistances (458, 460) are added to the jitter measuring device 400 shown in FIG. Also, the jitter measuring device 400 is provided on the semiconductor chip 462.
- Two series resistances (458, 460) are provided in series between the positive power supply wiring and the negative power supply wiring inside the semiconductor chip 462.
- the power supply wiring on the positive side and the power supply wiring on the negative side may be wiring that supplies power to the pulse generator 410, the first filter 420, the DC component detection unit 430, the adjustment unit 440, and the like.
- the two series resistances (458 and 460) are generated by dividing the positive side power supply voltage (VDD in this example) and the negative side power supply voltage (GND in this example) by a preset resistance ratio.
- the adjusted reference value is supplied to the adjustment unit 440.
- the two series resistors (458, 460) may be variable resistors whose resistance value can be set by an externally applied control voltage.
- the resistance value of each of the two series resistors (458, 460) is preset to have a resistance ratio corresponding to the jitter gain that the jitter measuring apparatus 400 should have. With such a configuration, the jitter gain of the jitter measurement apparatus 400 can be maintained substantially constant even when temperature change or the like occurs.
- FIG. 17 is a view showing another configuration example of the jitter measurement apparatus 400.
- the constant device 400 includes a pulse generator 410, a first filter 420, a DC component detection unit 430, an adjustment unit 440, and a semiconductor chip 462.
- the functions and configurations of the pulse generator 410, the first filter 420, the DC component detection unit 430, and the adjustment unit 440 are the same as those of the pulse generator 410, the first filter 420, and the DC component described with reference to FIG. It may be identical to the detection unit 430 and the adjustment unit 440.
- the pulse generator 410, the first filter 420, and the DC component detection unit 430 are provided on the semiconductor chip 462.
- the adjustment unit 440 is provided outside the semiconductor chip 462.
- the semiconductor chip 462 has an output terminal 470 and an input terminal 472.
- the output terminal 470 outputs the direct current component of the demodulated signal detected by the direct current component detection unit 430 to the adjustment unit 440 provided outside the semiconductor chip 462.
- Adjustment unit 440 outputs a control signal according to the difference between the DC component of the demodulated signal and the given reference value.
- the input terminal inputs the control signal to the inside of the semiconductor chip 462 to adjust the pulse width of the pulse output from the pulse generator 410.
- setting the adjustment unit 440 can be easily performed by taking the adjustment unit 440 out of the semiconductor chip 462.
- the reference value or the like given to the adjustment unit 440 can be easily adjusted.
- the adjustment section 440 is taken out of the semiconductor chip 462 to perform adjustment. The setting of the part 440 can be easily performed.
- FIG. 18 is a diagram showing another configuration example of the jitter measurement apparatus 400.
- the jitter measurement apparatus 400 in this example may further include an integrator 260 in addition to the configuration of any of the jitter measurement apparatus 400 described in FIGS.
- the integrator 260 integrates the pulse output from the pulse generator 410 to demodulate the timing jitter of the signal under test.
- the jitter measurement apparatus 400 may include an integrator 260 instead of the first filter 420.
- the integrator 260 may have the same function and configuration as the integrator 260 described in connection with FIG.
- FIG. 19A is a diagram showing an example of the configuration of the integrator 260.
- the integrator 260 includes a source side current source 266, a source side transistor 262, a sink side current source 268, a sink side transistor 264, and a capacitor 270.
- the source side transistor 262 outputs a pulse generator 410.
- the source current generated by the source side current source 266 charges the capacitor 270 while the power demodulation signal indicates H logic.
- the sink transistor 264 discharges the capacitor 270 with the sink current generated by the sink current source 268 while the demodulated signal output from the pulse generator 410 indicates L logic.
- timing jitter can be demodulated as fluctuation of voltage at the capacitor 270.
- the amount of current generated by the source-side current source 266 and the sink-side current source 268 is such that the voltage power of the capacitor 270 at the boundary of each cycle of the signal under measurement becomes substantially constant when the signal under measurement does not have jitter. It is set! /.
- FIG. 20 is a view showing an example of the configuration of a test apparatus 500 according to another embodiment of the present invention.
- the test apparatus 500 is an apparatus for determining the quality of a device under test 600 such as a semiconductor chip, and includes a jitter measurement apparatus 400 and a determination unit 120.
- the determination unit 120 may be identical to the determination unit 120 described with reference to FIG.
- the determination unit 120 determines the quality of the device under test 600 based on the amount of jitter measured by the jitter measurement apparatus 400. For example, the judging unit 120 judges the quality of the device under test 600 based on whether or not the jitter amount is within a predetermined tolerance range! ,.
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Abstract
Description
Claims
Priority Applications (2)
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DE112007000571T DE112007000571T5 (de) | 2006-03-10 | 2007-03-07 | Jittermessvorrichtung, elektronische Vorrichtung und Prüfvorrichtung |
JP2008505080A JP4954193B2 (ja) | 2006-03-10 | 2007-03-07 | ジッタ測定装置、電子デバイス、及び試験装置 |
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US11/371,849 | 2006-03-10 | ||
US11/371,849 US7554332B2 (en) | 2006-03-10 | 2006-03-10 | Calibration apparatus, calibration method, testing apparatus, and testing method |
US11/616,038 US8204165B2 (en) | 2006-03-10 | 2006-12-26 | Jitter measurement apparatus, electronic device, and test apparatus |
US11/616,038 | 2006-12-26 |
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WO2007105564A1 true WO2007105564A1 (ja) | 2007-09-20 |
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Cited By (1)
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JP2011002298A (ja) * | 2009-06-17 | 2011-01-06 | Nippon Telegr & Teleph Corp <Ntt> | ジッタ検出回路 |
Citations (2)
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JP2001141767A (ja) * | 1999-11-09 | 2001-05-25 | Yokogawa Electric Corp | ジッタ測定回路とそれを用いたicテスタ |
JP2006003255A (ja) * | 2004-06-18 | 2006-01-05 | Anritsu Corp | ジッタ測定方法およびジッタ測定装置 |
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Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2001141767A (ja) * | 1999-11-09 | 2001-05-25 | Yokogawa Electric Corp | ジッタ測定回路とそれを用いたicテスタ |
JP2006003255A (ja) * | 2004-06-18 | 2006-01-05 | Anritsu Corp | ジッタ測定方法およびジッタ測定装置 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2011002298A (ja) * | 2009-06-17 | 2011-01-06 | Nippon Telegr & Teleph Corp <Ntt> | ジッタ検出回路 |
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