WO2007078065A1 - Compose semi-conducteur a base de nitrure de gallium - Google Patents

Compose semi-conducteur a base de nitrure de gallium Download PDF

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Publication number
WO2007078065A1
WO2007078065A1 PCT/KR2006/005431 KR2006005431W WO2007078065A1 WO 2007078065 A1 WO2007078065 A1 WO 2007078065A1 KR 2006005431 W KR2006005431 W KR 2006005431W WO 2007078065 A1 WO2007078065 A1 WO 2007078065A1
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Prior art keywords
layer
gallium nitride
buffer layer
based compound
gan
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PCT/KR2006/005431
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English (en)
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Sang Joon Lee
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Seoul Opto Device Co., Ltd.
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Publication of WO2007078065A1 publication Critical patent/WO2007078065A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02502—Layer structure consisting of two layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/0242—Crystalline insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H01L21/02507—Alternating layers, e.g. superlattice
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD

Definitions

  • the present invention relates to a gallium nitride-based compound semiconductor, and more particularly, to a compound semiconductor having a buffer layer capable of eliminating lattice mismatch with a substrate.
  • a gallium nitride-based compound semiconductor is grown on a sapphire
  • an epitaxial layer of compound semiconductor crystals is grown on a sapphire substrate by supplying organic compound gases as reaction gases into a chamber with the substrate loaded therein and maintaining the temperature of a surface of the substrate at a high temperature of about 900 0 C to 1,100 0 C.
  • an epitaxial layer of GaN is formed by using trimethylgallium (TMGa) gas and ammonia gas as the reaction gases.
  • Al x Ga (1-x) N polycrystalline thin film as a buffer layer on a substrate before growth of an epitaxial layer.
  • This method comprises the steps of growing a buffer layer on a sapphire substrate at a low temperature of 400 0 C to 900 0 C and growing a non-doped GaN layer or a silicone (Si) doped n-GaN layer on the buffer layer at high temperature.
  • the crystallinity of the epitaxial layer can be improved to a certain extent.
  • the present invention is conceived to solve the aforementioned problems.
  • An object of the present invention is to provide a gallium nitride-based compound semiconductor capable of improving performance and securing reliability by reducing crystal defects of a GaN-based single crystal layer and by improving crystallinity of the GaN-based single crystal layer through a buffer layer containing boron.
  • the present invention provides a gallium nitride-based compound semiconductor comprising a substrate, a buffer layer containing boron and formed on the substrate, and a gallium nitride-based semiconductor layer formed on the buffer layer.
  • the gallium nitride-based semiconductor layer may comprise a non-doped GaN film; an N type doped n-GaN film formed on the non-doped GaN film; an active layer having a multiple quantum well structure and formed on the N type doped n-GaN film; and a P type doped p-GaN film formed on the active layer.
  • the present invention provides a method of fabricating a gallium nitride- based compound semiconductor, comprising the steps of forming a buffer layer, which contains boron, on a substrate at a first temperature; and forming a gallium nitride- based semiconductor layer on the buffer layer at a second temperature higher than the first temperature.
  • the first temperature may range from 500 0 C to 900 0 C
  • the second temperature may range from 900 0 C to 1,000 0 C.
  • Materials of the buffer layer, which contains boron may include any one of trimethylgallium, triethylgallium, trimethy- laluminum and trimethylindium; triethylboron; and ammonia.
  • a buffer layer containing boron is formed as a single film, a multi-layered film or a superlattice layer, thereby reducing crystal mismatch between the buffer layer and a semiconductor layer formed on the buffer layer, and improving the crystallinity of the semiconductor layer.
  • the present invention can improve the performance and reliability of a device that is provided with semiconductor layers with less crystal mismatch and improved crystallinity.
  • FIGs. 1 to 4 are sectional views of gallium nitride-based compound semiconductors according to a first embodiment of the present invention.
  • FIGs. 5 to 12 are sectional views of gallium nitride-based compound semiconductors according to a second embodiment of the present invention.
  • FIGs. 13 to 20 are sectional views of gallium nitride-based compound semiconductors according to a third embodiment of the present invention. Best Mode for Carrying Out the Invention
  • FIGs. 1 to 4 are sectional views of gallium nitride-based compound semiconductors according to a first embodiment of the present invention.
  • each of the gallium nitride-based compound semiconductors according to the present invention comprises a substrate 10, a buffer layer 20 containing boron and formed on the substrate 10, and a semiconductor layer 30 formed on the buffer layer 20.
  • the substrate 10 may be a sapphire substrate, a silicone substrate, a GaN substrate or a SiC substrate, and the like.
  • a sapphire substrate with a size of 2 inches to 300 inches is preferably used in this embodiment.
  • the aforementioned buffer layer 20 is formed by means of
  • raw material gases and reaction gases to be injected into MOCVD equipment are variously changed according to the type of film to be used as the buffer layer 20. That is, when a B Al Ga N film is formed as the buffer layer 20 x y (1-x-y) as shown in Fig. 1, the film is grown by using ammonia (NH ) and raw materials in which triethylboron, trimethylgallium and trimethylaluminum are mixed.
  • NH ammonia
  • a B Al Ga N film with a thickness of about 5 A to 1,000 A is formed by injecting 3 x y (1- ⁇ -y) ⁇ mol/min to 100 ⁇ mol/min of triethylboron, 5 ⁇ mol/min to 200 ⁇ mol/min of trimethylgallium, 3 ⁇ mol/min to 100 ⁇ mol/min of trimethylaluminum, and 2 L/min to 80 L/min of ammonia at a temperature of 500 0 C to 800 0 C and a pressure of 50 torrs to 900 torrs.
  • triethylgallium may be used instead of trimethylgallium. If triethylgallium is used, it is preferably used in an amount of 3 ⁇ mol/min to 100 ⁇ mol/min. Furthermore, ammonia to which N H is added may be used as an N source.
  • the layer is grown using ammonia and raw materials in which triethylboron, trimethylgallium, trimethylaluminum and trimethylindium are mixed.
  • a B Al In Ga N material layer with a thickness of about 5 A to 1,000 A is formed by x y z (1-x-y-z) injecting 3 ⁇ mol/min to 100 ⁇ mol/min of triethylboron, 5 ⁇ mol/min to 200 ⁇ mol/min of trimethylgallium, 3 ⁇ mol/min to 100 ⁇ mol/min of trimethylaluminum, 3 ⁇ mol/min to 100 ⁇ mol/min of trimethylindium, and 2 L/min to 80 L/min of ammonia at a temperature of 500 0 C to 800 0 C and a pressure of 50 torrs to 900 torrs.
  • a B In Ga N material layer is formed as the buffer layer 20 as x y (1-x-y) shown in Fig. 3, the layer is grown using ammonia and raw materials in which triethylboron, trimethylgallium and trimethylindium are mixed.
  • a B In Ga N material x y (1-x-y) layer with a thickness of about 5 A to 1,000 A is formed by injecting 3 ⁇ mol/min to 100 ⁇ mol/min of triethylboron, 5 ⁇ mol/min to 200 ⁇ mol/min of trimethylgallium, 3 ⁇ mol/min to 100 ⁇ mol/min of trimethylindium, and 2 L/min to 80 L/min of ammonia at a temperature of 500 0 C to 800 0 C and a pressure of 50 torrs to 900 torrs.
  • a B Al In N material layer is formed as the buffer layer 20 as x y (1-x-y) shown in Fig.
  • a B Al In N x y (1-x-y) material layer with a thickness of about 5 A to 1,000 A is formed by injecting 3 ⁇ mol/ min to 100 ⁇ mol/min of triethylboron, 3 ⁇ mol/min to 100 ⁇ mol/min of trimethylindium, 3 ⁇ mol/min to 100 ⁇ mol/min of trimethylaluminum, and 2 L/min to 80 L/min of ammonia at a temperature of 500 0 C to 800 0 C and a pressure of 50 torrs to 900 torrs.
  • the semiconductor layer 30 may be at least one layer of a non-doped GaN layer and an impurity-doped GaN layer. Further, the semiconductor layer 30 may be formed as stacked layers. That is, an N type semiconductor layer, an active layer and a P type semiconductor layer are sequentially stacked to fabricate a light-emitting device. In this embodiment, the semiconductor layer 30 is formed by growing a non-doped GaN in a vapor phase after raising the temperature of a reactor to 900 0 C to 1,100 0 C, in which the buffer layer isformed. Accordingly, a GaN layer with high quality can be formed.
  • GaN layer and forming a P type doped p-GaN layer on the active layer as described above.
  • the aforementioned buffer layer may be formed as a superlattice layer containing boron.
  • a second embodiment of the present invention will be described with reference to the drawings. A description of the following embodiment equal to that of the first embodiment will be omitted.
  • FIGs. 5 to 12 are sectional views of gallium nitride-based compound semiconductors according to a second embodiment of the present invention.
  • each of the gallium nitride-based compound semiconductors comprises a substrate 10, a superlattice buffer layer 200 containing boron and formed on the substrate 10, and a semiconductor layer 30 formed on the superlattice buffer layer 200.
  • the superlattice buffer layer 200 is a superlattice layer that at least two material layers of B Ga N, B Al N and GaN are repeatedly stacked.
  • each of the x (1-x) y (1-y) f J o o material layers constructing the superlattice layer has a thickness of 5 A to 100 A and the superlattice layer comprises 2 pairs to 30 pairs of material layers.
  • a B Ga N material layer 210a or 220a and a B Al N x (1-x) J y (1-y) material layer 210b or 220b are sequentially formed to make a pair of material layers, and 2 to 30 pairs of such material layers are grown to form the superlattice buffer layer 200.
  • N material layer 210b or 220b are sequentially formed to make a pair of material layers. Moreover, as shown in Fig. 7, a B Ga N material layer 210a or 220a, a B Al x (1- ⁇ ) y
  • N material layer 210b or 220b, and a GaN material layer 210c or 220c are se-
  • GaN material layer 210c or 220c are sequentially formed to make a set of material layers. Further, as shown in Fig. 9, a B Ga N material layer 210a or 220a, a GaN x (1- ⁇ ) material layer 210b or 220b, and a B Al N material layer 210c or 220c are se- y (i-y) quentially formed to make a set of material layers. Furthermore, as shown in Fig. 10, a B Al N material layer 210a or 220a, a GaN material layer 210b or 220b, and a B Ga y (i-y) x
  • N material layer 210c or 220c are sequentially formed to make a set of material
  • a GaN material layer 210a or 220a, a B Ga N x (1- ⁇ ) material layer 210b or 220b, and a B Al N material layer 210c or 220c are se-
  • J y (i-y) J quentially formed to make a set of material layers.
  • a GaN material layer 210a or 220a a GaN material layer 210a or 220a, a B Al N material layer 210b or 220b, and a B Ga y (i-y) x
  • N material layer 210c or 220c are sequentially formed to make a set of material
  • the buffer layer is formed as a superlattice layer containing boron, thereby reducing lattice defects with respect to the semiconductor layer formed on the buffer layer and improving the crystallinity of the semiconductor layer.
  • the buffer layer containing boron in the present invention may be formed by stacking one layer above another.
  • a third embodiment of the present invention will be described with reference to the drawings. A description of the following embodiment similar to those of the first and second embodiments will be omitted.
  • Figs. 13 to 20 are sectional views of gallium nitride-based compound semiconductors according to a third embodiment of the present invention.
  • each of the gallium nitride-based compound semiconductors comprises a substrate 10, a buffer layer 300 formed on the substrate 10 by stacking boron-contained single layers one on another, and a semiconductor layer 30 formed on the buffer layer 300.
  • the buffer layer 300 comprising the plurality of single layers stacked one above another is formed by stacking at least two single layers of a B Ga N, a B Al N and
  • a B Ga N layer 300a x (l-x) and a B Al N layer 300b are sequentially formed as shown in Fig. 13. Further, as y (i-y) shown in Fig. 14, a B Al N layer 300a and a B Ga N layer 300b are sequentially y (i-y) x (1- ⁇ ) formed. Furthermore, as shown in Fig. 15, a B Ga N layer 300a, a B Al N layer x (1- ⁇ ) y (i-y)
  • a B Al N layer 300a, a B Ga N layer 300b and a GaN layer 300c are sequentially formed.
  • a B Al N layer 300a, a B Ga N layer 300b and a GaN layer 300c are sequentially y (i-y) x (1- ⁇ ) formed.
  • a B Ga N layer 300a, a GaN layer 300b and x (1- ⁇ ) a B Al N layer 300c are sequentially formed.
  • N layer 300a a GaN layer 300b and a B Ga N layer 300c are sequentially formed.
  • Al N layer 300c are sequentially formed.
  • (i-y) layer 300a, a B Al N layer 300b and a B Ga N layer 300c are sequentially formed.
  • the buffer layer 200 As described above, two or three nitride-based material layers containing boron are sequentially formed, resulting in the buffer layer 200 with the single layers stacked one above another according to this embodiment.
  • the formation of the buffer layer by stacking the single films containing boron as described above can reduce lattice mismatch with respect to the semiconductor layer formed on the buffer layer and can improve the crystallinity of the semiconductor layer.
  • the present invention can be used to provide a gallium nitride-based compound semiconductor capable of improving its performance and reliability by reducing crystal defects of a GaN-based single crystal layer and improving the crystallinity of the GaN- based single crystal layer by means of a buffer layer containing boron. Therefore, the present invention can improve the performance and reliability of a device by using a semiconductor layer without crystal defects and with improved crystallinity.

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

La présente invention concerne un composé semi-conducteur à base de nitrure de gallium comportant un substrat, une couche tampon contenant du bore et formée sur le substrat, et une couche semi-conductrice à base de nitrure de gallium formée sur la couche tampon. La présente invention concerne également un procédé de fabrication de composé semi-conducteur à base de nitrure de gallium. Selon la présente invention, la couche tampon contenant du bore est formée sous la forme d'un film unique, d'un film multicouche ou d'une couche de superstructure cristalline, réduisant ainsi les défauts cristallins par rapport à la couche semi-conductrice formée sur la couche tampon et améliorant la cristallinité de la couche semi-conductrice, permettant l'obtention d'une couche semi-conductrice exempte de défauts cristallins. Ainsi, il est possible d'améliorer l'efficacité et la fiabilité d'un dispositif.
PCT/KR2006/005431 2005-12-30 2006-12-13 Compose semi-conducteur a base de nitrure de gallium WO2007078065A1 (fr)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013019316A2 (fr) * 2011-07-29 2013-02-07 Bridgelux, Inc. Couche tampon à teneur en bore pour croissance de nitrure de gallium sur silicium

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013035325A1 (fr) * 2011-09-05 2013-03-14 日本電信電話株式会社 Structure semi-conductrice de nitrure et son procédé de fabrication

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JP2000022211A (ja) * 1998-06-26 2000-01-21 Showa Denko Kk Ｉｉｉ族窒化物半導体発光素子基板
KR20000041281A (ko) * 1998-12-22 2000-07-15 이형도 질화물계 반도체소자 및 질화물계 반도체 결정성장방법
JP2004247412A (ja) * 2003-02-12 2004-09-02 Yamaha Corp 半導体積層構造及びその製造方法並びにそれを備えた半導体装置

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JP3752810B2 (ja) * 1997-11-26 2006-03-08 昭和電工株式会社 エピタキシャルウェハおよびその製造方法並びに半導体素子

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JP2000022211A (ja) * 1998-06-26 2000-01-21 Showa Denko Kk Ｉｉｉ族窒化物半導体発光素子基板
KR20000041281A (ko) * 1998-12-22 2000-07-15 이형도 질화물계 반도체소자 및 질화물계 반도체 결정성장방법
JP2004247412A (ja) * 2003-02-12 2004-09-02 Yamaha Corp 半導体積層構造及びその製造方法並びにそれを備えた半導体装置

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013019316A2 (fr) * 2011-07-29 2013-02-07 Bridgelux, Inc. Couche tampon à teneur en bore pour croissance de nitrure de gallium sur silicium
WO2013019316A3 (fr) * 2011-07-29 2013-09-06 Toshiba Techno Center, Inc. Couche tampon à teneur en bore pour croissance de nitrure de gallium sur silicium
JP2014527714A (ja) * 2011-07-29 2014-10-16 株式会社東芝 半導体装置およびその製造方法
US8916906B2 (en) 2011-07-29 2014-12-23 Kabushiki Kaisha Toshiba Boron-containing buffer layer for growing gallium nitride on silicon
TWI497757B (zh) * 2011-07-29 2015-08-21 Toshiba Kk 用於成長矽上氮化鎵之含硼緩衝層

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