WO2007050298A1 - Method for correcting eclipse or darkle - Google Patents

Method for correcting eclipse or darkle Download PDF

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Publication number
WO2007050298A1
WO2007050298A1 PCT/US2006/039786 US2006039786W WO2007050298A1 WO 2007050298 A1 WO2007050298 A1 WO 2007050298A1 US 2006039786 W US2006039786 W US 2006039786W WO 2007050298 A1 WO2007050298 A1 WO 2007050298A1
Authority
WO
WIPO (PCT)
Prior art keywords
column
circuit
pixels
image sensor
eclipse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2006/039786
Other languages
English (en)
French (fr)
Inventor
Christina Phan
Marco Cazzaniga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Eastman Kodak Co
Original Assignee
Eastman Kodak Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Eastman Kodak Co filed Critical Eastman Kodak Co
Priority to KR1020087009790A priority Critical patent/KR101289516B1/ko
Priority to JP2008537744A priority patent/JP2009514352A/ja
Priority to EP06825786.4A priority patent/EP1941716B1/en
Priority to CN200680040078XA priority patent/CN101305593B/zh
Publication of WO2007050298A1 publication Critical patent/WO2007050298A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/62Detection or reduction of noise due to excess charges produced by the exposure, e.g. smear, blooming, ghost image, crosstalk or leakage between pixels
    • H04N25/627Detection or reduction of inverted contrast or eclipsing effects
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/616Noise processing, e.g. detecting, correcting, reducing or removing noise involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/71Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
    • H04N25/75Circuitry for providing, modifying or processing image signals from the pixel array

Definitions

  • the present invention relates generally to the field of CMOS image sensors, and more particularly, to such image sensors having an anti-eclipse circuit for addressing reset problems.
  • the anti-eclipse circuit is physically separated from a column circuit for preventing undesirable noise in captured images.
  • CMOS image sensors A disadvantage of CMOS image sensors is its sensitivity to strong light when it shines onto the pixel array. A typical example of this problem is when the camera is pointed directly to the sun; the sensor will output a "black” sun instead of a bright one in the image. This phenomenon is referred to as eclipse or darkle.
  • the present invention addresses this shortcoming by permitting the correction to be done as a stand-alone circuit. This preserves the balance of the layout of the column circuit while providing a solution to the eclipse or darkle problem.
  • the present invention is directed to overcoming one or more of the problems set forth above.
  • the invention resides in a CMOS image sensor comprising a plurality of pixels arranged in columns and rows in an array; a column circuit for storing reset values and a value after integration; a correlated double sampler which derives an image signal from the reset and the value after integration; an anti-eclipse circuit physically separated from the column circuit and electrically connected to one or shared between multiple columns of pixels for restoring corrupted column voltage on a column of pixels.
  • An advantage of this invention is the preservation of the simplicity and the balance of the layout of the column circuit. This will prevent structure noise from occurring in the image while successfully addressing the eclipse or darkle issue.
  • Fig. 1 is a top view of a prior art image sensor
  • Fig. 2a is a top view of the image sensor of the present invention.
  • Fig. 2b is an alternative embodiment of Fig. 2a;
  • Fig. 3 is a side view of a typical pixel of Figs. 2a and 2b;
  • Figs. 4a and 4b are schematic diagrams of the of eclipse circuit of the present invention.
  • Fig. 5 is a side view of a digital camera containing the image sensor of the present invention. DETAILED DESCRIPTION OF THE INVENTION
  • each pixel 52 includes preferably either a pinned photodiode or a photodiode (sensing region 54) that is exposed to incident light for a desired period of time, referred to as integration, which causes charge to be collected within the sensing region 54.
  • the pixel 52 also includes charge-to- voltage conversion circuitry 56 that receives the charge from the sensing region through a transfer gate 58 and converts the charge to a voltage, which will be referenced herein as the sample image signal.
  • the operation of the image sensor includes two basic operations, reset and the above-mentioned integration.
  • the photodiode is set to a known reference voltage, often referred to as a reset level.
  • this reset level is discharged to ground in the integration phase.
  • the reset level and the final level after the integration phase sample image signals, are stored in the column circuit 60. These voltages are then subtracted in the correlated double sampler 70.
  • an anti-eclipse circuit 80 senses the above-described reset level on the column line and compares it to a preset threshold. If this reset level drops below this threshold, the anti-eclipse circuit 80 will detect and rectify the reset signal level on the column line, as will be described in detail hereinbelow.
  • the anti-eclipse circuit 80 in this description is illustrated as a circuit that provides correction for only 2 columns (coleven, colodd) as shown in Fig 4a.
  • coleven is connected to one column and colodd is connected to another column of the pixel array.
  • Fig 4b shows that this anti-eclipse circuit can be easily expanded to provide correction for more columns.
  • coleveni represents the even columns in the pixel array
  • coloddi represents the odd columns, (where i is 1, 2, 3 and the like up to the maximum columns in the pixel array).
  • the anti-eclipse circuit 80 is physically separately from the column circuit 60 and electrically connected to one or shared between multiple columns of pixels for restoring corrupted column voltage on a column of pixels.
  • the anti-eclipse circuit 80 is a stand-alone circuit and may be on any side of the pixel array 50.
  • Fig. 2b illustrates the anti-eclipse circuit 80 on the same side as the column circuit 60, but is it is still isolated or a stand-alone circuit as noted hereinabove.
  • the anti-eclipse or correction circuit 80 includes a comparator 90 that senses the reset signal level on one column line (can be either colodd or coleven) via two electrical connections each in series with a switch 95a and 95b.
  • Each switch 95a and 95b is put into a position that permits a connection between the comparator input 90 and column line for permitting the comparator 90 to sense the reset level on the column line only during reset.
  • the comparator 90 compares the sensed voltage to a preset threshold. If the voltage on the column line falls below the preset threshold, an eclipse or darkle event is then detected. When this happens, the comparator 90 sends out a trigger signal. The trigger signal is then latched into a digital flip-flop 100 on the rising edge of a signal that also controls reset level sampling on the column circuit 60. The flip-flop 100 will then generate a signal to pull the column line voltage to the level equivalent to the normal (non-eclipse) reset level.
  • switches 95a and 95b are put into a position that disconnects the comparator's input from the column line and connects it to ground to deactivate the sensing.
  • the column line voltage remains at the corrected level until the clear signal is received by the flip-flop. This "clear" signal is designed to occur after the completion of the sample reset phase of the column circuit 60.
  • a digital camera or imaging device 110 containing the image sensor 40 of the present invention for illustrating a typical commercial embodiment to which the ordinary consumer is accustomed.

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Solid State Image Pick-Up Elements (AREA)
PCT/US2006/039786 2005-10-26 2006-10-12 Method for correcting eclipse or darkle Ceased WO2007050298A1 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1020087009790A KR101289516B1 (ko) 2005-10-26 2006-10-12 Cmos 촬상 센서 및 촬상 디바이스
JP2008537744A JP2009514352A (ja) 2005-10-26 2006-10-12 エクリプスまたはダークルの修正方法
EP06825786.4A EP1941716B1 (en) 2005-10-26 2006-10-12 Method for correcting eclipse or darkle
CN200680040078XA CN101305593B (zh) 2005-10-26 2006-10-12 用于校正掩食或变暗的方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/258,812 US7573519B2 (en) 2005-10-26 2005-10-26 Method for correcting eclipse or darkle
US11/258,812 2005-10-26

Publications (1)

Publication Number Publication Date
WO2007050298A1 true WO2007050298A1 (en) 2007-05-03

Family

ID=37692665

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/039786 Ceased WO2007050298A1 (en) 2005-10-26 2006-10-12 Method for correcting eclipse or darkle

Country Status (6)

Country Link
US (1) US7573519B2 (https=)
EP (1) EP1941716B1 (https=)
JP (1) JP2009514352A (https=)
KR (1) KR101289516B1 (https=)
CN (1) CN101305593B (https=)
WO (1) WO2007050298A1 (https=)

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US8310580B2 (en) * 2009-07-27 2012-11-13 Sony Corporation Solid-state imaging device and camera system for suppressing occurrence of quantization vertical streaks
CN104619237B (zh) 2012-07-26 2018-03-30 德普伊辛迪斯制品公司 光不足环境中的ycbcr脉冲调制的照明方案
EP2992810B1 (en) 2012-07-26 2021-11-10 DePuy Synthes Products, Inc. Continuous video in a light deficient environment
WO2014134501A2 (en) 2013-02-28 2014-09-04 Olive Medical Corporation Videostroboscopy of vocal chords with cmos sensors
CA2906798A1 (en) 2013-03-15 2014-09-18 Olive Medical Corporation Super resolution and color motion artifact correction in a pulsed color imaging system
CA2906821A1 (en) 2013-03-15 2014-09-18 Olive Medical Corporation Scope sensing in a light controlled environment
EP3459431A1 (en) 2013-03-15 2019-03-27 DePuy Synthes Products, Inc. Controlling the integral light energy of a laser pulse
US9380232B2 (en) 2014-02-20 2016-06-28 Semiconductor Components Industries, Llc Image sensors with anti-eclipse circuitry
WO2015143453A1 (en) 2014-03-21 2015-09-24 Olive Medical Corporation Card edge connector for an imaging sensor
JP6748622B2 (ja) * 2017-02-16 2020-09-02 ソニーセミコンダクタソリューションズ株式会社 撮像システムおよび撮像装置
US10582138B2 (en) * 2017-09-22 2020-03-03 Semiconductor Components Industries, Llc Image sensors with dual conversion gain pixels and anti-eclipse circuitry
US10477126B1 (en) 2018-09-05 2019-11-12 Smartsens Technology (Cayman) Co., Limited Dual eclipse circuit for reduced image sensor shading
US10873716B2 (en) 2018-11-05 2020-12-22 SmartSens Technology (HK) Co., Ltd. Dual row control signal circuit for reduced image sensor shading
US10727268B1 (en) 2019-01-25 2020-07-28 Smartsens Technology (Cayman) Co., Ltd CMOS image sensor with compact pixel layout
US10652492B1 (en) 2019-02-12 2020-05-12 Smartsens Technology (Cayman) Co., Ltd. CMOS image sensor with improved column data shift readout
CN110896082A (zh) 2019-05-28 2020-03-20 思特威(上海)电子科技有限公司 具有新型布局的图像传感器

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Also Published As

Publication number Publication date
CN101305593B (zh) 2010-12-08
KR101289516B1 (ko) 2013-07-24
EP1941716B1 (en) 2018-07-04
JP2009514352A (ja) 2009-04-02
CN101305593A (zh) 2008-11-12
US20070091193A1 (en) 2007-04-26
US7573519B2 (en) 2009-08-11
EP1941716A1 (en) 2008-07-09
KR20080063361A (ko) 2008-07-03

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