WO2007025859A2 - Semiconductor structure with a laterally functional construction - Google Patents

Semiconductor structure with a laterally functional construction Download PDF

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Publication number
WO2007025859A2
WO2007025859A2 PCT/EP2006/065363 EP2006065363W WO2007025859A2 WO 2007025859 A2 WO2007025859 A2 WO 2007025859A2 EP 2006065363 W EP2006065363 W EP 2006065363W WO 2007025859 A2 WO2007025859 A2 WO 2007025859A2
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WIPO (PCT)
Prior art keywords
layer
component
substrate
region
lateral
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PCT/EP2006/065363
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German (de)
French (fr)
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WO2007025859A3 (en
Inventor
Karl Weidner
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Siemens Aktiengesellschaft
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Publication of WO2007025859A2 publication Critical patent/WO2007025859A2/en
Publication of WO2007025859A3 publication Critical patent/WO2007025859A3/en

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    • H—ELECTRICITY
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3185—Partial encapsulation or coating the coating covering also the sidewalls of the semiconductor body
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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    • H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
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    • H01L2224/2401—Structure
    • H01L2224/24011—Deposited, e.g. MCM-D type
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    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
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    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
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    • H01L2224/2405—Shape
    • H01L2224/24051—Conformal with the semiconductor or solid-state device
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    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
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    • H01L2224/241—Disposition
    • H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
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    • H01L2224/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • H01L2224/821—Forming a build-up interconnect
    • H01L2224/82101—Forming a build-up interconnect by additive methods, e.g. direct writing
    • H01L2224/82102—Forming a build-up interconnect by additive methods, e.g. direct writing using jetting, e.g. ink jet
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83194—Lateral distribution of the layer connectors
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    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
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    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Definitions

  • the present invention relates to an arrangement according to the preamble of the main claim and a method for producing such an arrangement.
  • the present invention relates, in particular, to semiconductor structures which have been produced by means of planar connection methods or contacting methods. These are described, for example, in WO 03/030247. According to such methods, a film which has been laminated uniformly over the topography of a substrate and arranged on this electronic component includes the components in a predetermined layer thickness. Such a film applied by laminating, for example, forms an insulation for the contacting according to conventional planar bonding methods.
  • a power semiconductor module may comprise a plurality of interconnected, interconnected, and interconnected on a substrate and with different connection methods, have electrically controllable components.
  • Such components are, for example, MOSFETs, IGBTs, passive components, sensors or other semiconductor components.
  • Lateral generally means laterally. In connection with components is meant towards the sides of the device.
  • the electronic components arranged on a substrate surface extend laterally and also laterally along the substrate surface or parallel to the substrate surface.
  • Lateral region means a section extending along the substrate surface, which is assigned to a free substrate surface area and / or a component surface area.
  • a layer applied to the substrate and / or to at least one component can have homogeneous properties.
  • a function may be, for example, an electrical and / or thermal insulation. Further functions are determined by a required thermal mechanical behavior of the component and / or layer or by a required electrical contacting, for example, of the source, gate and drain.
  • the required variable functions can be provided.
  • properties of a layer of a lateral region are, for example, electrical and / or thermal properties. These may be, for example, electrical and / or thermal insulating properties. Further properties can be achieved by a specific thickness and / or a specific mixing ratio of a composite material with one contained in the layer
  • Plastic and / or be determined with a proportion of at least one of a plastic contained in the layer different filler These properties can be changed from lateral area to lateral area and thus adapted to the required tasks. This allows a simple way a lateral function adaptation. In this way, the reliability of the generated semiconductor structure is also increased. A simplified processing is possible. It is also a simplified manufacture possible.
  • the properties may also relate, for example, to the thermal and / or mechanical behavior in a lateral area.
  • the properties also affect electrical properties or the insulating behavior. By hermetically sealed layer areas or insulating layer areas, for example, the penetration of gas or liquids can be prevented. Further properties relate to the integration of cooling functions or cooling properties. Reference is made in particular to WO 2005/013358 to the properties or to the provision of specific functions, the content of which is hereby incorporated in full in this application.
  • At least one transition region of at least one component to the substrate is formed with an additional insulation.
  • the additional electrical insulation may also be provided at an edge region and / or at an edge region of a component.
  • the property of the layer in the lateral region may additionally be an electrical insulating property. On In this way, unwanted electrical connections or contacts in this lateral area can be effectively prevented.
  • the additional insulation can be used advantageously in particular for semiconductor chips for their edge insulation to avoid short circuits.
  • the layer has openings to component terminals which are planarly contacted to the electrical connection. This can be a compact structure of the arrangement can be effected.
  • the electronic components are semiconductor structures such as LEDs, MOSFETs, IGBTs, passive components and / or sensors.
  • the layer comprising lateral areas is first prefabricated spatially separated from substrate and component arrangement, and then applied simultaneously to a substrate and component with a method step. In this way, additional process steps can be avoided.
  • the lateral regions of the layer can also be applied to the substrate and component individually in chronological succession in a plurality of method steps.
  • the layer is applied by means of lamination. This procedure is simple and very effective.
  • the formation of an electrical insulation at a transition of at least one component to the at least one lateral area by means of dispensing and / or an ink-jet method takes place additionally Substrate and / or at an edge region and / or at an edge region of a component.
  • a layer in particular laterally, is structured.
  • further functions can be integrated in the lateral area, such as the generation of further semiconductor structures or electrical contacts.
  • Figure 1 shows an embodiment of an inventive arrangement.
  • FIG. 1 shows a substrate 1 on which electronic components 2 are arranged.
  • a layer 3, for example an insulating layer 3, is applied by way of this topography produced in this way.
  • this insulating layer 3 is divided into four different with respect to their properties homogeneous lateral regions 4. These extend laterally or along the substrate surface over the topography.
  • Each homogeneous section of the insulating layer 3 is assigned in this way to a lateral region 4.
  • a portion of the insulating layer 3 of a lateral region 4 has homogeneous properties. This can be, for example, the thickness.
  • FIG. 1 shows an additional insulation 5 of transition areas of at least one electronic component 3 on the substrate 1.
  • a composite material may consist of the plastic of the insulating layer 3 and the filler.
  • the plastic forms a matrix in which the filler is embedded.
  • the filler serves primarily not as an extender. Rather, with the filler, a chemical, electrical and / or mechanical property accessible that could not be achieved alone with a plastic. Thus, with the help of the filler, a chemical resistance of the composite to a reactive substance can be improved. Likewise, an improved adhesion of the layer 3 or film on the semiconductor component 2 and / or on the substrate 1 can be achieved. It is also conceivable to use an electrically and / or thermally conductive filler, which leads to an electrically and / or thermally conductive composite material.
  • a modulus of elasticity of the layer material or film material can be influenced.
  • the elasticity of the film can be increased or decreased by means of the filler.
  • Other properties of the composite material or of the layer 3 or the film of the composite which can be influenced by the filler are press properties, gas permeability, compressive strength, dimensional behavior and dielectric constant of the composite material of layer 3 or film. These properties relate both to the processability of the film and to the functions of the film in the finished multilayer structure. By using a mixture of several fillers, several properties of the film can simultaneously in desired Be influenced.
  • An electronic component 2 may be a semiconductor device.
  • any organic or inorganic filler is conceivable.
  • the filler itself is an organic polymer (plastic).
  • the inorganic filler may be any metal.
  • Inorganic compounds for example carbonates, oxides, sulfides and the like, are also used.
  • organometallic compounds, such as organosilicon compounds, as a filler are possible.
  • the filler is preferably powdery or fibrous.
  • a diameter of the filler particles is a few nm down to a few microns.
  • the diameter of the filler particles, as well as the type of filler and a content of the filler in the base material, is such as to result in a composite having a certain property and thus a film having a certain property.
  • the type, shape and content of the filler are chosen so that the film or layer 3 can be laminated. This means that even when the filler is used, an elasticity of the film remains generated, so that the film can follow the surface contour of component 2 and substrate 1.
  • the film is in particular designed such that a height difference of up to 500 microns can be overcome.
  • the height difference is given, inter alia, by the topology of the substrate 1 and by the components 2 applied to the substrate 1.
  • the filler may be, for example, electrically and / or thermally conductive. To provide further properties, reference is again made to WO 2005/013358.

Abstract

The invention relates to an arrangement comprising a substrate (1), on which at least one electronic component (2) is arranged, a layer (3), particularly a film, laterally extending along the substrate surface and/or component surface. The arrangement is characterized in that the layer (3) has, per lateral area (4), specific homogeneous properties that vary from lateral area (4) to lateral area (4).

Description

Beschreibungdescription
Halbleiterstruktur mit einem lateral funktionalen AufbauSemiconductor structure with a laterally functional structure
Die vorliegende Erfindung betrifft eine Anordnung gemäß dem Oberbegriff des Hauptanspruchs sowie ein Verfahren zur Erzeugung einer derartigen Anordnung.The present invention relates to an arrangement according to the preamble of the main claim and a method for producing such an arrangement.
Die vorliegende Erfindung betrifft insbesondere Halbleiter- Strukturen, die mittels planarer Verbindungsverfahren bzw. Ankontaktierungsverfahren erzeugt wurden. Diese sind beispielsweise in der WO 03/030247 beschrieben. Gemäß derartiger Verfahren schließt eine gleichmäßig über die Topografie eines Substrats und auf diesem angeordneten elektronischen Bauele- menten auflaminierte Folie in einer vorbestimmten Schichtdicke die Bauteile ein. Eine solche beispielsweise durch Lami- nieren aufgebrachte Folie bildet gemäß herkömmlicher planarer Verbindungsverfahren eine Isolierung für die Ankontaktierung.The present invention relates, in particular, to semiconductor structures which have been produced by means of planar connection methods or contacting methods. These are described, for example, in WO 03/030247. According to such methods, a film which has been laminated uniformly over the topography of a substrate and arranged on this electronic component includes the components in a predetermined layer thickness. Such a film applied by laminating, for example, forms an insulation for the contacting according to conventional planar bonding methods.
Gemäß herkömmlichen planaren Verbindungsverfahren und gemäß derart erzeugten Anordnungen wird lediglich eine homogene, einheitlich dicke Folie zur Isolierung verwendet. Auf diese Weise kann eine derartige Folie nur einheitlich bestimmte Funktionen bereitstellen. Eine Bereitstellung unterschiedli- eher Funktionen entlang der Folie und entlang der Substratoberfläche ist herkömmlich nicht erzeugbar. Das heißt lateral werden lediglich einheitliche Funktionen bereitgestellt. Das heißt, die Isolierschicht bzw. Isolierfolie erfüllt lediglich einheitliche Funktionen hinsichtlich beispielsweise der Iso- lierung, des thermisch mechanischen Verhaltens, der elektrischen Kontaktierung beispielsweise von Source, Gate und Drain. Bauelemente werden bei herkömmlichen planaren Verbindungsverfahren mit Silikon oder einer homogenen Isolierschicht abgedeckt.According to conventional planar bonding methods and in accordance with arrangements thus produced, only a homogeneous, uniformly thick film is used for insulation. In this way, such a film can provide only uniformly specific functions. Providing different functions along the film and along the substrate surface is not conventionally possible. That is, laterally only uniform functions are provided. That is, the insulating layer or insulating only fulfills uniform functions with regard to, for example, the insulation, the thermo-mechanical behavior, the electrical contacting of, for example, source, gate and drain. Components are covered in conventional planar bonding methods with silicone or a homogeneous insulating layer.
Alternativ kann beispielsweise ein Leistungshalbleitermodul mehrere auf einem Substrat und mit unterschiedlichen Verbindungsverfahren zusammengefasste, miteinander verschaltete, elektrisch steuerbare Bauelemente aufweisen. Derartige Bauelemente sind beispielsweise MOSFETs, IGBTs, passive Bauelemente, Sensoren oder sonstige Halbleiterbauelemente.Alternatively, for example, a power semiconductor module may comprise a plurality of interconnected, interconnected, and interconnected on a substrate and with different connection methods, have electrically controllable components. Such components are, for example, MOSFETs, IGBTs, passive components, sensors or other semiconductor components.
Es ist damit Aufgabe der vorliegenden Erfindung bei Anordnungen mit auf einem Substrat angeordneten elektronischen Bauelementen, die Anordnung derart bereitzustellen, dass verschiedene Bauelemente hinsichtlich deren verschiedenen Funktionen und Anforderungen auf einfache und wirksame Weise op- timiert sind.It is thus an object of the present invention in arrangements with electronic components arranged on a substrate to provide the arrangement such that various components are optimized in a simple and effective manner with regard to their various functions and requirements.
Die Aufgabe wird durch eine Anordnung gemäß dem Hauptanspruch gelöst und die Anordnung wird gemäß den Verfahrensansprüchen geschaffen. Weitere vorteilhafte Ausgestaltungen finden sich in den Unteransprüchen.The object is achieved by an arrangement according to the main claim and the arrangement is created according to the method claims. Further advantageous embodiments can be found in the subclaims.
Lateral bedeutet allgemein seitlich. In Verbindung mit Bauelementen ist in Richtung zu den Seiten des Bauelements gemeint. Die auf einer Substratoberfläche angeordneten elektro- nischen Bauelemente erstrecken sich lateral und zudem lateral entlang der Substratoberfläche bzw. parallel zur Substratoberfläche. Lateralbereich bedeutet ein sich entlang der Substratoberfläche erstreckender Abschnitt, der einem freien Substratoberflächenbereich und/oder einem Bauelementeoberflä- chenbereich zugeordnet ist.Lateral generally means laterally. In connection with components is meant towards the sides of the device. The electronic components arranged on a substrate surface extend laterally and also laterally along the substrate surface or parallel to the substrate surface. Lateral region means a section extending along the substrate surface, which is assigned to a free substrate surface area and / or a component surface area.
Entlang eines Lateralbereiches kann eine auf dem Substrat und/oder auf mindestens einem Bauelement aufgebrachte Schicht homogene Eigenschaften aufweisen. Durch verschiedene Eigen- schaften verschiedener Lateralbereiche können unterschiedliche Schichtfunktionen verwirklicht werden. Eine Funktion kann beispielsweise eine elektrische und/oder thermische Isolierung sein. Weitere Funktionen sind durch ein erforderliches thermisch mechanisches Verhalten von Bauelement und/oder Schicht oder durch eine erforderliche elektrische Kontaktie- rung beispielsweise von Source, Gate und Drain bestimmt. Mit einer vorteilhaften lateralen Ausgestaltung der Schicht bzw. der Folie, beispielsweise mit angepassten Schichtdicken, können die benötigten variablen Funktionen bereitgestellt werden.Along a lateral region, a layer applied to the substrate and / or to at least one component can have homogeneous properties. Through different properties of different lateral areas, different layer functions can be realized. A function may be, for example, an electrical and / or thermal insulation. Further functions are determined by a required thermal mechanical behavior of the component and / or layer or by a required electrical contacting, for example, of the source, gate and drain. With an advantageous lateral embodiment of the layer or the film, for example with adapted layer thicknesses, The required variable functions can be provided.
Gemäß einer vorteilhaften Ausgestaltung sind Eigenschaften einer Schicht eines Lateralbereichs beispielsweise elektrische und/oder thermische Eigenschaften. Dies können beispielsweise elektrische und/oder thermische Isoliereigenschaften sein. Weitere Eigenschaften können durch eine bestimmte Dicke und/oder ein bestimmtes Mischungsverhältnis ei- nes Verbundwerkstoffes mit einem in der Schicht enthaltenenAccording to an advantageous embodiment, properties of a layer of a lateral region are, for example, electrical and / or thermal properties. These may be, for example, electrical and / or thermal insulating properties. Further properties can be achieved by a specific thickness and / or a specific mixing ratio of a composite material with one contained in the layer
Kunststoff und/oder mit einem Anteil mindestens eines von einem in der Schicht enthaltenen Kunststoff verschiedenen Füllstoffs bestimmt sein. Diese Eigenschaften können von Lateralbereich zu Lateralbereich verändert und damit den geforderten Aufgabenstellungen angepasst werden. Damit ist auf einfache Weise eine laterale Funktionsanpassung ermöglicht. Auf diese Weise wird ebenso die Zuverlässigkeit der erzeugten Halbleiterstruktur erhöht. Es ist eine vereinfachte Verarbeitung möglich. Es ist ebenso ein vereinfachtes Herstellen möglich. Die Eigenschaften können zudem beispielsweise das thermische und/oder mechanische Verhalten in einem Lateralbereich betreffen. Die Eigenschaften betreffen ebenso elektrische Eigenschaften bzw. das Isolierverhalten. Durch hermetisch dichte Schichtbereiche oder Isolierschichtbereiche kann bei- spielsweise das Eindringen von Gas oder Flüssigkeiten verhindert werden. Weitere Eigenschaften betreffen die Integration von Kühlfunktionen bzw. Kühleigenschaften. Zu den Eigenschaften bzw. zu der Bereitstellung von bestimmten Funktionen wird insbesondere auf die WO 2005/013358 verwiesen, deren Inhalt hiermit vollständig in diese Anmeldung eingeführt wird.Plastic and / or be determined with a proportion of at least one of a plastic contained in the layer different filler. These properties can be changed from lateral area to lateral area and thus adapted to the required tasks. This allows a simple way a lateral function adaptation. In this way, the reliability of the generated semiconductor structure is also increased. A simplified processing is possible. It is also a simplified manufacture possible. The properties may also relate, for example, to the thermal and / or mechanical behavior in a lateral area. The properties also affect electrical properties or the insulating behavior. By hermetically sealed layer areas or insulating layer areas, for example, the penetration of gas or liquids can be prevented. Further properties relate to the integration of cooling functions or cooling properties. Reference is made in particular to WO 2005/013358 to the properties or to the provision of specific functions, the content of which is hereby incorporated in full in this application.
Gemäß einer weiteren vorteilhaften Ausgestaltung ist mindestens ein Übergangsbereich mindestens eines Bauelements zum Substrat mit einer zusätzlichen Isolierung ausgebildet. Die zusätzliche elektrische Isolierung kann ebenso an einem Randbereich und/oder an einem Kantenbereich eines Bauelements geschaffen sein. Die Eigenschaft der Schicht im Lateralbereich kann zusätzlich eine elektrische Isoliereigenschaft sein. Auf diese Weise können unerwünschte elektrische Verbindungen oder Kontakte in diesem Lateralbereich wirksam verhindert werden. Die zusätzliche Isolierung ist insbesondere bei Halbleiterchips für deren Kantenisolierung zur Vermeidung von Kurz- Schlüssen vorteilhaft verwendbar.According to a further advantageous embodiment, at least one transition region of at least one component to the substrate is formed with an additional insulation. The additional electrical insulation may also be provided at an edge region and / or at an edge region of a component. The property of the layer in the lateral region may additionally be an electrical insulating property. On In this way, unwanted electrical connections or contacts in this lateral area can be effectively prevented. The additional insulation can be used advantageously in particular for semiconductor chips for their edge insulation to avoid short circuits.
Gemäß einer weiteren vorteilhaften Ausgestaltung weist die Schicht Öffnungen zu Bauelementanschlüssen auf, die zur e- lektrischen Verbindung planar ankontaktiert sind. Damit kann ein kompakter Aufbau der Anordnung bewirkt werden.In accordance with a further advantageous embodiment, the layer has openings to component terminals which are planarly contacted to the electrical connection. This can be a compact structure of the arrangement can be effected.
Gemäß einer weiteren vorteilhaften Ausgestaltung sind die e- lektronischen Bauelemente Halbleiterstrukturen wie beispielsweise LEDs, MOSFETs, IGBTs, passive Bauelemente und/oder Sen- soren.According to a further advantageous embodiment, the electronic components are semiconductor structures such as LEDs, MOSFETs, IGBTs, passive components and / or sensors.
Gemäß einer vorteilhaften Ausgestaltung wird bei einem Verfahren zur Erzeugung der vorstehend definierten Anordnung die Lateralbereiche aufweisende Schicht zuerst räumlich getrennt von Substrat und Bauelementanordnung vorgefertigt, und danach gleichzeitig mit einem Verfahrenschritt auf Substrat und Bauelement aufgebracht. Auf diese Weise können zusätzliche Verfahrensschritte vermieden werden.According to an advantageous embodiment, in a method for producing the above-defined arrangement, the layer comprising lateral areas is first prefabricated spatially separated from substrate and component arrangement, and then applied simultaneously to a substrate and component with a method step. In this way, additional process steps can be avoided.
Gemäß einer alternativen Ausgestaltung können die Lateralbereiche der Schicht ebenso einzeln zeitlich aufeinander folgend in mehreren Verfahrensschritten auf Substrat und Bauelement aufgebracht werden.According to an alternative embodiment, the lateral regions of the layer can also be applied to the substrate and component individually in chronological succession in a plurality of method steps.
Gemäß einer vorteilhaften Ausgestaltung erfolgt ein Aufbringen der Schicht mittels Auflaminieren. Dieses Verfahren ist einfach und sehr wirksam.According to an advantageous embodiment, the layer is applied by means of lamination. This procedure is simple and very effective.
Gemäß einer weiteren vorteilhaften Ausgestaltung erfolgt zu- sätzlich in einem Lateralbereich mittels Dispensen und/oder eines Ink-Jet-Verfahrens die Ausbildung einer elektrischen Isolierung an einem Übergang mindestens eines Bauelements zum Substrat und/oder an einem Randbereich und/oder an einem Kantenbereich eines Bauelements .According to a further advantageous refinement, the formation of an electrical insulation at a transition of at least one component to the at least one lateral area by means of dispensing and / or an ink-jet method takes place additionally Substrate and / or at an edge region and / or at an edge region of a component.
Gemäß einer weiteren vorteilhaften Ausgestaltung werden vor dem Auflaminieren auf der Schicht elektrisch leitendeAccording to a further advantageous embodiment, before the lamination on the layer electrically conductive
Schichten und/oder elektronische Bauelemente aufgebracht. Dadurch kann eine komplexe Anordnung auf einfache Weise kompakt geschaffen werden.Layers and / or electronic components applied. As a result, a complex arrangement can be made compact in a simple manner.
Gemäß einer weiteren vorteilhaften Ausgestaltung wird eine Schicht, insbesondere lateral, strukturiert. Damit können weitere Funktionen im Lateralbereich integriert sein, wie beispielsweise die Erzeugung von weiteren Halbleiterstrukturen oder elektrischen Kontakten.According to a further advantageous embodiment, a layer, in particular laterally, is structured. Thus, further functions can be integrated in the lateral area, such as the generation of further semiconductor structures or electrical contacts.
Die vorliegende Erfindung wird anhand eines Ausführungsbeispiels in Verbindung mit der Figur näher beschrieben. Es zeigt :The present invention will be described with reference to an embodiment in conjunction with the figure. It shows :
Figur 1 ein Ausführungsbeispiel einer erfindungsgemäßen Anordnung.Figure 1 shows an embodiment of an inventive arrangement.
Die Figur 1 zeigt ein Substrat 1, auf dem elektronische Bauelemente 2 angeordnet sind. Über diese dadurch erzeugte HaIb- topografie ist eine Schicht 3, beispielsweise eine Isolierschicht 3, aufgebracht. Dabei ist diese Isolierschicht 3 in vier verschiedene hinsichtlich ihrer Eigenschaften homogene Lateralbereiche 4 aufgeteilt. Diese erstrecken sich lateral bzw. entlang der Substratoberfläche über der Topografie. Je- der homogene Abschnitt der Isolierschicht 3 ist auf diese Weise einem Lateralbereich 4 zugeordnet. Ein Abschnitt der Isolierschicht 3 eines Lateralbereichs 4 weist homogene Eigenschaften auf. Dies kann beispielsweise die Dicke sein. Weitere Eigenschaften können ein Mischungsverhältnis eines Verbundwerkstoffes mit dem Kunststoff des Bereichs der Isolierschicht 3 und/oder ein Anteil mindestens eines vom Kunststoff des Bereichs der Isolierschicht 3 verschiedenen Füllstoffs sein. Auf diese Weise kann die Schicht 3 als eine Funktionsschicht bzw. Funktionsfolie in variabler Dicke bzw. mit lateral veränderlichen Eigenschaften bereitgestellt werden. Zudem zeigt Figur 1 eine zusätzliche Isolierung 5 von Übergangsbereichen mindestens eines elektronischen Bauele- ments 3 auf das Substrat 1. Diese Isolierungen können mittels Dispensen bzw. mittels eines Ink-Jet-Verfahrens erzeugt werden.FIG. 1 shows a substrate 1 on which electronic components 2 are arranged. A layer 3, for example an insulating layer 3, is applied by way of this topography produced in this way. In this case, this insulating layer 3 is divided into four different with respect to their properties homogeneous lateral regions 4. These extend laterally or along the substrate surface over the topography. Each homogeneous section of the insulating layer 3 is assigned in this way to a lateral region 4. A portion of the insulating layer 3 of a lateral region 4 has homogeneous properties. This can be, for example, the thickness. Further properties may be a mixing ratio of a composite material with the plastic of the region of the insulating layer 3 and / or a proportion of at least one filler which is different from the plastic of the region of the insulating layer 3. In this way, the layer 3 as a Functional layer or functional film are provided in variable thickness or with laterally variable properties. In addition, FIG. 1 shows an additional insulation 5 of transition areas of at least one electronic component 3 on the substrate 1. These insulations can be produced by dispensing or by means of an ink-jet method.
Ein Verbundwerkstoff kann aus dem Kunststoff der Isolier- schicht 3 und dem Füllstoff bestehen. Der Kunststoff bildet eine Matrix, in die der Füllstoff eingebettet ist. Der Füllstoff dient dabei in erster Linie nicht als Streckungsmittel. Vielmehr ist mit dem Füllstoff eine chemische, elektrische und/oder mechanische Eigenschaft zugänglich, die allein mit einem Kunststoff nicht erreicht werden könnte. So kann mit Hilfe des Füllstoffs eine chemische Beständigkeit des Verbundwerkstoffs gegenüber einer reaktiven Substanz verbessert werden. Ebenso kann eine verbesserte Adhäsion der Schicht 3 beziehungsweise Folie am Halbleiterbauelement 2 und/oder am Substrat 1 erzielt werden. Denkbar ist auch die Verwendung eines elektrisch und/oder thermisch leitfähigen Füllstoffs, der zu einem elektrisch und/oder thermisch leitfähigen Verbundwerkstoff führt. Weiterhin kann durch Zugabe entsprechender Füllstoffe ein Elastizitäts-Modul des Schichtmaterials beziehungsweise Folienmaterials beeinflusst werden. Im Vergleich zu einer Folie aus einem reinen Basismaterial kann die Elastizität der Folie mit Hilfe des Füllstoffs erhöht oder verringert werden. Weitere mit dem Füllstoff beeinflussbare Eigenschaften des Verbundwerkstoffs beziehungsweise der Schicht 3 oder der Folie aus dem Verbundwerkstoff sind Presseigenschaften, Gasdurchlässigkeit, Druckfestigkeit, Dimensionsverhalten und Dielektrizitätszahl des Verbundwerkstoffs der Schicht 3 oder Folie. Diese Eigenschaften beziehen sich sowohl auf die Verarbeitbarkeit der Folie als auch auf die Funktionen der Folie im fertigen Mehrschichtaufbau. Durch die Verwendung eines Gemisches aus mehreren Füllstoffen können mehrere Eigenschaften der Folie gleichzeitig in gewünschter Weise beeinflusst werden. Ein elektronisches Bauelement 2 kann ein Halbleiterbauelement sein.A composite material may consist of the plastic of the insulating layer 3 and the filler. The plastic forms a matrix in which the filler is embedded. The filler serves primarily not as an extender. Rather, with the filler, a chemical, electrical and / or mechanical property accessible that could not be achieved alone with a plastic. Thus, with the help of the filler, a chemical resistance of the composite to a reactive substance can be improved. Likewise, an improved adhesion of the layer 3 or film on the semiconductor component 2 and / or on the substrate 1 can be achieved. It is also conceivable to use an electrically and / or thermally conductive filler, which leads to an electrically and / or thermally conductive composite material. Furthermore, by adding appropriate fillers, a modulus of elasticity of the layer material or film material can be influenced. Compared to a film of a pure base material, the elasticity of the film can be increased or decreased by means of the filler. Other properties of the composite material or of the layer 3 or the film of the composite which can be influenced by the filler are press properties, gas permeability, compressive strength, dimensional behavior and dielectric constant of the composite material of layer 3 or film. These properties relate both to the processability of the film and to the functions of the film in the finished multilayer structure. By using a mixture of several fillers, several properties of the film can simultaneously in desired Be influenced. An electronic component 2 may be a semiconductor device.
Als Füllstoff ist ein beliebiger organischer oder anorgani- scher Füllstoff denkbar. Beispielsweise ist der Füllstoff selbst ein organisches Polymer (Kunststoff) . Der anorganische Füllstoff kann ein beliebiges Metall sein. Anorganische Verbindungen, beispielsweise Carbonate, Oxide, Sulfide und dergleichen, kommen ebenfalls zum Einsatz. Schließlich sind auch metallorganische Verbindungen, beispielsweise siliziumorganische Verbindungen, als Füllstoff möglich.As a filler, any organic or inorganic filler is conceivable. For example, the filler itself is an organic polymer (plastic). The inorganic filler may be any metal. Inorganic compounds, for example carbonates, oxides, sulfides and the like, are also used. Finally, organometallic compounds, such as organosilicon compounds, as a filler are possible.
Der Füllstoff ist vorzugsweise pulverförmig oder faserförmig. Ein Durchmesser der Füllstoffpartikel beträgt einige nm bis hin zu wenigen μm. Der Durchmesser der Füllstoffpartikel ist, genauso wie die Art des Füllstoffs und ein Gehalt des Füllstoffs im Basismaterial, so bemessen, dass ein Verbundwerkstoff mit einer bestimmten Eigenschaft und damit eine Folie mit einer bestimmten Eigenschaft resultieren. Insbesondere sind die Art, die Form und der Gehalt des Füllstoffs so gewählt, dass die Folie oder Schicht 3 auflaminiert werden kann. Dies bedeutet, dass auch bei Verwendung des Füllstoffs eine Elastizität der Folie erzeugt bleibt, so dass die Folie der Oberflächenkontur von Bauelement 2 und Substrat 1 folgen kann. Die Folie ist dabei insbesondere derart gestaltet, dass ein Höhenunterschied von bis zu 500 μm überwunden werden kann. Der Höhenunterschied ist unter anderem durch die Topo- logie des Substrats 1 und durch die auf dem Substrat 1 aufgebrachten Bauelemente 2 gegeben. Der Füllstoff kann beispiels- weise elektrisch und/oder thermisch leitfähig sein. Zur Bereitstellung weiterer Eigenschaften wird erneut auf die WO 2005/013358 verwiesen. The filler is preferably powdery or fibrous. A diameter of the filler particles is a few nm down to a few microns. The diameter of the filler particles, as well as the type of filler and a content of the filler in the base material, is such as to result in a composite having a certain property and thus a film having a certain property. In particular, the type, shape and content of the filler are chosen so that the film or layer 3 can be laminated. This means that even when the filler is used, an elasticity of the film remains generated, so that the film can follow the surface contour of component 2 and substrate 1. The film is in particular designed such that a height difference of up to 500 microns can be overcome. The height difference is given, inter alia, by the topology of the substrate 1 and by the components 2 applied to the substrate 1. The filler may be, for example, electrically and / or thermally conductive. To provide further properties, reference is again made to WO 2005/013358.

Claims

Patentansprüche claims
1. Anordnung mit einem Substrat (1), auf dem mindestens ein elektronisches Bauelement (2) angeordnet ist, wobei sich Ia- teral entlang der Substrat- und/oder Bauelementoberfläche eine Schicht (3) , insbesondere Folie, erstreckt, dadurch gekennzeichnet, dass die Schicht (3) je Lateralbereich (4) bestimmte homogene Eigenschaften aufweist, die von Lateralbereich (4) zu Lateral- bereich (4) variabel sind.1. Arrangement with a substrate (1) on which at least one electronic component (2) is arranged, wherein Iateral along the substrate and / or component surface, a layer (3), in particular film, extends, characterized in that the layer (3) per lateral region (4) has certain homogeneous properties which are variable from the lateral region (4) to the lateral region (4).
2. Anordnung nach Anspruch 1, dadurch gekennzeichnet, dass die Eigenschaften der Schicht (3) eines Lateralbereichs (4) eine elektrische und/oder thermische Eigenschaft und/oder eine Dicke und/oder ein Mischungsverhältnis eines Verbundwerkstoffes mit einem in der Schicht (3) enthaltenen Kunststoff und/oder ein Anteil mindestens eines von einem in der Schicht (3) enthaltenen Kunststoff verschiedenen Füllstoffs ist/sind.2. Arrangement according to claim 1, characterized in that the properties of the layer (3) of a lateral region (4) have an electrical and / or thermal property and / or a thickness and / or a mixing ratio of a composite material with one in the layer (3). contained plastic and / or a proportion of at least one of a plastic contained in the layer (3) different filler is / are.
3. Anordnung nach Anspruch 1 oder 2, dadurch gekennzeichnet, dass mindestens ein Übergangsbereich mindestens eines Bauelements (2) zum Substrat (1) und/oder ein Randbereich und/oder ein Kantenbereich eines Bauelements (2) eine zusätzliche Isolierung (5) aufweist.3. Arrangement according to claim 1 or 2, characterized in that at least one transition region of at least one component (2) to the substrate (1) and / or an edge region and / or an edge region of a component (2) has an additional insulation (5).
4. Anordnung nach einem der vorangehenden Ansprüche, dadurch gekennzeichnet, dass die Schicht (3) Öffnungen zu Bauelementanschlüssen aufweist, die zur elektrischen Verbindung planar ankontaktiert sind.4. Arrangement according to one of the preceding claims, characterized in that the layer (3) has openings to component terminals, which are planarly contacted to the electrical connection.
5. Anordnung nach einem oder mehreren der vorangehenden Ansprüche, dadurch gekennzeichnet, dass elektronische Bauelemente (2) Halbleiter wie beispielsweise LEDs, MOSFETs, IGBTs passive Bauelemente und/oder Sensoren sind. 5. Arrangement according to one or more of the preceding claims, characterized in that electronic components (2) are semiconductors such as LEDs, MOSFETs, IGBTs passive components and / or sensors.
6. Verfahren zur Erzeugung einer Anordnung nach einem oder mehreren der vorangehenden Ansprüche, dadurch gekennzeichnet, dass die Lateralbereiche (4) aufweisende Schicht (3) zuerst räumlich getrennt von Substrat (1) und Bauelement (2) vorgefertigt wird, und danach gleichzeitig in einem Verfahrenschritt auf Substrat (1) und Bauelement (2) aufgebracht wird.6. A method for producing an arrangement according to one or more of the preceding claims, characterized in that the lateral regions (4) having layer (3) is first prefabricated spatially separated from the substrate (1) and component (2) prefabricated, and thereafter simultaneously in a Process step on the substrate (1) and component (2) is applied.
7. Verfahren zur Erzeugung einer Anordnung nach einem oder mehreren der vorangehenden Ansprüche 1 bis 5, dadurch gekennzeichnet, dass die Lateralbereiche (4) der Schicht (3) einzeln zeitlich aufeinander folgend in mehreren Verfahrensschritten auf Substrat (1) und Bauelement (2) aufgebracht werden.7. A method for producing an arrangement according to one or more of the preceding claims 1 to 5, characterized in that the lateral regions (4) of the layer (3) applied individually in temporal succession in a plurality of process steps on substrate (1) and component (2) become.
8. Verfahren nach Anspruch 6 oder 7, gekennzeichnet durch8. The method according to claim 6 or 7, characterized by
Aufbringen der Schicht (3) mittels Auflaminieren.Applying the layer (3) by means of lamination.
9. Verfahren nach einem der Ansprüche 6 bis 8, gekennzeichnet durch mittels Dispensen und/oder eines Ink-Jet-Verfahrens erfolgendes Erzeugen einer zusätzlichen elektrischen Isolierung (5) an einem Übergang mindestens eines Bauelements (2) zum Substrat (1) und/oder an einem Randbereich und/oder an einem Kantenbereich eines Bauelements (2) .9. The method according to any one of claims 6 to 8, characterized by means of dispensing and / or an ink-jet process, generating an additional electrical insulation (5) at a transition of at least one component (2) to the substrate (1) and / or at an edge region and / or at an edge region of a component (2).
10. Verfahren nach einem der Ansprüche 6 bis 9, dadurch gekennzeichnet, dass vor dem Auflaminieren auf der Schicht (3) elektrisch leitende Schichten und elektronische Bauelemente aufgebracht werden.10. The method according to any one of claims 6 to 9, characterized in that prior to the lamination on the layer (3) electrically conductive layers and electronic components are applied.
11. Verfahren nach einem oder mehreren der Ansprüche 6 bis 10, dadurch gekennzeichnet, dass die Schicht (3) strukturiert wird. 11. The method according to one or more of claims 6 to 10, characterized in that the layer (3) is structured.
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