DE102006017115A1 - Semiconductor device with a plastic housing and method for its production - Google Patents
Semiconductor device with a plastic housing and method for its production Download PDFInfo
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- DE102006017115A1 DE102006017115A1 DE102006017115A DE102006017115A DE102006017115A1 DE 102006017115 A1 DE102006017115 A1 DE 102006017115A1 DE 102006017115 A DE102006017115 A DE 102006017115A DE 102006017115 A DE102006017115 A DE 102006017115A DE 102006017115 A1 DE102006017115 A1 DE 102006017115A1
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Abstract
Die Erfindung betrifft ein Halbleiterbauteil (1) und ein Verfahren zu dessen Herstellung. Bei Halbleiterbauteilen (1) kann es unter Belastung zur Delamination der Kunststoffgehäusemasse (9) vom Schaltungsträger (11) kommen, was zum Ausfall des Halbleiterbauteils (11) führen kann. Zur besseren Haftung ist zwischen dem Schaltungsträger (11) und der Kunststoffgehäusemasse (9) eine haftvermittelnde Schicht (10) angeordnet, die in einer Polymermatrix (5) eingebettete mineralisch-keramische Nanopartikel (6) aufweist.The invention relates to a semiconductor component (1) and a method for its production. In the case of semiconductor components (1), the plastic housing compound (9) can delaminate from the circuit carrier (11) under load, which can lead to failure of the semiconductor component (11). For better adhesion, an adhesion-promoting layer (10) is arranged between the circuit carrier (11) and the plastic housing compound (9) which has mineral-ceramic nanoparticles (6) embedded in a polymer matrix (5).
Description
Die Erfindung betrifft ein Halbleiterbauteil mit einem Kunststoffgehäuse und ein Verfahren zu dessen Herstellung. Bei Halbleiterbauteilen können unter Belastung Delaminationen beispielsweise eines Kunststoffgehäuses vom Schaltungsträger auftreten. Haftvermittelnde Schichten zwischen Grenzflächen unterschiedlicher Komponenten der Halbleiterbauteile sollen dazu beitragen, die bisher unzureichende Haftung von Kunststoffgehäusemasse an den relevanten Ober- und/oder Grenzflächen in Halbleiterbauteilen zu verbessern. Derartige unzureichende Haftungen führen zu erhöhtem Ausfall und stellen Fehlerrisiken bei Halbleiterbauteilen dar, die ein Versagen der Bauteile insbesondere bei der Bauteilqualifikation verursachen können.The The invention relates to a semiconductor device with a plastic housing and a method for its production. For semiconductor devices, under Loading delaminations, for example, of a plastic housing from circuit support occur. Adhesive layers between interfaces of different Components of the semiconductor devices should contribute to the hitherto insufficient adhesion of plastic housing material to the relevant Upper and / or interfaces in semiconductor devices. Such insufficient liability to lead to increased Failure and pose error risks in semiconductor devices that a failure of the components, especially in the component qualification can cause.
Besonders gefährlich ist das Eindringen von Feuchtigkeit in derartige Grenzflächen, sodass beim Auflöten eines Halbleiterbauteils auf eine übergeordnete Schaltungsplatine der sog. "Popcorn"-Effekt auftreten kann, bei dem ein Abplatzen von Halbleiterbauteilkomponenten, insbesondere von Kunststoffgehäuseteilen von der Oberfläche des Schaltungsträgers eintreten kann.Especially dangerous is the penetration of moisture into such interfaces, so when soldering a semiconductor device on a parent circuit board the so-called "popcorn" effect occur can, in which a chipping of semiconductor device components, in particular of plastic housing parts from the surface of the circuit board can occur.
Teilweise wurde bisher versucht, durch mechanische Vorbearbeitung die Oberflächen von Schaltungsträgern, die mit der Kunststoffgehäusemasse eine Grenzfläche bilden, aufzurauen. Es wurde auch versucht, durch physikalisch-chemische Verfahren wie Plasmaätzen oder durch eine Reihe hintereinander geschalteter galvanischer Prozess eine Oberflächenstruktur mit Hinterschneidungen aufzubringen und auf diese Weise eine verbesserte Verzahnung der Grenzflächen unterschiedlicher Komponenten zu erreichen.Partially was previously tried by mechanical pre-machining the surfaces of circuit boards, the with the plastic housing compound an interface make up, roughen. It was also tried by physico-chemical Methods such as plasma etching or by a series of galvanic processes connected in series a surface structure with undercuts and in this way an improved Interlocking of the interfaces to achieve different components.
In
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Aufgabe der Erfindung ist es, ein Halbleiterbauteil mit einer Schicht anzugeben, die zwischen Grenzflächen unterschiedlicher Komponenten in Halbleiterbauteilen eingesetzt werden kann und die zuverlässig eine Haftung zwischen den Grenzflächen vermittelt. Darüber hinaus ist es eine weitere Aufgabe der vorliegenden Erfindung, ein möglichst einfaches Verfahren zur Herstellung eines solchen Halbleiterbauteils anzugeben.task The invention is to provide a semiconductor device with a layer the between interfaces different components used in semiconductor devices can be and the reliable mediates adhesion between the interfaces. Furthermore It is another object of the present invention, a possible simple method for producing such a semiconductor device specify.
Erfindungsgemäß wird diese Aufgabe mit dem Gegenstand der unabhängigen Patentansprüche gelöst. Vorteilhafte Weiterbildungen der Erfindung sind Gegenstand der abhängigen Patentansprüche.According to the invention this Problem solved with the subject of the independent claims. advantageous Further developments of the invention are the subject of the dependent claims.
Nach der vorliegenden Erfindung bilden in einem Halbleiterbauteil mit einem Schaltungsträger und zumindest einem auf einem Schaltungssubstrat angeordneten Halbleiterchip Oberflächenbereiche des Halbleiterchips und des Schaltungsträgers Grenzflächen zu weiteren Komponenten des Halbleiterbauteils, beispielsweise zu einer Kunststoffgehäusemasse. Zumindest Be reiche der Grenzflächen sind mit einer haftvermittelnden Schicht versehen, wobei die haftvermittelnde Schicht ein Polymer mit eingebetteten mineralisch-keramischen Nanopartikeln aufweist.To of the present invention in a semiconductor device with a circuit carrier and at least one semiconductor chip arranged on a circuit substrate Surface areas of the Semiconductor chips and the circuit substrate interfaces too other components of the semiconductor device, for example to a Plastic housing composition. At least Be rich of the interfaces are provided with an adhesion-promoting layer, wherein the adhesion-promoting Layer a polymer with embedded mineral-ceramic nanoparticles having.
Einem Grundgedanken der Erfindung zufolge sollten die Grenzflächen für eine gute Haftvermittlung Hinterschneidungen und/oder oberflächenaktive Substanzen aufweisen. Das Erzeugen von Hinterschneidungen direkt in den Oberflächen des Schaltungsträgers und des Kunststoffgehäuses sollte wegen der damit verbundenen Nachteile – wie hoher technischer Aufwand und Beschränkung auf nicht geklebte Chips bei nasschemischen Prozessen – jedoch vermieden werden. Stattdessen sollte eine haftvermittelnde Schicht zwischen den Grenzflächen vorgesehen werden. Wie sich herausgestellt hat, bieten mineralisch-keramische Nanopartikel aus der Polymermatrix ragende Oberflächen an, auf denen Moleküle von weiteren Komponenten verankert werden können, beispielsweise Silane einer Kunststoffgehäusemasse.a The basic idea of the invention is that the interfaces should be good Adhesion undercuts and / or surface-active substances exhibit. The creation of undercuts directly in the surfaces of the circuit carrier and the plastic housing should because of the associated disadvantages - such as high technical effort and restriction on non-bonded chips in wet-chemical processes - however be avoided. Instead, an adhesive layer should be used between the interfaces be provided. As it turned out, provide mineral-ceramic nanoparticles surfaces protruding from the polymer matrix, on which molecules of further Components can be anchored, for example silanes of a plastic housing composition.
Als Polymere für die Polymermatrix sind insbesondere Polymere auf Polybenzoxazolbasis (PBO) oder Polyimidbasis (PI) geeignet, die eine verhältnismäßig gute Haftung auf verschiedenen Oberflächen zeigen. In einer bevorzugten Ausführungsform der Erfindung sind die mineralisch-keramischen Nanopartikel SiO2-Partikel.Particularly suitable as polymers for the polymer matrix are polymers based on polybenzoxazole (PBO) or polyimide (PI), which exhibit relatively good adhesion to various surfaces. In a preferred embodiment of the invention, the mineral-ceramic nanoparticles are SiO 2 particles.
In einer bevorzugten Ausführungsform der Erfindung weisen die Nanopartikel eine mittlere Korngröße k im Bereich von 10 nm ≤ k < 1000 nm, bevorzugt von 10 nm ≤ k < 100 nm auf. Mit dieser mittleren Korngröße erreichen die mineralisch-keramischen Nanopartikel eine für das Aufbringen auf eine Me tallschicht geeignete Größe, die es verhindert, dass tiefe Kratzer und Unterbrechungen sowie Brüche auftreten können.In a preferred embodiment According to the invention, the nanoparticles have a mean particle size k in Range of 10 nm ≦ k <1000 nm, preferred of 10 nm ≤ k <100 nm. With reach this average grain size the mineral-ceramic nanoparticles one for the application to a Me tallschicht suitable size, the It prevents deep scratches and interruptions and breaks can.
Vorteilhafterweise hat die haftvermittelnde Schicht eine Dicke D im Bereich von 1 μm ≤ k ≤ 50 μm. Sie eignet sich insbesondere zur Beschichtung metallischer Oberflächen beispielsweise aus Kupfer, Silber, Gold und/oder Palladium, auf denen eine ausreichend zuverlässige Haftung der Kunststoffgehäusemasse mit herkömmlichen Mitteln besonders schwer zu erzielen ist.Advantageously, the adhesion-promoting layer has a thickness D in the range of 1 μm ≦ k ≦ 50 μm. It is particularly suitable for coating metallic surfaces such as copper, silver, gold and / or palladium, on which one reaching reliable adhesion of the plastic housing composition by conventional means is particularly difficult to achieve.
Das erfindungsgemäße Halbleiterbauteil hat den Vorteil, dass durch die aus der Polymermatrix ragenden, oberflächenaktiven Nanopartikel eine zuverlässige Haftwirkung der Kunststoffgehäusemasse an dem Schaltungsträger erreicht wird. Zudem nimmt die haftvermittelnde Schicht durch die in die Polymermatrix eingebetteten Nanopartikel weniger Feuchtigkeit auf als eine Polymerschicht allein und weist einen niedrigeren thermischen Ausdehnungskoeffizienten auf als eine reine Polymerschicht. Mechanische Verspannungen zwischen Haftvermittlerschicht und insbesondere metallischen Oberflächenbereichen sind dadurch deutlich reduziert.The inventive semiconductor device has the advantage that due to the polymer matrix protruding, surfactants Nanoparticles a reliable Adhesive effect of the plastic housing composition on the circuit carrier is reached. In addition, the adhesion-promoting layer takes through the embedded in the polymer matrix nanoparticles less moisture as a polymer layer alone and has a lower thermal Expansion coefficient on as a pure polymer layer. mechanical Tensions between adhesive layer and in particular metallic surface areas are significantly reduced.
Nach der vorliegenden Erfindung umfasst ein Verfahren zur Herstellung eines Halbleiterbauteils zumindest folgende Verfahrensschritte: Zunächst wird ein Schaltungsträger mit metallischen Oberflächen hergestellt, die als Grenzflächen zu weiteren Komponenten des Halbleiterbauteils vorgesehen sind. Auf den Schaltungsträger wird mindestens ein Halbleiterchip aufgebracht. Vor oder nach dem Aufbringen des Halbleiterchips werden auf zur Beschichtung vorgesehene Bereiche der Grenzflächen des Schaltungsträgers und gegebenenfalls auch des Halbleiterchips mit einer haftvermittelnden Schicht versehen, wobei die haftvermittelnde Schicht ein Polymer mit eingebetteten mineralisch-keramischen Nanopartikeln aufweist. Anschließend werden elektrische Verbindungen zwischen Halbleiterchip und beschichtungsfreien Kontaktanschlussflächen des Schaltungsträgers hergestellt und der Halbleiterchip und die elektrischen Verbindungen in eine Kunststoffgehäusemasse eingebettet unter gleichzeitigem Aufbringen der Kunststoffgehäusemasse auf mit dem Haftvermittler beschichtete Grenzflächen.To The present invention comprises a process for the preparation a semiconductor device at least the following method steps: First, will a circuit carrier with metallic surfaces made that as interfaces are provided to further components of the semiconductor device. On the circuit carrier At least one semiconductor chip is applied. Before or after Applying the semiconductor chip are provided for coating Areas of interfaces of the circuit board and optionally also the semiconductor chip with an adhesion-promoting Layer, wherein the adhesion-promoting layer is a polymer having embedded mineral-ceramic nanoparticles. Subsequently become electrical connections between semiconductor chip and coating-free Contact pads of the circuit board manufactured and the semiconductor chip and the electrical connections in a plastic housing compound embedded with simultaneous application of the plastic housing composition on coated with the primer interfaces.
Vorteilhafterweise werden zum selektiven Aufbringen der haftvermittelnden Schicht die Oberflächenbereiche des Schaltungsträgers und/oder des Halbleiterchips mit einer Schutzschicht versehen, die nicht für eine Beschichtung mit der haftvermittelnden Schicht vorgesehen sind. Diese Schutzschicht wird nach dem Aufbringen der Schicht wieder entfernt.advantageously, For selectively applying the adhesion-promoting layer, the surface areas of the circuit board and / or the semiconductor chip provided with a protective layer which is not for one Coating with the adhesion-promoting layer are provided. This protective layer is restored after the application of the layer away.
Das Einbetten des Halbleiterchips und der elektrischen Verbindungen in die Kunststoffgehäusemasse und das Aufbringen der Kunststoffgehäusemasse auf die beschichteten Grenzflächen erfolgt vorzugsweise mittels Spritzgusstechnik. Besonders vorteilhaft ist das Verfahren zur Haftvermittlung zwischen metallischen Oberflächen des Schaltungsträgers und auf dem Halbleiterchip und der Kunststoffgehäusemasse.The Embedding the semiconductor chip and the electrical connections in the plastic housing compound and applying the plastic housing composition to the coated one interfaces is preferably carried out by injection molding. Especially advantageous is the method of bonding between metallic surfaces of the circuit carrier and on the semiconductor chip and the plastic package.
Ausführungsbeispiele der Erfindung werden im folgenden anhand der beigefügten Figuren näher erläutert.embodiments The invention will be described below with reference to the accompanying drawings explained in more detail.
Gleiche Teile sind in allen Figuren mit den gleichen Bezugszeichen versehen.Same Parts are provided in all figures with the same reference numerals.
Der
Flachleiterrahmen
Der
Halbleiterchip
Vor
dem Auftragen der Schicht
In
- 11
- HalbleiterbauteilSemiconductor device
- 22
- Grenzflächeinterface
- 33
- Oberflächesurface
- 44
- BerührungsflächeTouchpad
- 55
- Polymermatrixpolymer matrix
- 66
- Nanopartikelnanoparticles
- 77
- Komponentecomponent
- 88th
- weitere KomponenteFurther component
- 99
- KunststoffgehäusemassePlastic housing composition
- 1010
- Schichtlayer
- 1111
- Schaltungsträgercircuit support
- 1212
- FlachleiterrahmenLeadframe
- 1313
- InnenflachleiterInternal leads
- 1414
- HalbleiterchipSemiconductor chip
- 1515
- Oberflächenbereiche (beschichtungsfrei)surface areas (Coating-free)
- 1616
- elektrische Verbindungenelectrical links
- 1717
- KontaktanschlussflächeContact pad
- 1818
- AußenflachleiterExternal leads
- 1919
- Außenkontaktoutside Contact
- 2020
- Oberfläche der PolymermatrixSurface of the polymer matrix
- 2222
- Beschichtungcoating
- 2323
- Oberfläche der BeschichtungSurface of the coating
- 2424
- Schutzschichtprotective layer
- 2525
- Kontaktflächecontact area
- DD
- Schichtdickelayer thickness
Claims (14)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
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DE102006017115A DE102006017115B4 (en) | 2006-04-10 | 2006-04-10 | Semiconductor device with a plastic housing and method for its production |
US11/701,044 US7807506B2 (en) | 2006-02-03 | 2007-02-01 | Microelectromechanical semiconductor component with cavity structure and method for producing the same |
US11/733,555 US7843055B2 (en) | 2006-04-10 | 2007-04-10 | Semiconductor device having an adhesion promoting layer and method for producing it |
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DE102006017115A DE102006017115B4 (en) | 2006-04-10 | 2006-04-10 | Semiconductor device with a plastic housing and method for its production |
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DE102006017115A1 true DE102006017115A1 (en) | 2007-10-18 |
DE102006017115B4 DE102006017115B4 (en) | 2008-08-28 |
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DE102004058305B3 (en) * | 2004-12-02 | 2006-05-18 | Infineon Technologies Ag | Semiconductor component with polymer cover layer over electrical linkages leaving contacts exposed |
DE102008032319B4 (en) * | 2008-07-09 | 2012-06-06 | Epcos Ag | Method for producing an MST component |
EP2654074B1 (en) | 2010-03-31 | 2016-10-26 | EV Group E. Thallner GmbH | Method for permanently connecting two metal surfaces |
US20180166369A1 (en) * | 2016-12-14 | 2018-06-14 | Texas Instruments Incorporated | Bi-Layer Nanoparticle Adhesion Film |
US9865527B1 (en) | 2016-12-22 | 2018-01-09 | Texas Instruments Incorporated | Packaged semiconductor device having nanoparticle adhesion layer patterned into zones of electrical conductance and insulation |
US9941194B1 (en) | 2017-02-21 | 2018-04-10 | Texas Instruments Incorporated | Packaged semiconductor device having patterned conductance dual-material nanoparticle adhesion layer |
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US20030148024A1 (en) * | 2001-10-05 | 2003-08-07 | Kodas Toivo T. | Low viscosity precursor compositons and methods for the depositon of conductive electronic features |
JP3797073B2 (en) * | 2000-08-07 | 2006-07-12 | 日本電気株式会社 | High density mounting wiring board and manufacturing method thereof |
WO2003044858A2 (en) * | 2001-11-23 | 2003-05-30 | Koninklijke Philips Electronics N.V. | Semiconductor device and method of enveloping an integrated circuit |
JP4484578B2 (en) * | 2004-05-11 | 2010-06-16 | 株式会社リコー | Pattern shape body and method for manufacturing the same |
JP4378239B2 (en) * | 2004-07-29 | 2009-12-02 | 株式会社日立製作所 | A semiconductor device, a power conversion device using the semiconductor device, and a hybrid vehicle using the power conversion device. |
DE102005028704B4 (en) * | 2005-06-20 | 2016-09-08 | Infineon Technologies Ag | A method of manufacturing a semiconductor device having semiconductor device components embedded in plastic package |
DE102005054267B3 (en) * | 2005-11-11 | 2007-05-24 | Infineon Technologies Ag | Semiconductor component and method for its production and use of the electrospinning method |
JP4842118B2 (en) * | 2006-01-24 | 2011-12-21 | ルネサスエレクトロニクス株式会社 | Manufacturing method of semiconductor device |
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2006
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DE10232788A1 (en) * | 2001-07-18 | 2003-02-06 | Infineon Technologies Ag | Electronic component with semiconducting chip has inner flat conductor ends arranged in block region to overlap, organoceramic insulation, adhesive and heat conducting coating between ends and block |
US20050161210A1 (en) * | 2003-04-29 | 2005-07-28 | Hong Zhong | Organic matrices containing nanomaterials to enhance bulk thermal conductivity |
DE10336747A1 (en) * | 2003-08-11 | 2005-03-17 | Infineon Technologies Ag | Semiconductor component used as a power transistor comprises a layer structure with a semiconductor chip, a support for the chip and an electrically insulating layer made from nano-particles of an electrically insulating material |
DE102004058305B3 (en) * | 2004-12-02 | 2006-05-18 | Infineon Technologies Ag | Semiconductor component with polymer cover layer over electrical linkages leaving contacts exposed |
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US20070235857A1 (en) | 2007-10-11 |
US7843055B2 (en) | 2010-11-30 |
DE102006017115B4 (en) | 2008-08-28 |
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