WO2007023612A1 - Transistor à couche mince - Google Patents

Transistor à couche mince Download PDF

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Publication number
WO2007023612A1
WO2007023612A1 PCT/JP2006/312760 JP2006312760W WO2007023612A1 WO 2007023612 A1 WO2007023612 A1 WO 2007023612A1 JP 2006312760 W JP2006312760 W JP 2006312760W WO 2007023612 A1 WO2007023612 A1 WO 2007023612A1
Authority
WO
WIPO (PCT)
Prior art keywords
tin oxide
thin film
film transistor
semiconductor layer
layer
Prior art date
Application number
PCT/JP2006/312760
Other languages
English (en)
Japanese (ja)
Inventor
Yasuo Kurachi
Original Assignee
Konica Minolta Holdings, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Konica Minolta Holdings, Inc. filed Critical Konica Minolta Holdings, Inc.
Priority to JP2007532027A priority Critical patent/JPWO2007023612A1/ja
Publication of WO2007023612A1 publication Critical patent/WO2007023612A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Definitions

  • the present invention relates to a thin film transistor.
  • Patent Document 1 JP-A-10-190001
  • Patent Document 2 JP 2000-307172 A
  • An object of the present invention is to provide a thin film transistor having a high ONZOFF ratio of switching current and excellent switching characteristics.
  • the thin film transistor according to (1) wherein the tin oxide layer is formed by applying and drying a coating solution containing tin oxide fine particles having a number average particle size of lOOnm or less.
  • the tin oxide layer is coated with a coating solution containing tin oxide fine particles having a number average particle size of 20 nm or less.
  • the thin film transistor according to (1) which is formed by drying.
  • FIG. 1 is a diagram showing a layer configuration of a thin film transistor according to an embodiment of the present invention.
  • FIG. 2 is a diagram showing a thin film transistor evaluation circuit.
  • FIG. 1 shows an example of the layer configuration of the thin film transistor according to the embodiment of the present invention.
  • the present invention is not limited to these layer configurations.
  • FIG. 1 1 is a support
  • 2 is a gate electrode
  • 3 is a gate insulating layer
  • 4 is a semiconductor layer
  • 5 is a source electrode
  • 6 is a drain electrode.
  • Source electrode 5 and drain electrode 6 are connected to semiconductor layer 4.
  • a channel of the semiconductor layer 4 is formed between both electrodes.
  • Fig. 1 (a) shows a top gate type thin film transistor in which the gate electrode 2 is formed as the uppermost layer
  • Fig. 1 (b) shows a bottom gate type thin film transistor in which the gate electrode 2 is formed as the lowermost layer in contact with the support 1.
  • a thin film transistor is shown.
  • FIG. 1 (c) shows a thin film transistor in which the semiconductor layer 4 is not formed as a pattern.
  • the support 1 is made of glass or a flexible resin sheet.
  • a plastic film can be used as the sheet.
  • the plastic film include polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyetherol sulfone (PES), polyetherimide, polyetheretherketone, polyphenylene sulfide, polyarylate, polyimide, polycarbonate (PC).
  • PET polyethylene terephthalate
  • PEN polyethylene naphthalate
  • PES polyetherol sulfone
  • polyetherimide polyetheretherketone
  • polyphenylene sulfide polyarylate
  • polyimide polycarbonate
  • PC polycarbonate
  • films having strengths such as cellulose triacetate (TAC) and cellulose acetate propionate (CAP).
  • TAC cellulose triacetate
  • CAP cellulose acetate propionate
  • tin oxide is used as a semiconductor material constituting the semiconductor layer 4. Since tin oxide exhibits high conductivity when doped with Sb or In, it is used as a transparent electrode. In the present invention, conductive tin oxide doped with Sb or In and high-purity semiconductor or insulator tin oxide are used. Mixed tin oxide is used. Using such a mixed tin oxide, a semiconducting tin oxide layer (hereinafter sometimes referred to as a tin oxide layer) is formed to form a semiconductor layer 4.
  • a semiconducting tin oxide layer hereinafter sometimes referred to as a tin oxide layer
  • high purity tin oxide means a compound containing SnO force S99 mass% or more.
  • the volume resistivity of the conductive tin oxide is as high as less than 10 3 ⁇ cm, and the conductivity is preferable. More preferably, it is less than 10 ⁇ cm. High, favored to exhibit conductivity, Do and the lower limit is particularly limited so, but, considering the economical efficiency 10- 8 Omega cm or more preferred.
  • a thickness of 10 3 ⁇ cm or more and less than 10 16 ⁇ cm is suitable. If the current is less than 10 3 ⁇ cm, the current always flows in the semiconductor layer and is unfavorable 10 16 When the insulator is Q cm or more, the carrier density is reduced and the effect of the present invention is reduced.
  • the volume resistivity of the semiconductor layer 4 which is a semiconductive tin oxide layer is 10 3 Q cm or more 10
  • the tin oxide layer can be prepared by vacuum deposition, molecular beam epitaxy, ion cluster beam, low energy ion beam, ion plating, CVD, sputtering, plasma polymerization, electrolysis Examples include polymerization method, chemical polymerization method, spray coating method, spin coating method, blade coating method, dip coating method, casting method, roll coating method, non-coating method, die coating method, and LB method. it can. However, among these, in terms of productivity, spin coating methods, blade coating methods, dip coating methods, roll coating methods, bar coating methods, which can easily and precisely form thin films using a coating solution containing tin oxide fine particles, The die coating method is preferred.
  • the thickness of the tin oxide layer is not particularly limited! / ⁇ , but the characteristics of the obtained transistor are often greatly influenced by the thickness of the active layer made of a semiconductor.
  • the force varies depending on the amount of high-purity tin oxide contained in the tin oxide layer. Generally, it is 1 m or less, preferably 10 to 30 Onm.
  • a manufacturing method in the case where a tin oxide layer is formed using a coating liquid containing tin oxide fine particles! Is a high-purity tin oxide sol containing conductive tin oxide fine particles doped with Sb or In. Formed by applying and drying a coating solution containing a tin oxide sol containing fine particles of semiconductor or insulator tin oxide, or adjusting the doping amount of Sb or In with respect to tin oxide to 0.001 to less than 5% by mass Using a pulverizer such as a ball mill or a jet mill, and then forming a coating solution in which fine particles of tin oxide dispersed into lOOnm or less are coated and dried.
  • a pulverizer such as a ball mill or a jet mill
  • the solid content ratio is the mixed tin oxide sol of high-purity semiconductor or insulator tin oxide.
  • the solid mass of the conductive tin oxide sol doped with Sb or In when the solid content mass is 1 is 0.1 to 2, preferably 0.15 to 1, more preferably 0.15 force. Et al. To 0.8.
  • the number average particle diameter of the tin oxide fine particles is preferably lOOnm or less, particularly preferably 20nm or less. That's right. Further, the number average particle diameter is preferably 1 nm or more. In the following description, the average particle size of the fine particles is the number average particle size.
  • the material for forming the gate electrode 2, the source electrode 5 and the drain electrode 6 is not particularly limited as long as it is a conductive material. Platinum, gold, silver, nickel, chromium, copper, iron, tin, antimony lead, Tantalum, indium, palladium, tellurium, rhenium, iridium, aluminum, ruthenium, germanium, molybdenum, tungsten, tin oxide 'antimony, indium oxide' tin (ITO), fluorine-doped acid zinc, zinc, carbon, Graphite, glassy carbon, silver paste and carbon paste, lithium, beryllium, sodium, magnesium, potassium, calcium, scandium, titanium, manganese, zirconium, gallium, -ob, sodium, sodium-potassium alloy, magnesium, lithium , Anolemyum, Magnesium Z copper mixture, magnesium Z silver mixture, magnesium Z aluminum mixture
  • Magnesium z indium mixture, aluminum / acid aluminum mixture, lithium z aluminum mixture and the like are used in particular, platinum, gold, silver, copper, aluminum, indium, ITO and carbon are preferred.
  • known conductive polymers whose conductivity has been improved by doping such as conductive polyarlin, conductive polypyrrole, conductive polythiophene, and a complex of polyethylene dioxythiophene and polystyrene sulfonic acid are also suitable. Used.
  • the source electrode 5 and the drain electrode 6 are preferably those having a low electrical resistance on the contact surface with the semiconductor layer among the above-mentioned ones.
  • a method for forming an electrode a method for forming an electrode using a known photolithographic method or a lift-off method, using a conductive thin film formed by a method such as vapor deposition or sputtering using the above as a raw material, aluminum, copper, or the like
  • a method of etching on a metal foil using a resist by thermal transfer, ink jet or the like.
  • the conductive polymer solution or dispersion, or the conductive fine particle dispersion may be directly patterned by ink jetting, or may be formed from the coating film by lithography or laser ablation.
  • a method of patterning an ink containing a conductive polymer or conductive fine particles, a conductive paste, or the like by a printing method such as relief printing, intaglio printing, planographic printing, or screen printing can also be used.
  • the gate insulating layer 3 is substantially composed of inorganic oxide fine particles and a polymer.
  • the inorganic oxide a material having a relative dielectric constant of 3 or more is preferable. Silicon oxide, aluminum oxide, tantalum oxide, titanium oxide, tin oxide, tin oxide, vanadium oxide, Barium strontium titanate, barium zirconate titanate, lead zirconate titanate, lead lanthanum titanate, strontium titanate, barium titanate, bismuth titanate, strontium bismuth titanate, strontium bismuth tantanoate, tantalate nitric acid Examples include bismuth butyrate and trioxide yttrium. Of these, preferred are acid cage, acid aluminum, acid tantalum, titanium oxide, tin oxide and lead oxide.
  • the particle diameter of the fine particles is preferably 1 nm to 100 nm in terms of number average particle diameter, particularly preferably 1 to 20 nm.
  • the average particle size of the fine particles is the number average particle size.
  • Such inorganic oxide fine particles are disclosed in JP 2000-7340 and JP 2001.
  • Examples of the polymer include acrylic resin, acrylic styrene resin, phenol resin such as novolak and polybutanol, silicon resin, polystyrene resin, polycarbonate resin, benzoguanamine resin, melamine resin, and polyolefin resin.
  • Polyester resin, polyamide resin, polyimide resin, butyl acetate resin, polybutyl alcohol, photoradical polymerization system, photo-thion polymerization system photocurable resin and copolymer containing acrylonitrile component, Noethyl pullulan or the like can be used.
  • the amount of the inorganic oxide added to the polymer is 0.5 to 5 parts by mass, preferably 1 to 3 parts by mass with respect to 1 part by mass of the polymer.
  • spray In addition to general methods such as single-coating, spin-coating, blade-coating, dip-coating, casting, roll-coating, bar-coating, and die-coating, there are patterning methods such as printing and inkjet. .
  • the insulating film formed as described above is an inorganic oxide formed by a dry process such as a vacuum deposition method, an ion plating method, a sputtering method, or an atmospheric pressure plasma method. It can also be used in combination with a coating, and an insulating layer in which a polymer dispersion layer of inorganic oxide fine particles and an inorganic oxide layer are laminated can be used.
  • the gate insulating layer 3 can contain subcomponents such as a residual surfactant as long as the characteristics are not impaired.
  • the gate insulating layer 3 has a thickness of 50 nm to 3 ⁇ m, preferably 100 nm to 1 ⁇ m.
  • a homogeneous solution was obtained by dissolving 65 g of Shisui Ninzu hydrate in 2000 ml of distilled water at 100 ° C. Next, this was boiled in V to obtain a coprecipitate. Remove the resulting precipitate by decantation, and wash the precipitate 40 times with distilled water. Drop silver nitrate into the distilled water from which the precipitate has been washed. After confirming that there is no chlorine ion reaction, add 1000 ml of distilled water to make the total volume 2000 ml. Heat up to 100 ° C in a water bath while adding 40 ml of 20% aqueous ammonia every 5 minutes, stir well and concentrate. In this way, a 7% by mass tin oxide sol was obtained. The resulting solution was colorless and transparent. The number average particle diameter of the tin oxide fine particles contained was 1 nm as measured with an electron microscope.
  • a quartz plate is dipped into the sol solution and dried. This operation was repeated 100 times to form a tin oxide thin film on the quartz plate. After forming a thin film on a quartz plate, the volume resistivity was measured by the four probe method and found to be 2. l ⁇ 10 5 Q cm.
  • a homogeneous solution was obtained by dissolving 45 g of stannic chloride and 8 g of antimony chloride in 2000 ml of distilled water at 30 ° C. This was then boiled for 2 hours to obtain a coprecipitate. Remove the resulting precipitate with a decantation and wash the precipitate with distilled water 8 times. Add 1000ml of distilled water to make the total volume 2000ml. Add 40 ml of 30% ammonia water and heat to 100 ° C in a water bath. A colorless and transparent sol solution was obtained. The sol solution is sprayed into an alumina tube having a diameter of 15 cm and a length of 50 cm heated to 800 ° C. to recover the powder. The number average particle diameter of this powder (tin oxide fine particles) was 3 nm as measured with an electron microscope.
  • a 50 nm Au thin film was deposited to form a source electrode and a drain electrode, respectively.
  • the channel length was 20 m.
  • the semiconductor coating solution is deposited using a piezo ink jet, fills the channel between the source electrode and the drain electrode, removes water by drying, and repeats this three times.
  • a semiconductor layer was formed by heat treatment for a minute.
  • the thickness of the formed semiconductor layer was 50 nm.
  • the volume resistivity of the semiconductor layer was 10 12 ⁇ cm.
  • a gate insulating layer was formed by the following method.
  • a MEK dispersion containing 2.0 parts by mass of silica particles having an average particle size of 30 nm was added to a propylene glycol monomethyl ether solution in which 1 part by mass of a well-purified novolac resin was dissolved, and ultrasonic dispersion was performed. .
  • This liquid was applied onto the source electrode, drain electrode and semiconductor layer, and dried at 120 ° C. for 10 minutes to form a gate insulating layer having a thickness of 0.3 m.
  • a commercially available Ag paste was used to form a gate electrode having a width of 30 m to obtain the thin film transistor element shown in FIG.
  • a thin film transistor element was fabricated in the same process as in Example 1 except that a semiconductor layer was formed using an organic semiconductor such as polythiophene instead of the tin oxide layer.
  • Example 2 A thin film transistor was fabricated in the same manner as in Example 1 except that In-doped tin oxide sol was used instead of Sb-doped tin oxide sol.
  • Example 2 and Comparative Example were evaluated using the evaluation circuit shown in FIG. That is, the current flowing between the source electrode 5 and the drain electrode 6 by the power source E1 was measured when the gate voltage was applied by the power source E2 and when it was not applied, and the ONZOFF ratio was obtained.
  • the gate voltage during application was 30V.
  • the force in which the ONZOFF ratio decreased with time was found to be stable with no decrease over time.
  • the thin film transistor according to the present invention exhibits a high ONZOFF ratio and has excellent switching characteristics.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)

Abstract

La présente invention concerne un transistor à couche mince présentant d’excellentes caractéristiques de commutation. Elle concerne spécifiquement un transistor à couche mince comprenant une couche semi-conductrice, une électrode source en contact avec la couche semi-conductrice, une électrode de drain en contact avec la couche semi-conductrice, une électrode de gâchette, une couche d’isolation de gâchette permettant d’isoler l’électrode de gâchette de la couche semi-conductrice, de l'électrode source et de l’électrode de drain, et un support sur lequel elles sont disposées. Le transistor à couche mince est caractérisé en ce que la couche semi-conductrice est une couche d’oxyde d’étain.
PCT/JP2006/312760 2005-08-26 2006-06-27 Transistor à couche mince WO2007023612A1 (fr)

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Application Number Priority Date Filing Date Title
JP2007532027A JPWO2007023612A1 (ja) 2005-08-26 2006-06-27 薄膜トランジスタ

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JP2005-245729 2005-08-26
JP2005245729 2005-08-26

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WO2007023612A1 true WO2007023612A1 (fr) 2007-03-01

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009267190A (ja) * 2008-04-28 2009-11-12 National Institute For Materials Science ナノ結晶粒子分散液と電子デバイス並びにその製造方法
JP2010171411A (ja) * 2008-12-26 2010-08-05 Semiconductor Energy Lab Co Ltd 半導体装置及び半導体装置の作製方法、並びに表示装置及び表示装置の作製方法
JP2015062236A (ja) * 2009-08-07 2015-04-02 株式会社半導体エネルギー研究所 表示装置
WO2015133372A1 (fr) * 2014-03-07 2015-09-11 富士フイルム株式会社 Transistor à film mince
JPWO2018074608A1 (ja) * 2016-10-21 2019-08-08 凸版印刷株式会社 薄膜トランジスタおよびその製造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62223019A (ja) * 1986-03-19 1987-10-01 Taki Chem Co Ltd 結晶質酸化スズ・アンチモンゾル及びその製造方法
JPH11505377A (ja) * 1995-08-03 1999-05-18 フィリップス エレクトロニクス ネムローゼ フェンノートシャップ 半導体装置
JP2004055649A (ja) * 2002-07-17 2004-02-19 Konica Minolta Holdings Inc 有機薄膜トランジスタ及びその製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62223019A (ja) * 1986-03-19 1987-10-01 Taki Chem Co Ltd 結晶質酸化スズ・アンチモンゾル及びその製造方法
JPH11505377A (ja) * 1995-08-03 1999-05-18 フィリップス エレクトロニクス ネムローゼ フェンノートシャップ 半導体装置
JP2004055649A (ja) * 2002-07-17 2004-02-19 Konica Minolta Holdings Inc 有機薄膜トランジスタ及びその製造方法

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009267190A (ja) * 2008-04-28 2009-11-12 National Institute For Materials Science ナノ結晶粒子分散液と電子デバイス並びにその製造方法
JP2010171411A (ja) * 2008-12-26 2010-08-05 Semiconductor Energy Lab Co Ltd 半導体装置及び半導体装置の作製方法、並びに表示装置及び表示装置の作製方法
JP2014241438A (ja) * 2008-12-26 2014-12-25 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP2015062236A (ja) * 2009-08-07 2015-04-02 株式会社半導体エネルギー研究所 表示装置
WO2015133372A1 (fr) * 2014-03-07 2015-09-11 富士フイルム株式会社 Transistor à film mince
JP2015170759A (ja) * 2014-03-07 2015-09-28 富士フイルム株式会社 薄膜トランジスタ
US9755160B2 (en) 2014-03-07 2017-09-05 Fujifilm Corporation Thin film transistor
JPWO2018074608A1 (ja) * 2016-10-21 2019-08-08 凸版印刷株式会社 薄膜トランジスタおよびその製造方法
JP7036387B2 (ja) 2016-10-21 2022-03-15 凸版印刷株式会社 薄膜トランジスタおよびその製造方法

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